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| author | Claudiu Zissulescu <claziss@synopsys.com> | 2017-04-25 17:07:00 +0200 |
|---|---|---|
| committer | claziss <claziss@synopsys.com> | 2017-04-25 17:07:00 +0200 |
| commit | be6a24d8eabdbeef32a9d79e81307af4491fcf56 (patch) | |
| tree | 470a3b6fe7360d79d1f70cb52410ec8d23052eb6 | |
| parent | d581dda88162831ebbd0757312fa93681d945327 (diff) | |
| download | gdb-be6a24d8eabdbeef32a9d79e81307af4491fcf56.zip gdb-be6a24d8eabdbeef32a9d79e81307af4491fcf56.tar.gz gdb-be6a24d8eabdbeef32a9d79e81307af4491fcf56.tar.bz2 | |
[ARC] Prefer NOP instead of MOV 0,0
NOP and MOV 0,0 are having the same encoding. As MOV mnemonic is
located before NOP in the instruction table, the disassembler prints
MOV 0,0 for NOP. Reorder the instructions such that NOP is first.
gas/
2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/b.d: Update test.
* testsuite/gas/arc/noargs_hs.d: Likewise.
opcode/
2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
* arc-tbl.h: Reorder NOP entry to be before MOV instructions.
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/testsuite/gas/arc/b.d | 8 | ||||
| -rw-r--r-- | gas/testsuite/gas/arc/noargs_hs.d | 2 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/arc-tbl.h | 6 |
5 files changed, 17 insertions, 8 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index a60731b..4be806e 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2017-04-25 Claudiu Zissulescu <claziss@synopsys.com> + + * testsuite/gas/arc/b.d: Update test. + * testsuite/gas/arc/noargs_hs.d: Likewise. + 2017-04-25 Maciej W. Rozycki <macro@imgtec.com> * config/tc-mips.c (md_convert_frag): Correct diff --git a/gas/testsuite/gas/arc/b.d b/gas/testsuite/gas/arc/b.d index 50bc305..8f121cd 100644 --- a/gas/testsuite/gas/arc/b.d +++ b/gas/testsuite/gas/arc/b.d @@ -35,12 +35,12 @@ Disassembly of section .text: 68: 0798 ffce bls -104 6c: 0794 ffcf bpnz -108 70: 0791 ffef b.d 0 <text_label> - 74: 264a 7000 mov 0,0 + 74: 264a 7000 nop 78: 0789 ffcf b 0 <text_label> 7c: 0785 ffef b.d 0 <text_label> - 80: 264a 7000 mov 0,0 + 80: 264a 7000 nop 84: 077c ffe1 beq.d -132 - 88: 264a 7000 mov 0,0 + 88: 264a 7000 nop 8c: 0774 ffc2 bne -140 90: 0770 ffe6 bnc.d -144 - 94: 264a 7000 mov 0,0 + 94: 264a 7000 nop diff --git a/gas/testsuite/gas/arc/noargs_hs.d b/gas/testsuite/gas/arc/noargs_hs.d index 14f97aa..7adef57 100644 --- a/gas/testsuite/gas/arc/noargs_hs.d +++ b/gas/testsuite/gas/arc/noargs_hs.d @@ -14,7 +14,7 @@ Disassembly of section .text: e: 246f 003f rtie 12: 216f 003f sleep 0 16: 226f 103f dsync - 1a: 264a 7000 mov 0,0 + 1a: 264a 7000 nop 1e: 78e0 nop_s 20: 256f 003f brk 24: 236f 003f sync diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 532f821..7076de5 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2017-04-25 Claudiu Zissulescu <claziss@synopsys.com> + + * arc-tbl.h: Reorder NOP entry to be before MOV instructions. + 2017-04-25 Maciej W. Rozycki <macro@imgtec.com> * mips-dis.c (print_mips_disassembler_options): Add diff --git a/opcodes/arc-tbl.h b/opcodes/arc-tbl.h index c7d5c34..6b8a589 100644 --- a/opcodes/arc-tbl.h +++ b/opcodes/arc-tbl.h @@ -10113,6 +10113,9 @@ /* minidl<.f><.cc> 0,limm,limm 0010111011001001F1111111100QQQQQ. */ { "minidl", 0x2EC97F80, 0xFFFF7FE0, ARC_OPCODE_ARC600, DSP, NONE, { ZA, LIMM, LIMMdup }, { C_F, C_CC }}, +/* nop 00100110010010100111000000000000. */ +{ "nop", 0x264A7000, 0xFFFFFFFF, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, CONTROL, NONE, { 0 }, { 0 }}, + /* mov<.f> b,c 00100bbb00001010FBBBCCCCCCRRRRRR. */ { "mov", 0x200A0000, 0xF8FF0000, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, MOVE, NONE, { RB, RC }, { C_F }}, @@ -12702,9 +12705,6 @@ /* neg_s b,c 01111bbbccc10011. */ { "neg_s", 0x00007813, 0x0000F81F, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, { RB_S, RC_S }, { 0 }}, -/* nop 00100110010010100111000000000000. */ -{ "nop", 0x264A7000, 0xFFFFFFFF, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, CONTROL, NONE, { 0 }, { 0 }}, - /* nop_s 0111100011100000. */ { "nop_s", 0x000078E0, 0x0000FFFF, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, CONTROL, NONE, { 0 }, { 0 }}, |