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author | Mike Frysinger <vapier@gentoo.org> | 2015-12-30 05:58:12 -0500 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2015-12-30 06:02:27 -0500 |
commit | 2a2757ac7e849aa35fc519ddfcc8688a46b60448 (patch) | |
tree | 3b6a6491587d047ab858e4ea0c6de0310ef58b07 | |
parent | 4ca9d09e826e959f382ab45b2e1dfa8125135124 (diff) | |
download | gdb-2a2757ac7e849aa35fc519ddfcc8688a46b60448.zip gdb-2a2757ac7e849aa35fc519ddfcc8688a46b60448.tar.gz gdb-2a2757ac7e849aa35fc519ddfcc8688a46b60448.tar.bz2 |
sim: h8300: simplify h8300_reg_{fetch,store} funcs
We can leverage the cpu->regs array rather than going through the
function helpers to get nice compact code.
Further, fix up the return values: return -1 when we can't find a
register (and let the caller write out warnings), return 2/4 when
we actually write out that amount, and handle the zero reg.
-rw-r--r-- | sim/h8300/ChangeLog | 12 | ||||
-rw-r--r-- | sim/h8300/compile.c | 70 |
2 files changed, 29 insertions, 53 deletions
diff --git a/sim/h8300/ChangeLog b/sim/h8300/ChangeLog index 6878ab9..834fcec 100644 --- a/sim/h8300/ChangeLog +++ b/sim/h8300/ChangeLog @@ -1,5 +1,17 @@ 2015-12-30 Mike Frysinger <vapier@gentoo.org> + * compile.c (h8300_reg_store): Delete sd. Change init_pointers to + use CPU_STATE (cpu). Change h8_set_pc to cpu->pc. Return -1 and + drop the printf if the default case. Change all the set func calls + to use cpu->regs[rn] instead. + (h8300_reg_store): Delete sd. Change init_pointers to + use CPU_STATE (cpu). Change h8_get_pc to cpu->pc. Return -1 and + drop the printf if the default case. Change all the get func calls + to use cpu->regs[rn] instead. Add ZERO_REGNUM case. Return 2 and + 4 instead of -1 at the end. + +2015-12-30 Mike Frysinger <vapier@gentoo.org> + * compile.c (lvalue): Change sim_engine_set_run_state calls to sim_engine_halt. Declare local cpu. (fetch_1): Likewise. diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c index 5bb4b5d..99d28ad 100644 --- a/sim/h8300/compile.c +++ b/sim/h8300/compile.c @@ -4605,7 +4605,6 @@ sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size) static int h8300_reg_store (SIM_CPU *cpu, int rn, unsigned char *value, int length) { - SIM_DESC sd = CPU_STATE (cpu); int longval; int shortval; int intval; @@ -4613,17 +4612,17 @@ h8300_reg_store (SIM_CPU *cpu, int rn, unsigned char *value, int length) shortval = (value[0] << 8) | (value[1]); intval = h8300hmode ? longval : shortval; - init_pointers (sd); + init_pointers (CPU_STATE (cpu)); switch (rn) { case PC_REGNUM: if(h8300_normal_mode) - h8_set_pc (sd, shortval); /* PC for Normal mode is 2 bytes */ + cpu->pc = shortval; /* PC for Normal mode is 2 bytes */ else - h8_set_pc (sd, intval); + cpu->pc = intval; break; default: - sim_io_printf (sd, "sim_store_register: bad regnum %d.\n", rn); + return -1; case R0_REGNUM: case R1_REGNUM: case R2_REGNUM: @@ -4632,36 +4631,18 @@ h8300_reg_store (SIM_CPU *cpu, int rn, unsigned char *value, int length) case R5_REGNUM: case R6_REGNUM: case R7_REGNUM: - h8_set_reg (sd, rn, intval); - break; case CCR_REGNUM: - h8_set_ccr (sd, intval); - break; case EXR_REGNUM: - h8_set_exr (sd, intval); - break; case SBR_REGNUM: - h8_set_sbr (sd, intval); - break; case VBR_REGNUM: - h8_set_vbr (sd, intval); - break; case MACH_REGNUM: - h8_set_mach (sd, intval); - break; case MACL_REGNUM: - h8_set_macl (sd, intval); + cpu->regs[rn] = intval; break; case CYCLE_REGNUM: - h8_set_cycles (sd, longval); - break; - case INST_REGNUM: - h8_set_insts (sd, longval); - break; - case TICK_REGNUM: - h8_set_ticks (sd, longval); + cpu->regs[rn] = longval; break; } return length; @@ -4670,41 +4651,26 @@ h8300_reg_store (SIM_CPU *cpu, int rn, unsigned char *value, int length) static int h8300_reg_fetch (SIM_CPU *cpu, int rn, unsigned char *buf, int length) { - SIM_DESC sd = CPU_STATE (cpu); int v; int longreg = 0; - init_pointers (sd); + init_pointers (CPU_STATE (cpu)); if (!h8300smode && rn >= EXR_REGNUM) rn++; switch (rn) { default: - sim_io_printf (sd, "sim_fetch_register: bad regnum %d.\n", rn); - v = 0; + return -1; + case PC_REGNUM: + v = cpu->pc; break; case CCR_REGNUM: - v = h8_get_ccr (sd); - break; case EXR_REGNUM: - v = h8_get_exr (sd); - break; - case PC_REGNUM: - v = h8_get_pc (sd); - break; case SBR_REGNUM: - v = h8_get_sbr (sd); - break; case VBR_REGNUM: - v = h8_get_vbr (sd); - break; case MACH_REGNUM: - v = h8_get_mach (sd); - break; case MACL_REGNUM: - v = h8_get_macl (sd); - break; case R0_REGNUM: case R1_REGNUM: case R2_REGNUM: @@ -4713,20 +4679,17 @@ h8300_reg_fetch (SIM_CPU *cpu, int rn, unsigned char *buf, int length) case R5_REGNUM: case R6_REGNUM: case R7_REGNUM: - v = h8_get_reg (sd, rn); + v = cpu->regs[rn]; break; case CYCLE_REGNUM: - v = h8_get_cycles (sd); - longreg = 1; - break; case TICK_REGNUM: - v = h8_get_ticks (sd); - longreg = 1; - break; case INST_REGNUM: - v = h8_get_insts (sd); + v = cpu->regs[rn]; longreg = 1; break; + case ZERO_REGNUM: + v = 0; + break; } /* In Normal mode PC is 2 byte, but other registers are 4 byte */ if ((h8300hmode || longreg) && !(rn == PC_REGNUM && h8300_normal_mode)) @@ -4735,13 +4698,14 @@ h8300_reg_fetch (SIM_CPU *cpu, int rn, unsigned char *buf, int length) buf[1] = v >> 16; buf[2] = v >> 8; buf[3] = v >> 0; + return 4; } else { buf[0] = v >> 8; buf[1] = v; + return 2; } - return -1; } static void |