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authorSimon Marchi <simon.marchi@efficios.com>2024-04-23 16:46:06 +0000
committerSimon Marchi <simon.marchi@efficios.com>2024-04-23 20:52:54 +0000
commit22813df1897ce505665b2fb19f07c6d44b9019b0 (patch)
tree9fc2de094fd199f8876c2f2086e4686ad929f7ec
parentc527001f381536f565291c29663e3ee310b9aedb (diff)
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gdb: remove uses of VLA
Remove uses of VLAs, replace with gdb::byte_vector. There might be more in files that I can't compile, but it's difficult to tell without actually compiling on all platforms. Change-Id: I3e5e34fcac51f3e6b732bb801c77944e010b162e
-rw-r--r--gdb/aarch64-linux-tdep.c4
-rw-r--r--gdb/aarch64-tdep.c27
-rw-r--r--gdb/amd64-linux-nat.c18
-rw-r--r--gdb/fbsd-tdep.c14
-rw-r--r--gdb/loongarch-tdep.c24
-rw-r--r--gdb/mips-linux-tdep.c7
-rw-r--r--gdb/riscv-tdep.c2
-rw-r--r--gdb/solib-darwin.c14
-rw-r--r--gdb/trad-frame.c8
9 files changed, 64 insertions, 54 deletions
diff --git a/gdb/aarch64-linux-tdep.c b/gdb/aarch64-linux-tdep.c
index ad55cf2..d202113 100644
--- a/gdb/aarch64-linux-tdep.c
+++ b/gdb/aarch64-linux-tdep.c
@@ -1296,8 +1296,8 @@ aarch64_linux_supply_za_regset (const struct regset *regset,
}
else
{
- gdb_byte za_zeroed[za_bytes];
- memset (za_zeroed, 0, za_bytes);
+ gdb::byte_vector za_zeroed (za_bytes);
+ memset (za_zeroed.data (), 0, za_bytes);
regcache->raw_supply (tdep->sme_za_regnum, za_zeroed);
}
}
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index a01ae39..094b873 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -1727,16 +1727,16 @@ pass_in_v (struct gdbarch *gdbarch,
{
int regnum = AARCH64_V0_REGNUM + info->nsrn;
/* Enough space for a full vector register. */
- gdb_byte reg[register_size (gdbarch, regnum)];
- gdb_assert (len <= sizeof (reg));
+ gdb::byte_vector reg (register_size (gdbarch, regnum));
+ gdb_assert (len <= reg.size ());
info->argnum++;
info->nsrn++;
- memset (reg, 0, sizeof (reg));
+ memset (reg.data (), 0, reg.size ());
/* PCS C.1, the argument is allocated to the least significant
bits of V register. */
- memcpy (reg, buf, len);
+ memcpy (reg.data (), buf, len);
regcache->cooked_write (regnum, reg);
aarch64_debug_printf ("arg %d in %s", info->argnum,
@@ -2543,8 +2543,8 @@ aarch64_extract_return_value (struct type *type, struct regcache *regs,
{
int regno = AARCH64_V0_REGNUM + i;
/* Enough space for a full vector register. */
- gdb_byte buf[register_size (gdbarch, regno)];
- gdb_assert (len <= sizeof (buf));
+ gdb::byte_vector buf (register_size (gdbarch, regno));
+ gdb_assert (len <= buf.size ());
aarch64_debug_printf
("read HFA or HVA return value element %d from %s",
@@ -2552,7 +2552,7 @@ aarch64_extract_return_value (struct type *type, struct regcache *regs,
regs->cooked_read (regno, buf);
- memcpy (valbuf, buf, len);
+ memcpy (valbuf, buf.data (), len);
valbuf += len;
}
}
@@ -2657,8 +2657,8 @@ aarch64_store_return_value (struct type *type, struct regcache *regs,
{
int regno = AARCH64_V0_REGNUM + i;
/* Enough space for a full vector register. */
- gdb_byte tmpbuf[register_size (gdbarch, regno)];
- gdb_assert (len <= sizeof (tmpbuf));
+ gdb::byte_vector tmpbuf (register_size (gdbarch, regno));
+ gdb_assert (len <= tmpbuf.size ());
aarch64_debug_printf
("write HFA or HVA return value element %d to %s",
@@ -2669,7 +2669,7 @@ aarch64_store_return_value (struct type *type, struct regcache *regs,
original contents of the register before overriding it with a new
value that has a potential size <= 16 bytes. */
regs->cooked_read (regno, tmpbuf);
- memcpy (tmpbuf, valbuf,
+ memcpy (tmpbuf.data (), valbuf,
len > V_REGISTER_SIZE ? V_REGISTER_SIZE : len);
regs->cooked_write (regno, tmpbuf);
valbuf += len;
@@ -3303,17 +3303,16 @@ aarch64_pseudo_write_1 (gdbarch *gdbarch, const frame_info_ptr &next_frame,
unsigned raw_regnum = AARCH64_V0_REGNUM + regnum_offset;
/* Enough space for a full vector register. */
- int raw_reg_size = register_size (gdbarch, raw_regnum);
- gdb_byte raw_buf[raw_reg_size];
+ gdb::byte_vector raw_buf (register_size (gdbarch, raw_regnum));
static_assert (AARCH64_V0_REGNUM == AARCH64_SVE_Z0_REGNUM);
/* Ensure the register buffer is zero, we want gdb writes of the
various 'scalar' pseudo registers to behavior like architectural
writes, register width bytes are written the remainder are set to
zero. */
- memset (raw_buf, 0, register_size (gdbarch, AARCH64_V0_REGNUM));
+ memset (raw_buf.data (), 0, register_size (gdbarch, AARCH64_V0_REGNUM));
- gdb::array_view<gdb_byte> raw_view (raw_buf, raw_reg_size);
+ gdb::array_view<gdb_byte> raw_view (raw_buf);
copy (buf, raw_view.slice (0, buf.size ()));
put_frame_register (next_frame, raw_regnum, raw_view);
}
diff --git a/gdb/amd64-linux-nat.c b/gdb/amd64-linux-nat.c
index aa9295d..a2774c2 100644
--- a/gdb/amd64-linux-nat.c
+++ b/gdb/amd64-linux-nat.c
@@ -235,7 +235,7 @@ amd64_linux_nat_target::fetch_registers (struct regcache *regcache, int regnum)
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
- char xstateregs[tdep->xsave_layout.sizeof_xsave];
+ gdb::byte_vector xstateregs (tdep->xsave_layout.sizeof_xsave);
struct iovec iov;
/* Pre-4.14 kernels have a bug (fixed by commit 0852b374173b
@@ -243,14 +243,14 @@ amd64_linux_nat_target::fetch_registers (struct regcache *regcache, int regnum)
Intel Skylake CPUs") that sometimes causes the mxcsr location in
xstateregs not to be copied by PTRACE_GETREGSET. Make sure that
the location is at least initialized with a defined value. */
- memset (xstateregs, 0, sizeof (xstateregs));
- iov.iov_base = xstateregs;
- iov.iov_len = sizeof (xstateregs);
+ memset (xstateregs.data (), 0, xstateregs.size ());
+ iov.iov_base = xstateregs.data ();
+ iov.iov_len = xstateregs.size ();
if (ptrace (PTRACE_GETREGSET, tid,
(unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
perror_with_name (_("Couldn't get extended state status"));
- amd64_supply_xsave (regcache, -1, xstateregs);
+ amd64_supply_xsave (regcache, -1, xstateregs.data ());
}
else
{
@@ -300,16 +300,16 @@ amd64_linux_nat_target::store_registers (struct regcache *regcache, int regnum)
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
- char xstateregs[tdep->xsave_layout.sizeof_xsave];
+ gdb::byte_vector xstateregs (tdep->xsave_layout.sizeof_xsave);
struct iovec iov;
- iov.iov_base = xstateregs;
- iov.iov_len = sizeof (xstateregs);
+ iov.iov_base = xstateregs.data ();
+ iov.iov_len = xstateregs.size ();
if (ptrace (PTRACE_GETREGSET, tid,
(unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
perror_with_name (_("Couldn't get extended state status"));
- amd64_collect_xsave (regcache, regnum, xstateregs, 0);
+ amd64_collect_xsave (regcache, regnum, xstateregs.data (), 0);
if (ptrace (PTRACE_SETREGSET, tid,
(unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
diff --git a/gdb/fbsd-tdep.c b/gdb/fbsd-tdep.c
index a80f604..cdc1631 100644
--- a/gdb/fbsd-tdep.c
+++ b/gdb/fbsd-tdep.c
@@ -2033,21 +2033,23 @@ fbsd_get_thread_local_address (struct gdbarch *gdbarch, CORE_ADDR dtv_addr,
{
LONGEST tls_index = fbsd_get_tls_index (gdbarch, lm_addr);
- gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
- if (target_read_memory (dtv_addr, buf, sizeof buf) != 0)
+ gdb::byte_vector buf (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
+ if (target_read_memory (dtv_addr, buf.data (), buf.size ()) != 0)
throw_error (TLS_GENERIC_ERROR,
_("Cannot find thread-local variables on this target"));
const struct builtin_type *builtin = builtin_type (gdbarch);
- CORE_ADDR addr = gdbarch_pointer_to_address (gdbarch,
- builtin->builtin_data_ptr, buf);
+ CORE_ADDR addr
+ = gdbarch_pointer_to_address (gdbarch, builtin->builtin_data_ptr,
+ buf.data ());
addr += (tls_index + 1) * builtin->builtin_data_ptr->length ();
- if (target_read_memory (addr, buf, sizeof buf) != 0)
+ if (target_read_memory (addr, buf.data (), buf.size ()) != 0)
throw_error (TLS_GENERIC_ERROR,
_("Cannot find thread-local variables on this target"));
- addr = gdbarch_pointer_to_address (gdbarch, builtin->builtin_data_ptr, buf);
+ addr = gdbarch_pointer_to_address (gdbarch, builtin->builtin_data_ptr,
+ buf.data ());
return addr + offset;
}
diff --git a/gdb/loongarch-tdep.c b/gdb/loongarch-tdep.c
index af0d689..e01879a 100644
--- a/gdb/loongarch-tdep.c
+++ b/gdb/loongarch-tdep.c
@@ -36,14 +36,14 @@ static insn_t
loongarch_fetch_instruction (CORE_ADDR pc)
{
size_t insn_len = loongarch_insn_length (0);
- gdb_byte buf[insn_len];
+ gdb::byte_vector buf (insn_len);
int err;
- err = target_read_memory (pc, buf, insn_len);
+ err = target_read_memory (pc, buf.data (), insn_len);
if (err)
memory_error (TARGET_XFER_E_IO, pc);
- return extract_unsigned_integer (buf, insn_len, BFD_ENDIAN_LITTLE);
+ return extract_unsigned_integer (buf.data (), insn_len, BFD_ENDIAN_LITTLE);
}
/* Return TRUE if INSN is a unconditional branch instruction, otherwise return FALSE. */
@@ -1306,18 +1306,24 @@ loongarch_return_value (struct gdbarch *gdbarch, struct value *function,
and the signed integer scalars are sign-extended. */
if (writebuf)
{
- gdb_byte buf[regsize];
+ gdb::byte_vector buf (regsize);
if (type->is_unsigned ())
{
- ULONGEST data = extract_unsigned_integer (writebuf, len, BFD_ENDIAN_LITTLE);
- store_unsigned_integer (buf, regsize, BFD_ENDIAN_LITTLE, data);
+ ULONGEST data = extract_unsigned_integer (writebuf, len,
+ BFD_ENDIAN_LITTLE);
+ store_unsigned_integer (buf.data (), regsize,
+ BFD_ENDIAN_LITTLE, data);
}
else
{
- LONGEST data = extract_signed_integer (writebuf, len, BFD_ENDIAN_LITTLE);
- store_signed_integer (buf, regsize, BFD_ENDIAN_LITTLE, data);
+ LONGEST data
+ = extract_signed_integer (writebuf, len, BFD_ENDIAN_LITTLE);
+ store_signed_integer (buf.data (), regsize, BFD_ENDIAN_LITTLE,
+ data);
}
- loongarch_xfer_reg (regcache, a0, regsize, nullptr, buf, 0);
+
+ loongarch_xfer_reg (regcache, a0, regsize, nullptr, buf.data (),
+ 0);
}
else
loongarch_xfer_reg (regcache, a0, len, readbuf, nullptr, 0);
diff --git a/gdb/mips-linux-tdep.c b/gdb/mips-linux-tdep.c
index 7bd96a8..fecefd7 100644
--- a/gdb/mips-linux-tdep.c
+++ b/gdb/mips-linux-tdep.c
@@ -99,16 +99,17 @@ mips_linux_get_longjmp_target (const frame_info_ptr &frame, CORE_ADDR *pc)
CORE_ADDR jb_addr;
struct gdbarch *gdbarch = get_frame_arch (frame);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- gdb_byte buf[gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT];
+ gdb::byte_vector buf (gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT);
jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
if (target_read_memory ((jb_addr
+ MIPS_LINUX_JB_PC * MIPS_LINUX_JB_ELEMENT_SIZE),
- buf, gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
+ buf.data (),
+ gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT))
return 0;
- *pc = extract_unsigned_integer (buf,
+ *pc = extract_unsigned_integer (buf.data (),
gdbarch_ptr_bit (gdbarch) / TARGET_CHAR_BIT,
byte_order);
diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index 8909168..79e98d8 100644
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -1015,7 +1015,7 @@ riscv_pseudo_register_write (struct gdbarch *gdbarch,
if (regnum == tdep->fflags_regnum || regnum == tdep->frm_regnum)
{
int fcsr_regnum = RISCV_CSR_FCSR_REGNUM;
- gdb_byte raw_buf[register_size (gdbarch, fcsr_regnum)];
+ gdb::byte_vector raw_buf (register_size (gdbarch, fcsr_regnum));
regcache->raw_read (fcsr_regnum, raw_buf);
diff --git a/gdb/solib-darwin.c b/gdb/solib-darwin.c
index f0828fd..dd4da93 100644
--- a/gdb/solib-darwin.c
+++ b/gdb/solib-darwin.c
@@ -239,18 +239,18 @@ darwin_current_sos ()
for (int i = 0; i < info->all_image.count; i++)
{
CORE_ADDR iinfo = info->all_image.info + i * image_info_size;
- gdb_byte buf[image_info_size];
+ gdb::byte_vector buf (image_info_size);
CORE_ADDR load_addr;
CORE_ADDR path_addr;
struct mach_o_header_external hdr;
unsigned long hdr_val;
/* Read image info from inferior. */
- if (target_read_memory (iinfo, buf, image_info_size))
+ if (target_read_memory (iinfo, buf.data (), image_info_size))
break;
- load_addr = extract_typed_address (buf, ptr_type);
- path_addr = extract_typed_address (buf + ptr_len, ptr_type);
+ load_addr = extract_typed_address (buf.data (), ptr_type);
+ path_addr = extract_typed_address (buf.data () + ptr_len, ptr_type);
/* Read Mach-O header from memory. */
if (target_read_memory (load_addr, (gdb_byte *) &hdr, sizeof (hdr) - 4))
@@ -333,14 +333,14 @@ darwin_read_exec_load_addr_from_dyld (struct darwin_info *info)
for (i = 0; i < info->all_image.count; i++)
{
CORE_ADDR iinfo = info->all_image.info + i * image_info_size;
- gdb_byte buf[image_info_size];
+ gdb::byte_vector buf (image_info_size);
CORE_ADDR load_addr;
/* Read image info from inferior. */
- if (target_read_memory (iinfo, buf, image_info_size))
+ if (target_read_memory (iinfo, buf.data (), image_info_size))
break;
- load_addr = extract_typed_address (buf, ptr_type);
+ load_addr = extract_typed_address (buf.data (), ptr_type);
if (darwin_validate_exec_header (load_addr) == load_addr)
return load_addr;
}
diff --git a/gdb/trad-frame.c b/gdb/trad-frame.c
index e64374a..35bf02e 100644
--- a/gdb/trad-frame.c
+++ b/gdb/trad-frame.c
@@ -154,12 +154,14 @@ trad_frame_set_reg_regmap (struct trad_frame_cache *this_trad_cache,
else
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- gdb_byte buf[slot_size];
+ gdb::byte_vector buf (slot_size);
- if (target_read_memory (addr + offs, buf, sizeof buf) == 0)
+ if (target_read_memory (addr + offs, buf.data (), buf.size ())
+ == 0)
{
LONGEST val
- = extract_unsigned_integer (buf, sizeof buf, byte_order);
+ = extract_unsigned_integer (buf.data (), buf.size (),
+ byte_order);
trad_frame_set_reg_value (this_trad_cache, regno, val);
}
}