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authorPeter Bergner <bergner@vnet.ibm.com>2017-02-28 12:32:07 -0600
committerPeter Bergner <bergner@vnet.ibm.com>2017-02-28 12:32:07 -0600
commit65b48a81404cb058c75c562f7dfdeb74f07eba72 (patch)
treee377b88638eb395dabeac3d31c7199e1acd2edea
parent2979a883540d9ce6e41dd0509ea2a345de9cf050 (diff)
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GDB: Add support for the new set/show disassembler-options commands.
This commit adds support to GDB so that it can modify the disassembler-options value that is passed to the disassembler, similar to objdump's -M option. Currently, the only supported targets are ARM, PowerPC and S/390, but adding support for a new target(s) is not difficult. include/ * dis-asm.h (disasm_options_t): New typedef. (parse_arm_disassembler_option): Remove prototype. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (get_arm_regname_num_options): Likewise. (disassemble_init_s390): New prototype. (disassembler_options_powerpc): Likewise. (disassembler_options_arm): Likewise. (disassembler_options_s390): Likewise. (remove_whitespace_and_extra_commas): Likewise. (disassembler_options_cmp): Likewise. (next_disassembler_option): New inline function. (FOR_EACH_DISASSEMBLER_OPTION): New macro. opcodes/ * disassemble.c Include "safe-ctype.h". (disassemble_init_for_target): Handle s390 init. (remove_whitespace_and_extra_commas): New function. (disassembler_options_cmp): Likewise. * arm-dis.c: Include "libiberty.h". (NUM_ELEM): Delete. (regnames): Use long disassembler style names. Add force-thumb and no-force-thumb options. (NUM_ARM_REGNAMES): Rename from this... (NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE. (get_arm_regname_num_options): Delete. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (parse_disassembler_options): Likewise. (parse_arm_disassembler_option): Rename from this... (parse_arm_disassembler_options): ...to this. Make static. Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options. (print_insn): Use parse_arm_disassembler_options. (disassembler_options_arm): New function. (print_arm_disassembler_options): Handle updated regnames. * ppc-dis.c: Include "libiberty.h". (ppc_opts): Add "32" and "64" entries. (ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp. (powerpc_init_dialect): Add break to switch statement. Use new FOR_EACH_DISASSEMBLER_OPTION macro. (disassembler_options_powerpc): New function. (print_ppc_disassembler_options): Use ARRAY_SIZE. Remove printing of "32" and "64". * s390-dis.c: Include "libiberty.h". (init_flag): Remove unneeded variable. (struct s390_options_t): New structure type. (options): New structure. (init_disasm): Rename from this... (disassemble_init_s390): ...to this. Add initializations for current_arch_mask and option_use_insn_len_bits_p. Remove init_flag. (print_insn_s390): Delete call to init_disasm. (disassembler_options_s390): New function. (print_s390_disassembler_options): Print using information from struct 'options'. * po/opcodes.pot: Regenerate. binutils/ * objdump.c (main): Use remove_whitespace_and_extra_commas. gdb/ * NEWS: Mention new set/show disassembler-options commands. * doc/gdb.texinfo: Document new set/show disassembler-options commands. * disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h". (prospective_options): New static variable. (gdb_disassembler::gdb_disassembler): Initialize m_di.disassembler_options. (gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options. (get_disassembler_options): New function. (set_disassembler_options): Likewise. (set_disassembler_options_sfunc): Likewise. (show_disassembler_options_sfunc): Likewise. (disassembler_options_completer): Likewise. (_initialize_disasm): Likewise. * disasm.h (get_disassembler_options): New prototype. (set_disassembler_options): Likewise. * gdbarch.sh (gdbarch_disassembler_options): New variable. (gdbarch_verify_disassembler_options): Likewise. * gdbarch.c: Regenerate. * gdbarch.h: Likewise. * arm-tdep.c (num_disassembly_options): Delete. (set_disassembly_style): Likewise. (arm_disassembler_options): New static variable. (set_disassembly_style_sfunc): Convert short style name into long option name. Call set_disassembler_options. (show_disassembly_style_sfunc): New function. (arm_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. (_initialize_arm_tdep): Delete regnames variable and update callers. (arm_disassembler_options): Initialize. (disasm_options): New variable. (num_disassembly_options): Rename from this... (num_disassembly_styles): ...to this. Compute by scanning through disasm_options. (valid_disassembly_styles): Initialize using disasm_options. Remove calls to parse_arm_disassembler_option, get_arm_regnames and set_arm_regname_option. Pass show_disassembly_style_sfunc to the "disassembler" setshow command. * rs6000-tdep.c (powerpc_disassembler_options): New static variable. (rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. * s390-tdep.c (s390_disassembler_options): New static variable. (s390_gdbarch_init):all set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. gdb/testsuite/ * gdb.arch/powerpc-power.exp: Delete test. * gdb.arch/powerpc-power.s: Likewise. * gdb.disasm/disassembler-options.exp: New test. * gdb.arch/powerpc-altivec.exp: Likewise. * gdb.arch/powerpc-altivec.s: Likewise. * gdb.arch/powerpc-altivec2.exp: Likewise. * gdb.arch/powerpc-altivec2.s: Likewise. * gdb.arch/powerpc-altivec3.exp: Likewise. * gdb.arch/powerpc-altivec3.s: Likewise. * gdb.arch/powerpc-power7.exp: Likewise. * gdb.arch/powerpc-power7.s: Likewise. * gdb.arch/powerpc-power8.exp: Likewise. * gdb.arch/powerpc-power8.s: Likewise. * gdb.arch/powerpc-power9.exp: Likewise. * gdb.arch/powerpc-power9.s: Likewise. * gdb.arch/powerpc-vsx.exp: Likewise. * gdb.arch/powerpc-vsx.s: Likewise. * gdb.arch/powerpc-vsx2.exp: Likewise. * gdb.arch/powerpc-vsx2.s: Likewise. * gdb.arch/powerpc-vsx3.exp: Likewise. * gdb.arch/powerpc-vsx3.s: Likewise. * gdb.arch/arm-disassembler-options.exp: Likewise. * gdb.arch/powerpc-disassembler-options.exp: Likewise. * gdb.arch/s390-disassembler-options.exp: Likewise.
-rw-r--r--binutils/ChangeLog4
-rw-r--r--binutils/objdump.c16
-rw-r--r--gdb/ChangeLog46
-rw-r--r--gdb/NEWS10
-rw-r--r--gdb/arm-tdep.c106
-rw-r--r--gdb/disasm.c179
-rw-r--r--gdb/disasm.h8
-rw-r--r--gdb/doc/gdb.texinfo21
-rw-r--r--gdb/gdbarch.c44
-rw-r--r--gdb/gdbarch.h9
-rwxr-xr-xgdb/gdbarch.sh5
-rw-r--r--gdb/rs6000-tdep.c7
-rw-r--r--gdb/s390-linux-tdep.c7
-rw-r--r--gdb/testsuite/ChangeLog27
-rw-r--r--gdb/testsuite/gdb.arch/arm-disassembler-options.exp56
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-altivec.exp261
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-altivec.s217
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-altivec2.exp178
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-altivec2.s135
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-altivec3.exp131
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-altivec3.s88
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-disassembler-options.exp56
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-power.exp1429
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-power.s1389
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-power7.exp164
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-power7.s121
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-power8.exp248
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-power8.s205
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-power9.exp445
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-power9.s402
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-vsx.exp225
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-vsx.s182
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-vsx2.exp118
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-vsx2.s75
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-vsx3.exp184
-rw-r--r--gdb/testsuite/gdb.arch/powerpc-vsx3.s141
-rw-r--r--gdb/testsuite/gdb.arch/s390-disassembler-options.exp56
-rw-r--r--gdb/testsuite/gdb.disasm/disassembler-options.exp34
-rw-r--r--include/ChangeLog16
-rw-r--r--include/dis-asm.h41
-rw-r--r--opcodes/ChangeLog43
-rw-r--r--opcodes/arm-dis.c169
-rw-r--r--opcodes/disassemble.c70
-rw-r--r--opcodes/po/opcodes.pot199
-rw-r--r--opcodes/ppc-dis.c59
-rw-r--r--opcodes/s390-dis.c72
46 files changed, 4603 insertions, 3095 deletions
diff --git a/binutils/ChangeLog b/binutils/ChangeLog
index f54c12d..7004b0b 100644
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -1,3 +1,7 @@
+2017-02-28 Peter Bergner <bergner@vnet.ibm.com>
+
+ * objdump.c (main): Use remove_whitespace_and_extra_commas.
+
2017-02-27 Jan Kratochvil <jan.kratochvil@redhat.com>
Fix compilation with GCC 4.4.7.
diff --git a/binutils/objdump.c b/binutils/objdump.c
index b9fecef..4609858 100644
--- a/binutils/objdump.c
+++ b/binutils/objdump.c
@@ -3728,12 +3728,16 @@ main (int argc, char **argv)
machine = optarg;
break;
case 'M':
- if (disassembler_options)
- /* Ignore potential memory leak for now. */
- disassembler_options = concat (disassembler_options, ",",
- optarg, (const char *) NULL);
- else
- disassembler_options = optarg;
+ {
+ char *options;
+ if (disassembler_options)
+ /* Ignore potential memory leak for now. */
+ options = concat (disassembler_options, ",",
+ optarg, (const char *) NULL);
+ else
+ options = optarg;
+ disassembler_options = remove_whitespace_and_extra_commas (options);
+ }
break;
case 'j':
add_only (optarg);
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index fafa10c..b060291 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,49 @@
+2017-02-28 Peter Bergner <bergner@vnet.ibm.com>
+
+ * NEWS: Mention new set/show disassembler-options commands.
+ * doc/gdb.texinfo: Document new set/show disassembler-options commands.
+ * disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h".
+ (prospective_options): New static variable.
+ (gdb_disassembler::gdb_disassembler): Initialize
+ m_di.disassembler_options.
+ (gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options.
+ (get_disassembler_options): New function.
+ (set_disassembler_options): Likewise.
+ (set_disassembler_options_sfunc): Likewise.
+ (show_disassembler_options_sfunc): Likewise.
+ (disassembler_options_completer): Likewise.
+ (_initialize_disasm): Likewise.
+ * disasm.h (get_disassembler_options): New prototype.
+ (set_disassembler_options): Likewise.
+ * gdbarch.sh (gdbarch_disassembler_options): New variable.
+ (gdbarch_verify_disassembler_options): Likewise.
+ * gdbarch.c: Regenerate.
+ * gdbarch.h: Likewise.
+ * arm-tdep.c (num_disassembly_options): Delete.
+ (set_disassembly_style): Likewise.
+ (arm_disassembler_options): New static variable.
+ (set_disassembly_style_sfunc): Convert short style name into long
+ option name. Call set_disassembler_options.
+ (show_disassembly_style_sfunc): New function.
+ (arm_gdbarch_init): Call set_gdbarch_disassembler_options and
+ set_gdbarch_verify_disassembler_options.
+ (_initialize_arm_tdep): Delete regnames variable and update callers.
+ (arm_disassembler_options): Initialize.
+ (disasm_options): New variable.
+ (num_disassembly_options): Rename from this...
+ (num_disassembly_styles): ...to this. Compute by scanning through
+ disasm_options.
+ (valid_disassembly_styles): Initialize using disasm_options.
+ Remove calls to parse_arm_disassembler_option, get_arm_regnames and
+ set_arm_regname_option.
+ Pass show_disassembly_style_sfunc to the "disassembler" setshow command.
+ * rs6000-tdep.c (powerpc_disassembler_options): New static variable.
+ (rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and
+ set_gdbarch_verify_disassembler_options.
+ * s390-tdep.c (s390_disassembler_options): New static variable.
+ (s390_gdbarch_init):all set_gdbarch_disassembler_options and
+ set_gdbarch_verify_disassembler_options.
+
2017-02-27 Simon Marchi <simon.marchi@ericsson.com>
* remote.c (remote_add_target_side_condition): Remove "struct"
diff --git a/gdb/NEWS b/gdb/NEWS
index 76de00e..cf58595 100644
--- a/gdb/NEWS
+++ b/gdb/NEWS
@@ -84,6 +84,16 @@ flash-erase
Erases all the flash memory regions reported by the target. This is
equivalent to the CLI command flash-erase.
+* New commands
+
+set disassembler-options
+show disassembler-options
+ Controls the passing of target specific information to the disassembler.
+ If it is necessary to specify more than one disassembler option then
+ multiple options can be placed together into a comma separated list.
+ The default value is the empty string. Currently, the only supported
+ targets are ARM, PowerPC and S/390.
+
*** Changes in GDB 7.12
* GDB and GDBserver now build with a C++ compiler by default.
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 88ed391..3aee722 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -145,9 +145,6 @@ static const char *const arm_mode_strings[] =
static const char *arm_fallback_mode_string = "auto";
static const char *arm_force_mode_string = "auto";
-/* Number of different reg name sets (options). */
-static int num_disassembly_options;
-
/* The standard register names, and all the valid aliases for them. Note
that `fp', `sp' and `pc' are not added in this alias list, because they
have been added as builtin user registers in
@@ -208,6 +205,9 @@ static const char *const arm_register_names[] =
"f4", "f5", "f6", "f7", /* 20 21 22 23 */
"fps", "cpsr" }; /* 24 25 */
+/* Holds the current set of options to be passed to the disassembler. */
+static char *arm_disassembler_options;
+
/* Valid register name styles. */
static const char **valid_disassembly_styles;
@@ -218,7 +218,9 @@ static const char *disassembly_style;
style. */
static void set_disassembly_style_sfunc(char *, int,
struct cmd_list_element *);
-static void set_disassembly_style (void);
+static void show_disassembly_style_sfunc (struct ui_file *, int,
+ struct cmd_list_element *,
+ const char *);
static void convert_from_extended (const struct floatformat *, const void *,
void *, int);
@@ -8539,9 +8541,32 @@ arm_show_force_mode (struct ui_file *file, int from_tty,
static void
set_disassembly_style_sfunc (char *args, int from_tty,
- struct cmd_list_element *c)
+ struct cmd_list_element *c)
{
- set_disassembly_style ();
+ /* Convert the short style name into the long style name (eg, reg-names-*)
+ before calling the generic set_disassembler_options() function. */
+ std::string long_name = std::string ("reg-names-") + disassembly_style;
+ set_disassembler_options (&long_name[0]);
+}
+
+static void
+show_disassembly_style_sfunc (struct ui_file *file, int from_tty,
+ struct cmd_list_element *c, const char *value)
+{
+ struct gdbarch *gdbarch = get_current_arch ();
+ char *options = get_disassembler_options (gdbarch);
+ const char *style = "";
+ int len = 0;
+ char *opt;
+
+ FOR_EACH_DISASSEMBLER_OPTION (opt, options)
+ if (CONST_STRNEQ (opt, "reg-names-"))
+ {
+ style = &opt[strlen ("reg-names-")];
+ len = strcspn (style, ",");
+ }
+
+ fprintf_unfiltered (file, "The disassembly style is \"%.*s\".\n", len, style);
}
/* Return the ARM register name corresponding to register I. */
@@ -8582,21 +8607,6 @@ arm_register_name (struct gdbarch *gdbarch, int i)
return arm_register_names[i];
}
-static void
-set_disassembly_style (void)
-{
- int current;
-
- /* Find the style that the user wants. */
- for (current = 0; current < num_disassembly_options; current++)
- if (disassembly_style == valid_disassembly_styles[current])
- break;
- gdb_assert (current < num_disassembly_options);
-
- /* Synchronize the disassembler. */
- set_arm_regname_option (current);
-}
-
/* Test whether the coff symbol specific value corresponds to a Thumb
function. */
@@ -9556,6 +9566,9 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
user_reg_add (gdbarch, arm_register_aliases[i].name,
value_of_arm_user_reg, &arm_register_aliases[i].regnum);
+ set_gdbarch_disassembler_options (gdbarch, &arm_disassembler_options);
+ set_gdbarch_valid_disassembler_options (gdbarch, disassembler_options_arm ());
+
return gdbarch;
}
@@ -9579,8 +9592,7 @@ _initialize_arm_tdep (void)
long length;
const char *setname;
const char *setdesc;
- const char *const *regnames;
- int i;
+ int i, j;
char regdesc[1024], *rdptr = regdesc;
size_t rest = sizeof (regdesc);
@@ -9608,9 +9620,6 @@ _initialize_arm_tdep (void)
initialize_tdesc_arm_with_vfpv3 ();
initialize_tdesc_arm_with_neon ();
- /* Get the number of possible sets of register names defined in opcodes. */
- num_disassembly_options = get_arm_regname_num_options ();
-
/* Add root prefix command for all "set arm"/"show arm" commands. */
add_prefix_cmd ("arm", no_class, set_arm_command,
_("Various ARM-specific commands."),
@@ -9620,30 +9629,30 @@ _initialize_arm_tdep (void)
_("Various ARM-specific commands."),
&showarmcmdlist, "show arm ", 0, &showlist);
- /* Sync the opcode insn printer with our register viewer. */
- parse_arm_disassembler_option ("reg-names-std");
- /* Initialize the array that will be passed to
- add_setshow_enum_cmd(). */
+ arm_disassembler_options = xstrdup ("reg-names-std");
+ const disasm_options_t *disasm_options = disassembler_options_arm ();
+ int num_disassembly_styles = 0;
+ for (i = 0; disasm_options->name[i] != NULL; i++)
+ if (CONST_STRNEQ (disasm_options->name[i], "reg-names-"))
+ num_disassembly_styles++;
+
+ /* Initialize the array that will be passed to add_setshow_enum_cmd(). */
valid_disassembly_styles = XNEWVEC (const char *,
- num_disassembly_options + 1);
- for (i = 0; i < num_disassembly_options; i++)
- {
- get_arm_regnames (i, &setname, &setdesc, &regnames);
- valid_disassembly_styles[i] = setname;
- length = snprintf (rdptr, rest, "%s - %s\n", setname, setdesc);
- rdptr += length;
- rest -= length;
- /* When we find the default names, tell the disassembler to use
- them. */
- if (!strcmp (setname, "std"))
- {
- disassembly_style = setname;
- set_arm_regname_option (i);
- }
- }
+ num_disassembly_styles + 1);
+ for (i = j = 0; disasm_options->name[i] != NULL; i++)
+ if (CONST_STRNEQ (disasm_options->name[i], "reg-names-"))
+ {
+ size_t offset = strlen ("reg-names-");
+ const char *style = disasm_options->name[i];
+ valid_disassembly_styles[j++] = &style[offset];
+ length = snprintf (rdptr, rest, "%s - %s\n", &style[offset],
+ disasm_options->description[i]);
+ rdptr += length;
+ rest -= length;
+ }
/* Mark the end of valid options. */
- valid_disassembly_styles[num_disassembly_options] = NULL;
+ valid_disassembly_styles[num_disassembly_styles] = NULL;
/* Create the help text. */
std::string helptext = string_printf ("%s%s%s",
@@ -9657,8 +9666,7 @@ _initialize_arm_tdep (void)
_("Show the disassembly style."),
helptext.c_str (),
set_disassembly_style_sfunc,
- NULL, /* FIXME: i18n: The disassembly style is
- \"%s\". */
+ show_disassembly_style_sfunc,
&setarmcmdlist, &showarmcmdlist);
add_setshow_boolean_cmd ("apcs32", no_class, &arm_apcs_32,
diff --git a/gdb/disasm.c b/gdb/disasm.c
index 64d6684..ab080e2 100644
--- a/gdb/disasm.c
+++ b/gdb/disasm.c
@@ -18,19 +18,26 @@
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "defs.h"
+#include "arch-utils.h"
#include "target.h"
#include "value.h"
#include "ui-out.h"
#include "disasm.h"
#include "gdbcore.h"
+#include "gdbcmd.h"
#include "dis-asm.h"
#include "source.h"
+#include "safe-ctype.h"
#include <algorithm>
/* Disassemble functions.
FIXME: We should get rid of all the duplicate code in gdb that does
the same thing: disassemble_command() and the gdbtk variation. */
+/* This variable is used to hold the prospective disassembler_options value
+ which is set by the "set disassembler_options" command. */
+static char *prospective_options = NULL;
+
/* This structure is used to store line number information for the
deprecated /m option.
We need a different sort of line table from the normal one cuz we can't
@@ -780,6 +787,7 @@ gdb_disassembler::gdb_disassembler (struct gdbarch *gdbarch,
m_di.endian = gdbarch_byte_order (gdbarch);
m_di.endian_code = gdbarch_byte_order_for_code (gdbarch);
m_di.application_data = this;
+ m_di.disassembler_options = get_disassembler_options (gdbarch);
disassemble_init_for_target (&m_di);
}
@@ -888,6 +896,7 @@ gdb_buffered_insn_length_init_dis (struct gdbarch *gdbarch,
di->endian = gdbarch_byte_order (gdbarch);
di->endian_code = gdbarch_byte_order_for_code (gdbarch);
+ di->disassembler_options = get_disassembler_options (gdbarch);
disassemble_init_for_target (di);
}
@@ -904,3 +913,173 @@ gdb_buffered_insn_length (struct gdbarch *gdbarch,
return gdbarch_print_insn (gdbarch, addr, &di);
}
+
+char *
+get_disassembler_options (struct gdbarch *gdbarch)
+{
+ char **disassembler_options = gdbarch_disassembler_options (gdbarch);
+ if (disassembler_options == NULL)
+ return NULL;
+ return *disassembler_options;
+}
+
+void
+set_disassembler_options (char *prospective_options)
+{
+ struct gdbarch *gdbarch = get_current_arch ();
+ char **disassembler_options = gdbarch_disassembler_options (gdbarch);
+ const disasm_options_t *valid_options;
+ char *options = remove_whitespace_and_extra_commas (prospective_options);
+ char *opt;
+
+ /* Allow all architectures, even ones that do not support 'set disassembler',
+ to reset their disassembler options to NULL. */
+ if (options == NULL)
+ {
+ if (disassembler_options != NULL)
+ {
+ free (*disassembler_options);
+ *disassembler_options = NULL;
+ }
+ return;
+ }
+
+ valid_options = gdbarch_valid_disassembler_options (gdbarch);
+ if (valid_options == NULL)
+ {
+ fprintf_filtered (gdb_stdlog, _("\
+'set disassembler-options ...' is not supported on this architecture.\n"));
+ return;
+ }
+
+ /* Verify we have valid disassembler options. */
+ FOR_EACH_DISASSEMBLER_OPTION (opt, options)
+ {
+ size_t i;
+ for (i = 0; valid_options->name[i] != NULL; i++)
+ if (disassembler_options_cmp (opt, valid_options->name[i]) == 0)
+ break;
+ if (valid_options->name[i] == NULL)
+ {
+ fprintf_filtered (gdb_stdlog,
+ _("Invalid disassembler option value: '%s'.\n"),
+ opt);
+ return;
+ }
+ }
+
+ free (*disassembler_options);
+ *disassembler_options = xstrdup (options);
+}
+
+static void
+set_disassembler_options_sfunc (char *args, int from_tty,
+ struct cmd_list_element *c)
+{
+ set_disassembler_options (prospective_options);
+}
+
+static void
+show_disassembler_options_sfunc (struct ui_file *file, int from_tty,
+ struct cmd_list_element *c, const char *value)
+{
+ struct gdbarch *gdbarch = get_current_arch ();
+ const disasm_options_t *valid_options;
+
+ const char *options = get_disassembler_options (gdbarch);
+ if (options == NULL)
+ options = "";
+
+ fprintf_filtered (file, _("The current disassembler options are '%s'\n"),
+ options);
+
+ valid_options = gdbarch_valid_disassembler_options (gdbarch);
+
+ if (valid_options == NULL)
+ return;
+
+ fprintf_filtered (file, _("\n\
+The following disassembler options are supported for use with the\n\
+'set disassembler-options <option>[,<option>...]' command:\n"));
+
+ if (valid_options->description != NULL)
+ {
+ size_t i, max_len = 0;
+
+ /* Compute the length of the longest option name. */
+ for (i = 0; valid_options->name[i] != NULL; i++)
+ {
+ size_t len = strlen (valid_options->name[i]);
+ if (max_len < len)
+ max_len = len;
+ }
+
+ for (i = 0, max_len++; valid_options->name[i] != NULL; i++)
+ {
+ fprintf_filtered (file, " %s", valid_options->name[i]);
+ if (valid_options->description[i] != NULL)
+ fprintf_filtered (file, "%*c %s",
+ (int)(max_len - strlen (valid_options->name[i])), ' ',
+ valid_options->description[i]);
+ fprintf_filtered (file, "\n");
+ }
+ }
+ else
+ {
+ size_t i;
+ fprintf_filtered (file, " ");
+ for (i = 0; valid_options->name[i] != NULL; i++)
+ {
+ fprintf_filtered (file, "%s", valid_options->name[i]);
+ if (valid_options->name[i + 1] != NULL)
+ fprintf_filtered (file, ", ");
+ wrap_here (" ");
+ }
+ fprintf_filtered (file, "\n");
+ }
+}
+
+/* A completion function for "set disassembler". */
+
+static VEC (char_ptr) *
+disassembler_options_completer (struct cmd_list_element *ignore,
+ const char *text, const char *word)
+{
+ struct gdbarch *gdbarch = get_current_arch ();
+ const disasm_options_t *opts = gdbarch_valid_disassembler_options (gdbarch);
+
+ if (opts != NULL)
+ {
+ /* Only attempt to complete on the last option text. */
+ const char *separator = strrchr (text, ',');
+ if (separator != NULL)
+ text = separator + 1;
+ text = skip_spaces_const (text);
+ return complete_on_enum (opts->name, text, word);
+ }
+ return NULL;
+}
+
+
+/* Initialization code. */
+
+/* -Wmissing-prototypes */
+extern initialize_file_ftype _initialize_disasm;
+
+void
+_initialize_disasm (void)
+{
+ struct cmd_list_element *cmd;
+
+ /* Add the command that controls the disassembler options. */
+ cmd = add_setshow_string_noescape_cmd ("disassembler-options", no_class,
+ &prospective_options, _("\
+Set the disassembler options.\n\
+Usage: set disassembler-options <option>[,<option>...]\n\n\
+See: 'show disassembler-options' for valid option values.\n"), _("\
+Show the disassembler options."), NULL,
+ set_disassembler_options_sfunc,
+ show_disassembler_options_sfunc,
+ &setlist, &showlist);
+ set_cmd_completer (cmd, disassembler_options_completer);
+}
diff --git a/gdb/disasm.h b/gdb/disasm.h
index 42c1f3a..ad3e8dd 100644
--- a/gdb/disasm.h
+++ b/gdb/disasm.h
@@ -138,4 +138,12 @@ extern int gdb_buffered_insn_length (struct gdbarch *gdbarch,
const gdb_byte *insn, int max_len,
CORE_ADDR memaddr);
+/* Returns GDBARCH's disassembler options. */
+
+extern char *get_disassembler_options (struct gdbarch *gdbarch);
+
+/* Sets the active gdbarch's disassembler options to OPTIONS. */
+
+extern void set_disassembler_options (char *options);
+
#endif
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index 962325b..f19e80f 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -8520,6 +8520,27 @@ location of the relocation table. On some architectures, @value{GDBN}
might be able to resolve these to actual function names.
@table @code
+@kindex set disassembler-options
+@cindex disassembler options
+@item set disassembler-options @var{option1}[,@var{option2}@dots{}]
+This command controls the passing of target specific information to
+the disassembler. For a list of valid options, please refer to the
+@code{-M}/@code{--disassembler-options} section of the @samp{objdump}
+manual and/or the output of @kbd{objdump --help}
+(@pxref{objdump,,objdump,binutils.info,The GNU Binary Utilities}).
+The default value is the empty string.
+
+If it is necessary to specify more than one disassembler option, then
+multiple options can be placed together into a comma separated list.
+Currently this command is only supported on targets ARM, PowerPC
+and S/390.
+
+@kindex show disassembler-options
+@item show disassembler-options
+Show the current setting of the disassembler options.
+@end table
+
+@table @code
@kindex set disassembly-flavor
@cindex Intel disassembly flavor
@cindex AT&T disassembly flavor
diff --git a/gdb/gdbarch.c b/gdb/gdbarch.c
index 266f2e9..f52cf5d 100644
--- a/gdb/gdbarch.c
+++ b/gdb/gdbarch.c
@@ -339,6 +339,8 @@ struct gdbarch
gdbarch_gcc_target_options_ftype *gcc_target_options;
gdbarch_gnu_triplet_regexp_ftype *gnu_triplet_regexp;
gdbarch_addressable_memory_unit_size_ftype *addressable_memory_unit_size;
+ char ** disassembler_options;
+ const disasm_options_t * valid_disassembler_options;
};
/* Create a new ``struct gdbarch'' based on information provided by
@@ -692,6 +694,8 @@ verify_gdbarch (struct gdbarch *gdbarch)
/* Skip verify of gcc_target_options, invalid_p == 0 */
/* Skip verify of gnu_triplet_regexp, invalid_p == 0 */
/* Skip verify of addressable_memory_unit_size, invalid_p == 0 */
+ /* Skip verify of disassembler_options, invalid_p == 0 */
+ /* Skip verify of valid_disassembler_options, invalid_p == 0 */
if (!log.empty ())
internal_error (__FILE__, __LINE__,
_("verify_gdbarch: the following are invalid ...%s"),
@@ -875,6 +879,9 @@ gdbarch_dump (struct gdbarch *gdbarch, struct ui_file *file)
"gdbarch_dump: deprecated_function_start_offset = %s\n",
core_addr_to_string_nz (gdbarch->deprecated_function_start_offset));
fprintf_unfiltered (file,
+ "gdbarch_dump: disassembler_options = %s\n",
+ pstring (*gdbarch->disassembler_options));
+ fprintf_unfiltered (file,
"gdbarch_dump: gdbarch_displaced_step_copy_insn_p() = %d\n",
gdbarch_displaced_step_copy_insn_p (gdbarch));
fprintf_unfiltered (file,
@@ -1421,6 +1428,9 @@ gdbarch_dump (struct gdbarch *gdbarch, struct ui_file *file)
"gdbarch_dump: unwind_sp = <%s>\n",
host_address_to_string (gdbarch->unwind_sp));
fprintf_unfiltered (file,
+ "gdbarch_dump: valid_disassembler_options = %s\n",
+ host_address_to_string (gdbarch->valid_disassembler_options->name));
+ fprintf_unfiltered (file,
"gdbarch_dump: value_from_register = <%s>\n",
host_address_to_string (gdbarch->value_from_register));
fprintf_unfiltered (file,
@@ -4956,6 +4966,40 @@ set_gdbarch_addressable_memory_unit_size (struct gdbarch *gdbarch,
gdbarch->addressable_memory_unit_size = addressable_memory_unit_size;
}
+char **
+gdbarch_disassembler_options (struct gdbarch *gdbarch)
+{
+ gdb_assert (gdbarch != NULL);
+ /* Skip verify of disassembler_options, invalid_p == 0 */
+ if (gdbarch_debug >= 2)
+ fprintf_unfiltered (gdb_stdlog, "gdbarch_disassembler_options called\n");
+ return gdbarch->disassembler_options;
+}
+
+void
+set_gdbarch_disassembler_options (struct gdbarch *gdbarch,
+ char ** disassembler_options)
+{
+ gdbarch->disassembler_options = disassembler_options;
+}
+
+const disasm_options_t *
+gdbarch_valid_disassembler_options (struct gdbarch *gdbarch)
+{
+ gdb_assert (gdbarch != NULL);
+ /* Skip verify of valid_disassembler_options, invalid_p == 0 */
+ if (gdbarch_debug >= 2)
+ fprintf_unfiltered (gdb_stdlog, "gdbarch_valid_disassembler_options called\n");
+ return gdbarch->valid_disassembler_options;
+}
+
+void
+set_gdbarch_valid_disassembler_options (struct gdbarch *gdbarch,
+ const disasm_options_t * valid_disassembler_options)
+{
+ gdbarch->valid_disassembler_options = valid_disassembler_options;
+}
+
/* Keep a registry of per-architecture data-pointers required by GDB
modules. */
diff --git a/gdb/gdbarch.h b/gdb/gdbarch.h
index 50bc6a9..34f82a7 100644
--- a/gdb/gdbarch.h
+++ b/gdb/gdbarch.h
@@ -36,6 +36,7 @@
#define GDBARCH_H
#include "frame.h"
+#include "dis-asm.h"
struct floatformat;
struct ui_file;
@@ -1545,6 +1546,14 @@ typedef int (gdbarch_addressable_memory_unit_size_ftype) (struct gdbarch *gdbarc
extern int gdbarch_addressable_memory_unit_size (struct gdbarch *gdbarch);
extern void set_gdbarch_addressable_memory_unit_size (struct gdbarch *gdbarch, gdbarch_addressable_memory_unit_size_ftype *addressable_memory_unit_size);
+/* Functions for allowing a target to modify its disassembler options. */
+
+extern char ** gdbarch_disassembler_options (struct gdbarch *gdbarch);
+extern void set_gdbarch_disassembler_options (struct gdbarch *gdbarch, char ** disassembler_options);
+
+extern const disasm_options_t * gdbarch_valid_disassembler_options (struct gdbarch *gdbarch);
+extern void set_gdbarch_valid_disassembler_options (struct gdbarch *gdbarch, const disasm_options_t * valid_disassembler_options);
+
/* Definition for an unknown syscall, used basically in error-cases. */
#define UNKNOWN_SYSCALL (-1)
diff --git a/gdb/gdbarch.sh b/gdb/gdbarch.sh
index 54549b6..6902e0e 100755
--- a/gdb/gdbarch.sh
+++ b/gdb/gdbarch.sh
@@ -1163,6 +1163,10 @@ m:const char *:gnu_triplet_regexp:void:::default_gnu_triplet_regexp::0
# each address in memory.
m:int:addressable_memory_unit_size:void:::default_addressable_memory_unit_size::0
+# Functions for allowing a target to modify its disassembler options.
+v:char **:disassembler_options:::0:0::0:pstring (*gdbarch->disassembler_options)
+v:const disasm_options_t *:valid_disassembler_options:::0:0::0:host_address_to_string (gdbarch->valid_disassembler_options->name)
+
EOF
}
@@ -1259,6 +1263,7 @@ cat <<EOF
#define GDBARCH_H
#include "frame.h"
+#include "dis-asm.h"
struct floatformat;
struct ui_file;
diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c
index 72ee05d..67c4d51 100644
--- a/gdb/rs6000-tdep.c
+++ b/gdb/rs6000-tdep.c
@@ -106,6 +106,9 @@
&& (regnum) >= (tdep)->ppc_efpr0_regnum \
&& (regnum) < (tdep)->ppc_efpr0_regnum + ppc_num_efprs)
+/* Holds the current set of options to be passed to the disassembler. */
+static char *powerpc_disassembler_options;
+
/* The list of available "set powerpc ..." and "show powerpc ..."
commands. */
static struct cmd_list_element *setpowerpccmdlist = NULL;
@@ -6609,6 +6612,10 @@ rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
else
register_ppc_ravenscar_ops (gdbarch);
+ set_gdbarch_disassembler_options (gdbarch, &powerpc_disassembler_options);
+ set_gdbarch_valid_disassembler_options (gdbarch,
+ disassembler_options_powerpc ());
+
return gdbarch;
}
diff --git a/gdb/s390-linux-tdep.c b/gdb/s390-linux-tdep.c
index febdd14..abc9438 100644
--- a/gdb/s390-linux-tdep.c
+++ b/gdb/s390-linux-tdep.c
@@ -79,6 +79,9 @@
#define XML_SYSCALL_FILENAME_S390 "syscalls/s390-linux.xml"
#define XML_SYSCALL_FILENAME_S390X "syscalls/s390x-linux.xml"
+/* Holds the current set of options to be passed to the disassembler. */
+static char *s390_disassembler_options;
+
enum s390_abi_kind
{
ABI_LINUX_S390,
@@ -8113,6 +8116,10 @@ s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
s390_init_linux_record_tdep (&s390_linux_record_tdep, ABI_LINUX_S390);
s390_init_linux_record_tdep (&s390x_linux_record_tdep, ABI_LINUX_ZSERIES);
+ set_gdbarch_disassembler_options (gdbarch, &s390_disassembler_options);
+ set_gdbarch_valid_disassembler_options (gdbarch,
+ disassembler_options_s390 ());
+
return gdbarch;
}
diff --git a/gdb/testsuite/ChangeLog b/gdb/testsuite/ChangeLog
index b102b87..cb8bf53 100644
--- a/gdb/testsuite/ChangeLog
+++ b/gdb/testsuite/ChangeLog
@@ -1,3 +1,30 @@
+2017-02-28 Peter Bergner <bergner@vnet.ibm.com>
+
+ * gdb.arch/powerpc-power.exp: Delete test.
+ * gdb.arch/powerpc-power.s: Likewise.
+ * gdb.disasm/disassembler-options.exp: New test.
+ * gdb.arch/powerpc-altivec.exp: Likewise.
+ * gdb.arch/powerpc-altivec.s: Likewise.
+ * gdb.arch/powerpc-altivec2.exp: Likewise.
+ * gdb.arch/powerpc-altivec2.s: Likewise.
+ * gdb.arch/powerpc-altivec3.exp: Likewise.
+ * gdb.arch/powerpc-altivec3.s: Likewise.
+ * gdb.arch/powerpc-power7.exp: Likewise.
+ * gdb.arch/powerpc-power7.s: Likewise.
+ * gdb.arch/powerpc-power8.exp: Likewise.
+ * gdb.arch/powerpc-power8.s: Likewise.
+ * gdb.arch/powerpc-power9.exp: Likewise.
+ * gdb.arch/powerpc-power9.s: Likewise.
+ * gdb.arch/powerpc-vsx.exp: Likewise.
+ * gdb.arch/powerpc-vsx.s: Likewise.
+ * gdb.arch/powerpc-vsx2.exp: Likewise.
+ * gdb.arch/powerpc-vsx2.s: Likewise.
+ * gdb.arch/powerpc-vsx3.exp: Likewise.
+ * gdb.arch/powerpc-vsx3.s: Likewise.
+ * gdb.arch/arm-disassembler-options.exp: Likewise.
+ * gdb.arch/powerpc-disassembler-options.exp: Likewise.
+ * gdb.arch/s390-disassembler-options.exp: Likewise.
+
2017-02-23 Luis Machado <lgustavo@codesourcery.com>
* gdb.reverse/insn-reverse.x86.c (check_rdrand_support): Renamed to ...
diff --git a/gdb/testsuite/gdb.arch/arm-disassembler-options.exp b/gdb/testsuite/gdb.arch/arm-disassembler-options.exp
new file mode 100644
index 0000000..0116e6b
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/arm-disassembler-options.exp
@@ -0,0 +1,56 @@
+# Copyright 2014-2017 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.
+
+# This test exercises set/show disassembler-options results are preserved
+# across multiple set architecture calls.
+
+if {![istarget "arm*-*-*"]} then {
+ verbose "Skipping ARM disassembler options."
+ return
+}
+
+gdb_exit
+gdb_start
+
+set option "reg-names-gcc,force-thumb"
+set arch1 "armv2"
+set arch2 "armv5"
+
+gdb_test "set architecture $arch1" \
+ "The target architecture is assumed to be $arch1" \
+ "set architecture $arch1"
+
+gdb_test_no_output "set disassembler-options"
+gdb_test "show disassembler-options" \
+ "The current disassembler options are ''.*" \
+ "show NULL disassembler-options"
+
+gdb_test_no_output "set disassembler-options $option"
+gdb_test "show disassembler-options" \
+ "The current disassembler options are '$option'.*" \
+ "show disassembler-options $option"
+
+# Change architectures and verify the disassembler options have been preserved.
+
+gdb_test "set architecture $arch2" \
+ "The target architecture is assumed to be $arch2" \
+ "set architecture $arch2"
+
+gdb_test "show disassembler-options" \
+ "The current disassembler options are '$option'.*" \
+ "show disassembler-options $option"
+
diff --git a/gdb/testsuite/gdb.arch/powerpc-altivec.exp b/gdb/testsuite/gdb.arch/powerpc-altivec.exp
new file mode 100644
index 0000000..2587847
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-altivec.exp
@@ -0,0 +1,261 @@
+# Copyright 2014-2017 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.
+
+# Test PowerPC instructions disassembly.
+
+standard_testfile .s
+set objfile [standard_output_file ${testfile}.o]
+
+if {![istarget "powerpc*-*-*"]} then {
+ verbose "Skipping PowerPC instructions disassembly."
+ return
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${objfile}" object {debug}] != "" } {
+ untested "PowerPC instructions disassembly"
+ return -1
+}
+
+clean_restart ${objfile}
+
+# Disassemble the function.
+set func ""
+
+gdb_test "set disassembler-options altivec"
+set test "disass func"
+gdb_test_multiple $test $test {
+ -re "\r\nDump of assembler code for function func:(\r\n.*\r\n)End of assembler dump.\r\n$gdb_prompt $" {
+ set func $expect_out(1,string)
+ pass $test
+ }
+}
+
+proc instr_to_patt {instr} {
+ global decimal hex
+ # 0x0000000000000018 <+24>: stxvd2x vs43,r4,r5
+ return "\[ \t\]*$hex <\\+$decimal>:\[ \t\]*[string_to_regexp $instr]"
+}
+
+proc func_check {instr} {
+ global func
+
+ set test "found: '$instr'"
+ set peb [instr_to_patt $instr]
+ if [regexp -nocase -line [instr_to_patt $instr] $func] {
+ pass $test
+ } else {
+ fail $peb
+ }
+}
+
+func_check "dss 3"
+func_check "dssall"
+func_check "dst r5,r4,1"
+func_check "dstt r8,r7,0"
+func_check "dstst r5,r6,3"
+func_check "dststt r4,r5,2"
+func_check "lvebx v30,r22,r24"
+func_check "lvebx v21,0,r24"
+func_check "lvehx v10,r16,r2"
+func_check "lvehx v20,0,r23"
+func_check "lvewx v17,r4,r18"
+func_check "lvewx v23,0,r8"
+func_check "lvsl v6,0,r25"
+func_check "lvsl v2,0,r6"
+func_check "lvsr v22,r16,r12"
+func_check "lvsr v0,0,r29"
+func_check "lvxl v15,r5,r13"
+func_check "lvxl v19,0,r23"
+func_check "lvx v22,r1,r2"
+func_check "lvx v18,0,r17"
+func_check "mfvrsave r31"
+func_check "mfvscr v24"
+func_check "mtvrsave r10"
+func_check "mtvscr v25"
+func_check "stvebx v18,r27,r10"
+func_check "stvebx v16,0,r6"
+func_check "stvehx v17,r13,r16"
+func_check "stvehx v23,0,r20"
+func_check "stvewx v11,r19,r31"
+func_check "stvewx v31,0,r1"
+func_check "stvxl v26,r21,r17"
+func_check "stvxl v13,0,r22"
+func_check "stvx v11,r31,r31"
+func_check "stvx v30,0,r16"
+func_check "vaddcuw v24,v7,v28"
+func_check "vaddfp v3,v30,v11"
+func_check "vaddsbs v8,v28,v9"
+func_check "vaddshs v7,v5,v4"
+func_check "vaddsws v22,v26,v27"
+func_check "vaddubm v16,v14,v28"
+func_check "vaddubs v6,v1,v25"
+func_check "vadduhm v2,v4,v6"
+func_check "vadduhs v26,v21,v8"
+func_check "vadduwm v29,v31,v1"
+func_check "vadduws v23,v13,v4"
+func_check "vandc v30,v16,v9"
+func_check "vand v3,v13,v27"
+func_check "vavgsb v4,v6,v17"
+func_check "vavgsh v23,v28,v19"
+func_check "vavgsw v8,v15,v31"
+func_check "vavgub v6,v7,v25"
+func_check "vavguh v25,v22,v10"
+func_check "vavguw v3,v23,v29"
+func_check "vctsxs v14,v2,6"
+func_check "vctuxs v9,v31,20"
+func_check "vcfsx v24,v30,3"
+func_check "vcfux v17,v21,29"
+func_check "vcmpbfp v18,v28,v0"
+func_check "vcmpbfp. v19,v26,v3"
+func_check "vcmpeqfp v16,v2,v11"
+func_check "vcmpeqfp. v23,v13,v13"
+func_check "vcmpequb v25,v19,v10"
+func_check "vcmpequb. v18,v11,v2"
+func_check "vcmpequh v9,v25,v7"
+func_check "vcmpequh. v14,v24,v21"
+func_check "vcmpequw v24,v12,v5"
+func_check "vcmpequw. v19,v16,v1"
+func_check "vcmpgefp v23,v17,v16"
+func_check "vcmpgefp. v19,v29,v17"
+func_check "vcmpgtfp v16,v28,v13"
+func_check "vcmpgtfp. v14,v24,v7"
+func_check "vcmpgtsb v16,v22,v6"
+func_check "vcmpgtsb. v2,v12,v14"
+func_check "vcmpgtsh v28,v3,v29"
+func_check "vcmpgtsh. v16,v19,v13"
+func_check "vcmpgtsw v15,v0,v5"
+func_check "vcmpgtsw. v21,v13,v0"
+func_check "vcmpgtub v5,v10,v30"
+func_check "vcmpgtub. v7,v13,v10"
+func_check "vcmpgtuh v24,v15,v16"
+func_check "vcmpgtuh. v25,v21,v27"
+func_check "vcmpgtuw v17,v27,v6"
+func_check "vcmpgtuw. v8,v21,v27"
+func_check "vcfsx v1,v1,14"
+func_check "vctsxs v4,v15,25"
+func_check "vctuxs v28,v23,14"
+func_check "vcfux v6,v6,0"
+func_check "vexptefp v0,v8"
+func_check "vlogefp v22,v27"
+func_check "vmaddfp v23,v18,v5,v18"
+func_check "vmaxfp v13,v13,v27"
+func_check "vmaxsb v8,v23,v14"
+func_check "vmaxsh v19,v17,v0"
+func_check "vmaxsw v19,v3,v22"
+func_check "vmaxub v23,v30,v28"
+func_check "vmaxuh v9,v20,v23"
+func_check "vmaxuw v21,v19,v1"
+func_check "vmhaddshs v22,v13,v5,v22"
+func_check "vmhraddshs v31,v0,v3,v18"
+func_check "vminfp v2,v21,v24"
+func_check "vminsb v20,v6,v10"
+func_check "vminsh v18,v27,v26"
+func_check "vminsw v3,v4,v1"
+func_check "vminub v7,v0,v13"
+func_check "vminuh v0,v12,v6"
+func_check "vminuw v6,v3,v1"
+func_check "vmladduhm v3,v29,v3,v26"
+func_check "vmrghb v21,v5,v31"
+func_check "vmrghh v21,v24,v0"
+func_check "vmrghw v16,v0,v22"
+func_check "vmrglb v1,v17,v16"
+func_check "vmrglh v14,v8,v15"
+func_check "vmrglw v31,v21,v5"
+func_check "vmr v24,v9"
+func_check "vmr v24,v9"
+func_check "vmsummbm v0,v24,v15,v23"
+func_check "vmsumshm v1,v4,v7,v25"
+func_check "vmsumshs v9,v8,v13,v31"
+func_check "vmsumubm v23,v31,v12,v30"
+func_check "vmsumuhm v29,v0,v26,v21"
+func_check "vmsumuhs v27,v14,v25,v5"
+func_check "vmulesb v10,v25,v14"
+func_check "vmulesh v1,v18,v8"
+func_check "vmuleub v17,v14,v9"
+func_check "vmuleuh v5,v26,v9"
+func_check "vmulosb v21,v18,v6"
+func_check "vmulosh v4,v5,v8"
+func_check "vmuloub v2,v9,v19"
+func_check "vmulouh v29,v5,v4"
+func_check "vnmsubfp v8,v2,v6,v5"
+func_check "vnor v31,v9,v10"
+func_check "vnot v25,v31"
+func_check "vnot v25,v31"
+func_check "vor v23,v7,v2"
+func_check "vperm v0,v28,v22,v25"
+func_check "vpkpx v16,v25,v17"
+func_check "vpkshss v12,v16,v17"
+func_check "vpkshus v1,v19,v23"
+func_check "vpkswss v25,v7,v13"
+func_check "vpkswus v4,v24,v10"
+func_check "vpkuhum v9,v27,v12"
+func_check "vpkuhus v22,v10,v25"
+func_check "vpkuwum v30,v18,v0"
+func_check "vpkuwus v7,v3,v22"
+func_check "vrefp v24,v28"
+func_check "vrfim v17,v19"
+func_check "vrfin v24,v25"
+func_check "vrfip v3,v5"
+func_check "vrfiz v8,v10"
+func_check "vrlb v26,v18,v30"
+func_check "vrlh v16,v17,v25"
+func_check "vrlw v23,v30,v9"
+func_check "vrsqrtefp v2,v18"
+func_check "vsel v20,v14,v18,v10"
+func_check "vslb v25,v25,v12"
+func_check "vsldoi v9,v9,v12,7"
+func_check "vslh v14,v2,v11"
+func_check "vslo v30,v5,v6"
+func_check "vsl v22,v30,v9"
+func_check "vslw v26,v26,v3"
+func_check "vspltb v1,v20,6"
+func_check "vsplth v16,v18,3"
+func_check "vspltisb v25,-13"
+func_check "vspltish v22,10"
+func_check "vspltisw v13,13"
+func_check "vspltw v9,v18,2"
+func_check "vsrab v14,v22,v0"
+func_check "vsrah v12,v12,v18"
+func_check "vsraw v2,v2,v13"
+func_check "vsrb v7,v27,v5"
+func_check "vsrh v7,v11,v29"
+func_check "vsro v18,v30,v31"
+func_check "vsr v2,v9,v28"
+func_check "vsrw v0,v25,v0"
+func_check "vsubcuw v24,v2,v10"
+func_check "vsubfp v22,v24,v20"
+func_check "vsubsbs v10,v22,v13"
+func_check "vsubshs v24,v17,v28"
+func_check "vsubsws v10,v26,v0"
+func_check "vsububm v16,v11,v24"
+func_check "vsububs v11,v21,v1"
+func_check "vsubuhm v6,v12,v24"
+func_check "vsubuhs v30,v11,v9"
+func_check "vsubuwm v19,v20,v13"
+func_check "vsubuws v18,v25,v6"
+func_check "vsum2sws v25,v10,v18"
+func_check "vsum4sbs v13,v16,v21"
+func_check "vsum4shs v23,v8,v4"
+func_check "vsum4ubs v28,v13,v30"
+func_check "vsumsws v22,v10,v8"
+func_check "vupkhpx v24,v14"
+func_check "vupkhsb v2,v22"
+func_check "vupkhsh v16,v2"
+func_check "vupklpx v10,v26"
+func_check "vupklsb v15,v28"
+func_check "vupklsh v8,v8"
+func_check "vxor v25,v0,v3"
diff --git a/gdb/testsuite/gdb.arch/powerpc-altivec.s b/gdb/testsuite/gdb.arch/powerpc-altivec.s
new file mode 100644
index 0000000..4148002
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-altivec.s
@@ -0,0 +1,217 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+ Copyright 2014-2017 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+ .text
+ .globl func
+func:
+ .long 0x7c60066c /* dss 3 */
+ .long 0x7e00066c /* dssall */
+ .long 0x7c2522ac /* dst r5,r4,1 */
+ .long 0x7e083aac /* dstt r8,r7,0 */
+ .long 0x7c6532ec /* dstst r5,r6,3 */
+ .long 0x7e442aec /* dststt r4,r5,2 */
+ .long 0x7fd6c00e /* lvebx v30,r22,r24 */
+ .long 0x7ea0c00e /* lvebx v21,0,r24 */
+ .long 0x7d50104e /* lvehx v10,r16,r2 */
+ .long 0x7e80b84e /* lvehx v20,0,r23 */
+ .long 0x7e24908e /* lvewx v17,r4,r18 */
+ .long 0x7ee0408e /* lvewx v23,0,r8 */
+ .long 0x7cc0c80c /* lvsl v6,0,r25 */
+ .long 0x7c40300c /* lvsl v2,0,r6 */
+ .long 0x7ed0604c /* lvsr v22,r16,r12 */
+ .long 0x7c00e84c /* lvsr v0,0,r29 */
+ .long 0x7de56ace /* lvxl v15,r5,r13 */
+ .long 0x7e60bace /* lvxl v19,0,r23 */
+ .long 0x7ec110ce /* lvx v22,r1,r2 */
+ .long 0x7e4088ce /* lvx v18,0,r17 */
+ .long 0x7fe042a6 /* mfvrsave r31 */
+ .long 0x13000604 /* mfvscr v24 */
+ .long 0x7d4043a6 /* mtvrsave r10 */
+ .long 0x1000ce44 /* mtvscr v25 */
+ .long 0x7e5b510e /* stvebx v18,r27,r10 */
+ .long 0x7e00310e /* stvebx v16,0,r6 */
+ .long 0x7e2d814e /* stvehx v17,r13,r16 */
+ .long 0x7ee0a14e /* stvehx v23,0,r20 */
+ .long 0x7d73f98e /* stvewx v11,r19,r31 */
+ .long 0x7fe0098e /* stvewx v31,0,r1 */
+ .long 0x7f558bce /* stvxl v26,r21,r17 */
+ .long 0x7da0b3ce /* stvxl v13,0,r22 */
+ .long 0x7d7ff9ce /* stvx v11,r31,r31 */
+ .long 0x7fc081ce /* stvx v30,0,r16 */
+ .long 0x1307e180 /* vaddcuw v24,v7,v28 */
+ .long 0x107e580a /* vaddfp v3,v30,v11 */
+ .long 0x111c4b00 /* vaddsbs v8,v28,v9 */
+ .long 0x10e52340 /* vaddshs v7,v5,v4 */
+ .long 0x12dadb80 /* vaddsws v22,v26,v27 */
+ .long 0x120ee000 /* vaddubm v16,v14,v28 */
+ .long 0x10c1ca00 /* vaddubs v6,v1,v25 */
+ .long 0x10443040 /* vadduhm v2,v4,v6 */
+ .long 0x13554240 /* vadduhs v26,v21,v8 */
+ .long 0x13bf0880 /* vadduwm v29,v31,v1 */
+ .long 0x12ed2280 /* vadduws v23,v13,v4 */
+ .long 0x13d04c44 /* vandc v30,v16,v9 */
+ .long 0x106ddc04 /* vand v3,v13,v27 */
+ .long 0x10868d02 /* vavgsb v4,v6,v17 */
+ .long 0x12fc9d42 /* vavgsh v23,v28,v19 */
+ .long 0x110ffd82 /* vavgsw v8,v15,v31 */
+ .long 0x10c7cc02 /* vavgub v6,v7,v25 */
+ .long 0x13365442 /* vavguh v25,v22,v10 */
+ .long 0x1077ec82 /* vavguw v3,v23,v29 */
+ .long 0x11c613ca /* vctsxs v14,v2,6 */
+ .long 0x1134fb8a /* vctuxs v9,v31,20 */
+ .long 0x1303f34a /* vcfsx v24,v30,3 */
+ .long 0x123dab0a /* vcfux v17,v21,29 */
+ .long 0x125c03c6 /* vcmpbfp v18,v28,v0 */
+ .long 0x127a1fc6 /* vcmpbfp. v19,v26,v3 */
+ .long 0x120258c6 /* vcmpeqfp v16,v2,v11 */
+ .long 0x12ed6cc6 /* vcmpeqfp. v23,v13,v13 */
+ .long 0x13335006 /* vcmpequb v25,v19,v10 */
+ .long 0x124b1406 /* vcmpequb. v18,v11,v2 */
+ .long 0x11393846 /* vcmpequh v9,v25,v7 */
+ .long 0x11d8ac46 /* vcmpequh. v14,v24,v21 */
+ .long 0x130c2886 /* vcmpequw v24,v12,v5 */
+ .long 0x12700c86 /* vcmpequw. v19,v16,v1 */
+ .long 0x12f181c6 /* vcmpgefp v23,v17,v16 */
+ .long 0x127d8dc6 /* vcmpgefp. v19,v29,v17 */
+ .long 0x121c6ac6 /* vcmpgtfp v16,v28,v13 */
+ .long 0x11d83ec6 /* vcmpgtfp. v14,v24,v7 */
+ .long 0x12163306 /* vcmpgtsb v16,v22,v6 */
+ .long 0x104c7706 /* vcmpgtsb. v2,v12,v14 */
+ .long 0x1383eb46 /* vcmpgtsh v28,v3,v29 */
+ .long 0x12136f46 /* vcmpgtsh. v16,v19,v13 */
+ .long 0x11e02b86 /* vcmpgtsw v15,v0,v5 */
+ .long 0x12ad0786 /* vcmpgtsw. v21,v13,v0 */
+ .long 0x10aaf206 /* vcmpgtub v5,v10,v30 */
+ .long 0x10ed5606 /* vcmpgtub. v7,v13,v10 */
+ .long 0x130f8246 /* vcmpgtuh v24,v15,v16 */
+ .long 0x1335de46 /* vcmpgtuh. v25,v21,v27 */
+ .long 0x123b3286 /* vcmpgtuw v17,v27,v6 */
+ .long 0x1115de86 /* vcmpgtuw. v8,v21,v27 */
+ .long 0x102e0b4a /* vcfsx v1,v1,14 */
+ .long 0x10997bca /* vctsxs v4,v15,25 */
+ .long 0x138ebb8a /* vctuxs v28,v23,14 */
+ .long 0x10c0330a /* vcfux v6,v6,0 */
+ .long 0x1000418a /* vexptefp v0,v8 */
+ .long 0x12c0d9ca /* vlogefp v22,v27 */
+ .long 0x12f2916e /* vmaddfp v23,v18,v5,v18 */
+ .long 0x11addc0a /* vmaxfp v13,v13,v27 */
+ .long 0x11177102 /* vmaxsb v8,v23,v14 */
+ .long 0x12710142 /* vmaxsh v19,v17,v0 */
+ .long 0x1263b182 /* vmaxsw v19,v3,v22 */
+ .long 0x12fee002 /* vmaxub v23,v30,v28 */
+ .long 0x1134b842 /* vmaxuh v9,v20,v23 */
+ .long 0x12b30882 /* vmaxuw v21,v19,v1 */
+ .long 0x12cd2da0 /* vmhaddshs v22,v13,v5,v22 */
+ .long 0x13e01ca1 /* vmhraddshs v31,v0,v3,v18 */
+ .long 0x1055c44a /* vminfp v2,v21,v24 */
+ .long 0x12865302 /* vminsb v20,v6,v10 */
+ .long 0x125bd342 /* vminsh v18,v27,v26 */
+ .long 0x10640b82 /* vminsw v3,v4,v1 */
+ .long 0x10e06a02 /* vminub v7,v0,v13 */
+ .long 0x100c3242 /* vminuh v0,v12,v6 */
+ .long 0x10c30a82 /* vminuw v6,v3,v1 */
+ .long 0x107d1ea2 /* vmladduhm v3,v29,v3,v26 */
+ .long 0x12a5f80c /* vmrghb v21,v5,v31 */
+ .long 0x12b8004c /* vmrghh v21,v24,v0 */
+ .long 0x1200b08c /* vmrghw v16,v0,v22 */
+ .long 0x1031810c /* vmrglb v1,v17,v16 */
+ .long 0x11c8794c /* vmrglh v14,v8,v15 */
+ .long 0x13f5298c /* vmrglw v31,v21,v5 */
+ .long 0x13094c84 /* vmr v24,v9 */
+ .long 0x13094c84 /* vmr v24,v9 */
+ .long 0x10187de5 /* vmsummbm v0,v24,v15,v23 */
+ .long 0x10243e68 /* vmsumshm v1,v4,v7,v25 */
+ .long 0x11286fe9 /* vmsumshs v9,v8,v13,v31 */
+ .long 0x12ff67a4 /* vmsumubm v23,v31,v12,v30 */
+ .long 0x13a0d566 /* vmsumuhm v29,v0,v26,v21 */
+ .long 0x136ec967 /* vmsumuhs v27,v14,v25,v5 */
+ .long 0x11597308 /* vmulesb v10,v25,v14 */
+ .long 0x10324348 /* vmulesh v1,v18,v8 */
+ .long 0x122e4a08 /* vmuleub v17,v14,v9 */
+ .long 0x10ba4a48 /* vmuleuh v5,v26,v9 */
+ .long 0x12b23108 /* vmulosb v21,v18,v6 */
+ .long 0x10854148 /* vmulosh v4,v5,v8 */
+ .long 0x10499808 /* vmuloub v2,v9,v19 */
+ .long 0x13a52048 /* vmulouh v29,v5,v4 */
+ .long 0x110229af /* vnmsubfp v8,v2,v6,v5 */
+ .long 0x13e95504 /* vnor v31,v9,v10 */
+ .long 0x133ffd04 /* vnot v25,v31 */
+ .long 0x133ffd04 /* vnot v25,v31 */
+ .long 0x12e71484 /* vor v23,v7,v2 */
+ .long 0x101cb66b /* vperm v0,v28,v22,v25 */
+ .long 0x12198b0e /* vpkpx v16,v25,v17 */
+ .long 0x1190898e /* vpkshss v12,v16,v17 */
+ .long 0x1033b90e /* vpkshus v1,v19,v23 */
+ .long 0x132769ce /* vpkswss v25,v7,v13 */
+ .long 0x1098514e /* vpkswus v4,v24,v10 */
+ .long 0x113b600e /* vpkuhum v9,v27,v12 */
+ .long 0x12cac88e /* vpkuhus v22,v10,v25 */
+ .long 0x13d2004e /* vpkuwum v30,v18,v0 */
+ .long 0x10e3b0ce /* vpkuwus v7,v3,v22 */
+ .long 0x1300e10a /* vrefp v24,v28 */
+ .long 0x12209aca /* vrfim v17,v19 */
+ .long 0x1300ca0a /* vrfin v24,v25 */
+ .long 0x10602a8a /* vrfip v3,v5 */
+ .long 0x1100524a /* vrfiz v8,v10 */
+ .long 0x1352f004 /* vrlb v26,v18,v30 */
+ .long 0x1211c844 /* vrlh v16,v17,v25 */
+ .long 0x12fe4884 /* vrlw v23,v30,v9 */
+ .long 0x1040914a /* vrsqrtefp v2,v18 */
+ .long 0x128e92aa /* vsel v20,v14,v18,v10 */
+ .long 0x13396104 /* vslb v25,v25,v12 */
+ .long 0x112961ec /* vsldoi v9,v9,v12,7 */
+ .long 0x11c25944 /* vslh v14,v2,v11 */
+ .long 0x13c5340c /* vslo v30,v5,v6 */
+ .long 0x12de49c4 /* vsl v22,v30,v9 */
+ .long 0x135a1984 /* vslw v26,v26,v3 */
+ .long 0x1026a20c /* vspltb v1,v20,6 */
+ .long 0x1203924c /* vsplth v16,v18,3 */
+ .long 0x1333030c /* vspltisb v25,-13 */
+ .long 0x12ca034c /* vspltish v22,10 */
+ .long 0x11ad038c /* vspltisw v13,13 */
+ .long 0x1122928c /* vspltw v9,v18,2 */
+ .long 0x11d60304 /* vsrab v14,v22,v0 */
+ .long 0x118c9344 /* vsrah v12,v12,v18 */
+ .long 0x10426b84 /* vsraw v2,v2,v13 */
+ .long 0x10fb2a04 /* vsrb v7,v27,v5 */
+ .long 0x10ebea44 /* vsrh v7,v11,v29 */
+ .long 0x125efc4c /* vsro v18,v30,v31 */
+ .long 0x1049e2c4 /* vsr v2,v9,v28 */
+ .long 0x10190284 /* vsrw v0,v25,v0 */
+ .long 0x13025580 /* vsubcuw v24,v2,v10 */
+ .long 0x12d8a04a /* vsubfp v22,v24,v20 */
+ .long 0x11566f00 /* vsubsbs v10,v22,v13 */
+ .long 0x1311e740 /* vsubshs v24,v17,v28 */
+ .long 0x115a0780 /* vsubsws v10,v26,v0 */
+ .long 0x120bc400 /* vsububm v16,v11,v24 */
+ .long 0x11750e00 /* vsububs v11,v21,v1 */
+ .long 0x10ccc440 /* vsubuhm v6,v12,v24 */
+ .long 0x13cb4e40 /* vsubuhs v30,v11,v9 */
+ .long 0x12746c80 /* vsubuwm v19,v20,v13 */
+ .long 0x12593680 /* vsubuws v18,v25,v6 */
+ .long 0x132a9688 /* vsum2sws v25,v10,v18 */
+ .long 0x11b0af08 /* vsum4sbs v13,v16,v21 */
+ .long 0x12e82648 /* vsum4shs v23,v8,v4 */
+ .long 0x138df608 /* vsum4ubs v28,v13,v30 */
+ .long 0x12ca4788 /* vsumsws v22,v10,v8 */
+ .long 0x1300734e /* vupkhpx v24,v14 */
+ .long 0x1040b20e /* vupkhsb v2,v22 */
+ .long 0x1200124e /* vupkhsh v16,v2 */
+ .long 0x1140d3ce /* vupklpx v10,v26 */
+ .long 0x11e0e28e /* vupklsb v15,v28 */
+ .long 0x110042ce /* vupklsh v8,v8 */
+ .long 0x13201cc4 /* vxor v25,v0,v3 */
diff --git a/gdb/testsuite/gdb.arch/powerpc-altivec2.exp b/gdb/testsuite/gdb.arch/powerpc-altivec2.exp
new file mode 100644
index 0000000..70f4ccb
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-altivec2.exp
@@ -0,0 +1,178 @@
+# Copyright 2014-2017 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.
+
+# Test PowerPC instructions disassembly.
+
+standard_testfile .s
+set objfile [standard_output_file ${testfile}.o]
+
+if {![istarget "powerpc*-*-*"]} then {
+ verbose "Skipping PowerPC instructions disassembly."
+ return
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${objfile}" object {debug}] != "" } {
+ untested "PowerPC instructions disassembly"
+ return -1
+}
+
+clean_restart ${objfile}
+
+# Disassemble the function.
+set func ""
+
+gdb_test "set disassembler-options altivec"
+set test "disass func"
+gdb_test_multiple $test $test {
+ -re "\r\nDump of assembler code for function func:(\r\n.*\r\n)End of assembler dump.\r\n$gdb_prompt $" {
+ set func $expect_out(1,string)
+ pass $test
+ }
+}
+
+proc instr_to_patt {instr} {
+ global decimal hex
+ # 0x0000000000000018 <+24>: stxvd2x vs43,r4,r5
+ return "\[ \t\]*$hex <\\+$decimal>:\[ \t\]*[string_to_regexp $instr]"
+}
+
+proc func_check {instr} {
+ global func
+
+ set test "found: $instr"
+ if [regexp -nocase -line [instr_to_patt $instr] $func] {
+ pass $test
+ } else {
+ fail $test
+ }
+}
+
+func_check "lvepxl v3,0,r28"
+func_check "lvepxl v19,r4,r18"
+func_check "lvepx v27,0,r19"
+func_check "lvepx v1,r25,r18"
+func_check "lvexbx v31,0,r27"
+func_check "lvexbx v28,r1,r12"
+func_check "lvexhx v31,0,r14"
+func_check "lvexhx v17,r16,r31"
+func_check "lvexwx v22,0,r29"
+func_check "lvexwx v23,r25,r5"
+func_check "lvsm v3,0,r12"
+func_check "lvsm v27,r29,r1"
+func_check "lvswxl v7,0,r6"
+func_check "lvswxl v7,r16,r8"
+func_check "lvswx v14,0,r18"
+func_check "lvswx v28,r28,r16"
+func_check "lvtlxl v27,0,r12"
+func_check "lvtlxl v27,r28,r0"
+func_check "lvtlx v23,0,r25"
+func_check "lvtlx v1,r25,r14"
+func_check "lvtrxl v20,0,r24"
+func_check "lvtrxl v22,r29,r24"
+func_check "lvtrx v24,0,r8"
+func_check "lvtrx v13,r23,r28"
+func_check "mvidsplt v12,r28,r12"
+func_check "mviwsplt v10,r27,r0"
+func_check "stvepxl v27,0,r13"
+func_check "stvepxl v2,r2,r31"
+func_check "stvepx v3,0,r10"
+func_check "stvepx v27,r28,r0"
+func_check "stvexbx v13,0,r6"
+func_check "stvexbx v13,r25,r3"
+func_check "stvexhx v22,0,r1"
+func_check "stvexhx v17,r14,r10"
+func_check "stvexwx v21,0,r27"
+func_check "stvexwx v31,r18,r1"
+func_check "stvflxl v26,0,r13"
+func_check "stvflxl v22,r13,r21"
+func_check "stvflx v5,0,r9"
+func_check "stvflx v21,r24,r1"
+func_check "stvfrxl v13,0,r10"
+func_check "stvfrxl v13,r17,r25"
+func_check "stvfrx v17,0,r10"
+func_check "stvfrx v8,r12,r31"
+func_check "stvswxl v18,0,r29"
+func_check "stvswxl v26,r14,r8"
+func_check "stvswx v0,0,r15"
+func_check "stvswx v13,r23,r7"
+func_check "vabsdub v6,v17,v16"
+func_check "vabsduh v21,v18,v4"
+func_check "vabsduw v25,v20,v9"
+func_check "vpermxor v6,v17,v20,v26"
+func_check "vaddeuqm v29,v26,v15,v28"
+func_check "vaddecuq v15,v8,v7,v24"
+func_check "vsubeuqm v2,v6,v21,v1"
+func_check "vsubecuq v29,v6,v0,v4"
+func_check "vmulouw v14,v9,v3"
+func_check "vmuluwm v24,v16,v18"
+func_check "vaddudm v10,v17,v17"
+func_check "vmaxud v30,v25,v4"
+func_check "vrld v10,v6,v28"
+func_check "vcmpequd v27,v7,v7"
+func_check "vadduqm v22,v16,v25"
+func_check "vaddcuq v1,v21,v29"
+func_check "vmulosw v20,v11,v19"
+func_check "vmaxsd v24,v19,v1"
+func_check "vmuleuw v13,v27,v30"
+func_check "vminud v9,v24,v17"
+func_check "vcmpgtud v10,v18,v28"
+func_check "vmulesw v0,v29,v22"
+func_check "vminsd v13,v28,v1"
+func_check "vsrad v10,v20,v5"
+func_check "vcmpgtsd v27,v21,v5"
+func_check "bcdadd. v0,v23,v30,1"
+func_check "vpmsumb v25,v24,v26"
+func_check "bcdsub. v8,v4,v4,1"
+func_check "vpmsumh v16,v14,v26"
+func_check "vpkudum v27,v2,v26"
+func_check "vpmsumw v6,v23,v17"
+func_check "vpmsumd v20,v6,v25"
+func_check "vpkudus v27,v22,v16"
+func_check "vsubudm v21,v20,v18"
+func_check "vsubuqm v21,v20,v18"
+func_check "vcipher v29,v29,v6"
+func_check "vcipherlast v2,v13,v20"
+func_check "vgbbd v20,v18"
+func_check "vsubcuq v19,v8,v25"
+func_check "vorc v9,v26,v29"
+func_check "vncipher v20,v20,v13"
+func_check "vncipherlast v15,v5,v27"
+func_check "vbpermq v3,v19,v6"
+func_check "vpksdus v30,v4,v28"
+func_check "vnand v0,v4,v14"
+func_check "vsld v17,v8,v29"
+func_check "vsbox v29,v20"
+func_check "vpksdss v11,v7,v11"
+func_check "vcmpequd. v3,v19,v16"
+func_check "vupkhsw v18,v17"
+func_check "vshasigmaw v29,v8,0,13"
+func_check "veqv v23,v28,v26"
+func_check "vmrgew v29,v0,v2"
+func_check "vmrgow v29,v0,v2"
+func_check "vshasigmad v27,v19,0,0"
+func_check "vsrd v20,v28,v28"
+func_check "vupklsw v18,v21"
+func_check "vclzb v30,v7"
+func_check "vpopcntb v29,v21"
+func_check "vclzh v25,v21"
+func_check "vpopcnth v16,v30"
+func_check "vclzw v28,v3"
+func_check "vpopcntw v10,v9"
+func_check "vclzd v22,v9"
+func_check "vpopcntd v15,v30"
+func_check "vcmpgtud. v2,v31,v6"
+func_check "vcmpgtsd. v20,v15,v2"
diff --git a/gdb/testsuite/gdb.arch/powerpc-altivec2.s b/gdb/testsuite/gdb.arch/powerpc-altivec2.s
new file mode 100644
index 0000000..6148fb9
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-altivec2.s
@@ -0,0 +1,135 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+ Copyright 2014-2017 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+ .text
+ .globl func
+func:
+ .long 0x7c60e20e /* lvepxl v3,0,r28 */
+ .long 0x7e64920e /* lvepxl v19,r4,r18 */
+ .long 0x7f609a4e /* lvepx v27,0,r19 */
+ .long 0x7c39924e /* lvepx v1,r25,r18 */
+ .long 0x7fe0da0a /* lvexbx v31,0,r27 */
+ .long 0x7f81620a /* lvexbx v28,r1,r12 */
+ .long 0x7fe0724a /* lvexhx v31,0,r14 */
+ .long 0x7e30fa4a /* lvexhx v17,r16,r31 */
+ .long 0x7ec0ea8a /* lvexwx v22,0,r29 */
+ .long 0x7ef92a8a /* lvexwx v23,r25,r5 */
+ .long 0x7c60660a /* lvsm v3,0,r12 */
+ .long 0x7f7d0e0a /* lvsm v27,r29,r1 */
+ .long 0x7ce036ca /* lvswxl v7,0,r6 */
+ .long 0x7cf046ca /* lvswxl v7,r16,r8 */
+ .long 0x7dc094ca /* lvswx v14,0,r18 */
+ .long 0x7f9c84ca /* lvswx v28,r28,r16 */
+ .long 0x7f60668a /* lvtlxl v27,0,r12 */
+ .long 0x7f7c068a /* lvtlxl v27,r28,r0 */
+ .long 0x7ee0cc8a /* lvtlx v23,0,r25 */
+ .long 0x7c39748a /* lvtlx v1,r25,r14 */
+ .long 0x7e80c64a /* lvtrxl v20,0,r24 */
+ .long 0x7eddc64a /* lvtrxl v22,r29,r24 */
+ .long 0x7f00444a /* lvtrx v24,0,r8 */
+ .long 0x7db7e44a /* lvtrx v13,r23,r28 */
+ .long 0x7d9c60dc /* mvidsplt v12,r28,r12 */
+ .long 0x7d5b005c /* mviwsplt v10,r27,r0 */
+ .long 0x7f606e0e /* stvepxl v27,0,r13 */
+ .long 0x7c42fe0e /* stvepxl v2,r2,r31 */
+ .long 0x7c60564e /* stvepx v3,0,r10 */
+ .long 0x7f7c064e /* stvepx v27,r28,r0 */
+ .long 0x7da0330a /* stvexbx v13,0,r6 */
+ .long 0x7db91b0a /* stvexbx v13,r25,r3 */
+ .long 0x7ec00b4a /* stvexhx v22,0,r1 */
+ .long 0x7e2e534a /* stvexhx v17,r14,r10 */
+ .long 0x7ea0db8a /* stvexwx v21,0,r27 */
+ .long 0x7ff20b8a /* stvexwx v31,r18,r1 */
+ .long 0x7f406f8a /* stvflxl v26,0,r13 */
+ .long 0x7ecdaf8a /* stvflxl v22,r13,r21 */
+ .long 0x7ca04d8a /* stvflx v5,0,r9 */
+ .long 0x7eb80d8a /* stvflx v21,r24,r1 */
+ .long 0x7da0574a /* stvfrxl v13,0,r10 */
+ .long 0x7db1cf4a /* stvfrxl v13,r17,r25 */
+ .long 0x7e20554a /* stvfrx v17,0,r10 */
+ .long 0x7d0cfd4a /* stvfrx v8,r12,r31 */
+ .long 0x7e40efca /* stvswxl v18,0,r29 */
+ .long 0x7f4e47ca /* stvswxl v26,r14,r8 */
+ .long 0x7c007dca /* stvswx v0,0,r15 */
+ .long 0x7db73dca /* stvswx v13,r23,r7 */
+ .long 0x10d18403 /* vabsdub v6,v17,v16 */
+ .long 0x12b22443 /* vabsduh v21,v18,v4 */
+ .long 0x13344c83 /* vabsduw v25,v20,v9 */
+ .long 0x10d1a6ad /* vpermxor v6,v17,v20,v26 */
+ .long 0x13ba7f3c /* vaddeuqm v29,v26,v15,v28 */
+ .long 0x11e83e3d /* vaddecuq v15,v8,v7,v24 */
+ .long 0x1046a87e /* vsubeuqm v2,v6,v21,v1 */
+ .long 0x13a6013f /* vsubecuq v29,v6,v0,v4 */
+ .long 0x11c91888 /* vmulouw v14,v9,v3 */
+ .long 0x13109089 /* vmuluwm v24,v16,v18 */
+ .long 0x115188c0 /* vaddudm v10,v17,v17 */
+ .long 0x13d920c2 /* vmaxud v30,v25,v4 */
+ .long 0x1146e0c4 /* vrld v10,v6,v28 */
+ .long 0x136738c7 /* vcmpequd v27,v7,v7 */
+ .long 0x12d0c900 /* vadduqm v22,v16,v25 */
+ .long 0x1035e940 /* vaddcuq v1,v21,v29 */
+ .long 0x128b9988 /* vmulosw v20,v11,v19 */
+ .long 0x131309c2 /* vmaxsd v24,v19,v1 */
+ .long 0x11bbf288 /* vmuleuw v13,v27,v30 */
+ .long 0x11388ac2 /* vminud v9,v24,v17 */
+ .long 0x1152e2c7 /* vcmpgtud v10,v18,v28 */
+ .long 0x101db388 /* vmulesw v0,v29,v22 */
+ .long 0x11bc0bc2 /* vminsd v13,v28,v1 */
+ .long 0x11542bc4 /* vsrad v10,v20,v5 */
+ .long 0x13752bc7 /* vcmpgtsd v27,v21,v5 */
+ .long 0x1017f601 /* bcdadd. v0,v23,v30,1 */
+ .long 0x1338d408 /* vpmsumb v25,v24,v26 */
+ .long 0x11042641 /* bcdsub. v8,v4,v4,1 */
+ .long 0x120ed448 /* vpmsumh v16,v14,v26 */
+ .long 0x1362d44e /* vpkudum v27,v2,v26 */
+ .long 0x10d78c88 /* vpmsumw v6,v23,v17 */
+ .long 0x1286ccc8 /* vpmsumd v20,v6,v25 */
+ .long 0x137684ce /* vpkudus v27,v22,v16 */
+ .long 0x12b494c0 /* vsubudm v21,v20,v18 */
+ .long 0x12b49500 /* vsubuqm v21,v20,v18 */
+ .long 0x13bd3508 /* vcipher v29,v29,v6 */
+ .long 0x104da509 /* vcipherlast v2,v13,v20 */
+ .long 0x1280950c /* vgbbd v20,v18 */
+ .long 0x1268cd40 /* vsubcuq v19,v8,v25 */
+ .long 0x113aed44 /* vorc v9,v26,v29 */
+ .long 0x12946d48 /* vncipher v20,v20,v13 */
+ .long 0x11e5dd49 /* vncipherlast v15,v5,v27 */
+ .long 0x1073354c /* vbpermq v3,v19,v6 */
+ .long 0x13c4e54e /* vpksdus v30,v4,v28 */
+ .long 0x10047584 /* vnand v0,v4,v14 */
+ .long 0x1228edc4 /* vsld v17,v8,v29 */
+ .long 0x13b405c8 /* vsbox v29,v20 */
+ .long 0x11675dce /* vpksdss v11,v7,v11 */
+ .long 0x107384c7 /* vcmpequd. v3,v19,v16 */
+ .long 0x12408e4e /* vupkhsw v18,v17 */
+ .long 0x13a86e82 /* vshasigmaw v29,v8,0,13 */
+ .long 0x12fcd684 /* veqv v23,v28,v26 */
+ .long 0x13a0178c /* vmrgew v29,v0,v2 */
+ .long 0x13a0168c /* vmrgow v29,v0,v2 */
+ .long 0x137306c2 /* vshasigmad v27,v19,0,0 */
+ .long 0x129ce6c4 /* vsrd v20,v28,v28 */
+ .long 0x1240aece /* vupklsw v18,v21 */
+ .long 0x13c03f02 /* vclzb v30,v7 */
+ .long 0x13a0af03 /* vpopcntb v29,v21 */
+ .long 0x1320af42 /* vclzh v25,v21 */
+ .long 0x1200f743 /* vpopcnth v16,v30 */
+ .long 0x13801f82 /* vclzw v28,v3 */
+ .long 0x11404f83 /* vpopcntw v10,v9 */
+ .long 0x12c04fc2 /* vclzd v22,v9 */
+ .long 0x11e0f7c3 /* vpopcntd v15,v30 */
+ .long 0x105f36c7 /* vcmpgtud. v2,v31,v6 */
+ .long 0x128f17c7 /* vcmpgtsd. v20,v15,v2 */
diff --git a/gdb/testsuite/gdb.arch/powerpc-altivec3.exp b/gdb/testsuite/gdb.arch/powerpc-altivec3.exp
new file mode 100644
index 0000000..b928e1b
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-altivec3.exp
@@ -0,0 +1,131 @@
+# Copyright 2014-2017 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.
+
+# Test PowerPC instructions disassembly.
+
+standard_testfile .s
+set objfile [standard_output_file ${testfile}.o]
+
+if {![istarget "powerpc*-*-*"]} then {
+ verbose "Skipping PowerPC instructions disassembly."
+ return
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${objfile}" object {debug}] != "" } {
+ untested "PowerPC instructions disassembly"
+ return -1
+}
+
+clean_restart ${objfile}
+
+# Disassemble the function.
+set func ""
+
+gdb_test "set disassembler-options altivec"
+set test "disass func"
+gdb_test_multiple $test $test {
+ -re "\r\nDump of assembler code for function func:(\r\n.*\r\n)End of assembler dump.\r\n$gdb_prompt $" {
+ set func $expect_out(1,string)
+ pass $test
+ }
+}
+
+proc instr_to_patt {instr} {
+ global decimal hex
+ # 0x0000000000000018 <+24>: stxvd2x vs43,r4,r5
+ return "\[ \t\]*$hex <\\+$decimal>:\[ \t\]*[string_to_regexp $instr]"
+}
+
+proc func_check {instr} {
+ global func
+
+ set test "found: $instr"
+ if [regexp -nocase -line [instr_to_patt $instr] $func] {
+ pass $test
+ } else {
+ fail $test
+ }
+}
+
+func_check "vmul10cuq v11,v30"
+func_check "vcmpneb v30,v1,v23"
+func_check "vpermr v30,v19,v30,v29"
+func_check "vmul10ecuq v20,v20,v17"
+func_check "vcmpneh v27,v19,v31"
+func_check "vrlwmi v6,v9,v23"
+func_check "vcmpnew v22,v26,v1"
+func_check "vrldmi v24,v30,v25"
+func_check "vcmpnezb v19,v29,v22"
+func_check "vcmpnezh v8,v23,v19"
+func_check "vrlwnm v27,v24,v11"
+func_check "vcmpnezw v21,v13,v10"
+func_check "vrldnm v5,v20,v29"
+func_check "vmul10uq v30,v19"
+func_check "vextractub v24,v21,12"
+func_check "vmul10euq v0,v19,v28"
+func_check "vextractuh v10,v3,12"
+func_check "vextractuw v28,v12,7"
+func_check "vextractd v30,v27,1"
+func_check "vinsertb v25,v31,4"
+func_check "bcdcpsgn. v21,v14,v30"
+func_check "vinserth v22,v18,5"
+func_check "vinsertw v29,v22,1"
+func_check "vinsertd v29,v13,7"
+func_check "vcmpneb. v22,v25,v8"
+func_check "vcmpneh. v16,v15,v21"
+func_check "bcdus. v22,v21,v31"
+func_check "vcmpnew. v1,v12,v12"
+func_check "bcds. v5,v3,v8,1"
+func_check "bcdtrunc. v27,v22,v1,0"
+func_check "vcmpnezb. v2,v26,v0"
+func_check "bcdutrunc. v26,v14,v7"
+func_check "vcmpnezh. v16,v5,v12"
+func_check "bcdctsq. v24,v5"
+func_check "bcdcfsq. v7,v0,0"
+func_check "bcdctz. v30,v12,1"
+func_check "bcdctn. v17,v23"
+func_check "bcdcfz. v4,v15,1"
+func_check "bcdcfn. v29,v5,1"
+func_check "bcdsetsgn. v27,v12,0"
+func_check "vcmpnezw. v14,v28,v25"
+func_check "bcdsr. v2,v2,v6,1"
+func_check "vbpermd v25,v0,v5"
+func_check "vclzlsbb r28,v25"
+func_check "vctzlsbb r2,v24"
+func_check "vnegw v21,v11"
+func_check "vnegd v17,v27"
+func_check "vprtybw v31,v23"
+func_check "vprtybd v21,v23"
+func_check "vprtybq v21,v18"
+func_check "vextsb2w v30,v4"
+func_check "vextsh2w v3,v26"
+func_check "vextsb2d v11,v17"
+func_check "vextsh2d v5,v10"
+func_check "vextsw2d v13,v25"
+func_check "vctzb v25,v2"
+func_check "vctzh v0,v3"
+func_check "vctzw v22,v6"
+func_check "vctzd v26,v24"
+func_check "vextublx r6,r31,v2"
+func_check "vextuhlx r13,r0,v18"
+func_check "vextuwlx r14,r30,v31"
+func_check "vsrv v15,v12,v14"
+func_check "vextubrx r20,r10,v30"
+func_check "vslv v21,v21,v2"
+func_check "vextuhrx r15,r9,v1"
+func_check "vextuwrx r21,r17,v16"
+func_check "vmsumudm v20,v21,v22,v23"
diff --git a/gdb/testsuite/gdb.arch/powerpc-altivec3.s b/gdb/testsuite/gdb.arch/powerpc-altivec3.s
new file mode 100644
index 0000000..9e33325
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-altivec3.s
@@ -0,0 +1,88 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+ Copyright 2014-2017 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+ .text
+ .globl func
+func:
+ .long 0x117e0001 /* vmul10cuq v11,v30 */
+ .long 0x13c1b807 /* vcmpneb v30,v1,v23 */
+ .long 0x13d3f77b /* vpermr v30,v19,v30,v29 */
+ .long 0x12948841 /* vmul10ecuq v20,v20,v17 */
+ .long 0x1373f847 /* vcmpneh v27,v19,v31 */
+ .long 0x10c9b885 /* vrlwmi v6,v9,v23 */
+ .long 0x12da0887 /* vcmpnew v22,v26,v1 */
+ .long 0x131ec8c5 /* vrldmi v24,v30,v25 */
+ .long 0x127db107 /* vcmpnezb v19,v29,v22 */
+ .long 0x11179947 /* vcmpnezh v8,v23,v19 */
+ .long 0x13785985 /* vrlwnm v27,v24,v11 */
+ .long 0x12ad5187 /* vcmpnezw v21,v13,v10 */
+ .long 0x10b4e9c5 /* vrldnm v5,v20,v29 */
+ .long 0x13d30201 /* vmul10uq v30,v19 */
+ .long 0x130caa0d /* vextractub v24,v21,12 */
+ .long 0x1013e241 /* vmul10euq v0,v19,v28 */
+ .long 0x114c1a4d /* vextractuh v10,v3,12 */
+ .long 0x1387628d /* vextractuw v28,v12,7 */
+ .long 0x13c1dacd /* vextractd v30,v27,1 */
+ .long 0x1324fb0d /* vinsertb v25,v31,4 */
+ .long 0x12aef341 /* bcdcpsgn. v21,v14,v30 */
+ .long 0x12c5934d /* vinserth v22,v18,5 */
+ .long 0x13a1b38d /* vinsertw v29,v22,1 */
+ .long 0x13a76bcd /* vinsertd v29,v13,7 */
+ .long 0x12d94407 /* vcmpneb. v22,v25,v8 */
+ .long 0x120fac47 /* vcmpneh. v16,v15,v21 */
+ .long 0x12d5fc81 /* bcdus. v22,v21,v31 */
+ .long 0x102c6487 /* vcmpnew. v1,v12,v12 */
+ .long 0x10a346c1 /* bcds. v5,v3,v8,1 */
+ .long 0x13760d01 /* bcdtrunc. v27,v22,v1,0 */
+ .long 0x105a0507 /* vcmpnezb. v2,v26,v0 */
+ .long 0x134e3d41 /* bcdutrunc. v26,v14,v7 */
+ .long 0x12056547 /* vcmpnezh. v16,v5,v12 */
+ .long 0x13002d81 /* bcdctsq. v24,v5 */
+ .long 0x10e20581 /* bcdcfsq. v7,v0,0 */
+ .long 0x13c46781 /* bcdctz. v30,v12,1 */
+ .long 0x1225bd81 /* bcdctn. v17,v23 */
+ .long 0x10867f81 /* bcdcfz. v4,v15,1 */
+ .long 0x13a72f81 /* bcdcfn. v29,v5,1 */
+ .long 0x137f6581 /* bcdsetsgn. v27,v12,0 */
+ .long 0x11dccd87 /* vcmpnezw. v14,v28,v25 */
+ .long 0x104237c1 /* bcdsr. v2,v2,v6,1 */
+ .long 0x13202dcc /* vbpermd v25,v0,v5 */
+ .long 0x1380ce02 /* vclzlsbb r28,v25 */
+ .long 0x1041c602 /* vctzlsbb r2,v24 */
+ .long 0x12a65e02 /* vnegw v21,v11 */
+ .long 0x1227de02 /* vnegd v17,v27 */
+ .long 0x13e8be02 /* vprtybw v31,v23 */
+ .long 0x12a9be02 /* vprtybd v21,v23 */
+ .long 0x12aa9602 /* vprtybq v21,v18 */
+ .long 0x13d02602 /* vextsb2w v30,v4 */
+ .long 0x1071d602 /* vextsh2w v3,v26 */
+ .long 0x11788e02 /* vextsb2d v11,v17 */
+ .long 0x10b95602 /* vextsh2d v5,v10 */
+ .long 0x11bace02 /* vextsw2d v13,v25 */
+ .long 0x133c1602 /* vctzb v25,v2 */
+ .long 0x101d1e02 /* vctzh v0,v3 */
+ .long 0x12de3602 /* vctzw v22,v6 */
+ .long 0x135fc602 /* vctzd v26,v24 */
+ .long 0x10df160d /* vextublx r6,r31,v2 */
+ .long 0x11a0964d /* vextuhlx r13,r0,v18 */
+ .long 0x11defe8d /* vextuwlx r14,r30,v31 */
+ .long 0x11ec7704 /* vsrv v15,v12,v14 */
+ .long 0x128af70d /* vextubrx r20,r10,v30 */
+ .long 0x12b51744 /* vslv v21,v21,v2 */
+ .long 0x11e90f4d /* vextuhrx r15,r9,v1 */
+ .long 0x12b1878d /* vextuwrx r21,r17,v16 */
+ .long 0x1295b5e3 /* vmsumudm v20,v21,v22,v23 */
diff --git a/gdb/testsuite/gdb.arch/powerpc-disassembler-options.exp b/gdb/testsuite/gdb.arch/powerpc-disassembler-options.exp
new file mode 100644
index 0000000..80a937d
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-disassembler-options.exp
@@ -0,0 +1,56 @@
+# Copyright 2014-2017 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.
+
+# This test exercises set/show disassembler-options results are preserved
+# across multiple set architecture calls.
+
+if {![istarget "powerpc*-*-*"]} then {
+ verbose "Skipping PowerPC disassembler options."
+ return
+}
+
+gdb_exit
+gdb_start
+
+set option "power9"
+set arch1 "rs6000:6000"
+set arch2 "powerpc:common64"
+
+gdb_test "set architecture $arch1" \
+ "The target architecture is assumed to be $arch1" \
+ "set architecture $arch1"
+
+gdb_test_no_output "set disassembler-options"
+gdb_test "show disassembler-options" \
+ "The current disassembler options are ''.*" \
+ "show NULL disassembler-options"
+
+gdb_test_no_output "set disassembler-options $option"
+gdb_test "show disassembler-options" \
+ "The current disassembler options are '$option'.*" \
+ "show disassembler-options $option"
+
+# Change architectures and verify the disassembler options have been preserved.
+
+gdb_test "set architecture $arch2" \
+ "The target architecture is assumed to be $arch2" \
+ "set architecture $arch2"
+
+gdb_test "show disassembler-options" \
+ "The current disassembler options are '$option'.*" \
+ "show disassembler-options $option"
+
diff --git a/gdb/testsuite/gdb.arch/powerpc-power.exp b/gdb/testsuite/gdb.arch/powerpc-power.exp
deleted file mode 100644
index c1c56c5..0000000
--- a/gdb/testsuite/gdb.arch/powerpc-power.exp
+++ /dev/null
@@ -1,1429 +0,0 @@
-# Copyright 2014-2017 Free Software Foundation, Inc.
-
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-# Test PowerPC instructions disassembly.
-
-standard_testfile .s
-set objfile [standard_output_file ${testfile}.o]
-
-if {![istarget "powerpc*-*-*"]} then {
- verbose "Skipping PowerPC instructions disassembly."
- return
-}
-
-if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${objfile}" object {debug}] != "" } {
- untested "PowerPC instructions disassembly"
- return -1
-}
-
-clean_restart ${objfile}
-
-# Disassemble the function.
-
-set test "disass func"
-gdb_test_multiple $test $test {
- -re "\r\nDump of assembler code for function func:(\r\n.*\r\n)End of assembler dump.\r\n$gdb_prompt $" {
- set func $expect_out(1,string)
- pass $test
- }
-}
-
-proc instr_to_patt {offset instr} {
- # 0x0000000000000018 <+24>: stxvd2x vs43,r4,r5
- return ".*\r\n\[ \t\]*0x\[0-9a-f\]+ <\\$offset>:\[ \t\]*[string map [list { } "\[ \t\]+" . {\.}] $instr]\[ \t\]*\r\n.*"
-}
-
-proc func_check {offset instr} {
- global func
-
- set test "found $offset: $instr"
- if [regexp -nocase -line [instr_to_patt $offset $instr] $func] {
- pass $test
- } else {
- fail $test
- }
-}
-
-
-## power7.d
-func_check +0 "lxvd2x vs3,r4,r5"
-func_check +4 "lxvd2x vs43,r4,r5"
-func_check +8 "stxvd2x vs3,r4,r5"
-func_check +12 "stxvd2x vs43,r4,r5"
-func_check +16 "xxmrghd vs3,vs4,vs5"
-func_check +20 "xxmrghd vs43,vs44,vs45"
-func_check +24 "xxmrgld vs3,vs4,vs5"
-func_check +28 "xxmrgld vs43,vs44,vs45"
-func_check +32 "xxmrghd vs3,vs4,vs5"
-func_check +36 "xxmrghd vs43,vs44,vs45"
-func_check +40 "xxmrgld vs3,vs4,vs5"
-func_check +44 "xxmrgld vs43,vs44,vs45"
-func_check +48 "xxpermdi vs3,vs4,vs5,1"
-func_check +52 "xxpermdi vs43,vs44,vs45,1"
-func_check +56 "xxpermdi vs3,vs4,vs5,2"
-func_check +60 "xxpermdi vs43,vs44,vs45,2"
-func_check +64 "xvmovdp vs3,vs4"
-func_check +68 "xvmovdp vs43,vs44"
-func_check +72 "xvmovdp vs3,vs4"
-func_check +76 "xvmovdp vs43,vs44"
-func_check +80 "xvcpsgndp vs3,vs4,vs5"
-func_check +84 "xvcpsgndp vs43,vs44,vs45"
-func_check +88 "doze"
-func_check +92 "nap"
-func_check +96 "sleep"
-func_check +100 "rvwinkle"
-func_check +104 "prtyw r3,r4"
-func_check +108 "prtyd r13,r14"
-func_check +112 "mfcfar r10"
-func_check +116 "mtcfar r11"
-func_check +120 "cmpb r3,r4,r5"
-func_check +124 "lwzcix r10,r11,r12"
-func_check +128 "dadd f16,f17,f18"
-func_check +132 "daddq f20,f22,f24"
-func_check +136 "dss 3"
-func_check +140 "dssall"
-func_check +144 "dst r5,r4,1"
-func_check +148 "dstt r8,r7,0"
-func_check +152 "dstst r5,r6,3"
-func_check +156 "dststt r4,r5,2"
-func_check +160 "divwe r10,r11,r12"
-func_check +164 "divwe\. r11,r12,r13"
-func_check +168 "divweo r12,r13,r14"
-func_check +172 "divweo\. r13,r14,r15"
-func_check +176 "divweu r10,r11,r12"
-func_check +180 "divweu\. r11,r12,r13"
-func_check +184 "divweuo r12,r13,r14"
-func_check +188 "divweuo\. r13,r14,r15"
-func_check +192 "bpermd r7,r17,r27"
-func_check +196 "popcntw r10,r20"
-func_check +200 "popcntd r10,r20"
-func_check +204 "ldbrx r20,r21,r22"
-func_check +208 "stdbrx r20,r21,r22"
-func_check +212 "lfiwzx f10,0,r10"
-func_check +216 "lfiwzx f10,r9,r10"
-func_check +220 "fcfids f4,f5"
-func_check +224 "fcfids\. f4,f5"
-func_check +228 "fcfidus f4,f5"
-func_check +232 "fcfidus\. f4,f5"
-func_check +236 "fctiwu f4,f5"
-func_check +240 "fctiwu\. f4,f5"
-func_check +244 "fctiwuz f4,f5"
-func_check +248 "fctiwuz\. f4,f5"
-func_check +252 "fctidu f4,f5"
-func_check +256 "fctidu\. f4,f5"
-func_check +260 "fctiduz f4,f5"
-func_check +264 "fctiduz\. f4,f5"
-func_check +268 "fcfidu f4,f5"
-func_check +272 "fcfidu\. f4,f5"
-func_check +276 "ftdiv cr0,f10,f11"
-func_check +280 "ftdiv cr7,f10,f11"
-func_check +284 "ftsqrt cr0,f10"
-func_check +288 "ftsqrt cr7,f10"
-func_check +292 "dcbtt r8,r9"
-func_check +296 "dcbtstt r8,r9"
-func_check +300 "dcffix f10,f12"
-func_check +304 "dcffix\. f20,f22"
-func_check +308 "fre f14,f15"
-func_check +312 "fre\. f14,f15"
-func_check +316 "fres f14,f15"
-func_check +320 "fres\. f14,f15"
-func_check +324 "frsqrte f14,f15"
-func_check +328 "frsqrte\. f14,f15"
-func_check +332 "frsqrtes f14,f15"
-func_check +336 "frsqrtes\. f14,f15"
-func_check +340 "isel r2,r3,r4,28"
-func_check +344 "yield"
-func_check +348 "yield"
-func_check +352 "ori r2,r2,0"
-func_check +356 "nop"
-func_check +360 "nop"
-func_check +364 "ori r2,r2,0"
-func_check +368 "mdoio"
-func_check +372 "mdoio"
-func_check +376 "mdoom"
-func_check +380 "mdoom"
-func_check +384 "mfppr r10"
-func_check +388 "mfppr32 r11"
-func_check +392 "mtppr r12"
-func_check +396 "mtppr32 r13"
-func_check +400 "tlbie r10,r11"
-
-## altivec.d
-func_check +404 "dss 3"
-func_check +408 "dssall"
-func_check +412 "dst r5,r4,1"
-func_check +416 "dstt r8,r7,0"
-func_check +420 "dstst r5,r6,3"
-func_check +424 "dststt r4,r5,2"
-func_check +428 "lvebx v30,r22,r24"
-func_check +432 "lvebx v21,0,r24"
-func_check +436 "lvehx v10,r16,r2"
-func_check +440 "lvehx v20,0,r23"
-func_check +444 "lvewx v17,r4,r18"
-func_check +448 "lvewx v23,0,r8"
-func_check +452 "lvsl v6,0,r25"
-func_check +456 "lvsl v2,0,r6"
-func_check +460 "lvsr v22,r16,r12"
-func_check +464 "lvsr v0,0,r29"
-func_check +468 "lvxl v15,r5,r13"
-func_check +472 "lvxl v19,0,r23"
-func_check +476 "lvx v22,r1,r2"
-func_check +480 "lvx v18,0,r17"
-func_check +484 "mfvrsave r31"
-func_check +488 "mfvscr v24"
-func_check +492 "mtvrsave r10"
-func_check +496 "mtvscr v25"
-func_check +500 "stvebx v18,r27,r10"
-func_check +504 "stvebx v16,0,r6"
-func_check +508 "stvehx v17,r13,r16"
-func_check +512 "stvehx v23,0,r20"
-func_check +516 "stvewx v11,r19,r31"
-func_check +520 "stvewx v31,0,r1"
-func_check +524 "stvxl v26,r21,r17"
-func_check +528 "stvxl v13,0,r22"
-func_check +532 "stvx v11,r31,r31"
-func_check +536 "stvx v30,0,r16"
-func_check +540 "vaddcuw v24,v7,v28"
-func_check +544 "vaddfp v3,v30,v11"
-func_check +548 "vaddsbs v8,v28,v9"
-func_check +552 "vaddshs v7,v5,v4"
-func_check +556 "vaddsws v22,v26,v27"
-func_check +560 "vaddubm v16,v14,v28"
-func_check +564 "vaddubs v6,v1,v25"
-func_check +568 "vadduhm v2,v4,v6"
-func_check +572 "vadduhs v26,v21,v8"
-func_check +576 "vadduwm v29,v31,v1"
-func_check +580 "vadduws v23,v13,v4"
-func_check +584 "vandc v30,v16,v9"
-func_check +588 "vand v3,v13,v27"
-func_check +592 "vavgsb v4,v6,v17"
-func_check +596 "vavgsh v23,v28,v19"
-func_check +600 "vavgsw v8,v15,v31"
-func_check +604 "vavgub v6,v7,v25"
-func_check +608 "vavguh v25,v22,v10"
-func_check +612 "vavguw v3,v23,v29"
-func_check +616 "vctsxs v14,v2,6"
-func_check +620 "vctuxs v9,v31,20"
-func_check +624 "vcfsx v24,v30,3"
-func_check +628 "vcfux v17,v21,29"
-func_check +632 "vcmpbfp v18,v28,v0"
-func_check +636 "vcmpbfp\. v19,v26,v3"
-func_check +640 "vcmpeqfp v16,v2,v11"
-func_check +644 "vcmpeqfp\. v23,v13,v13"
-func_check +648 "vcmpequb v25,v19,v10"
-func_check +652 "vcmpequb\. v18,v11,v2"
-func_check +656 "vcmpequh v9,v25,v7"
-func_check +660 "vcmpequh\. v14,v24,v21"
-func_check +664 "vcmpequw v24,v12,v5"
-func_check +668 "vcmpequw\. v19,v16,v1"
-func_check +672 "vcmpgefp v23,v17,v16"
-func_check +676 "vcmpgefp\. v19,v29,v17"
-func_check +680 "vcmpgtfp v16,v28,v13"
-func_check +684 "vcmpgtfp\. v14,v24,v7"
-func_check +688 "vcmpgtsb v16,v22,v6"
-func_check +692 "vcmpgtsb\. v2,v12,v14"
-func_check +696 "vcmpgtsh v28,v3,v29"
-func_check +700 "vcmpgtsh\. v16,v19,v13"
-func_check +704 "vcmpgtsw v15,v0,v5"
-func_check +708 "vcmpgtsw\. v21,v13,v0"
-func_check +712 "vcmpgtub v5,v10,v30"
-func_check +716 "vcmpgtub\. v7,v13,v10"
-func_check +720 "vcmpgtuh v24,v15,v16"
-func_check +724 "vcmpgtuh\. v25,v21,v27"
-func_check +728 "vcmpgtuw v17,v27,v6"
-func_check +732 "vcmpgtuw\. v8,v21,v27"
-func_check +736 "vcfsx v1,v1,14"
-func_check +740 "vctsxs v4,v15,25"
-func_check +744 "vctuxs v28,v23,14"
-func_check +748 "vcfux v6,v6,0"
-func_check +752 "vexptefp v0,v8"
-func_check +756 "vlogefp v22,v27"
-func_check +760 "vmaddfp v23,v18,v5,v18"
-func_check +764 "vmaxfp v13,v13,v27"
-func_check +768 "vmaxsb v8,v23,v14"
-func_check +772 "vmaxsh v19,v17,v0"
-func_check +776 "vmaxsw v19,v3,v22"
-func_check +780 "vmaxub v23,v30,v28"
-func_check +784 "vmaxuh v9,v20,v23"
-func_check +788 "vmaxuw v21,v19,v1"
-func_check +792 "vmhaddshs v22,v13,v5,v22"
-func_check +796 "vmhraddshs v31,v0,v3,v18"
-func_check +800 "vminfp v2,v21,v24"
-func_check +804 "vminsb v20,v6,v10"
-func_check +808 "vminsh v18,v27,v26"
-func_check +812 "vminsw v3,v4,v1"
-func_check +816 "vminub v7,v0,v13"
-func_check +820 "vminuh v0,v12,v6"
-func_check +824 "vminuw v6,v3,v1"
-func_check +828 "vmladduhm v3,v29,v3,v26"
-func_check +832 "vmrghb v21,v5,v31"
-func_check +836 "vmrghh v21,v24,v0"
-func_check +840 "vmrghw v16,v0,v22"
-func_check +844 "vmrglb v1,v17,v16"
-func_check +848 "vmrglh v14,v8,v15"
-func_check +852 "vmrglw v31,v21,v5"
-func_check +856 "vmr v24,v9"
-func_check +860 "vmr v24,v9"
-func_check +864 "vmsummbm v0,v24,v15,v23"
-func_check +868 "vmsumshm v1,v4,v7,v25"
-func_check +872 "vmsumshs v9,v8,v13,v31"
-func_check +876 "vmsumubm v23,v31,v12,v30"
-func_check +880 "vmsumuhm v29,v0,v26,v21"
-func_check +884 "vmsumuhs v27,v14,v25,v5"
-func_check +888 "vmulesb v10,v25,v14"
-func_check +892 "vmulesh v1,v18,v8"
-func_check +896 "vmuleub v17,v14,v9"
-func_check +900 "vmuleuh v5,v26,v9"
-func_check +904 "vmulosb v21,v18,v6"
-func_check +908 "vmulosh v4,v5,v8"
-func_check +912 "vmuloub v2,v9,v19"
-func_check +916 "vmulouh v29,v5,v4"
-func_check +920 "vnmsubfp v8,v2,v6,v5"
-func_check +924 "vnor v31,v9,v10"
-func_check +928 "vnot v25,v31"
-func_check +932 "vnot v25,v31"
-func_check +936 "vor v23,v7,v2"
-func_check +940 "vperm v0,v28,v22,v25"
-func_check +944 "vpkpx v16,v25,v17"
-func_check +948 "vpkshss v12,v16,v17"
-func_check +952 "vpkshus v1,v19,v23"
-func_check +956 "vpkswss v25,v7,v13"
-func_check +960 "vpkswus v4,v24,v10"
-func_check +964 "vpkuhum v9,v27,v12"
-func_check +968 "vpkuhus v22,v10,v25"
-func_check +972 "vpkuwum v30,v18,v0"
-func_check +976 "vpkuwus v7,v3,v22"
-func_check +980 "vrefp v24,v28"
-func_check +984 "vrfim v17,v19"
-func_check +988 "vrfin v24,v25"
-func_check +992 "vrfip v3,v5"
-func_check +996 "vrfiz v8,v10"
-func_check +1000 "vrlb v26,v18,v30"
-func_check +1004 "vrlh v16,v17,v25"
-func_check +1008 "vrlw v23,v30,v9"
-func_check +1012 "vrsqrtefp v2,v18"
-func_check +1016 "vsel v20,v14,v18,v10"
-func_check +1020 "vslb v25,v25,v12"
-func_check +1024 "vsldoi v9,v9,v12,7"
-func_check +1028 "vslh v14,v2,v11"
-func_check +1032 "vslo v30,v5,v6"
-func_check +1036 "vsl v22,v30,v9"
-func_check +1040 "vslw v26,v26,v3"
-func_check +1044 "vspltb v1,v20,6"
-func_check +1048 "vsplth v16,v18,3"
-func_check +1052 "vspltisb v25,-13"
-func_check +1056 "vspltish v22,10"
-func_check +1060 "vspltisw v13,13"
-func_check +1064 "vspltw v9,v18,2"
-func_check +1068 "vsrab v14,v22,v0"
-func_check +1072 "vsrah v12,v12,v18"
-func_check +1076 "vsraw v2,v2,v13"
-func_check +1080 "vsrb v7,v27,v5"
-func_check +1084 "vsrh v7,v11,v29"
-func_check +1088 "vsro v18,v30,v31"
-func_check +1092 "vsr v2,v9,v28"
-func_check +1096 "vsrw v0,v25,v0"
-func_check +1100 "vsubcuw v24,v2,v10"
-func_check +1104 "vsubfp v22,v24,v20"
-func_check +1108 "vsubsbs v10,v22,v13"
-func_check +1112 "vsubshs v24,v17,v28"
-func_check +1116 "vsubsws v10,v26,v0"
-func_check +1120 "vsububm v16,v11,v24"
-func_check +1124 "vsububs v11,v21,v1"
-func_check +1128 "vsubuhm v6,v12,v24"
-func_check +1132 "vsubuhs v30,v11,v9"
-func_check +1136 "vsubuwm v19,v20,v13"
-func_check +1140 "vsubuws v18,v25,v6"
-func_check +1144 "vsum2sws v25,v10,v18"
-func_check +1148 "vsum4sbs v13,v16,v21"
-func_check +1152 "vsum4shs v23,v8,v4"
-func_check +1156 "vsum4ubs v28,v13,v30"
-func_check +1160 "vsumsws v22,v10,v8"
-func_check +1164 "vupkhpx v24,v14"
-func_check +1168 "vupkhsb v2,v22"
-func_check +1172 "vupkhsh v16,v2"
-func_check +1176 "vupklpx v10,v26"
-func_check +1180 "vupklsb v15,v28"
-func_check +1184 "vupklsh v8,v8"
-func_check +1188 "vxor v25,v0,v3"
-
-## vsd.d
-func_check +1192 "lxsdx vs40,r10,r20"
-func_check +1196 "lxvd2x vs40,r10,r20"
-func_check +1200 "lxvdsx vs40,r10,r20"
-func_check +1204 "lxvw4x vs40,r10,r20"
-func_check +1208 "stxsdx vs40,r10,r20"
-func_check +1212 "stxvd2x vs40,r10,r20"
-func_check +1216 "stxvw4x vs40,r10,r20"
-func_check +1220 "xsabsdp vs40,vs60"
-func_check +1224 "xsadddp vs40,vs50,vs60"
-func_check +1228 "xscmpodp cr1,vs50,vs60"
-func_check +1232 "xscmpudp cr1,vs50,vs60"
-func_check +1236 "xscpsgndp vs40,vs50,vs60"
-func_check +1240 "xscvdpsp vs40,vs60"
-func_check +1244 "xscvdpsxds vs40,vs60"
-func_check +1248 "xscvdpsxws vs40,vs60"
-func_check +1252 "xscvdpuxds vs40,vs60"
-func_check +1256 "xscvdpuxws vs40,vs60"
-func_check +1260 "xscvspdp vs40,vs60"
-func_check +1264 "xscvsxddp vs40,vs60"
-func_check +1268 "xscvuxddp vs40,vs60"
-func_check +1272 "xsdivdp vs40,vs50,vs60"
-func_check +1276 "xsmaddadp vs40,vs50,vs60"
-func_check +1280 "xsmaddmdp vs40,vs50,vs60"
-func_check +1284 "xsmaxdp vs40,vs50,vs60"
-func_check +1288 "xsmindp vs40,vs50,vs60"
-func_check +1292 "xsmsubadp vs40,vs50,vs60"
-func_check +1296 "xsmsubmdp vs40,vs50,vs60"
-func_check +1300 "xsmuldp vs40,vs50,vs60"
-func_check +1304 "xsnabsdp vs40,vs60"
-func_check +1308 "xsnegdp vs40,vs60"
-func_check +1312 "xsnmaddadp vs40,vs50,vs60"
-func_check +1316 "xsnmaddmdp vs40,vs50,vs60"
-func_check +1320 "xsnmsubadp vs40,vs50,vs60"
-func_check +1324 "xsnmsubmdp vs40,vs50,vs60"
-func_check +1328 "xsrdpi vs40,vs60"
-func_check +1332 "xsrdpic vs40,vs60"
-func_check +1336 "xsrdpim vs40,vs60"
-func_check +1340 "xsrdpip vs40,vs60"
-func_check +1344 "xsrdpiz vs40,vs60"
-func_check +1348 "xsredp vs40,vs60"
-func_check +1352 "xsrsqrtedp vs40,vs60"
-func_check +1356 "xssqrtdp vs40,vs60"
-func_check +1360 "xssubdp vs40,vs50,vs60"
-func_check +1364 "xstdivdp cr1,vs50,vs60"
-func_check +1368 "xstsqrtdp cr1,vs60"
-func_check +1372 "xvabsdp vs40,vs60"
-func_check +1376 "xvabssp vs40,vs60"
-func_check +1380 "xvadddp vs40,vs50,vs60"
-func_check +1384 "xvaddsp vs40,vs50,vs60"
-func_check +1388 "xvcmpeqdp vs40,vs50,vs60"
-func_check +1392 "xvcmpeqdp\. vs40,vs50,vs60"
-func_check +1396 "xvcmpeqsp vs40,vs50,vs60"
-func_check +1400 "xvcmpeqsp\. vs40,vs50,vs60"
-func_check +1404 "xvcmpgedp vs40,vs50,vs60"
-func_check +1408 "xvcmpgedp\. vs40,vs50,vs60"
-func_check +1412 "xvcmpgesp vs40,vs50,vs60"
-func_check +1416 "xvcmpgesp\. vs40,vs50,vs60"
-func_check +1420 "xvcmpgtdp vs40,vs50,vs60"
-func_check +1424 "xvcmpgtdp\. vs40,vs50,vs60"
-func_check +1428 "xvcmpgtsp vs40,vs50,vs60"
-func_check +1432 "xvcmpgtsp\. vs40,vs50,vs60"
-func_check +1436 "xvcpsgndp vs40,vs50,vs60"
-func_check +1440 "xvmovdp vs40,vs60"
-func_check +1444 "xvmovdp vs40,vs60"
-func_check +1448 "xvcpsgnsp vs40,vs50,vs60"
-func_check +1452 "xvmovsp vs40,vs60"
-func_check +1456 "xvmovsp vs40,vs60"
-func_check +1460 "xvcvdpsp vs40,vs60"
-func_check +1464 "xvcvdpsxds vs40,vs60"
-func_check +1468 "xvcvdpsxws vs40,vs60"
-func_check +1472 "xvcvdpuxds vs40,vs60"
-func_check +1476 "xvcvdpuxws vs40,vs60"
-func_check +1480 "xvcvspdp vs40,vs60"
-func_check +1484 "xvcvspsxds vs40,vs60"
-func_check +1488 "xvcvspsxws vs40,vs60"
-func_check +1492 "xvcvspuxds vs40,vs60"
-func_check +1496 "xvcvspuxws vs40,vs60"
-func_check +1500 "xvcvsxddp vs40,vs60"
-func_check +1504 "xvcvsxdsp vs40,vs60"
-func_check +1508 "xvcvsxwdp vs40,vs60"
-func_check +1512 "xvcvsxwsp vs40,vs60"
-func_check +1516 "xvcvuxddp vs40,vs60"
-func_check +1520 "xvcvuxdsp vs40,vs60"
-func_check +1524 "xvcvuxwdp vs40,vs60"
-func_check +1528 "xvcvuxwsp vs40,vs60"
-func_check +1532 "xvdivdp vs40,vs50,vs60"
-func_check +1536 "xvdivsp vs40,vs50,vs60"
-func_check +1540 "xvmaddadp vs40,vs50,vs60"
-func_check +1544 "xvmaddmdp vs40,vs50,vs60"
-func_check +1548 "xvmaddasp vs40,vs50,vs60"
-func_check +1552 "xvmaddmsp vs40,vs50,vs60"
-func_check +1556 "xvmaxdp vs40,vs50,vs60"
-func_check +1560 "xvmaxsp vs40,vs50,vs60"
-func_check +1564 "xvmindp vs40,vs50,vs60"
-func_check +1568 "xvminsp vs40,vs50,vs60"
-func_check +1572 "xvmsubadp vs40,vs50,vs60"
-func_check +1576 "xvmsubmdp vs40,vs50,vs60"
-func_check +1580 "xvmsubasp vs40,vs50,vs60"
-func_check +1584 "xvmsubmsp vs40,vs50,vs60"
-func_check +1588 "xvmuldp vs40,vs50,vs60"
-func_check +1592 "xvmulsp vs40,vs50,vs60"
-func_check +1596 "xvnabsdp vs40,vs60"
-func_check +1600 "xvnabssp vs40,vs60"
-func_check +1604 "xvnegdp vs40,vs60"
-func_check +1608 "xvnegsp vs40,vs60"
-func_check +1612 "xvnmaddadp vs40,vs50,vs60"
-func_check +1616 "xvnmaddmdp vs40,vs50,vs60"
-func_check +1620 "xvnmaddasp vs40,vs50,vs60"
-func_check +1624 "xvnmaddmsp vs40,vs50,vs60"
-func_check +1628 "xvnmsubadp vs40,vs50,vs60"
-func_check +1632 "xvnmsubmdp vs40,vs50,vs60"
-func_check +1636 "xvnmsubasp vs40,vs50,vs60"
-func_check +1640 "xvnmsubmsp vs40,vs50,vs60"
-func_check +1644 "xvrdpi vs40,vs60"
-func_check +1648 "xvrdpic vs40,vs60"
-func_check +1652 "xvrdpim vs40,vs60"
-func_check +1656 "xvrdpip vs40,vs60"
-func_check +1660 "xvrdpiz vs40,vs60"
-func_check +1664 "xvredp vs40,vs60"
-func_check +1668 "xvresp vs40,vs60"
-func_check +1672 "xvrspi vs40,vs60"
-func_check +1676 "xvrspic vs40,vs60"
-func_check +1680 "xvrspim vs40,vs60"
-func_check +1684 "xvrspip vs40,vs60"
-func_check +1688 "xvrspiz vs40,vs60"
-func_check +1692 "xvrsqrtedp vs40,vs60"
-func_check +1696 "xvrsqrtesp vs40,vs60"
-func_check +1700 "xvsqrtdp vs40,vs60"
-func_check +1704 "xvsqrtsp vs40,vs60"
-func_check +1708 "xvsubdp vs40,vs50,vs60"
-func_check +1712 "xvsubsp vs40,vs50,vs60"
-func_check +1716 "xvtdivdp cr1,vs50,vs60"
-func_check +1720 "xvtdivsp cr1,vs50,vs60"
-func_check +1724 "xvtsqrtdp cr1,vs60"
-func_check +1728 "xvtsqrtsp cr1,vs60"
-func_check +1732 "xxland vs40,vs50,vs60"
-func_check +1736 "xxlandc vs40,vs50,vs60"
-func_check +1740 "xxlnor vs40,vs50,vs60"
-func_check +1744 "xxlor vs40,vs50,vs60"
-func_check +1748 "xxlxor vs40,vs50,vs60"
-func_check +1752 "xxmrghw vs40,vs50,vs60"
-func_check +1756 "xxmrglw vs40,vs50,vs60"
-func_check +1760 "xxmrghd vs40,vs50,vs60"
-func_check +1764 "xxpermdi vs40,vs50,vs60,1"
-func_check +1768 "xxpermdi vs40,vs50,vs60,2"
-func_check +1772 "xxmrgld vs40,vs50,vs60"
-func_check +1776 "xxspltd vs40,vs50,0"
-func_check +1780 "xxspltd vs40,vs50,0"
-func_check +1784 "xxspltd vs40,vs50,1"
-func_check +1788 "xxspltd vs40,vs50,1"
-func_check +1792 "xxmrghd vs40,vs50,vs60"
-func_check +1796 "xxmrghd vs40,vs50,vs60"
-func_check +1800 "xxmrgld vs40,vs50,vs60"
-func_check +1804 "xxswapd vs40,vs50"
-func_check +1808 "xxswapd vs40,vs50"
-func_check +1812 "xxsel vs40,vs50,vs60,vs62"
-func_check +1816 "xxsldwi vs40,vs50,vs60,2"
-func_check +1820 "xxspltw vs40,vs60,2"
-func_check +1824 "lxvd2x vs40,0,r20"
-func_check +1828 "lxvd2x vs40,r10,r20"
-func_check +1832 "stxvd2x vs40,0,r20"
-func_check +1836 "stxvd2x vs40,r10,r20"
-
-## power8.d
-func_check +1840 "tabort\. r5"
-func_check +1844 "tabortwc\. 7,r8,r16"
-func_check +1848 "tabortdc\. 20,r11,r10"
-func_check +1852 "tabortwci\. 17,r10,-13"
-func_check +1856 "tabortdci\. 29,r3,-5"
-func_check +1860 "tbegin\."
-func_check +1864 "tcheck cr7"
-func_check +1868 "tend\."
-func_check +1872 "tend\."
-func_check +1876 "tendall\."
-func_check +1880 "tendall\."
-func_check +1884 "treclaim\. r24"
-func_check +1888 "trechkpt\."
-func_check +1892 "tsuspend\."
-func_check +1896 "tsuspend\."
-func_check +1900 "tresume\."
-func_check +1904 "tresume\."
-func_check +1908 "ori r2,r2,0"
-func_check +1912 "nop"
-func_check +1916 "ori r2,r2,0"
-func_check +1920 "rfebb 0"
-func_check +1924 "rfebb"
-func_check +1928 "rfebb"
-func_check +1932 "bctar- 12,4\\*cr5\\+gt"
-func_check +1936 "bctarl- 4,4\\*cr1\\+so"
-func_check +1940 "bctar\\+ 12,4\\*cr3\\+lt"
-func_check +1944 "bctarl\\+ 4,eq"
-func_check +1948 "bctar 4,4\\*cr2\\+lt,1"
-func_check +1952 "bctarl 4,4\\*cr1\\+so,2"
-func_check +1956 "wait"
-func_check +1960 "msgsndp r8"
-func_check +1964 "mtsle 1"
-func_check +1968 "msgclrp r27"
-func_check +1972 "stqcx\. r10,r10,r12"
-func_check +1976 "stqcx\. r28,0,r7"
-func_check +1980 "lqarx r24,r19,r11"
-func_check +1984 "lqarx r22,0,r11"
-func_check +1988 "mfbhrbe r20,6"
-func_check +1992 "pbt\. r29,r17,r16"
-func_check +1996 "pbt\. r14,0,r7"
-func_check +2000 "clrbhrb"
-func_check +2004 "vpermxor v11,v10,v0,v23"
-func_check +2008 "vaddeuqm v24,v2,v7,v4"
-func_check +2012 "vaddecuq v10,v10,v8,v2"
-func_check +2016 "vsubeuqm v5,v15,v8,v19"
-func_check +2020 "vsubecuq v12,v31,v16,v29"
-func_check +2024 "vmulouw v20,v29,v13"
-func_check +2028 "vmuluwm v29,v0,v26"
-func_check +2032 "vaddudm v8,v21,v28"
-func_check +2036 "vmaxud v1,v26,v1"
-func_check +2040 "vrld v20,v3,v1"
-func_check +2044 "vcmpequd v4,v19,v11"
-func_check +2048 "vadduqm v23,v14,v30"
-func_check +2052 "vaddcuq v8,v8,v13"
-func_check +2056 "vmulosw v28,v27,v4"
-func_check +2060 "vmaxsd v3,v4,v4"
-func_check +2064 "vmuleuw v0,v19,v21"
-func_check +2068 "vminud v24,v20,v19"
-func_check +2072 "vcmpgtud v0,v28,v15"
-func_check +2076 "vmulesw v21,v0,v2"
-func_check +2080 "vminsd v9,v26,v9"
-func_check +2084 "vsrad v25,v29,v11"
-func_check +2088 "vcmpgtsd v11,v28,v11"
-func_check +2092 "bcdadd\. v5,v8,v26,1"
-func_check +2096 "vpmsumb v4,v3,v12"
-func_check +2100 "bcdsub\. v26,v31,v21,1"
-func_check +2104 "vpmsumh v5,v17,v16"
-func_check +2108 "vpkudum v23,v17,v20"
-func_check +2112 "vpmsumw v24,v21,v29"
-func_check +2116 "vpmsumd v9,v22,v13"
-func_check +2120 "vpkudus v18,v19,v18"
-func_check +2124 "vsubuqm v30,v16,v22"
-func_check +2128 "vcipher v14,v11,v7"
-func_check +2132 "vcipherlast v10,v2,v22"
-func_check +2136 "vgbbd v23,v13"
-func_check +2140 "vsubcuq v16,v25,v16"
-func_check +2144 "vorc v31,v1,v5"
-func_check +2148 "vncipher v4,v17,v31"
-func_check +2152 "vncipherlast v24,v2,v27"
-func_check +2156 "vbpermq v23,v21,v23"
-func_check +2160 "vpksdus v27,v18,v9"
-func_check +2164 "vnand v27,v29,v27"
-func_check +2168 "vsld v19,v19,v24"
-func_check +2172 "vsbox v5,v13"
-func_check +2176 "vpksdss v25,v3,v7"
-func_check +2180 "vcmpequd\. v28,v8,v0"
-func_check +2184 "vupkhsw v26,v26"
-func_check +2188 "vshasigmaw v5,v7,0,6"
-func_check +2192 "veqv v28,v21,v14"
-func_check +2196 "vmrgow v1,v8,v19"
-func_check +2200 "vshasigmad v0,v10,0,10"
-func_check +2204 "vsrd v5,v27,v14"
-func_check +2208 "vupklsw v11,v13"
-func_check +2212 "vclzb v14,v16"
-func_check +2216 "vpopcntb v20,v27"
-func_check +2220 "vclzh v28,v11"
-func_check +2224 "vpopcnth v24,v9"
-func_check +2228 "vclzw v27,v31"
-func_check +2232 "vpopcntw v17,v19"
-func_check +2236 "vclzd v12,v29"
-func_check +2240 "vpopcntd v23,v22"
-func_check +2244 "vcmpgtud\. v24,v20,v29"
-func_check +2248 "vcmpgtsd\. v9,v6,v27"
-func_check +2252 "lxsiwzx vs62,r14,r26"
-func_check +2256 "lxsiwzx vs40,0,r25"
-func_check +2260 "lxsiwax vs25,0,r26"
-func_check +2264 "lxsiwax vs3,0,r3"
-func_check +2268 "mfvsrd r12,vs62"
-func_check +2272 "mffprwz r20,f12"
-func_check +2276 "stxsiwx vs14,r9,r14"
-func_check +2280 "stxsiwx vs21,0,r8"
-func_check +2284 "mtvsrd vs48,r11"
-func_check +2288 "mtvrwa v31,r23"
-func_check +2292 "mtfprwz f16,r26"
-func_check +2296 "lxsspx vs13,r19,r13"
-func_check +2300 "lxsspx vs18,0,r13"
-func_check +2304 "stxsspx vs43,r2,r4"
-func_check +2308 "stxsspx vs55,0,r11"
-func_check +2312 "xsaddsp vs54,vs48,vs25"
-func_check +2316 "xsmaddasp vs14,vs50,vs1"
-func_check +2320 "xssubsp vs26,vs22,vs42"
-func_check +2324 "xsmaddmsp vs27,vs53,vs52"
-func_check +2328 "xsrsqrtesp vs8,vs59"
-func_check +2332 "xssqrtsp vs12,vs41"
-func_check +2336 "xsmulsp vs57,vs11,vs32"
-func_check +2340 "xsmsubasp vs38,vs20,vs26"
-func_check +2344 "xsdivsp vs26,vs19,vs6"
-func_check +2348 "xsmsubmsp vs35,vs37,vs55"
-func_check +2352 "xsresp vs59,vs8"
-func_check +2356 "xsnmaddasp vs44,vs33,vs33"
-func_check +2360 "xsnmaddmsp vs17,vs62,vs30"
-func_check +2364 "xsnmsubasp vs54,vs52,vs31"
-func_check +2368 "xsnmsubmsp vs37,vs5,vs58"
-func_check +2372 "xxlorc vs30,vs54,vs44"
-func_check +2376 "xxlnand vs49,vs14,vs29"
-func_check +2380 "xxleqv vs62,vs22,vs30"
-func_check +2384 "xscvdpspn vs60,vs54"
-func_check +2388 "xsrsp vs22,vs45"
-func_check +2392 "xscvuxdsp vs26,vs59"
-func_check +2396 "xscvsxdsp vs38,vs49"
-func_check +2400 "xscvspdpn vs59,vs26"
-func_check +2404 "fmrgow f24,f14,f2"
-func_check +2408 "fmrgew f22,f7,f5"
-func_check +2412 "msgsnd r14"
-func_check +2416 "msgclr r23"
-func_check +2420 "lxvd2x vs40,0,r5"
-func_check +2424 "lxvd2x vs40,0,r5"
-func_check +2428 "lxvd2x vs10,r20,r6"
-func_check +2432 "lxvd2x vs10,r20,r6"
-func_check +2436 "stxvd2x vs41,0,r7"
-func_check +2440 "stxvd2x vs41,0,r7"
-func_check +2444 "stxvd2x vs11,r21,r8"
-func_check +2448 "stxvd2x vs11,r21,r8"
-
-## altivec2.d
-func_check +2452 "lvepxl v3,0,r28"
-func_check +2456 "lvepxl v19,r4,r18"
-func_check +2460 "lvepx v27,0,r19"
-func_check +2464 "lvepx v1,r25,r18"
-func_check +2468 "lvexbx v31,0,r27"
-func_check +2472 "lvexbx v28,r1,r12"
-func_check +2476 "lvexhx v31,0,r14"
-func_check +2480 "lvexhx v17,r16,r31"
-func_check +2484 "lvexwx v22,0,r29"
-func_check +2488 "lvexwx v23,r25,r5"
-func_check +2492 "lvsm v3,0,r12"
-func_check +2496 "lvsm v27,r29,r1"
-func_check +2500 "lvswxl v7,0,r6"
-func_check +2504 "lvswxl v7,r16,r8"
-func_check +2508 "lvswx v14,0,r18"
-func_check +2512 "lvswx v28,r28,r16"
-func_check +2516 "lvtlxl v27,0,r12"
-func_check +2520 "lvtlxl v27,r28,r0"
-func_check +2524 "lvtlx v23,0,r25"
-func_check +2528 "lvtlx v1,r25,r14"
-func_check +2532 "lvtrxl v20,0,r24"
-func_check +2536 "lvtrxl v22,r29,r24"
-func_check +2540 "lvtrx v24,0,r8"
-func_check +2544 "lvtrx v13,r23,r28"
-func_check +2548 "mvidsplt v12,r28,r12"
-func_check +2552 "mviwsplt v10,r27,r0"
-func_check +2556 "stvepxl v27,0,r13"
-func_check +2560 "stvepxl v2,r2,r31"
-func_check +2564 "stvepx v3,0,r10"
-func_check +2568 "stvepx v27,r28,r0"
-func_check +2572 "stvexbx v13,0,r6"
-func_check +2576 "stvexbx v13,r25,r3"
-func_check +2580 "stvexhx v22,0,r1"
-func_check +2584 "stvexhx v17,r14,r10"
-func_check +2588 "stvexwx v21,0,r27"
-func_check +2592 "stvexwx v31,r18,r1"
-func_check +2596 "stvflxl v26,0,r13"
-func_check +2600 "stvflxl v22,r13,r21"
-func_check +2604 "stvflx v5,0,r9"
-func_check +2608 "stvflx v21,r24,r1"
-func_check +2612 "stvfrxl v13,0,r10"
-func_check +2616 "stvfrxl v13,r17,r25"
-func_check +2620 "stvfrx v17,0,r10"
-func_check +2624 "stvfrx v8,r12,r31"
-func_check +2628 "stvswxl v18,0,r29"
-func_check +2632 "stvswxl v26,r14,r8"
-func_check +2636 "stvswx v0,0,r15"
-func_check +2640 "stvswx v13,r23,r7"
-func_check +2644 "vabsdub v6,v17,v16"
-func_check +2648 "vabsduh v21,v18,v4"
-func_check +2652 "vabsduw v25,v20,v9"
-func_check +2656 "vpermxor v6,v17,v20,v26"
-func_check +2660 "vaddeuqm v29,v26,v15,v28"
-func_check +2664 "vaddecuq v15,v8,v7,v24"
-func_check +2668 "vsubeuqm v2,v6,v21,v1"
-func_check +2672 "vsubecuq v29,v6,v0,v4"
-func_check +2676 "vmulouw v14,v9,v3"
-func_check +2680 "vmuluwm v24,v16,v18"
-func_check +2684 "vaddudm v10,v17,v17"
-func_check +2688 "vmaxud v30,v25,v4"
-func_check +2692 "vrld v10,v6,v28"
-func_check +2696 "vcmpequd v27,v7,v7"
-func_check +2700 "vadduqm v22,v16,v25"
-func_check +2704 "vaddcuq v1,v21,v29"
-func_check +2708 "vmulosw v20,v11,v19"
-func_check +2712 "vmaxsd v24,v19,v1"
-func_check +2716 "vmuleuw v13,v27,v30"
-func_check +2720 "vminud v9,v24,v17"
-func_check +2724 "vcmpgtud v10,v18,v28"
-func_check +2728 "vmulesw v0,v29,v22"
-func_check +2732 "vminsd v13,v28,v1"
-func_check +2736 "vsrad v10,v20,v5"
-func_check +2740 "vcmpgtsd v27,v21,v5"
-func_check +2744 "bcdadd\. v0,v23,v30,1"
-func_check +2748 "vpmsumb v25,v24,v26"
-func_check +2752 "bcdsub\. v8,v4,v4,1"
-func_check +2756 "vpmsumh v16,v14,v26"
-func_check +2760 "vpkudum v27,v2,v26"
-func_check +2764 "vpmsumw v6,v23,v17"
-func_check +2768 "vpmsumd v20,v6,v25"
-func_check +2772 "vpkudus v27,v22,v16"
-func_check +2776 "vsubudm v21,v20,v18"
-func_check +2780 "vsubuqm v21,v20,v18"
-func_check +2784 "vcipher v29,v29,v6"
-func_check +2788 "vcipherlast v2,v13,v20"
-func_check +2792 "vgbbd v20,v18"
-func_check +2796 "vsubcuq v19,v8,v25"
-func_check +2800 "vorc v9,v26,v29"
-func_check +2804 "vncipher v20,v20,v13"
-func_check +2808 "vncipherlast v15,v5,v27"
-func_check +2812 "vbpermq v3,v19,v6"
-func_check +2816 "vpksdus v30,v4,v28"
-func_check +2820 "vnand v0,v4,v14"
-func_check +2824 "vsld v17,v8,v29"
-func_check +2828 "vsbox v29,v20"
-func_check +2832 "vpksdss v11,v7,v11"
-func_check +2836 "vcmpequd\. v3,v19,v16"
-func_check +2840 "vupkhsw v18,v17"
-func_check +2844 "vshasigmaw v29,v8,0,13"
-func_check +2848 "veqv v23,v28,v26"
-func_check +2852 "vmrgew v29,v0,v2"
-func_check +2856 "vmrgow v29,v0,v2"
-func_check +2860 "vshasigmad v27,v19,0,0"
-func_check +2864 "vsrd v20,v28,v28"
-func_check +2868 "vupklsw v18,v21"
-func_check +2872 "vclzb v30,v7"
-func_check +2876 "vpopcntb v29,v21"
-func_check +2880 "vclzh v25,v21"
-func_check +2884 "vpopcnth v16,v30"
-func_check +2888 "vclzw v28,v3"
-func_check +2892 "vpopcntw v10,v9"
-func_check +2896 "vclzd v22,v9"
-func_check +2900 "vpopcntd v15,v30"
-func_check +2904 "vcmpgtud\. v2,v31,v6"
-func_check +2908 "vcmpgtsd\. v20,v15,v2"
-
-## vsd2.d
-func_check +2912 "lxsiwzx vs62,r14,r26"
-func_check +2916 "lxsiwzx vs40,0,r25"
-func_check +2920 "lxsiwax vs25,0,r26"
-func_check +2924 "lxsiwax vs3,0,r3"
-func_check +2928 "mfvsrd r12,vs30"
-func_check +2932 "mfvsrd r12,vs30"
-func_check +2936 "mfvsrd r12,vs62"
-func_check +2940 "mfvsrd r12,vs62"
-func_check +2944 "mffprwz r20,f12"
-func_check +2948 "mffprwz r20,f12"
-func_check +2952 "mfvrwz r21,v12"
-func_check +2956 "mfvrwz r21,v12"
-func_check +2960 "stxsiwx vs14,r9,r14"
-func_check +2964 "stxsiwx vs21,0,r8"
-func_check +2968 "mtvsrd vs11,r28"
-func_check +2972 "mtvsrd vs11,r28"
-func_check +2976 "mtvsrd vs43,r29"
-func_check +2980 "mtvsrd vs43,r29"
-func_check +2984 "mtfprwa f24,r22"
-func_check +2988 "mtfprwa f24,r22"
-func_check +2992 "mtvrwa v25,r23"
-func_check +2996 "mtvrwa v25,r23"
-func_check +3000 "mtfprwz f26,r27"
-func_check +3004 "mtfprwz f26,r27"
-func_check +3008 "mtvrwz v27,r28"
-func_check +3012 "mtvrwz v27,r28"
-func_check +3016 "lxsspx vs13,r19,r13"
-func_check +3020 "lxsspx vs18,0,r13"
-func_check +3024 "stxsspx vs43,r2,r4"
-func_check +3028 "stxsspx vs55,0,r11"
-func_check +3032 "xsaddsp vs54,vs48,vs25"
-func_check +3036 "xsmaddasp vs14,vs50,vs1"
-func_check +3040 "xssubsp vs26,vs22,vs42"
-func_check +3044 "xsmaddmsp vs27,vs53,vs52"
-func_check +3048 "xsrsqrtesp vs8,vs59"
-func_check +3052 "xssqrtsp vs12,vs41"
-func_check +3056 "xsmulsp vs57,vs11,vs32"
-func_check +3060 "xsmsubasp vs38,vs20,vs26"
-func_check +3064 "xsdivsp vs26,vs19,vs6"
-func_check +3068 "xsmsubmsp vs35,vs37,vs55"
-func_check +3072 "xsresp vs59,vs8"
-func_check +3076 "xsnmaddasp vs44,vs33,vs33"
-func_check +3080 "xsnmaddmsp vs17,vs62,vs30"
-func_check +3084 "xsnmsubasp vs54,vs52,vs31"
-func_check +3088 "xsnmsubmsp vs37,vs5,vs58"
-func_check +3092 "xxlorc vs30,vs54,vs44"
-func_check +3096 "xxlnand vs49,vs14,vs29"
-func_check +3100 "xxleqv vs62,vs22,vs30"
-func_check +3104 "xscvdpspn vs60,vs54"
-func_check +3108 "xsrsp vs22,vs45"
-func_check +3112 "xscvuxdsp vs26,vs59"
-func_check +3116 "xscvsxdsp vs38,vs49"
-func_check +3120 "xscvspdpn vs59,vs26"
-func_check +3124 "fmrgow f24,f14,f2"
-func_check +3128 "fmrgew f22,f7,f5"
-
-## power9.d
-func_check +3132 "cnttzd r3,r13"
-func_check +3136 "cnttzd\. r4,r14"
-func_check +3140 "cnttzw r5,r15"
-func_check +3144 "cnttzw\. r6,r16"
-func_check +3148 "modsd r10,r20,r21"
-func_check +3152 "modsw r11,r21,r22"
-func_check +3156 "modud r12,r22,r23"
-func_check +3160 "moduw r13,r23,r24"
-func_check +3164 "bcdcfn\. v3,v4,0"
-func_check +3168 "bcdcfn\. v3,v4,1"
-func_check +3172 "bcdcfsq\. v4,v5,0"
-func_check +3176 "bcdcfsq\. v4,v5,1"
-func_check +3180 "bcdcfz\. v5,v6,0"
-func_check +3184 "bcdcfz\. v5,v6,1"
-func_check +3188 "bcdcpsgn\. v6,v7,v8"
-func_check +3192 "bcdctn\. v7,v8"
-func_check +3196 "bcdctsq\. v8,v9"
-func_check +3200 "bcdctz\. v9,v10,0"
-func_check +3204 "bcdctz\. v9,v10,1"
-func_check +3208 "bcdsetsgn\. v10,v11,0"
-func_check +3212 "bcdsetsgn\. v10,v11,1"
-func_check +3216 "bcdsr\. v11,v12,v13,0"
-func_check +3220 "bcdsr\. v11,v12,v13,1"
-func_check +3224 "bcds\. v12,v13,v14,0"
-func_check +3228 "bcds\. v12,v13,v14,1"
-func_check +3232 "bcdtrunc\. v13,v14,v15,0"
-func_check +3236 "bcdtrunc\. v13,v14,v15,1"
-func_check +3240 "bcdus\. v14,v15,v16"
-func_check +3244 "bcdutrunc\. v15,v16,v17"
-func_check +3248 "lxvll vs20,0,r21"
-func_check +3252 "lxvll vs20,r10,r21"
-func_check +3256 "stxvll vs21,0,r11"
-func_check +3260 "stxvll vs21,r10,r11"
-func_check +3264 "vmul10cuq v22,v23"
-func_check +3268 "vmul10ecuq v23,v24,v25"
-func_check +3272 "vmul10euq v24,v25,v26"
-func_check +3276 "vmul10uq v25,v26"
-func_check +3280 "xsaddqp v10,v11,v12"
-func_check +3284 "xsaddqpo v11,v12,v12"
-func_check +3288 "xsrqpi 0,v20,v30,0"
-func_check +3292 "xsrqpi 1,v20,v30,0"
-func_check +3296 "xsrqpi 0,v20,v30,3"
-func_check +3300 "xsrqpi 1,v20,v30,3"
-func_check +3304 "xsrqpix 0,v21,v31,0"
-func_check +3308 "xsrqpix 1,v21,v31,0"
-func_check +3312 "xsrqpix 0,v21,v31,3"
-func_check +3316 "xsrqpix 1,v21,v31,3"
-func_check +3320 "xsmulqp v12,v13,v14"
-func_check +3324 "xsmulqpo v13,v14,v15"
-func_check +3328 "xsrqpxp 0,v22,v23,0"
-func_check +3332 "xsrqpxp 1,v22,v23,0"
-func_check +3336 "xsrqpxp 0,v22,v23,3"
-func_check +3340 "xsrqpxp 1,v22,v23,3"
-func_check +3344 "xscpsgnqp v14,v15,v16"
-func_check +3348 "xscmpoqp cr0,v15,v16"
-func_check +3352 "xscmpoqp cr7,v15,v16"
-func_check +3356 "xscmpexpqp cr0,v16,v17"
-func_check +3360 "xscmpexpqp cr7,v16,v17"
-func_check +3364 "xsmaddqp v17,v18,v19"
-func_check +3368 "xsmaddqpo v18,v19,v20"
-func_check +3372 "xsmsubqp v19,v20,v21"
-func_check +3376 "xsmsubqpo v20,v21,v22"
-func_check +3380 "xsnmaddqp v21,v22,v23"
-func_check +3384 "xsnmaddqpo v22,v23,v24"
-func_check +3388 "xsnmsubqp v23,v24,v25"
-func_check +3392 "xsnmsubqpo v24,v25,v26"
-func_check +3396 "xssubqp v25,v26,v27"
-func_check +3400 "xssubqpo v26,v27,v28"
-func_check +3404 "xsdivqp v27,v28,v29"
-func_check +3408 "xsdivqpo v28,v29,v30"
-func_check +3412 "xscmpuqp cr0,v29,v30"
-func_check +3416 "xscmpuqp cr7,v29,v30"
-func_check +3420 "xststdcqp cr0,v30,0"
-func_check +3424 "xststdcqp cr7,v30,0"
-func_check +3428 "xststdcqp cr0,v31,127"
-func_check +3432 "xststdcqp cr7,v31,127"
-func_check +3436 "xsabsqp v10,v11"
-func_check +3440 "xsxexpqp v11,v12"
-func_check +3444 "xsnabsqp v12,v13"
-func_check +3448 "xsnegqp v13,v14"
-func_check +3452 "xsxsigqp v14,v15"
-func_check +3456 "xssqrtqp v15,v16"
-func_check +3460 "xssqrtqpo v16,v17"
-func_check +3464 "xscvqpuwz v17,v18"
-func_check +3468 "xscvudqp v18,v19"
-func_check +3472 "xscvqpswz v19,v20"
-func_check +3476 "xscvsdqp v20,v21"
-func_check +3480 "xscvqpudz v21,v22"
-func_check +3484 "xscvqpdp v22,v23"
-func_check +3488 "xscvqpdpo v23,v24"
-func_check +3492 "xscvdpqp v24,v25"
-func_check +3496 "xscvqpsdz v25,v26"
-func_check +3500 "xsiexpqp v26,v27,v28"
-func_check +3504 "vpermr v4,v5,v6,v7"
-func_check +3508 "vextractub v5,v6,0"
-func_check +3512 "vextractub v5,v6,15"
-func_check +3516 "vextractuh v6,v7,0"
-func_check +3520 "vextractuh v6,v7,15"
-func_check +3524 "vextractuw v7,v8,0"
-func_check +3528 "vextractuw v7,v8,15"
-func_check +3532 "vextractd v8,v9,0"
-func_check +3536 "vextractd v8,v9,15"
-func_check +3540 "vinsertb v9,v10,0"
-func_check +3544 "vinsertb v9,v10,15"
-func_check +3548 "vinserth v10,v11,0"
-func_check +3552 "vinserth v10,v11,15"
-func_check +3556 "vinsertw v11,v12,0"
-func_check +3560 "vinsertw v11,v12,15"
-func_check +3564 "vinsertd v12,v13,0"
-func_check +3568 "vinsertd v12,v13,15"
-func_check +3572 "mfvsrld r20,vs45"
-func_check +3576 "mtvsrws vs46,r21"
-func_check +3580 "mtvsrdd vs47,0,r23"
-func_check +3584 "mtvsrdd vs47,r22,r23"
-func_check +3588 "lxvx vs50,0,r11"
-func_check +3592 "lxvx vs0,r10,r11"
-func_check +3596 "lxvwsx vs51,0,r12"
-func_check +3600 "lxvwsx vs1,r10,r12"
-func_check +3604 "lxvh8x vs52,0,r13"
-func_check +3608 "lxvh8x vs2,r10,r13"
-func_check +3612 "lxvb16x vs53,0,r14"
-func_check +3616 "lxvb16x vs3,r10,r14"
-func_check +3620 "stxvx vs54,0,r15"
-func_check +3624 "stxvx vs4,r20,r15"
-func_check +3628 "stxvh8x vs55,0,r16"
-func_check +3632 "stxvh8x vs5,r20,r16"
-func_check +3636 "stxvb16x vs56,0,r17"
-func_check +3640 "stxvb16x vs6,r20,r17"
-func_check +3644 "xxextractuw vs4,vs5,0"
-func_check +3648 "xxextractuw vs40,vs50,15"
-func_check +3652 "xxspltib vs4,0"
-func_check +3656 "xxspltib vs41,255"
-func_check +3660 "xxinsertw vs5,vs6,0"
-func_check +3664 "xxinsertw vs50,vs60,15"
-func_check +3668 "xxbrh vs6,vs7"
-func_check +3672 "xxbrh vs56,vs57"
-func_check +3676 "xxbrw vs7,vs8"
-func_check +3680 "xxbrw vs57,vs58"
-func_check +3684 "xxbrd vs8,vs9"
-func_check +3688 "xxbrd vs58,vs59"
-func_check +3692 "xxbrq vs9,vs10"
-func_check +3696 "xxbrq vs59,vs60"
-func_check +3700 "lxsd v20,0\\(0\\)"
-func_check +3704 "lxsd v20,0\\(r10\\)"
-func_check +3708 "lxsd v20,8\\(0\\)"
-func_check +3712 "lxsd v20,8\\(r10\\)"
-func_check +3716 "lxsd v20,-8\\(0\\)"
-func_check +3720 "lxsd v20,-8\\(r10\\)"
-func_check +3724 "lxsd v20,32764\\(0\\)"
-func_check +3728 "lxsd v20,32764\\(r10\\)"
-func_check +3732 "lxsd v20,-32768\\(0\\)"
-func_check +3736 "lxsd v20,-32768\\(r10\\)"
-func_check +3740 "lxssp v30,0\\(0\\)"
-func_check +3744 "lxssp v30,0\\(r11\\)"
-func_check +3748 "lxssp v30,8\\(0\\)"
-func_check +3752 "lxssp v30,8\\(r11\\)"
-func_check +3756 "lxssp v30,-8\\(0\\)"
-func_check +3760 "lxssp v30,-8\\(r11\\)"
-func_check +3764 "lxssp v30,32764\\(0\\)"
-func_check +3768 "lxssp v30,32764\\(r11\\)"
-func_check +3772 "lxssp v30,-32768\\(0\\)"
-func_check +3776 "lxssp v30,-32768\\(r11\\)"
-func_check +3780 "lxv vs40,0\\(0\\)"
-func_check +3784 "lxv vs40,0\\(r12\\)"
-func_check +3788 "lxv vs40,16\\(0\\)"
-func_check +3792 "lxv vs40,16\\(r12\\)"
-func_check +3796 "lxv vs40,-16\\(0\\)"
-func_check +3800 "lxv vs10,-16\\(r12\\)"
-func_check +3804 "lxv vs10,32752\\(0\\)"
-func_check +3808 "lxv vs10,32752\\(r12\\)"
-func_check +3812 "lxv vs10,-32768\\(0\\)"
-func_check +3816 "lxv vs10,-32768\\(r12\\)"
-func_check +3820 "stxsd v21,0\\(0\\)"
-func_check +3824 "stxsd v21,0\\(r10\\)"
-func_check +3828 "stxsd v21,8\\(0\\)"
-func_check +3832 "stxsd v21,8\\(r10\\)"
-func_check +3836 "stxsd v21,-8\\(0\\)"
-func_check +3840 "stxsd v21,-8\\(r10\\)"
-func_check +3844 "stxsd v21,32764\\(0\\)"
-func_check +3848 "stxsd v21,32764\\(r10\\)"
-func_check +3852 "stxsd v21,-32768\\(0\\)"
-func_check +3856 "stxsd v21,-32768\\(r10\\)"
-func_check +3860 "stxssp v31,0\\(0\\)"
-func_check +3864 "stxssp v31,0\\(r11\\)"
-func_check +3868 "stxssp v31,8\\(0\\)"
-func_check +3872 "stxssp v31,8\\(r11\\)"
-func_check +3876 "stxssp v31,-8\\(0\\)"
-func_check +3880 "stxssp v31,-8\\(r11\\)"
-func_check +3884 "stxssp v31,32764\\(0\\)"
-func_check +3888 "stxssp v31,32764\\(r11\\)"
-func_check +3892 "stxssp v31,-32768\\(0\\)"
-func_check +3896 "stxssp v31,-32768\\(r11\\)"
-func_check +3900 "stxv vs41,0\\(0\\)"
-func_check +3904 "stxv vs41,0\\(r12\\)"
-func_check +3908 "stxv vs41,16\\(0\\)"
-func_check +3912 "stxv vs41,16\\(r12\\)"
-func_check +3916 "stxv vs41,-16\\(0\\)"
-func_check +3920 "stxv vs11,-16\\(r12\\)"
-func_check +3924 "stxv vs11,32752\\(0\\)"
-func_check +3928 "stxv vs11,32752\\(r12\\)"
-func_check +3932 "stxv vs11,-32768\\(0\\)"
-func_check +3936 "stxv vs11,-32768\\(r12\\)"
-func_check +3940 "xxperm vs20,vs22,vs24"
-func_check +3944 "xxperm vs40,vs42,vs44"
-func_check +3948 "xxpermr vs21,vs23,vs25"
-func_check +3952 "xxpermr vs41,vs43,vs45"
-func_check +3956 "extswsli r12,r20,0"
-func_check +3960 "extswsli r12,r20,1"
-func_check +3964 "extswsli r12,r20,63"
-func_check +3968 "extswsli\. r13,r21,0"
-func_check +3972 "extswsli\. r13,r21,1"
-func_check +3976 "extswsli\. r13,r21,63"
-func_check +3980 "vrlwmi v14,v22,v23"
-func_check +3984 "vrldmi v15,v23,v24"
-func_check +3988 "vrlwnm v16,v24,v25"
-func_check +3992 "vrldnm v17,v25,v26"
-func_check +3996 "vbpermd v18,v26,v27"
-func_check +4000 "vnegw v19,v20"
-func_check +4004 "vnegd v20,v21"
-func_check +4008 "vprtybw v21,v22"
-func_check +4012 "vprtybd v22,v23"
-func_check +4016 "vprtybq v23,v24"
-func_check +4020 "vextsb2w v24,v25"
-func_check +4024 "vextsh2w v25,v26"
-func_check +4028 "vextsb2d v26,v27"
-func_check +4032 "vextsh2d v27,v28"
-func_check +4036 "vextsw2d v28,v29"
-func_check +4040 "vctzb v29,v30"
-func_check +4044 "vctzh v30,v31"
-func_check +4048 "vctzw v31,v30"
-func_check +4052 "vctzd v30,v29"
-func_check +4056 "lxsibzx vs10,0,r20"
-func_check +4060 "lxsibzx vs50,r10,r20"
-func_check +4064 "lxsihzx vs11,0,r21"
-func_check +4068 "lxsihzx vs51,r11,r21"
-func_check +4072 "stxsibx vs12,0,r22"
-func_check +4076 "stxsibx vs52,r12,r22"
-func_check +4080 "stxsihx vs13,0,r23"
-func_check +4084 "stxsihx vs53,r13,r23"
-func_check +4088 "maddhd r10,r11,r12,r13"
-func_check +4092 "maddhdu r20,r21,r22,r23"
-func_check +4096 "maddld r2,r3,r4,r5"
-func_check +4100 "xscmpexpdp cr0,vs10,vs20"
-func_check +4104 "xscmpexpdp cr7,vs40,vs50"
-func_check +4108 "xsiexpdp vs41,r11,r21"
-func_check +4112 "xststdcdp cr0,vs11,127"
-func_check +4116 "xststdcdp cr7,vs41,127"
-func_check +4120 "xststdcsp cr0,vs11,127"
-func_check +4124 "xststdcsp cr7,vs41,127"
-func_check +4128 "xsxexpdp r13,vs43"
-func_check +4132 "xsxsigdp r14,vs44"
-func_check +4136 "xviexpdp vs45,vs46,vs47"
-func_check +4140 "xviexpsp vs46,vs47,vs48"
-func_check +4144 "xvtstdcdp vs54,vs55,0"
-func_check +4148 "xvtstdcdp vs54,vs55,127"
-func_check +4152 "xvtstdcsp vs55,vs56,0"
-func_check +4156 "xvtstdcsp vs55,vs56,127"
-func_check +4160 "xvxexpdp vs57,vs58"
-func_check +4164 "xvxexpsp vs58,vs59"
-func_check +4168 "xvxsigdp vs59,vs60"
-func_check +4172 "xvxsigsp vs60,vs61"
-func_check +4176 "cmpeqb cr0,r6,r7"
-func_check +4180 "cmpeqb cr7,r6,r7"
-func_check +4184 "cmprb cr0,0,r8,r9"
-func_check +4188 "cmprb cr7,0,r8,r9"
-func_check +4192 "cmprb cr0,1,r8,r9"
-func_check +4196 "cmprb cr7,1,r8,r9"
-func_check +4200 "setb r15,cr0"
-func_check +4204 "setb r15,cr7"
-func_check +4208 "lxvl vs26,0,r10"
-func_check +4212 "lxvl vs56,r20,r10"
-func_check +4216 "stxvl vs27,0,r11"
-func_check +4220 "stxvl vs57,r21,r11"
-func_check +4224 "vclzlsbb r20,v30"
-func_check +4228 "vctzlsbb r21,v31"
-func_check +4232 "vcmpneb v10,v11,v12"
-func_check +4236 "vcmpneb\. v20,v21,v22"
-func_check +4240 "vcmpneh v11,v12,v13"
-func_check +4244 "vcmpneh\. v21,v22,v23"
-func_check +4248 "vcmpnew v12,v13,v14"
-func_check +4252 "vcmpnew\. v22,v23,v24"
-func_check +4256 "vcmpnezb v13,v14,v15"
-func_check +4260 "vcmpnezb\. v23,v24,v25"
-func_check +4264 "vcmpnezh v14,v15,v16"
-func_check +4268 "vcmpnezh\. v24,v25,v26"
-func_check +4272 "vcmpnezw v15,v16,v17"
-func_check +4276 "vcmpnezw\. v25,v26,v27"
-func_check +4280 "vextublx r16,r17,v10"
-func_check +4284 "vextubrx r17,r18,v11"
-func_check +4288 "vextuhlx r18,r19,v12"
-func_check +4292 "vextuhrx r19,r20,v13"
-func_check +4296 "vextuwlx r20,r21,v14"
-func_check +4300 "vextuwrx r21,r22,v15"
-func_check +4304 "dtstsfi cr0,0,f3"
-func_check +4308 "dtstsfi cr7,63,f3"
-func_check +4312 "dtstsfiq cr0,0,f4"
-func_check +4316 "dtstsfiq cr7,63,f4"
-func_check +4320 "xscvhpdp vs40,vs50"
-func_check +4324 "xscvdphp vs41,vs51"
-func_check +4328 "xvcvhpsp vs42,vs52"
-func_check +4332 "xvcvsphp vs43,vs53"
-func_check +4336 "addpcis r3,0"
-func_check +4340 "addpcis r3,0"
-func_check +4344 "addpcis r4,1"
-func_check +4348 "addpcis r4,1"
-func_check +4352 "addpcis r5,-2"
-func_check +4356 "addpcis r5,-2"
-func_check +4360 "addpcis r6,32767"
-func_check +4364 "addpcis r6,32767"
-func_check +4368 "addpcis r7,-32768"
-func_check +4372 "addpcis r7,-32768"
-func_check +4376 "slbsync"
-func_check +4380 "slbieg r10,r11"
-func_check +4384 "slbmfee r3,r4"
-func_check +4388 "slbmfee r3,r4"
-func_check +4392 "slbmfee r3,r4,1"
-func_check +4396 "slbmfev r4,r5"
-func_check +4400 "slbmfev r4,r5"
-func_check +4404 "slbmfev r4,r5,1"
-func_check +4408 "tlbie r3,r4"
-func_check +4412 "tlbie r3,r4"
-func_check +4416 "tlbie r3,r4,3,1,1"
-func_check +4420 "tlbiel r3"
-func_check +4424 "tlbiel r3"
-func_check +4428 "tlbiel r3,r4,3,1,1"
-func_check +4432 "copy r12,r13"
-func_check +4436 "paste\. r10,r11"
-func_check +4440 "cpabort"
-func_check +4444 "hwsync"
-func_check +4448 "hwsync"
-func_check +4452 "hwsync"
-func_check +4456 "lwsync"
-func_check +4460 "lwsync"
-func_check +4464 "ptesync"
-func_check +4468 "ptesync"
-func_check +4472 "ldat r20,0,0"
-func_check +4476 "ldat r20,r10,28"
-func_check +4480 "lwat r21,0,0"
-func_check +4484 "lwat r21,r11,28"
-func_check +4488 "stdat r22,0,0"
-func_check +4492 "stdat r22,r12,28"
-func_check +4496 "stwat r23,0,0"
-func_check +4500 "stwat r23,r13,28"
-func_check +4504 "urfid"
-func_check +4508 "rmieg r30"
-func_check +4512 "ldmx r10,0,r15"
-func_check +4516 "ldmx r10,r3,r15"
-func_check +4520 "stop"
-func_check +4524 "wait"
-func_check +4528 "wait"
-func_check +4532 "darn r3,0"
-func_check +4536 "darn r3,1"
-func_check +4540 "darn r3,2"
-func_check +4544 "mcrxrx cr0"
-func_check +4548 "mcrxrx cr7"
-func_check +4552 "vslv v20,v21,v22"
-func_check +4556 "vsrv v23,v24,v25"
-func_check +4560 "msgsync"
-func_check +4564 "xscmpeqdp vs30,vs40,vs50"
-func_check +4568 "xscmpgtdp vs31,vs41,vs51"
-func_check +4572 "xscmpgedp vs32,vs42,vs52"
-func_check +4576 "xsmincdp vs34,vs44,vs54"
-func_check +4580 "xsmaxcdp vs35,vs45,vs55"
-func_check +4584 "xsminjdp vs36,vs46,vs56"
-func_check +4588 "xsmaxjdp vs37,vs47,vs57"
-func_check +4592 "vmsumudm v20,v21,v22,v23"
-func_check +4596 "addex r11,r12,r13,0"
-func_check +4600 "addex r11,r12,r13,1"
-func_check +4604 "addex r11,r12,r13,2"
-func_check +4608 "mffs f25"
-func_check +4612 "mffs\. f25"
-func_check +4616 "mffsce f26"
-func_check +4620 "mffscdrn f27,f20"
-func_check +4624 "mffscdrni f28,0"
-func_check +4628 "mffscdrni f28,7"
-func_check +4632 "mffscrn f29,f21"
-func_check +4636 "mffscrni f30,0"
-func_check +4640 "mffscrni f30,3"
-func_check +4644 "mffsl f31"
-func_check +4648 "slbiag r10"
-
-## altivec3.d
-func_check +4652 "vmul10cuq v11,v30"
-func_check +4656 "vcmpneb v30,v1,v23"
-func_check +4660 "vpermr v30,v19,v30,v29"
-func_check +4664 "vmul10ecuq v20,v20,v17"
-func_check +4668 "vcmpneh v27,v19,v31"
-func_check +4672 "vrlwmi v6,v9,v23"
-func_check +4676 "vcmpnew v22,v26,v1"
-func_check +4680 "vrldmi v24,v30,v25"
-func_check +4684 "vcmpnezb v19,v29,v22"
-func_check +4688 "vcmpnezh v8,v23,v19"
-func_check +4692 "vrlwnm v27,v24,v11"
-func_check +4696 "vcmpnezw v21,v13,v10"
-func_check +4700 "vrldnm v5,v20,v29"
-func_check +4704 "vmul10uq v30,v19"
-func_check +4708 "vextractub v24,v21,12"
-func_check +4712 "vmul10euq v0,v19,v28"
-func_check +4716 "vextractuh v10,v3,12"
-func_check +4720 "vextractuw v28,v12,7"
-func_check +4724 "vextractd v30,v27,1"
-func_check +4728 "vinsertb v25,v31,4"
-func_check +4732 "bcdcpsgn\. v21,v14,v30"
-func_check +4736 "vinserth v22,v18,5"
-func_check +4740 "vinsertw v29,v22,1"
-func_check +4744 "vinsertd v29,v13,7"
-func_check +4748 "vcmpneb\. v22,v25,v8"
-func_check +4752 "vcmpneh\. v16,v15,v21"
-func_check +4756 "bcdus\. v22,v21,v31"
-func_check +4760 "vcmpnew\. v1,v12,v12"
-func_check +4764 "bcds\. v5,v3,v8,1"
-func_check +4768 "bcdtrunc\. v27,v22,v1,0"
-func_check +4772 "vcmpnezb\. v2,v26,v0"
-func_check +4776 "bcdutrunc\. v26,v14,v7"
-func_check +4780 "vcmpnezh\. v16,v5,v12"
-func_check +4784 "bcdctsq\. v24,v5"
-func_check +4788 "bcdcfsq\. v7,v0,0"
-func_check +4792 "bcdctz\. v30,v12,1"
-func_check +4796 "bcdctn\. v17,v23"
-func_check +4800 "bcdcfz\. v4,v15,1"
-func_check +4804 "bcdcfn\. v29,v5,1"
-func_check +4808 "bcdsetsgn\. v27,v12,0"
-func_check +4812 "vcmpnezw\. v14,v28,v25"
-func_check +4816 "bcdsr\. v2,v2,v6,1"
-func_check +4820 "vbpermd v25,v0,v5"
-func_check +4824 "vclzlsbb r28,v25"
-func_check +4828 "vctzlsbb r2,v24"
-func_check +4832 "vnegw v21,v11"
-func_check +4836 "vnegd v17,v27"
-func_check +4840 "vprtybw v31,v23"
-func_check +4844 "vprtybd v21,v23"
-func_check +4848 "vprtybq v21,v18"
-func_check +4852 "vextsb2w v30,v4"
-func_check +4856 "vextsh2w v3,v26"
-func_check +4860 "vextsb2d v11,v17"
-func_check +4864 "vextsh2d v5,v10"
-func_check +4868 "vextsw2d v13,v25"
-func_check +4872 "vctzb v25,v2"
-func_check +4876 "vctzh v0,v3"
-func_check +4880 "vctzw v22,v6"
-func_check +4884 "vctzd v26,v24"
-func_check +4888 "vextublx r6,r31,v2"
-func_check +4892 "vextuhlx r13,r0,v18"
-func_check +4896 "vextuwlx r14,r30,v31"
-func_check +4900 "vsrv v15,v12,v14"
-func_check +4904 "vextubrx r20,r10,v30"
-func_check +4908 "vslv v21,v21,v2"
-func_check +4912 "vextuhrx r15,r9,v1"
-func_check +4916 "vextuwrx r21,r17,v16"
-func_check +4920 "vmsumudm v20,v21,v22,v23"
-
-## vsx3.d
-func_check +4924 "lxvx vs34,r6,r25"
-func_check +4928 "lxvx vs20,0,r10"
-func_check +4932 "lxvl vs20,r24,r10"
-func_check +4936 "lxvl vs54,0,r29"
-func_check +4940 "lxvll vs24,r20,r19"
-func_check +4944 "lxvll vs34,0,r14"
-func_check +4948 "mfvsrld r2,vs22"
-func_check +4952 "lxvwsx vs58,r26,r25"
-func_check +4956 "lxvwsx vs55,0,r29"
-func_check +4960 "stxvx vs14,r21,r4"
-func_check +4964 "stxvx vs30,0,r22"
-func_check +4968 "stxvl vs0,r26,r4"
-func_check +4972 "stxvl vs37,0,r22"
-func_check +4976 "mtvsrws vs24,r10"
-func_check +4980 "stxvll vs30,r21,r15"
-func_check +4984 "stxvll vs39,0,r14"
-func_check +4988 "mtvsrdd vs12,r6,r5"
-func_check +4992 "mtvsrdd vs38,0,r21"
-func_check +4996 "lxsibzx vs59,r28,r6"
-func_check +5000 "lxsibzx vs30,0,r8"
-func_check +5004 "lxvh8x vs42,r23,r17"
-func_check +5008 "lxvh8x vs36,0,r5"
-func_check +5012 "lxsihzx vs12,r9,r11"
-func_check +5016 "lxsihzx vs49,0,r13"
-func_check +5020 "lxvb16x vs37,r3,r19"
-func_check +5024 "lxvb16x vs0,0,r30"
-func_check +5028 "stxsibx vs2,r30,r6"
-func_check +5032 "stxsibx vs12,0,r13"
-func_check +5036 "stxvh8x vs16,r29,r8"
-func_check +5040 "stxvh8x vs55,0,r10"
-func_check +5044 "stxsihx vs34,r2,r23"
-func_check +5048 "stxsihx vs60,0,r23"
-func_check +5052 "stxvb16x vs23,r14,r12"
-func_check +5056 "stxvb16x vs19,0,r5"
-func_check +5060 "lxsd v24,0\\(0\\)"
-func_check +5064 "lxsd v15,16\\(r21\\)"
-func_check +5068 "lxssp v6,0\\(0\\)"
-func_check +5072 "lxssp v23,16\\(r9\\)"
-func_check +5076 "xscmpeqdp vs18,vs51,vs33"
-func_check +5080 "xscmpgtdp vs2,vs26,vs34"
-func_check +5084 "xscmpgedp vs5,vs26,vs20"
-func_check +5088 "xxperm vs44,vs10,vs43"
-func_check +5092 "xxpermr vs41,vs20,vs5"
-func_check +5096 "xscmpexpdp cr4,vs18,vs55"
-func_check +5100 "xxextractuw vs23,vs37,3"
-func_check +5104 "xxspltib vs54,235"
-func_check +5108 "xxinsertw vs15,vs30,4"
-func_check +5112 "xsmaxcdp vs12,vs11,vs7"
-func_check +5116 "xsmincdp vs32,vs25,vs24"
-func_check +5120 "xsmaxjdp vs25,vs53,vs12"
-func_check +5124 "xststdcsp cr2,vs36,127"
-func_check +5128 "xsminjdp vs32,vs21,vs45"
-func_check +5132 "xsxexpdp r17,vs50"
-func_check +5136 "xsxsigdp r7,vs40"
-func_check +5140 "xscvhpdp vs54,vs34"
-func_check +5144 "xscvdphp vs58,vs54"
-func_check +5148 "xststdcdp cr0,vs38,127"
-func_check +5152 "xvtstdcsp vs56,vs53,127"
-func_check +5156 "xviexpsp vs54,vs20,vs52"
-func_check +5160 "xsiexpdp vs57,r28,r29"
-func_check +5164 "xvxexpdp vs1,vs20"
-func_check +5168 "xvxsigdp vs54,vs59"
-func_check +5172 "xxbrh vs18,vs37"
-func_check +5176 "xvxexpsp vs14,vs1"
-func_check +5180 "xvxsigsp vs52,vs13"
-func_check +5184 "xxbrw vs19,vs5"
-func_check +5188 "xxbrd vs51,vs55"
-func_check +5192 "xvcvhpsp vs35,vs17"
-func_check +5196 "xvcvsphp vs15,vs45"
-func_check +5200 "xxbrq vs17,vs31"
-func_check +5204 "xvtstdcdp vs16,vs12,127"
-func_check +5208 "xviexpdp vs27,vs9,vs8"
-func_check +5212 "lxv vs4,0\\(0\\)"
-func_check +5216 "lxv vs40,16\\(r20\\)"
-func_check +5220 "stxv vs50,0\\(0\\)"
-func_check +5224 "stxv vs8,16\\(r16\\)"
-func_check +5228 "stxsd v3,0\\(0\\)"
-func_check +5232 "stxsd v17,16\\(r2\\)"
-func_check +5236 "stxssp v13,0\\(0\\)"
-func_check +5240 "stxssp v17,16\\(r13\\)"
-func_check +5244 "xsaddqp v8,v10,v18"
-func_check +5248 "xsaddqpo v5,v1,v29"
-func_check +5252 "xsrqpi 0,v12,v18,3"
-func_check +5256 "xsrqpix 1,v31,v19,0"
-func_check +5260 "xsmulqp v14,v1,v6"
-func_check +5264 "xsmulqpo v17,v7,v27"
-func_check +5268 "xsrqpxp 0,v4,v11,0"
-func_check +5272 "xscpsgnqp v29,v23,v28"
-func_check +5276 "xscmpoqp cr7,v13,v27"
-func_check +5280 "xscmpexpqp cr5,v21,v6"
-func_check +5284 "xsmaddqp v2,v19,v4"
-func_check +5288 "xsmaddqpo v30,v7,v16"
-func_check +5292 "xsmsubqp v21,v30,v15"
-func_check +5296 "xsmsubqpo v12,v17,v30"
-func_check +5300 "xsnmaddqp v6,v30,v12"
-func_check +5304 "xsnmaddqpo v12,v22,v12"
-func_check +5308 "xsnmsubqp v10,v29,v27"
-func_check +5312 "xsnmsubqpo v29,v29,v13"
-func_check +5316 "xssubqp v19,v27,v4"
-func_check +5320 "xssubqpo v13,v8,v1"
-func_check +5324 "xsdivqp v8,v3,v27"
-func_check +5328 "xsdivqpo v24,v20,v27"
-func_check +5332 "xscmpuqp cr7,v14,v4"
-func_check +5336 "xststdcqp cr4,v2,127"
-func_check +5340 "xsabsqp v31,v22"
-func_check +5344 "xsxexpqp v25,v3"
-func_check +5348 "xsnabsqp v10,v28"
-func_check +5352 "xsnegqp v19,v31"
-func_check +5356 "xsxsigqp v11,v13"
-func_check +5360 "xssqrtqp v13,v14"
-func_check +5364 "xssqrtqpo v1,v27"
-func_check +5368 "xscvqpuwz v3,v7"
-func_check +5372 "xscvudqp v20,v18"
-func_check +5376 "xscvqpswz v29,v29"
-func_check +5380 "xscvsdqp v2,v28"
-func_check +5384 "xscvqpudz v23,v4"
-func_check +5388 "xscvqpdp v3,v20"
-func_check +5392 "xscvqpdpo v1,v3"
-func_check +5396 "xscvdpqp v19,v12"
-func_check +5400 "xscvqpsdz v13,v4"
-func_check +5404 "xsiexpqp v7,v24,v7"
diff --git a/gdb/testsuite/gdb.arch/powerpc-power.s b/gdb/testsuite/gdb.arch/powerpc-power.s
deleted file mode 100644
index 91dbac7..0000000
--- a/gdb/testsuite/gdb.arch/powerpc-power.s
+++ /dev/null
@@ -1,1389 +0,0 @@
-/* This testcase is part of GDB, the GNU debugger.
-
- Copyright 2014-2017 Free Software Foundation, Inc.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>. */
-
- .text
- .globl func
-func:
-
-## power7.d
- .long 0x7c642e98 /* <+0>: lxvd2x vs3,r4,r5 */
- .long 0x7d642e99 /* <+4>: lxvd2x vs43,r4,r5 */
- .long 0x7c642f98 /* <+8>: stxvd2x vs3,r4,r5 */
- .long 0x7d642f99 /* <+12>: stxvd2x vs43,r4,r5 */
- .long 0xf0642850 /* <+16>: xxmrghd vs3,vs4,vs5 */
- .long 0xf16c6857 /* <+20>: xxmrghd vs43,vs44,vs45 */
- .long 0xf0642b50 /* <+24>: xxmrgld vs3,vs4,vs5 */
- .long 0xf16c6b57 /* <+28>: xxmrgld vs43,vs44,vs45 */
- .long 0xf0642850 /* <+32>: xxmrghd vs3,vs4,vs5 */
- .long 0xf16c6857 /* <+36>: xxmrghd vs43,vs44,vs45 */
- .long 0xf0642b50 /* <+40>: xxmrgld vs3,vs4,vs5 */
- .long 0xf16c6b57 /* <+44>: xxmrgld vs43,vs44,vs45 */
- .long 0xf0642950 /* <+48>: xxpermdi vs3,vs4,vs5,1 */
- .long 0xf16c6957 /* <+52>: xxpermdi vs43,vs44,vs45,1 */
- .long 0xf0642a50 /* <+56>: xxpermdi vs3,vs4,vs5,2 */
- .long 0xf16c6a57 /* <+60>: xxpermdi vs43,vs44,vs45,2 */
- .long 0xf0642780 /* <+64>: xvmovdp vs3,vs4 */
- .long 0xf16c6787 /* <+68>: xvmovdp vs43,vs44 */
- .long 0xf0642780 /* <+72>: xvmovdp vs3,vs4 */
- .long 0xf16c6787 /* <+76>: xvmovdp vs43,vs44 */
- .long 0xf0642f80 /* <+80>: xvcpsgndp vs3,vs4,vs5 */
- .long 0xf16c6f87 /* <+84>: xvcpsgndp vs43,vs44,vs45 */
- .long 0x4c000324 /* <+88>: doze */
- .long 0x4c000364 /* <+92>: nap */
- .long 0x4c0003a4 /* <+96>: sleep */
- .long 0x4c0003e4 /* <+100>: rvwinkle */
- .long 0x7c830134 /* <+104>: prtyw r3,r4 */
- .long 0x7dcd0174 /* <+108>: prtyd r13,r14 */
- .long 0x7d5c02a6 /* <+112>: mfcfar r10 */
- .long 0x7d7c03a6 /* <+116>: mtcfar r11 */
- .long 0x7c832bf8 /* <+120>: cmpb r3,r4,r5 */
- .long 0x7d4b662a /* <+124>: lwzcix r10,r11,r12 */
- .long 0xee119004 /* <+128>: dadd f16,f17,f18 */
- .long 0xfe96c004 /* <+132>: daddq f20,f22,f24 */
- .long 0x7c60066c /* <+136>: dss 3 */
- .long 0x7e00066c /* <+140>: dssall */
- .long 0x7c2522ac /* <+144>: dst r5,r4,1 */
- .long 0x7e083aac /* <+148>: dstt r8,r7,0 */
- .long 0x7c6532ec /* <+152>: dstst r5,r6,3 */
- .long 0x7e442aec /* <+156>: dststt r4,r5,2 */
- .long 0x7d4b6356 /* <+160>: divwe r10,r11,r12 */
- .long 0x7d6c6b57 /* <+164>: divwe. r11,r12,r13 */
- .long 0x7d8d7756 /* <+168>: divweo r12,r13,r14 */
- .long 0x7dae7f57 /* <+172>: divweo. r13,r14,r15 */
- .long 0x7d4b6316 /* <+176>: divweu r10,r11,r12 */
- .long 0x7d6c6b17 /* <+180>: divweu. r11,r12,r13 */
- .long 0x7d8d7716 /* <+184>: divweuo r12,r13,r14 */
- .long 0x7dae7f17 /* <+188>: divweuo. r13,r14,r15 */
- .long 0x7e27d9f8 /* <+192>: bpermd r7,r17,r27 */
- .long 0x7e8a02f4 /* <+196>: popcntw r10,r20 */
- .long 0x7e8a03f4 /* <+200>: popcntd r10,r20 */
- .long 0x7e95b428 /* <+204>: ldbrx r20,r21,r22 */
- .long 0x7e95b528 /* <+208>: stdbrx r20,r21,r22 */
- .long 0x7d4056ee /* <+212>: lfiwzx f10,0,r10 */
- .long 0x7d4956ee /* <+216>: lfiwzx f10,r9,r10 */
- .long 0xec802e9c /* <+220>: fcfids f4,f5 */
- .long 0xec802e9d /* <+224>: fcfids. f4,f5 */
- .long 0xec802f9c /* <+228>: fcfidus f4,f5 */
- .long 0xec802f9d /* <+232>: fcfidus. f4,f5 */
- .long 0xfc80291c /* <+236>: fctiwu f4,f5 */
- .long 0xfc80291d /* <+240>: fctiwu. f4,f5 */
- .long 0xfc80291e /* <+244>: fctiwuz f4,f5 */
- .long 0xfc80291f /* <+248>: fctiwuz. f4,f5 */
- .long 0xfc802f5c /* <+252>: fctidu f4,f5 */
- .long 0xfc802f5d /* <+256>: fctidu. f4,f5 */
- .long 0xfc802f5e /* <+260>: fctiduz f4,f5 */
- .long 0xfc802f5f /* <+264>: fctiduz. f4,f5 */
- .long 0xfc802f9c /* <+268>: fcfidu f4,f5 */
- .long 0xfc802f9d /* <+272>: fcfidu. f4,f5 */
- .long 0xfc0a5900 /* <+276>: ftdiv cr0,f10,f11 */
- .long 0xff8a5900 /* <+280>: ftdiv cr7,f10,f11 */
- .long 0xfc005140 /* <+284>: ftsqrt cr0,f10 */
- .long 0xff805140 /* <+288>: ftsqrt cr7,f10 */
- .long 0x7e084a2c /* <+292>: dcbtt r8,r9 */
- .long 0x7e0849ec /* <+296>: dcbtstt r8,r9 */
- .long 0xed406644 /* <+300>: dcffix f10,f12 */
- .long 0xee80b645 /* <+304>: dcffix. f20,f22 */
- .long 0xfdc07830 /* <+308>: fre f14,f15 */
- .long 0xfdc07831 /* <+312>: fre. f14,f15 */
- .long 0xedc07830 /* <+316>: fres f14,f15 */
- .long 0xedc07831 /* <+320>: fres. f14,f15 */
- .long 0xfdc07834 /* <+324>: frsqrte f14,f15 */
- .long 0xfdc07835 /* <+328>: frsqrte. f14,f15 */
- .long 0xedc07834 /* <+332>: frsqrtes f14,f15 */
- .long 0xedc07835 /* <+336>: frsqrtes. f14,f15 */
- .long 0x7c43271e /* <+340>: isel r2,r3,r4,28 */
- .long 0x7f7bdb78 /* <+344>: yield */
- .long 0x7f7bdb78 /* <+348>: yield */
- .long 0x60420000 /* <+352>: ori r2,r2,0 */
- .long 0x60000000 /* <+356>: nop */
- .long 0x60000000 /* <+360>: nop */
- .long 0x60420000 /* <+364>: ori r2,r2,0 */
- .long 0x7fbdeb78 /* <+368>: mdoio */
- .long 0x7fbdeb78 /* <+372>: mdoio */
- .long 0x7fdef378 /* <+376>: mdoom */
- .long 0x7fdef378 /* <+380>: mdoom */
- .long 0x7d40e2a6 /* <+384>: mfppr r10 */
- .long 0x7d62e2a6 /* <+388>: mfppr32 r11 */
- .long 0x7d80e3a6 /* <+392>: mtppr r12 */
- .long 0x7da2e3a6 /* <+396>: mtppr32 r13 */
- .long 0x7d605264 /* <+400>: tlbie r10,r11 */
-
-## altivec.d
- .long 0x7c60066c /* <+404>: dss 3 */
- .long 0x7e00066c /* <+408>: dssall */
- .long 0x7c2522ac /* <+412>: dst r5,r4,1 */
- .long 0x7e083aac /* <+416>: dstt r8,r7,0 */
- .long 0x7c6532ec /* <+420>: dstst r5,r6,3 */
- .long 0x7e442aec /* <+424>: dststt r4,r5,2 */
- .long 0x7fd6c00e /* <+428>: lvebx v30,r22,r24 */
- .long 0x7ea0c00e /* <+432>: lvebx v21,0,r24 */
- .long 0x7d50104e /* <+436>: lvehx v10,r16,r2 */
- .long 0x7e80b84e /* <+440>: lvehx v20,0,r23 */
- .long 0x7e24908e /* <+444>: lvewx v17,r4,r18 */
- .long 0x7ee0408e /* <+448>: lvewx v23,0,r8 */
- .long 0x7cc0c80c /* <+452>: lvsl v6,0,r25 */
- .long 0x7c40300c /* <+456>: lvsl v2,0,r6 */
- .long 0x7ed0604c /* <+460>: lvsr v22,r16,r12 */
- .long 0x7c00e84c /* <+464>: lvsr v0,0,r29 */
- .long 0x7de56ace /* <+468>: lvxl v15,r5,r13 */
- .long 0x7e60bace /* <+472>: lvxl v19,0,r23 */
- .long 0x7ec110ce /* <+476>: lvx v22,r1,r2 */
- .long 0x7e4088ce /* <+480>: lvx v18,0,r17 */
- .long 0x7fe042a6 /* <+484>: mfvrsave r31 */
- .long 0x13000604 /* <+488>: mfvscr v24 */
- .long 0x7d4043a6 /* <+492>: mtvrsave r10 */
- .long 0x1000ce44 /* <+496>: mtvscr v25 */
- .long 0x7e5b510e /* <+500>: stvebx v18,r27,r10 */
- .long 0x7e00310e /* <+504>: stvebx v16,0,r6 */
- .long 0x7e2d814e /* <+508>: stvehx v17,r13,r16 */
- .long 0x7ee0a14e /* <+512>: stvehx v23,0,r20 */
- .long 0x7d73f98e /* <+516>: stvewx v11,r19,r31 */
- .long 0x7fe0098e /* <+520>: stvewx v31,0,r1 */
- .long 0x7f558bce /* <+524>: stvxl v26,r21,r17 */
- .long 0x7da0b3ce /* <+528>: stvxl v13,0,r22 */
- .long 0x7d7ff9ce /* <+532>: stvx v11,r31,r31 */
- .long 0x7fc081ce /* <+536>: stvx v30,0,r16 */
- .long 0x1307e180 /* <+540>: vaddcuw v24,v7,v28 */
- .long 0x107e580a /* <+544>: vaddfp v3,v30,v11 */
- .long 0x111c4b00 /* <+548>: vaddsbs v8,v28,v9 */
- .long 0x10e52340 /* <+552>: vaddshs v7,v5,v4 */
- .long 0x12dadb80 /* <+556>: vaddsws v22,v26,v27 */
- .long 0x120ee000 /* <+560>: vaddubm v16,v14,v28 */
- .long 0x10c1ca00 /* <+564>: vaddubs v6,v1,v25 */
- .long 0x10443040 /* <+568>: vadduhm v2,v4,v6 */
- .long 0x13554240 /* <+572>: vadduhs v26,v21,v8 */
- .long 0x13bf0880 /* <+576>: vadduwm v29,v31,v1 */
- .long 0x12ed2280 /* <+580>: vadduws v23,v13,v4 */
- .long 0x13d04c44 /* <+584>: vandc v30,v16,v9 */
- .long 0x106ddc04 /* <+588>: vand v3,v13,v27 */
- .long 0x10868d02 /* <+592>: vavgsb v4,v6,v17 */
- .long 0x12fc9d42 /* <+596>: vavgsh v23,v28,v19 */
- .long 0x110ffd82 /* <+600>: vavgsw v8,v15,v31 */
- .long 0x10c7cc02 /* <+604>: vavgub v6,v7,v25 */
- .long 0x13365442 /* <+608>: vavguh v25,v22,v10 */
- .long 0x1077ec82 /* <+612>: vavguw v3,v23,v29 */
- .long 0x11c613ca /* <+616>: vctsxs v14,v2,6 */
- .long 0x1134fb8a /* <+620>: vctuxs v9,v31,20 */
- .long 0x1303f34a /* <+624>: vcfsx v24,v30,3 */
- .long 0x123dab0a /* <+628>: vcfux v17,v21,29 */
- .long 0x125c03c6 /* <+632>: vcmpbfp v18,v28,v0 */
- .long 0x127a1fc6 /* <+636>: vcmpbfp. v19,v26,v3 */
- .long 0x120258c6 /* <+640>: vcmpeqfp v16,v2,v11 */
- .long 0x12ed6cc6 /* <+644>: vcmpeqfp. v23,v13,v13 */
- .long 0x13335006 /* <+648>: vcmpequb v25,v19,v10 */
- .long 0x124b1406 /* <+652>: vcmpequb. v18,v11,v2 */
- .long 0x11393846 /* <+656>: vcmpequh v9,v25,v7 */
- .long 0x11d8ac46 /* <+660>: vcmpequh. v14,v24,v21 */
- .long 0x130c2886 /* <+664>: vcmpequw v24,v12,v5 */
- .long 0x12700c86 /* <+668>: vcmpequw. v19,v16,v1 */
- .long 0x12f181c6 /* <+672>: vcmpgefp v23,v17,v16 */
- .long 0x127d8dc6 /* <+676>: vcmpgefp. v19,v29,v17 */
- .long 0x121c6ac6 /* <+680>: vcmpgtfp v16,v28,v13 */
- .long 0x11d83ec6 /* <+684>: vcmpgtfp. v14,v24,v7 */
- .long 0x12163306 /* <+688>: vcmpgtsb v16,v22,v6 */
- .long 0x104c7706 /* <+692>: vcmpgtsb. v2,v12,v14 */
- .long 0x1383eb46 /* <+696>: vcmpgtsh v28,v3,v29 */
- .long 0x12136f46 /* <+700>: vcmpgtsh. v16,v19,v13 */
- .long 0x11e02b86 /* <+704>: vcmpgtsw v15,v0,v5 */
- .long 0x12ad0786 /* <+708>: vcmpgtsw. v21,v13,v0 */
- .long 0x10aaf206 /* <+712>: vcmpgtub v5,v10,v30 */
- .long 0x10ed5606 /* <+716>: vcmpgtub. v7,v13,v10 */
- .long 0x130f8246 /* <+720>: vcmpgtuh v24,v15,v16 */
- .long 0x1335de46 /* <+724>: vcmpgtuh. v25,v21,v27 */
- .long 0x123b3286 /* <+728>: vcmpgtuw v17,v27,v6 */
- .long 0x1115de86 /* <+732>: vcmpgtuw. v8,v21,v27 */
- .long 0x102e0b4a /* <+736>: vcfsx v1,v1,14 */
- .long 0x10997bca /* <+740>: vctsxs v4,v15,25 */
- .long 0x138ebb8a /* <+744>: vctuxs v28,v23,14 */
- .long 0x10c0330a /* <+748>: vcfux v6,v6,0 */
- .long 0x1000418a /* <+752>: vexptefp v0,v8 */
- .long 0x12c0d9ca /* <+756>: vlogefp v22,v27 */
- .long 0x12f2916e /* <+760>: vmaddfp v23,v18,v5,v18 */
- .long 0x11addc0a /* <+764>: vmaxfp v13,v13,v27 */
- .long 0x11177102 /* <+768>: vmaxsb v8,v23,v14 */
- .long 0x12710142 /* <+772>: vmaxsh v19,v17,v0 */
- .long 0x1263b182 /* <+776>: vmaxsw v19,v3,v22 */
- .long 0x12fee002 /* <+780>: vmaxub v23,v30,v28 */
- .long 0x1134b842 /* <+784>: vmaxuh v9,v20,v23 */
- .long 0x12b30882 /* <+788>: vmaxuw v21,v19,v1 */
- .long 0x12cd2da0 /* <+792>: vmhaddshs v22,v13,v5,v22 */
- .long 0x13e01ca1 /* <+796>: vmhraddshs v31,v0,v3,v18 */
- .long 0x1055c44a /* <+800>: vminfp v2,v21,v24 */
- .long 0x12865302 /* <+804>: vminsb v20,v6,v10 */
- .long 0x125bd342 /* <+808>: vminsh v18,v27,v26 */
- .long 0x10640b82 /* <+812>: vminsw v3,v4,v1 */
- .long 0x10e06a02 /* <+816>: vminub v7,v0,v13 */
- .long 0x100c3242 /* <+820>: vminuh v0,v12,v6 */
- .long 0x10c30a82 /* <+824>: vminuw v6,v3,v1 */
- .long 0x107d1ea2 /* <+828>: vmladduhm v3,v29,v3,v26 */
- .long 0x12a5f80c /* <+832>: vmrghb v21,v5,v31 */
- .long 0x12b8004c /* <+836>: vmrghh v21,v24,v0 */
- .long 0x1200b08c /* <+840>: vmrghw v16,v0,v22 */
- .long 0x1031810c /* <+844>: vmrglb v1,v17,v16 */
- .long 0x11c8794c /* <+848>: vmrglh v14,v8,v15 */
- .long 0x13f5298c /* <+852>: vmrglw v31,v21,v5 */
- .long 0x13094c84 /* <+856>: vmr v24,v9 */
- .long 0x13094c84 /* <+860>: vmr v24,v9 */
- .long 0x10187de5 /* <+864>: vmsummbm v0,v24,v15,v23 */
- .long 0x10243e68 /* <+868>: vmsumshm v1,v4,v7,v25 */
- .long 0x11286fe9 /* <+872>: vmsumshs v9,v8,v13,v31 */
- .long 0x12ff67a4 /* <+876>: vmsumubm v23,v31,v12,v30 */
- .long 0x13a0d566 /* <+880>: vmsumuhm v29,v0,v26,v21 */
- .long 0x136ec967 /* <+884>: vmsumuhs v27,v14,v25,v5 */
- .long 0x11597308 /* <+888>: vmulesb v10,v25,v14 */
- .long 0x10324348 /* <+892>: vmulesh v1,v18,v8 */
- .long 0x122e4a08 /* <+896>: vmuleub v17,v14,v9 */
- .long 0x10ba4a48 /* <+900>: vmuleuh v5,v26,v9 */
- .long 0x12b23108 /* <+904>: vmulosb v21,v18,v6 */
- .long 0x10854148 /* <+908>: vmulosh v4,v5,v8 */
- .long 0x10499808 /* <+912>: vmuloub v2,v9,v19 */
- .long 0x13a52048 /* <+916>: vmulouh v29,v5,v4 */
- .long 0x110229af /* <+920>: vnmsubfp v8,v2,v6,v5 */
- .long 0x13e95504 /* <+924>: vnor v31,v9,v10 */
- .long 0x133ffd04 /* <+928>: vnot v25,v31 */
- .long 0x133ffd04 /* <+932>: vnot v25,v31 */
- .long 0x12e71484 /* <+936>: vor v23,v7,v2 */
- .long 0x101cb66b /* <+940>: vperm v0,v28,v22,v25 */
- .long 0x12198b0e /* <+944>: vpkpx v16,v25,v17 */
- .long 0x1190898e /* <+948>: vpkshss v12,v16,v17 */
- .long 0x1033b90e /* <+952>: vpkshus v1,v19,v23 */
- .long 0x132769ce /* <+956>: vpkswss v25,v7,v13 */
- .long 0x1098514e /* <+960>: vpkswus v4,v24,v10 */
- .long 0x113b600e /* <+964>: vpkuhum v9,v27,v12 */
- .long 0x12cac88e /* <+968>: vpkuhus v22,v10,v25 */
- .long 0x13d2004e /* <+972>: vpkuwum v30,v18,v0 */
- .long 0x10e3b0ce /* <+976>: vpkuwus v7,v3,v22 */
- .long 0x1300e10a /* <+980>: vrefp v24,v28 */
- .long 0x12209aca /* <+984>: vrfim v17,v19 */
- .long 0x1300ca0a /* <+988>: vrfin v24,v25 */
- .long 0x10602a8a /* <+992>: vrfip v3,v5 */
- .long 0x1100524a /* <+996>: vrfiz v8,v10 */
- .long 0x1352f004 /* <+1000>: vrlb v26,v18,v30 */
- .long 0x1211c844 /* <+1004>: vrlh v16,v17,v25 */
- .long 0x12fe4884 /* <+1008>: vrlw v23,v30,v9 */
- .long 0x1040914a /* <+1012>: vrsqrtefp v2,v18 */
- .long 0x128e92aa /* <+1016>: vsel v20,v14,v18,v10 */
- .long 0x13396104 /* <+1020>: vslb v25,v25,v12 */
- .long 0x112961ec /* <+1024>: vsldoi v9,v9,v12,7 */
- .long 0x11c25944 /* <+1028>: vslh v14,v2,v11 */
- .long 0x13c5340c /* <+1032>: vslo v30,v5,v6 */
- .long 0x12de49c4 /* <+1036>: vsl v22,v30,v9 */
- .long 0x135a1984 /* <+1040>: vslw v26,v26,v3 */
- .long 0x1026a20c /* <+1044>: vspltb v1,v20,6 */
- .long 0x1203924c /* <+1048>: vsplth v16,v18,3 */
- .long 0x1333030c /* <+1052>: vspltisb v25,-13 */
- .long 0x12ca034c /* <+1056>: vspltish v22,10 */
- .long 0x11ad038c /* <+1060>: vspltisw v13,13 */
- .long 0x1122928c /* <+1064>: vspltw v9,v18,2 */
- .long 0x11d60304 /* <+1068>: vsrab v14,v22,v0 */
- .long 0x118c9344 /* <+1072>: vsrah v12,v12,v18 */
- .long 0x10426b84 /* <+1076>: vsraw v2,v2,v13 */
- .long 0x10fb2a04 /* <+1080>: vsrb v7,v27,v5 */
- .long 0x10ebea44 /* <+1084>: vsrh v7,v11,v29 */
- .long 0x125efc4c /* <+1088>: vsro v18,v30,v31 */
- .long 0x1049e2c4 /* <+1092>: vsr v2,v9,v28 */
- .long 0x10190284 /* <+1096>: vsrw v0,v25,v0 */
- .long 0x13025580 /* <+1100>: vsubcuw v24,v2,v10 */
- .long 0x12d8a04a /* <+1104>: vsubfp v22,v24,v20 */
- .long 0x11566f00 /* <+1108>: vsubsbs v10,v22,v13 */
- .long 0x1311e740 /* <+1112>: vsubshs v24,v17,v28 */
- .long 0x115a0780 /* <+1116>: vsubsws v10,v26,v0 */
- .long 0x120bc400 /* <+1120>: vsububm v16,v11,v24 */
- .long 0x11750e00 /* <+1124>: vsububs v11,v21,v1 */
- .long 0x10ccc440 /* <+1128>: vsubuhm v6,v12,v24 */
- .long 0x13cb4e40 /* <+1132>: vsubuhs v30,v11,v9 */
- .long 0x12746c80 /* <+1136>: vsubuwm v19,v20,v13 */
- .long 0x12593680 /* <+1140>: vsubuws v18,v25,v6 */
- .long 0x132a9688 /* <+1144>: vsum2sws v25,v10,v18 */
- .long 0x11b0af08 /* <+1148>: vsum4sbs v13,v16,v21 */
- .long 0x12e82648 /* <+1152>: vsum4shs v23,v8,v4 */
- .long 0x138df608 /* <+1156>: vsum4ubs v28,v13,v30 */
- .long 0x12ca4788 /* <+1160>: vsumsws v22,v10,v8 */
- .long 0x1300734e /* <+1164>: vupkhpx v24,v14 */
- .long 0x1040b20e /* <+1168>: vupkhsb v2,v22 */
- .long 0x1200124e /* <+1172>: vupkhsh v16,v2 */
- .long 0x1140d3ce /* <+1176>: vupklpx v10,v26 */
- .long 0x11e0e28e /* <+1180>: vupklsb v15,v28 */
- .long 0x110042ce /* <+1184>: vupklsh v8,v8 */
- .long 0x13201cc4 /* <+1188>: vxor v25,v0,v3 */
-
-## vsd.d
- .long 0x7d0aa499 /* <+1192>: lxsdx vs40,r10,r20 */
- .long 0x7d0aa699 /* <+1196>: lxvd2x vs40,r10,r20 */
- .long 0x7d0aa299 /* <+1200>: lxvdsx vs40,r10,r20 */
- .long 0x7d0aa619 /* <+1204>: lxvw4x vs40,r10,r20 */
- .long 0x7d0aa599 /* <+1208>: stxsdx vs40,r10,r20 */
- .long 0x7d0aa799 /* <+1212>: stxvd2x vs40,r10,r20 */
- .long 0x7d0aa719 /* <+1216>: stxvw4x vs40,r10,r20 */
- .long 0xf100e567 /* <+1220>: xsabsdp vs40,vs60 */
- .long 0xf112e107 /* <+1224>: xsadddp vs40,vs50,vs60 */
- .long 0xf092e15e /* <+1228>: xscmpodp cr1,vs50,vs60 */
- .long 0xf092e11e /* <+1232>: xscmpudp cr1,vs50,vs60 */
- .long 0xf112e587 /* <+1236>: xscpsgndp vs40,vs50,vs60 */
- .long 0xf100e427 /* <+1240>: xscvdpsp vs40,vs60 */
- .long 0xf100e563 /* <+1244>: xscvdpsxds vs40,vs60 */
- .long 0xf100e163 /* <+1248>: xscvdpsxws vs40,vs60 */
- .long 0xf100e523 /* <+1252>: xscvdpuxds vs40,vs60 */
- .long 0xf100e123 /* <+1256>: xscvdpuxws vs40,vs60 */
- .long 0xf100e527 /* <+1260>: xscvspdp vs40,vs60 */
- .long 0xf100e5e3 /* <+1264>: xscvsxddp vs40,vs60 */
- .long 0xf100e5a3 /* <+1268>: xscvuxddp vs40,vs60 */
- .long 0xf112e1c7 /* <+1272>: xsdivdp vs40,vs50,vs60 */
- .long 0xf112e10f /* <+1276>: xsmaddadp vs40,vs50,vs60 */
- .long 0xf112e14f /* <+1280>: xsmaddmdp vs40,vs50,vs60 */
- .long 0xf112e507 /* <+1284>: xsmaxdp vs40,vs50,vs60 */
- .long 0xf112e547 /* <+1288>: xsmindp vs40,vs50,vs60 */
- .long 0xf112e18f /* <+1292>: xsmsubadp vs40,vs50,vs60 */
- .long 0xf112e1cf /* <+1296>: xsmsubmdp vs40,vs50,vs60 */
- .long 0xf112e187 /* <+1300>: xsmuldp vs40,vs50,vs60 */
- .long 0xf100e5a7 /* <+1304>: xsnabsdp vs40,vs60 */
- .long 0xf100e5e7 /* <+1308>: xsnegdp vs40,vs60 */
- .long 0xf112e50f /* <+1312>: xsnmaddadp vs40,vs50,vs60 */
- .long 0xf112e54f /* <+1316>: xsnmaddmdp vs40,vs50,vs60 */
- .long 0xf112e58f /* <+1320>: xsnmsubadp vs40,vs50,vs60 */
- .long 0xf112e5cf /* <+1324>: xsnmsubmdp vs40,vs50,vs60 */
- .long 0xf100e127 /* <+1328>: xsrdpi vs40,vs60 */
- .long 0xf100e1af /* <+1332>: xsrdpic vs40,vs60 */
- .long 0xf100e1e7 /* <+1336>: xsrdpim vs40,vs60 */
- .long 0xf100e1a7 /* <+1340>: xsrdpip vs40,vs60 */
- .long 0xf100e167 /* <+1344>: xsrdpiz vs40,vs60 */
- .long 0xf100e16b /* <+1348>: xsredp vs40,vs60 */
- .long 0xf100e12b /* <+1352>: xsrsqrtedp vs40,vs60 */
- .long 0xf100e12f /* <+1356>: xssqrtdp vs40,vs60 */
- .long 0xf112e147 /* <+1360>: xssubdp vs40,vs50,vs60 */
- .long 0xf092e1ee /* <+1364>: xstdivdp cr1,vs50,vs60 */
- .long 0xf080e1aa /* <+1368>: xstsqrtdp cr1,vs60 */
- .long 0xf100e767 /* <+1372>: xvabsdp vs40,vs60 */
- .long 0xf100e667 /* <+1376>: xvabssp vs40,vs60 */
- .long 0xf112e307 /* <+1380>: xvadddp vs40,vs50,vs60 */
- .long 0xf112e207 /* <+1384>: xvaddsp vs40,vs50,vs60 */
- .long 0xf112e31f /* <+1388>: xvcmpeqdp vs40,vs50,vs60 */
- .long 0xf112e71f /* <+1392>: xvcmpeqdp. vs40,vs50,vs60 */
- .long 0xf112e21f /* <+1396>: xvcmpeqsp vs40,vs50,vs60 */
- .long 0xf112e61f /* <+1400>: xvcmpeqsp. vs40,vs50,vs60 */
- .long 0xf112e39f /* <+1404>: xvcmpgedp vs40,vs50,vs60 */
- .long 0xf112e79f /* <+1408>: xvcmpgedp. vs40,vs50,vs60 */
- .long 0xf112e29f /* <+1412>: xvcmpgesp vs40,vs50,vs60 */
- .long 0xf112e69f /* <+1416>: xvcmpgesp. vs40,vs50,vs60 */
- .long 0xf112e35f /* <+1420>: xvcmpgtdp vs40,vs50,vs60 */
- .long 0xf112e75f /* <+1424>: xvcmpgtdp. vs40,vs50,vs60 */
- .long 0xf112e25f /* <+1428>: xvcmpgtsp vs40,vs50,vs60 */
- .long 0xf112e65f /* <+1432>: xvcmpgtsp. vs40,vs50,vs60 */
- .long 0xf112e787 /* <+1436>: xvcpsgndp vs40,vs50,vs60 */
- .long 0xf11ce787 /* <+1440>: xvmovdp vs40,vs60 */
- .long 0xf11ce787 /* <+1444>: xvmovdp vs40,vs60 */
- .long 0xf112e687 /* <+1448>: xvcpsgnsp vs40,vs50,vs60 */
- .long 0xf11ce687 /* <+1452>: xvmovsp vs40,vs60 */
- .long 0xf11ce687 /* <+1456>: xvmovsp vs40,vs60 */
- .long 0xf100e627 /* <+1460>: xvcvdpsp vs40,vs60 */
- .long 0xf100e763 /* <+1464>: xvcvdpsxds vs40,vs60 */
- .long 0xf100e363 /* <+1468>: xvcvdpsxws vs40,vs60 */
- .long 0xf100e723 /* <+1472>: xvcvdpuxds vs40,vs60 */
- .long 0xf100e323 /* <+1476>: xvcvdpuxws vs40,vs60 */
- .long 0xf100e727 /* <+1480>: xvcvspdp vs40,vs60 */
- .long 0xf100e663 /* <+1484>: xvcvspsxds vs40,vs60 */
- .long 0xf100e263 /* <+1488>: xvcvspsxws vs40,vs60 */
- .long 0xf100e623 /* <+1492>: xvcvspuxds vs40,vs60 */
- .long 0xf100e223 /* <+1496>: xvcvspuxws vs40,vs60 */
- .long 0xf100e7e3 /* <+1500>: xvcvsxddp vs40,vs60 */
- .long 0xf100e6e3 /* <+1504>: xvcvsxdsp vs40,vs60 */
- .long 0xf100e3e3 /* <+1508>: xvcvsxwdp vs40,vs60 */
- .long 0xf100e2e3 /* <+1512>: xvcvsxwsp vs40,vs60 */
- .long 0xf100e7a3 /* <+1516>: xvcvuxddp vs40,vs60 */
- .long 0xf100e6a3 /* <+1520>: xvcvuxdsp vs40,vs60 */
- .long 0xf100e3a3 /* <+1524>: xvcvuxwdp vs40,vs60 */
- .long 0xf100e2a3 /* <+1528>: xvcvuxwsp vs40,vs60 */
- .long 0xf112e3c7 /* <+1532>: xvdivdp vs40,vs50,vs60 */
- .long 0xf112e2c7 /* <+1536>: xvdivsp vs40,vs50,vs60 */
- .long 0xf112e30f /* <+1540>: xvmaddadp vs40,vs50,vs60 */
- .long 0xf112e34f /* <+1544>: xvmaddmdp vs40,vs50,vs60 */
- .long 0xf112e20f /* <+1548>: xvmaddasp vs40,vs50,vs60 */
- .long 0xf112e24f /* <+1552>: xvmaddmsp vs40,vs50,vs60 */
- .long 0xf112e707 /* <+1556>: xvmaxdp vs40,vs50,vs60 */
- .long 0xf112e607 /* <+1560>: xvmaxsp vs40,vs50,vs60 */
- .long 0xf112e747 /* <+1564>: xvmindp vs40,vs50,vs60 */
- .long 0xf112e647 /* <+1568>: xvminsp vs40,vs50,vs60 */
- .long 0xf112e38f /* <+1572>: xvmsubadp vs40,vs50,vs60 */
- .long 0xf112e3cf /* <+1576>: xvmsubmdp vs40,vs50,vs60 */
- .long 0xf112e28f /* <+1580>: xvmsubasp vs40,vs50,vs60 */
- .long 0xf112e2cf /* <+1584>: xvmsubmsp vs40,vs50,vs60 */
- .long 0xf112e387 /* <+1588>: xvmuldp vs40,vs50,vs60 */
- .long 0xf112e287 /* <+1592>: xvmulsp vs40,vs50,vs60 */
- .long 0xf100e7a7 /* <+1596>: xvnabsdp vs40,vs60 */
- .long 0xf100e6a7 /* <+1600>: xvnabssp vs40,vs60 */
- .long 0xf100e7e7 /* <+1604>: xvnegdp vs40,vs60 */
- .long 0xf100e6e7 /* <+1608>: xvnegsp vs40,vs60 */
- .long 0xf112e70f /* <+1612>: xvnmaddadp vs40,vs50,vs60 */
- .long 0xf112e74f /* <+1616>: xvnmaddmdp vs40,vs50,vs60 */
- .long 0xf112e60f /* <+1620>: xvnmaddasp vs40,vs50,vs60 */
- .long 0xf112e64f /* <+1624>: xvnmaddmsp vs40,vs50,vs60 */
- .long 0xf112e78f /* <+1628>: xvnmsubadp vs40,vs50,vs60 */
- .long 0xf112e7cf /* <+1632>: xvnmsubmdp vs40,vs50,vs60 */
- .long 0xf112e68f /* <+1636>: xvnmsubasp vs40,vs50,vs60 */
- .long 0xf112e6cf /* <+1640>: xvnmsubmsp vs40,vs50,vs60 */
- .long 0xf100e327 /* <+1644>: xvrdpi vs40,vs60 */
- .long 0xf100e3af /* <+1648>: xvrdpic vs40,vs60 */
- .long 0xf100e3e7 /* <+1652>: xvrdpim vs40,vs60 */
- .long 0xf100e3a7 /* <+1656>: xvrdpip vs40,vs60 */
- .long 0xf100e367 /* <+1660>: xvrdpiz vs40,vs60 */
- .long 0xf100e36b /* <+1664>: xvredp vs40,vs60 */
- .long 0xf100e26b /* <+1668>: xvresp vs40,vs60 */
- .long 0xf100e227 /* <+1672>: xvrspi vs40,vs60 */
- .long 0xf100e2af /* <+1676>: xvrspic vs40,vs60 */
- .long 0xf100e2e7 /* <+1680>: xvrspim vs40,vs60 */
- .long 0xf100e2a7 /* <+1684>: xvrspip vs40,vs60 */
- .long 0xf100e267 /* <+1688>: xvrspiz vs40,vs60 */
- .long 0xf100e32b /* <+1692>: xvrsqrtedp vs40,vs60 */
- .long 0xf100e22b /* <+1696>: xvrsqrtesp vs40,vs60 */
- .long 0xf100e32f /* <+1700>: xvsqrtdp vs40,vs60 */
- .long 0xf100e22f /* <+1704>: xvsqrtsp vs40,vs60 */
- .long 0xf112e347 /* <+1708>: xvsubdp vs40,vs50,vs60 */
- .long 0xf112e247 /* <+1712>: xvsubsp vs40,vs50,vs60 */
- .long 0xf092e3ee /* <+1716>: xvtdivdp cr1,vs50,vs60 */
- .long 0xf092e2ee /* <+1720>: xvtdivsp cr1,vs50,vs60 */
- .long 0xf080e3aa /* <+1724>: xvtsqrtdp cr1,vs60 */
- .long 0xf080e2aa /* <+1728>: xvtsqrtsp cr1,vs60 */
- .long 0xf112e417 /* <+1732>: xxland vs40,vs50,vs60 */
- .long 0xf112e457 /* <+1736>: xxlandc vs40,vs50,vs60 */
- .long 0xf112e517 /* <+1740>: xxlnor vs40,vs50,vs60 */
- .long 0xf112e497 /* <+1744>: xxlor vs40,vs50,vs60 */
- .long 0xf112e4d7 /* <+1748>: xxlxor vs40,vs50,vs60 */
- .long 0xf112e097 /* <+1752>: xxmrghw vs40,vs50,vs60 */
- .long 0xf112e197 /* <+1756>: xxmrglw vs40,vs50,vs60 */
- .long 0xf112e057 /* <+1760>: xxmrghd vs40,vs50,vs60 */
- .long 0xf112e157 /* <+1764>: xxpermdi vs40,vs50,vs60,1 */
- .long 0xf112e257 /* <+1768>: xxpermdi vs40,vs50,vs60,2 */
- .long 0xf112e357 /* <+1772>: xxmrgld vs40,vs50,vs60 */
- .long 0xf1129057 /* <+1776>: xxspltd vs40,vs50,0 */
- .long 0xf1129057 /* <+1780>: xxspltd vs40,vs50,0 */
- .long 0xf1129357 /* <+1784>: xxspltd vs40,vs50,1 */
- .long 0xf1129357 /* <+1788>: xxspltd vs40,vs50,1 */
- .long 0xf112e057 /* <+1792>: xxmrghd vs40,vs50,vs60 */
- .long 0xf112e057 /* <+1796>: xxmrghd vs40,vs50,vs60 */
- .long 0xf112e357 /* <+1800>: xxmrgld vs40,vs50,vs60 */
- .long 0xf1129257 /* <+1804>: xxswapd vs40,vs50 */
- .long 0xf1129257 /* <+1808>: xxswapd vs40,vs50 */
- .long 0xf112e7bf /* <+1812>: xxsel vs40,vs50,vs60,vs62*/
- .long 0xf112e217 /* <+1816>: xxsldwi vs40,vs50,vs60,2 */
- .long 0xf102e293 /* <+1820>: xxspltw vs40,vs60,2 */
- .long 0x7d00a699 /* <+1824>: lxvd2x vs40,0,r20 */
- .long 0x7d0aa699 /* <+1828>: lxvd2x vs40,r10,r20 */
- .long 0x7d00a799 /* <+1832>: stxvd2x vs40,0,r20 */
- .long 0x7d0aa799 /* <+1836>: stxvd2x vs40,r10,r20 */
-
-## power8.d
- .long 0x7c05071d /* <+1840>: tabort. r5 */
- .long 0x7ce8861d /* <+1844>: tabortwc. 7,r8,r16 */
- .long 0x7e8b565d /* <+1848>: tabortdc. 20,r11,r10 */
- .long 0x7e2a9e9d /* <+1852>: tabortwci. 17,r10,-13 */
- .long 0x7fa3dedd /* <+1856>: tabortdci. 29,r3,-5 */
- .long 0x7c00051d /* <+1860>: tbegin. */
- .long 0x7f80059c /* <+1864>: tcheck cr7 */
- .long 0x7c00055d /* <+1868>: tend. */
- .long 0x7c00055d /* <+1872>: tend. */
- .long 0x7e00055d /* <+1876>: tendall. */
- .long 0x7e00055d /* <+1880>: tendall. */
- .long 0x7c18075d /* <+1884>: treclaim. r24 */
- .long 0x7c0007dd /* <+1888>: trechkpt. */
- .long 0x7c0005dd /* <+1892>: tsuspend. */
- .long 0x7c0005dd /* <+1896>: tsuspend. */
- .long 0x7c2005dd /* <+1900>: tresume. */
- .long 0x7c2005dd /* <+1904>: tresume. */
- .long 0x60420000 /* <+1908>: ori r2,r2,0 */
- .long 0x60000000 /* <+1912>: nop */
- .long 0x60420000 /* <+1916>: ori r2,r2,0 */
- .long 0x4c000124 /* <+1920>: rfebb 0 */
- .long 0x4c000924 /* <+1924>: rfebb */
- .long 0x4c000924 /* <+1928>: rfebb */
- .long 0x4d950460 /* <+1932>: bctar- 12,4*cr5+gt */
- .long 0x4c870461 /* <+1936>: bctarl- 4,4*cr1+so */
- .long 0x4dac0460 /* <+1940>: bctar+ 12,4*cr3+lt */
- .long 0x4ca20461 /* <+1944>: bctarl+ 4,eq */
- .long 0x4c880c60 /* <+1948>: bctar 4,4*cr2+lt,1 */
- .long 0x4c871461 /* <+1952>: bctarl 4,4*cr1+so,2 */
- .long 0x7c00003c /* <+1956>: waitasec */
- .long 0x7c00411c /* <+1960>: msgsndp r8 */
- .long 0x7c200126 /* <+1964>: mtsle 1 */
- .long 0x7c00d95c /* <+1968>: msgclrp r27 */
- .long 0x7d4a616d /* <+1972>: stqcx. r10,r10,r12 */
- .long 0x7f80396d /* <+1976>: stqcx. r28,0,r7 */
- .long 0x7f135a28 /* <+1980>: lqarx r24,r19,r11 */
- .long 0x7ec05a28 /* <+1984>: lqarx r22,0,r11 */
- .long 0x7e80325c /* <+1988>: mfbhrbe r20,6 */
- .long 0x7fb18329 /* <+1992>: pbt. r29,r17,r16 */
- .long 0x7dc03b29 /* <+1996>: pbt. r14,0,r7 */
- .long 0x7c00035c /* <+2000>: clrbhrb */
- .long 0x116a05ed /* <+2004>: vpermxor v11,v10,v0,v23 */
- .long 0x1302393c /* <+2008>: vaddeuqm v24,v2,v7,v4 */
- .long 0x114a40bd /* <+2012>: vaddecuq v10,v10,v8,v2 */
- .long 0x10af44fe /* <+2016>: vsubeuqm v5,v15,v8,v19 */
- .long 0x119f877f /* <+2020>: vsubecuq v12,v31,v16,v29 */
- .long 0x129d6888 /* <+2024>: vmulouw v20,v29,v13 */
- .long 0x13a0d089 /* <+2028>: vmuluwm v29,v0,v26 */
- .long 0x1115e0c0 /* <+2032>: vaddudm v8,v21,v28 */
- .long 0x103a08c2 /* <+2036>: vmaxud v1,v26,v1 */
- .long 0x128308c4 /* <+2040>: vrld v20,v3,v1 */
- .long 0x109358c7 /* <+2044>: vcmpequd v4,v19,v11 */
- .long 0x12eef100 /* <+2048>: vadduqm v23,v14,v30 */
- .long 0x11086940 /* <+2052>: vaddcuq v8,v8,v13 */
- .long 0x139b2188 /* <+2056>: vmulosw v28,v27,v4 */
- .long 0x106421c2 /* <+2060>: vmaxsd v3,v4,v4 */
- .long 0x1013aa88 /* <+2064>: vmuleuw v0,v19,v21 */
- .long 0x13149ac2 /* <+2068>: vminud v24,v20,v19 */
- .long 0x101c7ac7 /* <+2072>: vcmpgtud v0,v28,v15 */
- .long 0x12a01388 /* <+2076>: vmulesw v21,v0,v2 */
- .long 0x113a4bc2 /* <+2080>: vminsd v9,v26,v9 */
- .long 0x133d5bc4 /* <+2084>: vsrad v25,v29,v11 */
- .long 0x117c5bc7 /* <+2088>: vcmpgtsd v11,v28,v11 */
- .long 0x10a8d601 /* <+2092>: bcdadd. v5,v8,v26,1 */
- .long 0x10836408 /* <+2096>: vpmsumb v4,v3,v12 */
- .long 0x135fae41 /* <+2100>: bcdsub. v26,v31,v21,1 */
- .long 0x10b18448 /* <+2104>: vpmsumh v5,v17,v16 */
- .long 0x12f1a44e /* <+2108>: vpkudum v23,v17,v20 */
- .long 0x1315ec88 /* <+2112>: vpmsumw v24,v21,v29 */
- .long 0x11366cc8 /* <+2116>: vpmsumd v9,v22,v13 */
- .long 0x125394ce /* <+2120>: vpkudus v18,v19,v18 */
- .long 0x13d0b500 /* <+2124>: vsubuqm v30,v16,v22 */
- .long 0x11cb3d08 /* <+2128>: vcipher v14,v11,v7 */
- .long 0x1142b509 /* <+2132>: vcipherlast v10,v2,v22 */
- .long 0x12e06d0c /* <+2136>: vgbbd v23,v13 */
- .long 0x12198540 /* <+2140>: vsubcuq v16,v25,v16 */
- .long 0x13e12d44 /* <+2144>: vorc v31,v1,v5 */
- .long 0x1091fd48 /* <+2148>: vncipher v4,v17,v31 */
- .long 0x1302dd49 /* <+2152>: vncipherlast v24,v2,v27 */
- .long 0x12f5bd4c /* <+2156>: vbpermq v23,v21,v23 */
- .long 0x13724d4e /* <+2160>: vpksdus v27,v18,v9 */
- .long 0x137ddd84 /* <+2164>: vnand v27,v29,v27 */
- .long 0x1273c5c4 /* <+2168>: vsld v19,v19,v24 */
- .long 0x10ad05c8 /* <+2172>: vsbox v5,v13 */
- .long 0x13233dce /* <+2176>: vpksdss v25,v3,v7 */
- .long 0x138804c7 /* <+2180>: vcmpequd. v28,v8,v0 */
- .long 0x1340d64e /* <+2184>: vupkhsw v26,v26 */
- .long 0x10a73682 /* <+2188>: vshasigmaw v5,v7,0,6 */
- .long 0x13957684 /* <+2192>: veqv v28,v21,v14 */
- .long 0x10289e8c /* <+2196>: vmrgow v1,v8,v19 */
- .long 0x100a56c2 /* <+2200>: vshasigmad v0,v10,0,10 */
- .long 0x10bb76c4 /* <+2204>: vsrd v5,v27,v14 */
- .long 0x11606ece /* <+2208>: vupklsw v11,v13 */
- .long 0x11c08702 /* <+2212>: vclzb v14,v16 */
- .long 0x1280df03 /* <+2216>: vpopcntb v20,v27 */
- .long 0x13805f42 /* <+2220>: vclzh v28,v11 */
- .long 0x13004f43 /* <+2224>: vpopcnth v24,v9 */
- .long 0x1360ff82 /* <+2228>: vclzw v27,v31 */
- .long 0x12209f83 /* <+2232>: vpopcntw v17,v19 */
- .long 0x1180efc2 /* <+2236>: vclzd v12,v29 */
- .long 0x12e0b7c3 /* <+2240>: vpopcntd v23,v22 */
- .long 0x1314eec7 /* <+2244>: vcmpgtud. v24,v20,v29 */
- .long 0x1126dfc7 /* <+2248>: vcmpgtsd. v9,v6,v27 */
- .long 0x7fced019 /* <+2252>: lxsiwzx vs62,r14,r26 */
- .long 0x7d00c819 /* <+2256>: lxsiwzx vs40,0,r25 */
- .long 0x7f20d098 /* <+2260>: lxsiwax vs25,0,r26 */
- .long 0x7c601898 /* <+2264>: lxsiwax vs3,0,r3 */
- .long 0x7fcc0067 /* <+2268>: mfvsrd r12,vs62 */
- .long 0x7d9400e6 /* <+2272>: mffprwz r20,f12 */
- .long 0x7dc97118 /* <+2276>: stxsiwx vs14,r9,r14 */
- .long 0x7ea04118 /* <+2280>: stxsiwx vs21,0,r8 */
- .long 0x7e0b0167 /* <+2284>: mtvsrd vs48,r11 */
- .long 0x7ff701a7 /* <+2288>: mtvrwa v31,r23 */
- .long 0x7e1a01e6 /* <+2292>: mtfprwz f16,r26 */
- .long 0x7db36c18 /* <+2296>: lxsspx vs13,r19,r13 */
- .long 0x7e406c18 /* <+2300>: lxsspx vs18,0,r13 */
- .long 0x7d622519 /* <+2304>: stxsspx vs43,r2,r4 */
- .long 0x7ee05d19 /* <+2308>: stxsspx vs55,0,r11 */
- .long 0xf2d0c805 /* <+2312>: xsaddsp vs54,vs48,vs25 */
- .long 0xf1d2080c /* <+2316>: xsmaddasp vs14,vs50,vs1 */
- .long 0xf3565042 /* <+2320>: xssubsp vs26,vs22,vs42 */
- .long 0xf375a04e /* <+2324>: xsmaddmsp vs27,vs53,vs52 */
- .long 0xf100d82a /* <+2328>: xsrsqrtesp vs8,vs59 */
- .long 0xf180482e /* <+2332>: xssqrtsp vs12,vs41 */
- .long 0xf32b0083 /* <+2336>: xsmulsp vs57,vs11,vs32 */
- .long 0xf0d4d089 /* <+2340>: xsmsubasp vs38,vs20,vs26 */
- .long 0xf35330c0 /* <+2344>: xsdivsp vs26,vs19,vs6 */
- .long 0xf065b8cf /* <+2348>: xsmsubmsp vs35,vs37,vs55 */
- .long 0xf3604069 /* <+2352>: xsresp vs59,vs8 */
- .long 0xf1810c0f /* <+2356>: xsnmaddasp vs44,vs33,vs33 */
- .long 0xf23ef44c /* <+2360>: xsnmaddmsp vs17,vs62,vs30 */
- .long 0xf2d4fc8d /* <+2364>: xsnmsubasp vs54,vs52,vs31 */
- .long 0xf0a5d4cb /* <+2368>: xsnmsubmsp vs37,vs5,vs58 */
- .long 0xf3d66556 /* <+2372>: xxlorc vs30,vs54,vs44 */
- .long 0xf22eed91 /* <+2376>: xxlnand vs49,vs14,vs29 */
- .long 0xf3d6f5d1 /* <+2380>: xxleqv vs62,vs22,vs30 */
- .long 0xf380b42f /* <+2384>: xscvdpspn vs60,vs54 */
- .long 0xf2c06c66 /* <+2388>: xsrsp vs22,vs45 */
- .long 0xf340dca2 /* <+2392>: xscvuxdsp vs26,vs59 */
- .long 0xf0c08ce3 /* <+2396>: xscvsxdsp vs38,vs49 */
- .long 0xf360d52d /* <+2400>: xscvspdpn vs59,vs26 */
- .long 0xff0e168c /* <+2404>: fmrgow f24,f14,f2 */
- .long 0xfec72f8c /* <+2408>: fmrgew f22,f7,f5 */
- .long 0x7c00719c /* <+2412>: msgsnd r14 */
- .long 0x7c00b9dc /* <+2416>: msgclr r23 */
- .long 0x7d002e99 /* <+2420>: lxvd2x vs40,0,r5 */
- .long 0x7d002e99 /* <+2424>: lxvd2x vs40,0,r5 */
- .long 0x7d543698 /* <+2428>: lxvd2x vs10,r20,r6 */
- .long 0x7d543698 /* <+2432>: lxvd2x vs10,r20,r6 */
- .long 0x7d203f99 /* <+2436>: stxvd2x vs41,0,r7 */
- .long 0x7d203f99 /* <+2440>: stxvd2x vs41,0,r7 */
- .long 0x7d754798 /* <+2444>: stxvd2x vs11,r21,r8 */
- .long 0x7d754798 /* <+2448>: stxvd2x vs11,r21,r8 */
-
-## altivec2.d
- .long 0x7c60e20e /* <+2452>: lvepxl v3,0,r28 */
- .long 0x7e64920e /* <+2456>: lvepxl v19,r4,r18 */
- .long 0x7f609a4e /* <+2460>: lvepx v27,0,r19 */
- .long 0x7c39924e /* <+2464>: lvepx v1,r25,r18 */
- .long 0x7fe0da0a /* <+2468>: lvexbx v31,0,r27 */
- .long 0x7f81620a /* <+2472>: lvexbx v28,r1,r12 */
- .long 0x7fe0724a /* <+2476>: lvexhx v31,0,r14 */
- .long 0x7e30fa4a /* <+2480>: lvexhx v17,r16,r31 */
- .long 0x7ec0ea8a /* <+2484>: lvexwx v22,0,r29 */
- .long 0x7ef92a8a /* <+2488>: lvexwx v23,r25,r5 */
- .long 0x7c60660a /* <+2492>: lvsm v3,0,r12 */
- .long 0x7f7d0e0a /* <+2496>: lvsm v27,r29,r1 */
- .long 0x7ce036ca /* <+2500>: lvswxl v7,0,r6 */
- .long 0x7cf046ca /* <+2504>: lvswxl v7,r16,r8 */
- .long 0x7dc094ca /* <+2508>: lvswx v14,0,r18 */
- .long 0x7f9c84ca /* <+2512>: lvswx v28,r28,r16 */
- .long 0x7f60668a /* <+2516>: lvtlxl v27,0,r12 */
- .long 0x7f7c068a /* <+2520>: lvtlxl v27,r28,r0 */
- .long 0x7ee0cc8a /* <+2524>: lvtlx v23,0,r25 */
- .long 0x7c39748a /* <+2528>: lvtlx v1,r25,r14 */
- .long 0x7e80c64a /* <+2532>: lvtrxl v20,0,r24 */
- .long 0x7eddc64a /* <+2536>: lvtrxl v22,r29,r24 */
- .long 0x7f00444a /* <+2540>: lvtrx v24,0,r8 */
- .long 0x7db7e44a /* <+2544>: lvtrx v13,r23,r28 */
- .long 0x7d9c60dc /* <+2548>: mvidsplt v12,r28,r12 */
- .long 0x7d5b005c /* <+2552>: mviwsplt v10,r27,r0 */
- .long 0x7f606e0e /* <+2556>: stvepxl v27,0,r13 */
- .long 0x7c42fe0e /* <+2560>: stvepxl v2,r2,r31 */
- .long 0x7c60564e /* <+2564>: stvepx v3,0,r10 */
- .long 0x7f7c064e /* <+2568>: stvepx v27,r28,r0 */
- .long 0x7da0330a /* <+2572>: stvexbx v13,0,r6 */
- .long 0x7db91b0a /* <+2576>: stvexbx v13,r25,r3 */
- .long 0x7ec00b4a /* <+2580>: stvexhx v22,0,r1 */
- .long 0x7e2e534a /* <+2584>: stvexhx v17,r14,r10 */
- .long 0x7ea0db8a /* <+2588>: stvexwx v21,0,r27 */
- .long 0x7ff20b8a /* <+2592>: stvexwx v31,r18,r1 */
- .long 0x7f406f8a /* <+2596>: stvflxl v26,0,r13 */
- .long 0x7ecdaf8a /* <+2600>: stvflxl v22,r13,r21 */
- .long 0x7ca04d8a /* <+2604>: stvflx v5,0,r9 */
- .long 0x7eb80d8a /* <+2608>: stvflx v21,r24,r1 */
- .long 0x7da0574a /* <+2612>: stvfrxl v13,0,r10 */
- .long 0x7db1cf4a /* <+2616>: stvfrxl v13,r17,r25 */
- .long 0x7e20554a /* <+2620>: stvfrx v17,0,r10 */
- .long 0x7d0cfd4a /* <+2624>: stvfrx v8,r12,r31 */
- .long 0x7e40efca /* <+2628>: stvswxl v18,0,r29 */
- .long 0x7f4e47ca /* <+2632>: stvswxl v26,r14,r8 */
- .long 0x7c007dca /* <+2636>: stvswx v0,0,r15 */
- .long 0x7db73dca /* <+2640>: stvswx v13,r23,r7 */
- .long 0x10d18403 /* <+2644>: vabsdub v6,v17,v16 */
- .long 0x12b22443 /* <+2648>: vabsduh v21,v18,v4 */
- .long 0x13344c83 /* <+2652>: vabsduw v25,v20,v9 */
- .long 0x10d1a6ad /* <+2656>: vpermxor v6,v17,v20,v26 */
- .long 0x13ba7f3c /* <+2660>: vaddeuqm v29,v26,v15,v28 */
- .long 0x11e83e3d /* <+2664>: vaddecuq v15,v8,v7,v24 */
- .long 0x1046a87e /* <+2668>: vsubeuqm v2,v6,v21,v1 */
- .long 0x13a6013f /* <+2672>: vsubecuq v29,v6,v0,v4 */
- .long 0x11c91888 /* <+2676>: vmulouw v14,v9,v3 */
- .long 0x13109089 /* <+2680>: vmuluwm v24,v16,v18 */
- .long 0x115188c0 /* <+2684>: vaddudm v10,v17,v17 */
- .long 0x13d920c2 /* <+2688>: vmaxud v30,v25,v4 */
- .long 0x1146e0c4 /* <+2692>: vrld v10,v6,v28 */
- .long 0x136738c7 /* <+2696>: vcmpequd v27,v7,v7 */
- .long 0x12d0c900 /* <+2700>: vadduqm v22,v16,v25 */
- .long 0x1035e940 /* <+2704>: vaddcuq v1,v21,v29 */
- .long 0x128b9988 /* <+2708>: vmulosw v20,v11,v19 */
- .long 0x131309c2 /* <+2712>: vmaxsd v24,v19,v1 */
- .long 0x11bbf288 /* <+2716>: vmuleuw v13,v27,v30 */
- .long 0x11388ac2 /* <+2720>: vminud v9,v24,v17 */
- .long 0x1152e2c7 /* <+2724>: vcmpgtud v10,v18,v28 */
- .long 0x101db388 /* <+2728>: vmulesw v0,v29,v22 */
- .long 0x11bc0bc2 /* <+2732>: vminsd v13,v28,v1 */
- .long 0x11542bc4 /* <+2736>: vsrad v10,v20,v5 */
- .long 0x13752bc7 /* <+2740>: vcmpgtsd v27,v21,v5 */
- .long 0x1017f601 /* <+2744>: bcdadd. v0,v23,v30,1 */
- .long 0x1338d408 /* <+2748>: vpmsumb v25,v24,v26 */
- .long 0x11042641 /* <+2752>: bcdsub. v8,v4,v4,1 */
- .long 0x120ed448 /* <+2756>: vpmsumh v16,v14,v26 */
- .long 0x1362d44e /* <+2760>: vpkudum v27,v2,v26 */
- .long 0x10d78c88 /* <+2764>: vpmsumw v6,v23,v17 */
- .long 0x1286ccc8 /* <+2768>: vpmsumd v20,v6,v25 */
- .long 0x137684ce /* <+2772>: vpkudus v27,v22,v16 */
- .long 0x12b494c0 /* <+2776>: vsubudm v21,v20,v18 */
- .long 0x12b49500 /* <+2780>: vsubuqm v21,v20,v18 */
- .long 0x13bd3508 /* <+2784>: vcipher v29,v29,v6 */
- .long 0x104da509 /* <+2788>: vcipherlast v2,v13,v20 */
- .long 0x1280950c /* <+2792>: vgbbd v20,v18 */
- .long 0x1268cd40 /* <+2796>: vsubcuq v19,v8,v25 */
- .long 0x113aed44 /* <+2800>: vorc v9,v26,v29 */
- .long 0x12946d48 /* <+2804>: vncipher v20,v20,v13 */
- .long 0x11e5dd49 /* <+2808>: vncipherlast v15,v5,v27 */
- .long 0x1073354c /* <+2812>: vbpermq v3,v19,v6 */
- .long 0x13c4e54e /* <+2816>: vpksdus v30,v4,v28 */
- .long 0x10047584 /* <+2820>: vnand v0,v4,v14 */
- .long 0x1228edc4 /* <+2824>: vsld v17,v8,v29 */
- .long 0x13b405c8 /* <+2828>: vsbox v29,v20 */
- .long 0x11675dce /* <+2832>: vpksdss v11,v7,v11 */
- .long 0x107384c7 /* <+2836>: vcmpequd. v3,v19,v16 */
- .long 0x12408e4e /* <+2840>: vupkhsw v18,v17 */
- .long 0x13a86e82 /* <+2844>: vshasigmaw v29,v8,0,13 */
- .long 0x12fcd684 /* <+2848>: veqv v23,v28,v26 */
- .long 0x13a0178c /* <+2852>: vmrgew v29,v0,v2 */
- .long 0x13a0168c /* <+2856>: vmrgow v29,v0,v2 */
- .long 0x137306c2 /* <+2860>: vshasigmad v27,v19,0,0 */
- .long 0x129ce6c4 /* <+2864>: vsrd v20,v28,v28 */
- .long 0x1240aece /* <+2868>: vupklsw v18,v21 */
- .long 0x13c03f02 /* <+2872>: vclzb v30,v7 */
- .long 0x13a0af03 /* <+2876>: vpopcntb v29,v21 */
- .long 0x1320af42 /* <+2880>: vclzh v25,v21 */
- .long 0x1200f743 /* <+2884>: vpopcnth v16,v30 */
- .long 0x13801f82 /* <+2888>: vclzw v28,v3 */
- .long 0x11404f83 /* <+2892>: vpopcntw v10,v9 */
- .long 0x12c04fc2 /* <+2896>: vclzd v22,v9 */
- .long 0x11e0f7c3 /* <+2900>: vpopcntd v15,v30 */
- .long 0x105f36c7 /* <+2904>: vcmpgtud. v2,v31,v6 */
- .long 0x128f17c7 /* <+2908>: vcmpgtsd. v20,v15,v2 */
-
-## vsd2.d
- .long 0x7fced019 /* <+2912>: lxsiwzx vs62,r14,r26 */
- .long 0x7d00c819 /* <+2916>: lxsiwzx vs40,0,r25 */
- .long 0x7f20d098 /* <+2920>: lxsiwax vs25,0,r26 */
- .long 0x7c601898 /* <+2924>: lxsiwax vs3,0,r3 */
- .long 0x7fcc0066 /* <+2928>: mfvsrd r12,vs30 */
- .long 0x7fcc0066 /* <+2932>: mfvsrd r12,vs30 */
- .long 0x7fcc0067 /* <+2936>: mfvsrd r12,vs62 */
- .long 0x7fcc0067 /* <+2940>: mfvsrd r12,vs62 */
- .long 0x7d9400e6 /* <+2944>: mffprwz r20,f12 */
- .long 0x7d9400e6 /* <+2948>: mffprwz r20,f12 */
- .long 0x7d9500e7 /* <+2952>: mfvrwz r21,v12 */
- .long 0x7d9500e7 /* <+2956>: mfvrwz r21,v12 */
- .long 0x7dc97118 /* <+2960>: stxsiwx vs14,r9,r14 */
- .long 0x7ea04118 /* <+2964>: stxsiwx vs21,0,r8 */
- .long 0x7d7c0166 /* <+2968>: mtvsrd vs11,r28 */
- .long 0x7d7c0166 /* <+2972>: mtvsrd vs11,r28 */
- .long 0x7d7d0167 /* <+2976>: mtvsrd vs43,r29 */
- .long 0x7d7d0167 /* <+2980>: mtvsrd vs43,r29 */
- .long 0x7f1601a6 /* <+2984>: mtfprwa f24,r22 */
- .long 0x7f1601a6 /* <+2988>: mtfprwa f24,r22 */
- .long 0x7f3701a7 /* <+2992>: mtvrwa v25,r23 */
- .long 0x7f3701a7 /* <+2996>: mtvrwa v25,r23 */
- .long 0x7f5b01e6 /* <+3000>: mtfprwz f26,r27 */
- .long 0x7f5b01e6 /* <+3004>: mtfprwz f26,r27 */
- .long 0x7f7c01e7 /* <+3008>: mtvrwz v27,r28 */
- .long 0x7f7c01e7 /* <+3012>: mtvrwz v27,r28 */
- .long 0x7db36c18 /* <+3016>: lxsspx vs13,r19,r13 */
- .long 0x7e406c18 /* <+3020>: lxsspx vs18,0,r13 */
- .long 0x7d622519 /* <+3024>: stxsspx vs43,r2,r4 */
- .long 0x7ee05d19 /* <+3028>: stxsspx vs55,0,r11 */
- .long 0xf2d0c805 /* <+3032>: xsaddsp vs54,vs48,vs25 */
- .long 0xf1d2080c /* <+3036>: xsmaddasp vs14,vs50,vs1 */
- .long 0xf3565042 /* <+3040>: xssubsp vs26,vs22,vs42 */
- .long 0xf375a04e /* <+3044>: xsmaddmsp vs27,vs53,vs52 */
- .long 0xf100d82a /* <+3048>: xsrsqrtesp vs8,vs59 */
- .long 0xf180482e /* <+3052>: xssqrtsp vs12,vs41 */
- .long 0xf32b0083 /* <+3056>: xsmulsp vs57,vs11,vs32 */
- .long 0xf0d4d089 /* <+3060>: xsmsubasp vs38,vs20,vs26 */
- .long 0xf35330c0 /* <+3064>: xsdivsp vs26,vs19,vs6 */
- .long 0xf065b8cf /* <+3068>: xsmsubmsp vs35,vs37,vs55 */
- .long 0xf3604069 /* <+3072>: xsresp vs59,vs8 */
- .long 0xf1810c0f /* <+3076>: xsnmaddasp vs44,vs33,vs33 */
- .long 0xf23ef44c /* <+3080>: xsnmaddmsp vs17,vs62,vs30 */
- .long 0xf2d4fc8d /* <+3084>: xsnmsubasp vs54,vs52,vs31 */
- .long 0xf0a5d4cb /* <+3088>: xsnmsubmsp vs37,vs5,vs58 */
- .long 0xf3d66556 /* <+3092>: xxlorc vs30,vs54,vs44 */
- .long 0xf22eed91 /* <+3096>: xxlnand vs49,vs14,vs29 */
- .long 0xf3d6f5d1 /* <+3100>: xxleqv vs62,vs22,vs30 */
- .long 0xf380b42f /* <+3104>: xscvdpspn vs60,vs54 */
- .long 0xf2c06c66 /* <+3108>: xsrsp vs22,vs45 */
- .long 0xf340dca2 /* <+3112>: xscvuxdsp vs26,vs59 */
- .long 0xf0c08ce3 /* <+3116>: xscvsxdsp vs38,vs49 */
- .long 0xf360d52d /* <+3120>: xscvspdpn vs59,vs26 */
- .long 0xff0e168c /* <+3124>: fmrgow f24,f14,f2 */
- .long 0xfec72f8c /* <+3128>: fmrgew f22,f7,f5 */
-
-## power9.d
- .long 0x7da30474 /* <+3132>: cnttzd r3,r13 */
- .long 0x7dc40475 /* <+3136>: cnttzd. r4,r14 */
- .long 0x7de50434 /* <+3140>: cnttzw r5,r15 */
- .long 0x7e060435 /* <+3144>: cnttzw. r6,r16 */
- .long 0x7d54ae12 /* <+3148>: modsd r10,r20,r21 */
- .long 0x7d75b616 /* <+3152>: modsw r11,r21,r22 */
- .long 0x7d96ba12 /* <+3156>: modud r12,r22,r23 */
- .long 0x7db7c216 /* <+3160>: moduw r13,r23,r24 */
- .long 0x10672581 /* <+3164>: bcdcfn. v3,v4,0 */
- .long 0x10672781 /* <+3168>: bcdcfn. v3,v4,1 */
- .long 0x10822d81 /* <+3172>: bcdcfsq. v4,v5,0 */
- .long 0x10822f81 /* <+3176>: bcdcfsq. v4,v5,1 */
- .long 0x10a63581 /* <+3180>: bcdcfz. v5,v6,0 */
- .long 0x10a63781 /* <+3184>: bcdcfz. v5,v6,1 */
- .long 0x10c74341 /* <+3188>: bcdcpsgn. v6,v7,v8 */
- .long 0x10e54581 /* <+3192>: bcdctn. v7,v8 */
- .long 0x11004d81 /* <+3196>: bcdctsq. v8,v9 */
- .long 0x11245581 /* <+3200>: bcdctz. v9,v10,0 */
- .long 0x11245781 /* <+3204>: bcdctz. v9,v10,1 */
- .long 0x115f5d81 /* <+3208>: bcdsetsgn. v10,v11,0 */
- .long 0x115f5f81 /* <+3212>: bcdsetsgn. v10,v11,1 */
- .long 0x116c6dc1 /* <+3216>: bcdsr. v11,v12,v13,0 */
- .long 0x116c6fc1 /* <+3220>: bcdsr. v11,v12,v13,1 */
- .long 0x118d74c1 /* <+3224>: bcds. v12,v13,v14,0 */
- .long 0x118d76c1 /* <+3228>: bcds. v12,v13,v14,1 */
- .long 0x11ae7d01 /* <+3232>: bcdtrunc. v13,v14,v15,0 */
- .long 0x11ae7f01 /* <+3236>: bcdtrunc. v13,v14,v15,1 */
- .long 0x11cf8481 /* <+3240>: bcdus. v14,v15,v16 */
- .long 0x11f08d41 /* <+3244>: bcdutrunc. v15,v16,v17 */
- .long 0x7e80aa5a /* <+3248>: lxvll vs20,0,r21 */
- .long 0x7e8aaa5a /* <+3252>: lxvll vs20,r10,r21 */
- .long 0x7ea05b5a /* <+3256>: stxvll vs21,0,r11 */
- .long 0x7eaa5b5a /* <+3260>: stxvll vs21,r10,r11 */
- .long 0x12d70001 /* <+3264>: vmul10cuq v22,v23 */
- .long 0x12f8c841 /* <+3268>: vmul10ecuq v23,v24,v25 */
- .long 0x1319d241 /* <+3272>: vmul10euq v24,v25,v26 */
- .long 0x133a0201 /* <+3276>: vmul10uq v25,v26 */
- .long 0xfd4b6008 /* <+3280>: xsaddqp v10,v11,v12 */
- .long 0xfd6c6009 /* <+3284>: xsaddqpo v11,v12,v12 */
- .long 0xfe80f00a /* <+3288>: xsrqpi 0,v20,v30,0 */
- .long 0xfe81f00a /* <+3292>: xsrqpi 1,v20,v30,0 */
- .long 0xfe80f60a /* <+3296>: xsrqpi 0,v20,v30,3 */
- .long 0xfe81f60a /* <+3300>: xsrqpi 1,v20,v30,3 */
- .long 0xfea0f80b /* <+3304>: xsrqpix 0,v21,v31,0 */
- .long 0xfea1f80b /* <+3308>: xsrqpix 1,v21,v31,0 */
- .long 0xfea0fe0b /* <+3312>: xsrqpix 0,v21,v31,3 */
- .long 0xfea1fe0b /* <+3316>: xsrqpix 1,v21,v31,3 */
- .long 0xfd8d7048 /* <+3320>: xsmulqp v12,v13,v14 */
- .long 0xfdae7849 /* <+3324>: xsmulqpo v13,v14,v15 */
- .long 0xfec0b84a /* <+3328>: xsrqpxp 0,v22,v23,0 */
- .long 0xfec1b84a /* <+3332>: xsrqpxp 1,v22,v23,0 */
- .long 0xfec0be4a /* <+3336>: xsrqpxp 0,v22,v23,3 */
- .long 0xfec1be4a /* <+3340>: xsrqpxp 1,v22,v23,3 */
- .long 0xfdcf80c8 /* <+3344>: xscpsgnqp v14,v15,v16 */
- .long 0xfc0f8108 /* <+3348>: xscmpoqp cr0,v15,v16 */
- .long 0xff8f8108 /* <+3352>: xscmpoqp cr7,v15,v16 */
- .long 0xfc108948 /* <+3356>: xscmpexpqp cr0,v16,v17 */
- .long 0xff908948 /* <+3360>: xscmpexpqp cr7,v16,v17 */
- .long 0xfe329b08 /* <+3364>: xsmaddqp v17,v18,v19 */
- .long 0xfe53a309 /* <+3368>: xsmaddqpo v18,v19,v20 */
- .long 0xfe74ab48 /* <+3372>: xsmsubqp v19,v20,v21 */
- .long 0xfe95b349 /* <+3376>: xsmsubqpo v20,v21,v22 */
- .long 0xfeb6bb88 /* <+3380>: xsnmaddqp v21,v22,v23 */
- .long 0xfed7c389 /* <+3384>: xsnmaddqpo v22,v23,v24 */
- .long 0xfef8cbc8 /* <+3388>: xsnmsubqp v23,v24,v25 */
- .long 0xff19d3c9 /* <+3392>: xsnmsubqpo v24,v25,v26 */
- .long 0xff3adc08 /* <+3396>: xssubqp v25,v26,v27 */
- .long 0xff5be409 /* <+3400>: xssubqpo v26,v27,v28 */
- .long 0xff7cec48 /* <+3404>: xsdivqp v27,v28,v29 */
- .long 0xff9df449 /* <+3408>: xsdivqpo v28,v29,v30 */
- .long 0xfc1df508 /* <+3412>: xscmpuqp cr0,v29,v30 */
- .long 0xff9df508 /* <+3416>: xscmpuqp cr7,v29,v30 */
- .long 0xfc00f588 /* <+3420>: xststdcqp cr0,v30,0 */
- .long 0xff80f588 /* <+3424>: xststdcqp cr7,v30,0 */
- .long 0xfc7ffd88 /* <+3428>: xststdcqp cr0,v31,127 */
- .long 0xfffffd88 /* <+3432>: xststdcqp cr7,v31,127 */
- .long 0xfd405e48 /* <+3436>: xsabsqp v10,v11 */
- .long 0xfd626648 /* <+3440>: xsxexpqp v11,v12 */
- .long 0xfd886e48 /* <+3444>: xsnabsqp v12,v13 */
- .long 0xfdb07648 /* <+3448>: xsnegqp v13,v14 */
- .long 0xfdd27e48 /* <+3452>: xsxsigqp v14,v15 */
- .long 0xfdfb8648 /* <+3456>: xssqrtqp v15,v16 */
- .long 0xfe1b8e49 /* <+3460>: xssqrtqpo v16,v17 */
- .long 0xfe219688 /* <+3464>: xscvqpuwz v17,v18 */
- .long 0xfe429e88 /* <+3468>: xscvudqp v18,v19 */
- .long 0xfe69a688 /* <+3472>: xscvqpswz v19,v20 */
- .long 0xfe8aae88 /* <+3476>: xscvsdqp v20,v21 */
- .long 0xfeb1b688 /* <+3480>: xscvqpudz v21,v22 */
- .long 0xfed4be88 /* <+3484>: xscvqpdp v22,v23 */
- .long 0xfef4c689 /* <+3488>: xscvqpdpo v23,v24 */
- .long 0xff16ce88 /* <+3492>: xscvdpqp v24,v25 */
- .long 0xff39d688 /* <+3496>: xscvqpsdz v25,v26 */
- .long 0xff5be6c8 /* <+3500>: xsiexpqp v26,v27,v28 */
- .long 0x108531fb /* <+3504>: vpermr v4,v5,v6,v7 */
- .long 0x10a0320d /* <+3508>: vextractub v5,v6,0 */
- .long 0x10af320d /* <+3512>: vextractub v5,v6,15 */
- .long 0x10c03a4d /* <+3516>: vextractuh v6,v7,0 */
- .long 0x10cf3a4d /* <+3520>: vextractuh v6,v7,15 */
- .long 0x10e0428d /* <+3524>: vextractuw v7,v8,0 */
- .long 0x10ef428d /* <+3528>: vextractuw v7,v8,15 */
- .long 0x11004acd /* <+3532>: vextractd v8,v9,0 */
- .long 0x110f4acd /* <+3536>: vextractd v8,v9,15 */
- .long 0x1120530d /* <+3540>: vinsertb v9,v10,0 */
- .long 0x112f530d /* <+3544>: vinsertb v9,v10,15 */
- .long 0x11405b4d /* <+3548>: vinserth v10,v11,0 */
- .long 0x114f5b4d /* <+3552>: vinserth v10,v11,15 */
- .long 0x1160638d /* <+3556>: vinsertw v11,v12,0 */
- .long 0x116f638d /* <+3560>: vinsertw v11,v12,15 */
- .long 0x11806bcd /* <+3564>: vinsertd v12,v13,0 */
- .long 0x118f6bcd /* <+3568>: vinsertd v12,v13,15 */
- .long 0x7db40267 /* <+3572>: mfvsrld r20,vs45 */
- .long 0x7dd50327 /* <+3576>: mtvsrws vs46,r21 */
- .long 0x7de0bb67 /* <+3580>: mtvsrdd vs47,0,r23 */
- .long 0x7df6bb67 /* <+3584>: mtvsrdd vs47,r22,r23 */
- .long 0x7e405a19 /* <+3588>: lxvx vs50,0,r11 */
- .long 0x7c0a5a18 /* <+3592>: lxvx vs0,r10,r11 */
- .long 0x7e6062d9 /* <+3596>: lxvwsx vs51,0,r12 */
- .long 0x7c2a62d8 /* <+3600>: lxvwsx vs1,r10,r12 */
- .long 0x7e806e59 /* <+3604>: lxvh8x vs52,0,r13 */
- .long 0x7c4a6e58 /* <+3608>: lxvh8x vs2,r10,r13 */
- .long 0x7ea076d9 /* <+3612>: lxvb16x vs53,0,r14 */
- .long 0x7c6a76d8 /* <+3616>: lxvb16x vs3,r10,r14 */
- .long 0x7ec07b19 /* <+3620>: stxvx vs54,0,r15 */
- .long 0x7c947b18 /* <+3624>: stxvx vs4,r20,r15 */
- .long 0x7ee08759 /* <+3628>: stxvh8x vs55,0,r16 */
- .long 0x7cb48758 /* <+3632>: stxvh8x vs5,r20,r16 */
- .long 0x7f008fd9 /* <+3636>: stxvb16x vs56,0,r17 */
- .long 0x7cd48fd8 /* <+3640>: stxvb16x vs6,r20,r17 */
- .long 0xf0802a94 /* <+3644>: xxextractuw vs4,vs5,0 */
- .long 0xf10f9297 /* <+3648>: xxextractuw vs40,vs50,15 */
- .long 0xf08002d0 /* <+3652>: xxspltib vs4,0 */
- .long 0xf127fad1 /* <+3656>: xxspltib vs41,255 */
- .long 0xf0a032d4 /* <+3660>: xxinsertw vs5,vs6,0 */
- .long 0xf24fe2d7 /* <+3664>: xxinsertw vs50,vs60,15 */
- .long 0xf0c73f6c /* <+3668>: xxbrh vs6,vs7 */
- .long 0xf307cf6f /* <+3672>: xxbrh vs56,vs57 */
- .long 0xf0ef476c /* <+3676>: xxbrw vs7,vs8 */
- .long 0xf32fd76f /* <+3680>: xxbrw vs57,vs58 */
- .long 0xf1174f6c /* <+3684>: xxbrd vs8,vs9 */
- .long 0xf357df6f /* <+3688>: xxbrd vs58,vs59 */
- .long 0xf13f576c /* <+3692>: xxbrq vs9,vs10 */
- .long 0xf37fe76f /* <+3696>: xxbrq vs59,vs60 */
- .long 0xe6800002 /* <+3700>: lxsd v20,0(0) */
- .long 0xe68a0002 /* <+3704>: lxsd v20,0(r10) */
- .long 0xe680000a /* <+3708>: lxsd v20,8(0) */
- .long 0xe68a000a /* <+3712>: lxsd v20,8(r10) */
- .long 0xe680fffa /* <+3716>: lxsd v20,-8(0) */
- .long 0xe68afffa /* <+3720>: lxsd v20,-8(r10) */
- .long 0xe6807ffe /* <+3724>: lxsd v20,32764(0) */
- .long 0xe68a7ffe /* <+3728>: lxsd v20,32764(r10) */
- .long 0xe6808002 /* <+3732>: lxsd v20,-32768(0) */
- .long 0xe68a8002 /* <+3736>: lxsd v20,-32768(r10) */
- .long 0xe7c00003 /* <+3740>: lxssp v30,0(0) */
- .long 0xe7cb0003 /* <+3744>: lxssp v30,0(r11) */
- .long 0xe7c0000b /* <+3748>: lxssp v30,8(0) */
- .long 0xe7cb000b /* <+3752>: lxssp v30,8(r11) */
- .long 0xe7c0fffb /* <+3756>: lxssp v30,-8(0) */
- .long 0xe7cbfffb /* <+3760>: lxssp v30,-8(r11) */
- .long 0xe7c07fff /* <+3764>: lxssp v30,32764(0) */
- .long 0xe7cb7fff /* <+3768>: lxssp v30,32764(r11) */
- .long 0xe7c08003 /* <+3772>: lxssp v30,-32768(0) */
- .long 0xe7cb8003 /* <+3776>: lxssp v30,-32768(r11) */
- .long 0xf5000009 /* <+3780>: lxv vs40,0(0) */
- .long 0xf50c0009 /* <+3784>: lxv vs40,0(r12) */
- .long 0xf5000019 /* <+3788>: lxv vs40,16(0) */
- .long 0xf50c0019 /* <+3792>: lxv vs40,16(r12) */
- .long 0xf500fff9 /* <+3796>: lxv vs40,-16(0) */
- .long 0xf54cfff1 /* <+3800>: lxv vs10,-16(r12) */
- .long 0xf5407ff1 /* <+3804>: lxv vs10,32752(0) */
- .long 0xf54c7ff1 /* <+3808>: lxv vs10,32752(r12) */
- .long 0xf5408001 /* <+3812>: lxv vs10,-32768(0) */
- .long 0xf54c8001 /* <+3816>: lxv vs10,-32768(r12) */
- .long 0xf6a00002 /* <+3820>: stxsd v21,0(0) */
- .long 0xf6aa0002 /* <+3824>: stxsd v21,0(r10) */
- .long 0xf6a0000a /* <+3828>: stxsd v21,8(0) */
- .long 0xf6aa000a /* <+3832>: stxsd v21,8(r10) */
- .long 0xf6a0fffa /* <+3836>: stxsd v21,-8(0) */
- .long 0xf6aafffa /* <+3840>: stxsd v21,-8(r10) */
- .long 0xf6a07ffe /* <+3844>: stxsd v21,32764(0) */
- .long 0xf6aa7ffe /* <+3848>: stxsd v21,32764(r10) */
- .long 0xf6a08002 /* <+3852>: stxsd v21,-32768(0) */
- .long 0xf6aa8002 /* <+3856>: stxsd v21,-32768(r10) */
- .long 0xf7e00003 /* <+3860>: stxssp v31,0(0) */
- .long 0xf7eb0003 /* <+3864>: stxssp v31,0(r11) */
- .long 0xf7e0000b /* <+3868>: stxssp v31,8(0) */
- .long 0xf7eb000b /* <+3872>: stxssp v31,8(r11) */
- .long 0xf7e0fffb /* <+3876>: stxssp v31,-8(0) */
- .long 0xf7ebfffb /* <+3880>: stxssp v31,-8(r11) */
- .long 0xf7e07fff /* <+3884>: stxssp v31,32764(0) */
- .long 0xf7eb7fff /* <+3888>: stxssp v31,32764(r11) */
- .long 0xf7e08003 /* <+3892>: stxssp v31,-32768(0) */
- .long 0xf7eb8003 /* <+3896>: stxssp v31,-32768(r11) */
- .long 0xf520000d /* <+3900>: stxv vs41,0(0) */
- .long 0xf52c000d /* <+3904>: stxv vs41,0(r12) */
- .long 0xf520001d /* <+3908>: stxv vs41,16(0) */
- .long 0xf52c001d /* <+3912>: stxv vs41,16(r12) */
- .long 0xf520fffd /* <+3916>: stxv vs41,-16(0) */
- .long 0xf56cfff5 /* <+3920>: stxv vs11,-16(r12) */
- .long 0xf5607ff5 /* <+3924>: stxv vs11,32752(0) */
- .long 0xf56c7ff5 /* <+3928>: stxv vs11,32752(r12) */
- .long 0xf5608005 /* <+3932>: stxv vs11,-32768(0) */
- .long 0xf56c8005 /* <+3936>: stxv vs11,-32768(r12) */
- .long 0xf296c0d0 /* <+3940>: xxperm vs20,vs22,vs24 */
- .long 0xf10a60d7 /* <+3944>: xxperm vs40,vs42,vs44 */
- .long 0xf2b7c9d0 /* <+3948>: xxpermr vs21,vs23,vs25 */
- .long 0xf12b69d7 /* <+3952>: xxpermr vs41,vs43,vs45 */
- .long 0x7e8c06f4 /* <+3956>: extswsli r12,r20,0 */
- .long 0x7e8c0ef4 /* <+3960>: extswsli r12,r20,1 */
- .long 0x7e8cfef6 /* <+3964>: extswsli r12,r20,63 */
- .long 0x7ead06f5 /* <+3968>: extswsli. r13,r21,0 */
- .long 0x7ead0ef5 /* <+3972>: extswsli. r13,r21,1 */
- .long 0x7eadfef7 /* <+3976>: extswsli. r13,r21,63 */
- .long 0x11d6b885 /* <+3980>: vrlwmi v14,v22,v23 */
- .long 0x11f7c0c5 /* <+3984>: vrldmi v15,v23,v24 */
- .long 0x1218c985 /* <+3988>: vrlwnm v16,v24,v25 */
- .long 0x1239d1c5 /* <+3992>: vrldnm v17,v25,v26 */
- .long 0x125addcc /* <+3996>: vbpermd v18,v26,v27 */
- .long 0x1266a602 /* <+4000>: vnegw v19,v20 */
- .long 0x1287ae02 /* <+4004>: vnegd v20,v21 */
- .long 0x12a8b602 /* <+4008>: vprtybw v21,v22 */
- .long 0x12c9be02 /* <+4012>: vprtybd v22,v23 */
- .long 0x12eac602 /* <+4016>: vprtybq v23,v24 */
- .long 0x1310ce02 /* <+4020>: vextsb2w v24,v25 */
- .long 0x1331d602 /* <+4024>: vextsh2w v25,v26 */
- .long 0x1358de02 /* <+4028>: vextsb2d v26,v27 */
- .long 0x1379e602 /* <+4032>: vextsh2d v27,v28 */
- .long 0x139aee02 /* <+4036>: vextsw2d v28,v29 */
- .long 0x13bcf602 /* <+4040>: vctzb v29,v30 */
- .long 0x13ddfe02 /* <+4044>: vctzh v30,v31 */
- .long 0x13fef602 /* <+4048>: vctzw v31,v30 */
- .long 0x13dfee02 /* <+4052>: vctzd v30,v29 */
- .long 0x7d40a61a /* <+4056>: lxsibzx vs10,0,r20 */
- .long 0x7e4aa61b /* <+4060>: lxsibzx vs50,r10,r20 */
- .long 0x7d60ae5a /* <+4064>: lxsihzx vs11,0,r21 */
- .long 0x7e6bae5b /* <+4068>: lxsihzx vs51,r11,r21 */
- .long 0x7d80b71a /* <+4072>: stxsibx vs12,0,r22 */
- .long 0x7e8cb71b /* <+4076>: stxsibx vs52,r12,r22 */
- .long 0x7da0bf5a /* <+4080>: stxsihx vs13,0,r23 */
- .long 0x7eadbf5b /* <+4084>: stxsihx vs53,r13,r23 */
- .long 0x114b6370 /* <+4088>: maddhd r10,r11,r12,r13 */
- .long 0x1295b5f1 /* <+4092>: maddhdu r20,r21,r22,r23 */
- .long 0x10432173 /* <+4096>: maddld r2,r3,r4,r5 */
- .long 0xf00aa1d8 /* <+4100>: xscmpexpdp cr0,vs10,vs20 */
- .long 0xf38891de /* <+4104>: xscmpexpdp cr7,vs40,vs50 */
- .long 0xf12baf2d /* <+4108>: xsiexpdp vs41,r11,r21 */
- .long 0xf07f5da8 /* <+4112>: xststdcdp cr0,vs11,127 */
- .long 0xf3ff4daa /* <+4116>: xststdcdp cr7,vs41,127 */
- .long 0xf07f5ca8 /* <+4120>: xststdcsp cr0,vs11,127 */
- .long 0xf3ff4caa /* <+4124>: xststdcsp cr7,vs41,127 */
- .long 0xf1a05d6e /* <+4128>: xsxexpdp r13,vs43 */
- .long 0xf1c1656e /* <+4132>: xsxsigdp r14,vs44 */
- .long 0xf1ae7fc7 /* <+4136>: xviexpdp vs45,vs46,vs47 */
- .long 0xf1cf86c7 /* <+4140>: xviexpsp vs46,vs47,vs48 */
- .long 0xf2c0bfab /* <+4144>: xvtstdcdp vs54,vs55,0 */
- .long 0xf2dfbfef /* <+4148>: xvtstdcdp vs54,vs55,127 */
- .long 0xf2e0c6ab /* <+4152>: xvtstdcsp vs55,vs56,0 */
- .long 0xf2ffc6ef /* <+4156>: xvtstdcsp vs55,vs56,127 */
- .long 0xf320d76f /* <+4160>: xvxexpdp vs57,vs58 */
- .long 0xf348df6f /* <+4164>: xvxexpsp vs58,vs59 */
- .long 0xf361e76f /* <+4168>: xvxsigdp vs59,vs60 */
- .long 0xf389ef6f /* <+4172>: xvxsigsp vs60,vs61 */
- .long 0x7c0639c0 /* <+4176>: cmpeqb cr0,r6,r7 */
- .long 0x7f8639c0 /* <+4180>: cmpeqb cr7,r6,r7 */
- .long 0x7c084980 /* <+4184>: cmprb cr0,0,r8,r9 */
- .long 0x7f884980 /* <+4188>: cmprb cr7,0,r8,r9 */
- .long 0x7c284980 /* <+4192>: cmprb cr0,1,r8,r9 */
- .long 0x7fa84980 /* <+4196>: cmprb cr7,1,r8,r9 */
- .long 0x7de00100 /* <+4200>: setb r15,cr0 */
- .long 0x7dfc0100 /* <+4204>: setb r15,cr7 */
- .long 0x7f40521a /* <+4208>: lxvl vs26,0,r10 */
- .long 0x7f14521b /* <+4212>: lxvl vs56,r20,r10 */
- .long 0x7f605b1a /* <+4216>: stxvl vs27,0,r11 */
- .long 0x7f355b1b /* <+4220>: stxvl vs57,r21,r11 */
- .long 0x1280f602 /* <+4224>: vclzlsbb r20,v30 */
- .long 0x12a1fe02 /* <+4228>: vctzlsbb r21,v31 */
- .long 0x114b6007 /* <+4232>: vcmpneb v10,v11,v12 */
- .long 0x1295b407 /* <+4236>: vcmpneb. v20,v21,v22 */
- .long 0x116c6847 /* <+4240>: vcmpneh v11,v12,v13 */
- .long 0x12b6bc47 /* <+4244>: vcmpneh. v21,v22,v23 */
- .long 0x118d7087 /* <+4248>: vcmpnew v12,v13,v14 */
- .long 0x12d7c487 /* <+4252>: vcmpnew. v22,v23,v24 */
- .long 0x11ae7907 /* <+4256>: vcmpnezb v13,v14,v15 */
- .long 0x12f8cd07 /* <+4260>: vcmpnezb. v23,v24,v25 */
- .long 0x11cf8147 /* <+4264>: vcmpnezh v14,v15,v16 */
- .long 0x1319d547 /* <+4268>: vcmpnezh. v24,v25,v26 */
- .long 0x11f08987 /* <+4272>: vcmpnezw v15,v16,v17 */
- .long 0x133add87 /* <+4276>: vcmpnezw. v25,v26,v27 */
- .long 0x1211560d /* <+4280>: vextublx r16,r17,v10 */
- .long 0x12325f0d /* <+4284>: vextubrx r17,r18,v11 */
- .long 0x1253664d /* <+4288>: vextuhlx r18,r19,v12 */
- .long 0x12746f4d /* <+4292>: vextuhrx r19,r20,v13 */
- .long 0x1295768d /* <+4296>: vextuwlx r20,r21,v14 */
- .long 0x12b67f8d /* <+4300>: vextuwrx r21,r22,v15 */
- .long 0xec001d46 /* <+4304>: dtstsfi cr0,0,f3 */
- .long 0xefbf1d46 /* <+4308>: dtstsfi cr7,63,f3 */
- .long 0xfc002546 /* <+4312>: dtstsfiq cr0,0,f4 */
- .long 0xffbf2546 /* <+4316>: dtstsfiq cr7,63,f4 */
- .long 0xf110956f /* <+4320>: xscvhpdp vs40,vs50 */
- .long 0xf1319d6f /* <+4324>: xscvdphp vs41,vs51 */
- .long 0xf158a76f /* <+4328>: xvcvhpsp vs42,vs52 */
- .long 0xf179af6f /* <+4332>: xvcvsphp vs43,vs53 */
- .long 0x4c600004 /* <+4336>: addpcis r3,0 */
- .long 0x4c600004 /* <+4340>: addpcis r3,0 */
- .long 0x4c800005 /* <+4344>: addpcis r4,1 */
- .long 0x4c800005 /* <+4348>: addpcis r4,1 */
- .long 0x4cbfffc4 /* <+4352>: addpcis r5,-2 */
- .long 0x4cbfffc4 /* <+4356>: addpcis r5,-2 */
- .long 0x4cdf7fc5 /* <+4360>: addpcis r6,32767 */
- .long 0x4cdf7fc5 /* <+4364>: addpcis r6,32767 */
- .long 0x4ce08004 /* <+4368>: addpcis r7,-32768 */
- .long 0x4ce08004 /* <+4372>: addpcis r7,-32768 */
- .long 0x7c0002a4 /* <+4376>: slbsync */
- .long 0x7d405ba4 /* <+4380>: slbieg r10,r11 */
- .long 0x7c602726 /* <+4384>: slbmfee r3,r4 */
- .long 0x7c602726 /* <+4388>: slbmfee r3,r4 */
- .long 0x7c612726 /* <+4392>: slbmfee r3,r4,1 */
- .long 0x7c802ea6 /* <+4396>: slbmfev r4,r5 */
- .long 0x7c802ea6 /* <+4400>: slbmfev r4,r5 */
- .long 0x7c812ea6 /* <+4404>: slbmfev r4,r5,1 */
- .long 0x7c801a64 /* <+4408>: tlbie r3,r4 */
- .long 0x7c801a64 /* <+4412>: tlbie r3,r4 */
- .long 0x7c8f1a64 /* <+4416>: tlbie r3,r4,3,1,1 */
- .long 0x7c001a24 /* <+4420>: tlbiel r3 */
- .long 0x7c001a24 /* <+4424>: tlbiel r3 */
- .long 0x7c8f1a24 /* <+4428>: tlbiel r3,r4,3,1,1 */
- .long 0x7c2c6e0c /* <+4432>: copy r12,r13 */
- .long 0x7c2a5f0d /* <+4436>: paste. r10,r11 */
- .long 0x7c00068c /* <+4440>: cpabort */
- .long 0x7c0004ac /* <+4444>: hwsync */
- .long 0x7c0004ac /* <+4448>: hwsync */
- .long 0x7c0004ac /* <+4452>: hwsync */
- .long 0x7c2004ac /* <+4456>: lwsync */
- .long 0x7c2004ac /* <+4460>: lwsync */
- .long 0x7c4004ac /* <+4464>: ptesync */
- .long 0x7c4004ac /* <+4468>: ptesync */
- .long 0x7e8004cc /* <+4472>: ldat r20,0,0 */
- .long 0x7e8ae4cc /* <+4476>: ldat r20,r10,28 */
- .long 0x7ea0048c /* <+4480>: lwat r21,0,0 */
- .long 0x7eabe48c /* <+4484>: lwat r21,r11,28 */
- .long 0x7ec005cc /* <+4488>: stdat r22,0,0 */
- .long 0x7ecce5cc /* <+4492>: stdat r22,r12,28 */
- .long 0x7ee0058c /* <+4496>: stwat r23,0,0 */
- .long 0x7eede58c /* <+4500>: stwat r23,r13,28 */
- .long 0x4c000264 /* <+4504>: urfid */
- .long 0x7c00f6e4 /* <+4508>: rmieg r30 */
- .long 0x7d407a6a /* <+4512>: ldmx r10,0,r15 */
- .long 0x7d437a6a /* <+4516>: ldmx r10,r3,r15 */
- .long 0x4c0002e4 /* <+4520>: stop */
- .long 0x7c00003c /* <+4524>: wait */
- .long 0x7c00003c /* <+4528>: wait */
- .long 0x7c6005e6 /* <+4532>: darn r3,0 */
- .long 0x7c6105e6 /* <+4536>: darn r3,1 */
- .long 0x7c6205e6 /* <+4540>: darn r3,2 */
- .long 0x7c000480 /* <+4544>: mcrxrx cr0 */
- .long 0x7f800480 /* <+4548>: mcrxrx cr7 */
- .long 0x1295b744 /* <+4552>: vslv v20,v21,v22 */
- .long 0x12f8cf04 /* <+4556>: vsrv v23,v24,v25 */
- .long 0x7c0006ec /* <+4560>: msgsync */
- .long 0xf3c8901e /* <+4564>: xscmpeqdp vs30,vs40,vs50 */
- .long 0xf3e9985e /* <+4568>: xscmpgtdp vs31,vs41,vs51 */
- .long 0xf00aa09f /* <+4572>: xscmpgedp vs32,vs42,vs52 */
- .long 0xf04cb447 /* <+4576>: xsmincdp vs34,vs44,vs54 */
- .long 0xf06dbc07 /* <+4580>: xsmaxcdp vs35,vs45,vs55 */
- .long 0xf08ec4c7 /* <+4584>: xsminjdp vs36,vs46,vs56 */
- .long 0xf0afcc87 /* <+4588>: xsmaxjdp vs37,vs47,vs57 */
- .long 0x1295b5e3 /* <+4592>: vmsumudm v20,v21,v22,v23 */
- .long 0x7d6c6954 /* <+4596>: addex r11,r12,r13,0 */
- .long 0x7d6c6b54 /* <+4600>: addex r11,r12,r13,1 */
- .long 0x7d6c6d54 /* <+4604>: addex r11,r12,r13,2 */
- .long 0xff20048e /* <+4608>: mffs f25 */
- .long 0xff20048f /* <+4612>: mffs. f25 */
- .long 0xff41048e /* <+4616>: mffsce f26 */
- .long 0xff74a48e /* <+4620>: mffscdrn f27,f20 */
- .long 0xff95048e /* <+4624>: mffscdrni f28,0 */
- .long 0xff953c8e /* <+4628>: mffscdrni f28,7 */
- .long 0xffb6ac8e /* <+4632>: mffscrn f29,f21 */
- .long 0xffd7048e /* <+4636>: mffscrni f30,0 */
- .long 0xffd71c8e /* <+4640>: mffscrni f30,3 */
- .long 0xfff8048e /* <+4644>: mffsl f31 */
- .long 0x7d4006a4 /* <+4648>: slbiag r10 */
-
-## altivec3.d
- .long 0x117e0001 /* <+4652>: vmul10cuq v11,v30 */
- .long 0x13c1b807 /* <+4656>: vcmpneb v30,v1,v23 */
- .long 0x13d3f77b /* <+4660>: vpermr v30,v19,v30,v29 */
- .long 0x12948841 /* <+4664>: vmul10ecuq v20,v20,v17 */
- .long 0x1373f847 /* <+4668>: vcmpneh v27,v19,v31 */
- .long 0x10c9b885 /* <+4672>: vrlwmi v6,v9,v23 */
- .long 0x12da0887 /* <+4676>: vcmpnew v22,v26,v1 */
- .long 0x131ec8c5 /* <+4680>: vrldmi v24,v30,v25 */
- .long 0x127db107 /* <+4684>: vcmpnezb v19,v29,v22 */
- .long 0x11179947 /* <+4688>: vcmpnezh v8,v23,v19 */
- .long 0x13785985 /* <+4692>: vrlwnm v27,v24,v11 */
- .long 0x12ad5187 /* <+4696>: vcmpnezw v21,v13,v10 */
- .long 0x10b4e9c5 /* <+4700>: vrldnm v5,v20,v29 */
- .long 0x13d30201 /* <+4704>: vmul10uq v30,v19 */
- .long 0x130caa0d /* <+4708>: vextractub v24,v21,12 */
- .long 0x1013e241 /* <+4712>: vmul10euq v0,v19,v28 */
- .long 0x114c1a4d /* <+4716>: vextractuh v10,v3,12 */
- .long 0x1387628d /* <+4720>: vextractuw v28,v12,7 */
- .long 0x13c1dacd /* <+4724>: vextractd v30,v27,1 */
- .long 0x1324fb0d /* <+4728>: vinsertb v25,v31,4 */
- .long 0x12aef341 /* <+4732>: bcdcpsgn. v21,v14,v30 */
- .long 0x12c5934d /* <+4736>: vinserth v22,v18,5 */
- .long 0x13a1b38d /* <+4740>: vinsertw v29,v22,1 */
- .long 0x13a76bcd /* <+4744>: vinsertd v29,v13,7 */
- .long 0x12d94407 /* <+4748>: vcmpneb. v22,v25,v8 */
- .long 0x120fac47 /* <+4752>: vcmpneh. v16,v15,v21 */
- .long 0x12d5fc81 /* <+4756>: bcdus. v22,v21,v31 */
- .long 0x102c6487 /* <+4760>: vcmpnew. v1,v12,v12 */
- .long 0x10a346c1 /* <+4764>: bcds. v5,v3,v8,1 */
- .long 0x13760d01 /* <+4768>: bcdtrunc. v27,v22,v1,0 */
- .long 0x105a0507 /* <+4772>: vcmpnezb. v2,v26,v0 */
- .long 0x134e3d41 /* <+4776>: bcdutrunc. v26,v14,v7 */
- .long 0x12056547 /* <+4780>: vcmpnezh. v16,v5,v12 */
- .long 0x13002d81 /* <+4784>: bcdctsq. v24,v5 */
- .long 0x10e20581 /* <+4788>: bcdcfsq. v7,v0,0 */
- .long 0x13c46781 /* <+4792>: bcdctz. v30,v12,1 */
- .long 0x1225bd81 /* <+4796>: bcdctn. v17,v23 */
- .long 0x10867f81 /* <+4800>: bcdcfz. v4,v15,1 */
- .long 0x13a72f81 /* <+4804>: bcdcfn. v29,v5,1 */
- .long 0x137f6581 /* <+4808>: bcdsetsgn. v27,v12,0 */
- .long 0x11dccd87 /* <+4812>: vcmpnezw. v14,v28,v25 */
- .long 0x104237c1 /* <+4816>: bcdsr. v2,v2,v6,1 */
- .long 0x13202dcc /* <+4820>: vbpermd v25,v0,v5 */
- .long 0x1380ce02 /* <+4824>: vclzlsbb r28,v25 */
- .long 0x1041c602 /* <+4828>: vctzlsbb r2,v24 */
- .long 0x12a65e02 /* <+4832>: vnegw v21,v11 */
- .long 0x1227de02 /* <+4836>: vnegd v17,v27 */
- .long 0x13e8be02 /* <+4840>: vprtybw v31,v23 */
- .long 0x12a9be02 /* <+4844>: vprtybd v21,v23 */
- .long 0x12aa9602 /* <+4848>: vprtybq v21,v18 */
- .long 0x13d02602 /* <+4852>: vextsb2w v30,v4 */
- .long 0x1071d602 /* <+4856>: vextsh2w v3,v26 */
- .long 0x11788e02 /* <+4860>: vextsb2d v11,v17 */
- .long 0x10b95602 /* <+4864>: vextsh2d v5,v10 */
- .long 0x11bace02 /* <+4868>: vextsw2d v13,v25 */
- .long 0x133c1602 /* <+4872>: vctzb v25,v2 */
- .long 0x101d1e02 /* <+4876>: vctzh v0,v3 */
- .long 0x12de3602 /* <+4880>: vctzw v22,v6 */
- .long 0x135fc602 /* <+4884>: vctzd v26,v24 */
- .long 0x10df160d /* <+4888>: vextublx r6,r31,v2 */
- .long 0x11a0964d /* <+4892>: vextuhlx r13,r0,v18 */
- .long 0x11defe8d /* <+4896>: vextuwlx r14,r30,v31 */
- .long 0x11ec7704 /* <+4900>: vsrv v15,v12,v14 */
- .long 0x128af70d /* <+4904>: vextubrx r20,r10,v30 */
- .long 0x12b51744 /* <+4908>: vslv v21,v21,v2 */
- .long 0x11e90f4d /* <+4912>: vextuhrx r15,r9,v1 */
- .long 0x12b1878d /* <+4916>: vextuwrx r21,r17,v16 */
- .long 0x1295b5e3 /* <+4920>: vmsumudm v20,v21,v22,v23 */
-## vsx3.d
- .long 0x7c46ca19 /* <+4924>: lxvx vs34,r6,r25 */
- .long 0x7e805218 /* <+4928>: lxvx vs20,0,r10 */
- .long 0x7e98521a /* <+4932>: lxvl vs20,r24,r10 */
- .long 0x7ec0ea1b /* <+4936>: lxvl vs54,0,r29 */
- .long 0x7f149a5a /* <+4940>: lxvll vs24,r20,r19 */
- .long 0x7c40725b /* <+4944>: lxvll vs34,0,r14 */
- .long 0x7ec20266 /* <+4948>: mfvsrld r2,vs22 */
- .long 0x7f5acad9 /* <+4952>: lxvwsx vs58,r26,r25 */
- .long 0x7ee0ead9 /* <+4956>: lxvwsx vs55,0,r29 */
- .long 0x7dd52318 /* <+4960>: stxvx vs14,r21,r4 */
- .long 0x7fc0b318 /* <+4964>: stxvx vs30,0,r22 */
- .long 0x7c1a231a /* <+4968>: stxvl vs0,r26,r4 */
- .long 0x7ca0b31b /* <+4972>: stxvl vs37,0,r22 */
- .long 0x7f0a0326 /* <+4976>: mtvsrws vs24,r10 */
- .long 0x7fd57b5a /* <+4980>: stxvll vs30,r21,r15 */
- .long 0x7ce0735b /* <+4984>: stxvll vs39,0,r14 */
- .long 0x7d862b66 /* <+4988>: mtvsrdd vs12,r6,r5 */
- .long 0x7cc0ab67 /* <+4992>: mtvsrdd vs38,0,r21 */
- .long 0x7f7c361b /* <+4996>: lxsibzx vs59,r28,r6 */
- .long 0x7fc0461a /* <+5000>: lxsibzx vs30,0,r8 */
- .long 0x7d578e59 /* <+5004>: lxvh8x vs42,r23,r17 */
- .long 0x7c802e59 /* <+5008>: lxvh8x vs36,0,r5 */
- .long 0x7d895e5a /* <+5012>: lxsihzx vs12,r9,r11 */
- .long 0x7e206e5b /* <+5016>: lxsihzx vs49,0,r13 */
- .long 0x7ca39ed9 /* <+5020>: lxvb16x vs37,r3,r19 */
- .long 0x7c00f6d8 /* <+5024>: lxvb16x vs0,0,r30 */
- .long 0x7c5e371a /* <+5028>: stxsibx vs2,r30,r6 */
- .long 0x7d806f1a /* <+5032>: stxsibx vs12,0,r13 */
- .long 0x7e1d4758 /* <+5036>: stxvh8x vs16,r29,r8 */
- .long 0x7ee05759 /* <+5040>: stxvh8x vs55,0,r10 */
- .long 0x7c42bf5b /* <+5044>: stxsihx vs34,r2,r23 */
- .long 0x7f80bf5b /* <+5048>: stxsihx vs60,0,r23 */
- .long 0x7eee67d8 /* <+5052>: stxvb16x vs23,r14,r12 */
- .long 0x7e602fd8 /* <+5056>: stxvb16x vs19,0,r5 */
- .long 0xe7000002 /* <+5060>: lxsd v24,0(0) */
- .long 0xe5f50012 /* <+5064>: lxsd v15,16(r21) */
- .long 0xe4c00003 /* <+5068>: lxssp v6,0(0) */
- .long 0xe6e90013 /* <+5072>: lxssp v23,16(r9) */
- .long 0xf253081e /* <+5076>: xscmpeqdp vs18,vs51,vs33 */
- .long 0xf05a105a /* <+5080>: xscmpgtdp vs2,vs26,vs34 */
- .long 0xf0baa098 /* <+5084>: xscmpgedp vs5,vs26,vs20 */
- .long 0xf18a58d3 /* <+5088>: xxperm vs44,vs10,vs43 */
- .long 0xf13429d1 /* <+5092>: xxpermr vs41,vs20,vs5 */
- .long 0xf212b9da /* <+5096>: xscmpexpdp cr4,vs18,vs55 */
- .long 0xf2e32a96 /* <+5100>: xxextractuw vs23,vs37,3 */
- .long 0xf2c75ad1 /* <+5104>: xxspltib vs54,235 */
- .long 0xf1e4f2d4 /* <+5108>: xxinsertw vs15,vs30,4 */
- .long 0xf18b3c00 /* <+5112>: xsmaxcdp vs12,vs11,vs7 */
- .long 0xf019c441 /* <+5116>: xsmincdp vs32,vs25,vs24 */
- .long 0xf3356484 /* <+5120>: xsmaxjdp vs25,vs53,vs12 */
- .long 0xf17f24aa /* <+5124>: xststdcsp cr2,vs36,127 */
- .long 0xf0156cc3 /* <+5128>: xsminjdp vs32,vs21,vs45 */
- .long 0xf220956e /* <+5132>: xsxexpdp r17,vs50 */
- .long 0xf0e1456e /* <+5136>: xsxsigdp r7,vs40 */
- .long 0xf2d0156f /* <+5140>: xscvhpdp vs54,vs34 */
- .long 0xf351b56f /* <+5144>: xscvdphp vs58,vs54 */
- .long 0xf07f35aa /* <+5148>: xststdcdp cr0,vs38,127 */
- .long 0xf31faeef /* <+5152>: xvtstdcsp vs56,vs53,127 */
- .long 0xf2d4a6c3 /* <+5156>: xviexpsp vs54,vs20,vs52 */
- .long 0xf33cef2d /* <+5160>: xsiexpdp vs57,r28,r29 */
- .long 0xf020a76c /* <+5164>: xvxexpdp vs1,vs20 */
- .long 0xf2c1df6f /* <+5168>: xvxsigdp vs54,vs59 */
- .long 0xf2472f6e /* <+5172>: xxbrh vs18,vs37 */
- .long 0xf1c80f6c /* <+5176>: xvxexpsp vs14,vs1 */
- .long 0xf2896f6d /* <+5180>: xvxsigsp vs52,vs13 */
- .long 0xf26f2f6c /* <+5184>: xxbrw vs19,vs5 */
- .long 0xf277bf6f /* <+5188>: xxbrd vs51,vs55 */
- .long 0xf0788f6d /* <+5192>: xvcvhpsp vs35,vs17 */
- .long 0xf1f96f6e /* <+5196>: xvcvsphp vs15,vs45 */
- .long 0xf23fff6c /* <+5200>: xxbrq vs17,vs31 */
- .long 0xf21f67ec /* <+5204>: xvtstdcdp vs16,vs12,127 */
- .long 0xf36947c0 /* <+5208>: xviexpdp vs27,vs9,vs8 */
- .long 0xf4800001 /* <+5212>: lxv vs4,0(0) */
- .long 0xf5140019 /* <+5216>: lxv vs40,16(r20) */
- .long 0xf640000d /* <+5220>: stxv vs50,0(0) */
- .long 0xf5100015 /* <+5224>: stxv vs8,16(r16) */
- .long 0xf4600002 /* <+5228>: stxsd v3,0(0) */
- .long 0xf6220012 /* <+5232>: stxsd v17,16(r2) */
- .long 0xf5a00003 /* <+5236>: stxssp v13,0(0) */
- .long 0xf62d0013 /* <+5240>: stxssp v17,16(r13) */
- .long 0xfd0a9008 /* <+5244>: xsaddqp v8,v10,v18 */
- .long 0xfca1e809 /* <+5248>: xsaddqpo v5,v1,v29 */
- .long 0xfd80960a /* <+5252>: xsrqpi 0,v12,v18,3 */
- .long 0xffe1980b /* <+5256>: xsrqpix 1,v31,v19,0 */
- .long 0xfdc13048 /* <+5260>: xsmulqp v14,v1,v6 */
- .long 0xfe27d849 /* <+5264>: xsmulqpo v17,v7,v27 */
- .long 0xfc80584a /* <+5268>: xsrqpxp 0,v4,v11,0 */
- .long 0xffb7e0c8 /* <+5272>: xscpsgnqp v29,v23,v28 */
- .long 0xff8dd908 /* <+5276>: xscmpoqp cr7,v13,v27 */
- .long 0xfe953148 /* <+5280>: xscmpexpqp cr5,v21,v6 */
- .long 0xfc532308 /* <+5284>: xsmaddqp v2,v19,v4 */
- .long 0xffc78309 /* <+5288>: xsmaddqpo v30,v7,v16 */
- .long 0xfebe7b48 /* <+5292>: xsmsubqp v21,v30,v15 */
- .long 0xfd91f349 /* <+5296>: xsmsubqpo v12,v17,v30 */
- .long 0xfcde6388 /* <+5300>: xsnmaddqp v6,v30,v12 */
- .long 0xfd966389 /* <+5304>: xsnmaddqpo v12,v22,v12 */
- .long 0xfd5ddbc8 /* <+5308>: xsnmsubqp v10,v29,v27 */
- .long 0xffbd6bc9 /* <+5312>: xsnmsubqpo v29,v29,v13 */
- .long 0xfe7b2408 /* <+5316>: xssubqp v19,v27,v4 */
- .long 0xfda80c09 /* <+5320>: xssubqpo v13,v8,v1 */
- .long 0xfd03dc48 /* <+5324>: xsdivqp v8,v3,v27 */
- .long 0xff14dc49 /* <+5328>: xsdivqpo v24,v20,v27 */
- .long 0xff8e2508 /* <+5332>: xscmpuqp cr7,v14,v4 */
- .long 0xfe7f1588 /* <+5336>: xststdcqp cr4,v2,127 */
- .long 0xffe0b648 /* <+5340>: xsabsqp v31,v22 */
- .long 0xff221e48 /* <+5344>: xsxexpqp v25,v3 */
- .long 0xfd48e648 /* <+5348>: xsnabsqp v10,v28 */
- .long 0xfe70fe48 /* <+5352>: xsnegqp v19,v31 */
- .long 0xfd726e48 /* <+5356>: xsxsigqp v11,v13 */
- .long 0xfdbb7648 /* <+5360>: xssqrtqp v13,v14 */
- .long 0xfc3bde49 /* <+5364>: xssqrtqpo v1,v27 */
- .long 0xfc613e88 /* <+5368>: xscvqpuwz v3,v7 */
- .long 0xfe829688 /* <+5372>: xscvudqp v20,v18 */
- .long 0xffa9ee88 /* <+5376>: xscvqpswz v29,v29 */
- .long 0xfc4ae688 /* <+5380>: xscvsdqp v2,v28 */
- .long 0xfef12688 /* <+5384>: xscvqpudz v23,v4 */
- .long 0xfc74a688 /* <+5388>: xscvqpdp v3,v20 */
- .long 0xfc341e89 /* <+5392>: xscvqpdpo v1,v3 */
- .long 0xfe766688 /* <+5396>: xscvdpqp v19,v12 */
- .long 0xfdb92688 /* <+5400>: xscvqpsdz v13,v4 */
- .long 0xfcf83ec8 /* <+5404>: xsiexpqp v7,v24,v7 */
diff --git a/gdb/testsuite/gdb.arch/powerpc-power7.exp b/gdb/testsuite/gdb.arch/powerpc-power7.exp
new file mode 100644
index 0000000..ae48eec
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-power7.exp
@@ -0,0 +1,164 @@
+# Copyright 2014-2017 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.
+
+# Test PowerPC instructions disassembly.
+
+standard_testfile .s
+set objfile [standard_output_file ${testfile}.o]
+
+if {![istarget "powerpc*-*-*"]} then {
+ verbose "Skipping PowerPC instructions disassembly."
+ return
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${objfile}" object {debug}] != "" } {
+ untested "PowerPC instructions disassembly"
+ return -1
+}
+
+clean_restart ${objfile}
+
+# Disassemble the function.
+set func ""
+
+gdb_test "set disassembler-options power7"
+set test "disass func"
+gdb_test_multiple $test $test {
+ -re "\r\nDump of assembler code for function func:(\r\n.*\r\n)End of assembler dump.\r\n$gdb_prompt $" {
+ set func $expect_out(1,string)
+ pass $test
+ }
+}
+
+proc instr_to_patt {instr} {
+ global decimal hex
+ # 0x0000000000000018 <+24>: stxvd2x vs43,r4,r5
+ return "\[ \t\]*$hex <\\+$decimal>:\[ \t\]*[string_to_regexp $instr]"
+}
+
+proc func_check {instr} {
+ global func
+
+ set test "found: $instr"
+ if [regexp -nocase -line [instr_to_patt $instr] $func] {
+ pass $test
+ } else {
+ fail $test
+ }
+}
+
+func_check "lxvd2x vs3,r4,r5"
+func_check "lxvd2x vs43,r4,r5"
+func_check "stxvd2x vs3,r4,r5"
+func_check "stxvd2x vs43,r4,r5"
+func_check "xxmrghd vs3,vs4,vs5"
+func_check "xxmrghd vs43,vs44,vs45"
+func_check "xxmrgld vs3,vs4,vs5"
+func_check "xxmrgld vs43,vs44,vs45"
+func_check "xxmrghd vs3,vs4,vs5"
+func_check "xxmrghd vs43,vs44,vs45"
+func_check "xxmrgld vs3,vs4,vs5"
+func_check "xxmrgld vs43,vs44,vs45"
+func_check "xxpermdi vs3,vs4,vs5,1"
+func_check "xxpermdi vs43,vs44,vs45,1"
+func_check "xxpermdi vs3,vs4,vs5,2"
+func_check "xxpermdi vs43,vs44,vs45,2"
+func_check "xvmovdp vs3,vs4"
+func_check "xvmovdp vs43,vs44"
+func_check "xvmovdp vs3,vs4"
+func_check "xvmovdp vs43,vs44"
+func_check "xvcpsgndp vs3,vs4,vs5"
+func_check "xvcpsgndp vs43,vs44,vs45"
+func_check "doze"
+func_check "nap"
+func_check "sleep"
+func_check "rvwinkle"
+func_check "prtyw r3,r4"
+func_check "prtyd r13,r14"
+func_check "mfcfar r10"
+func_check "mtcfar r11"
+func_check "cmpb r3,r4,r5"
+func_check "lwzcix r10,r11,r12"
+func_check "dadd f16,f17,f18"
+func_check "daddq f20,f22,f24"
+func_check "dss 3"
+func_check "dssall"
+func_check "dst r5,r4,1"
+func_check "dstt r8,r7,0"
+func_check "dstst r5,r6,3"
+func_check "dststt r4,r5,2"
+func_check "divwe r10,r11,r12"
+func_check "divwe. r11,r12,r13"
+func_check "divweo r12,r13,r14"
+func_check "divweo. r13,r14,r15"
+func_check "divweu r10,r11,r12"
+func_check "divweu. r11,r12,r13"
+func_check "divweuo r12,r13,r14"
+func_check "divweuo. r13,r14,r15"
+func_check "bpermd r7,r17,r27"
+func_check "popcntw r10,r20"
+func_check "popcntd r10,r20"
+func_check "ldbrx r20,r21,r22"
+func_check "stdbrx r20,r21,r22"
+func_check "lfiwzx f10,0,r10"
+func_check "lfiwzx f10,r9,r10"
+func_check "fcfids f4,f5"
+func_check "fcfids. f4,f5"
+func_check "fcfidus f4,f5"
+func_check "fcfidus. f4,f5"
+func_check "fctiwu f4,f5"
+func_check "fctiwu. f4,f5"
+func_check "fctiwuz f4,f5"
+func_check "fctiwuz. f4,f5"
+func_check "fctidu f4,f5"
+func_check "fctidu. f4,f5"
+func_check "fctiduz f4,f5"
+func_check "fctiduz. f4,f5"
+func_check "fcfidu f4,f5"
+func_check "fcfidu. f4,f5"
+func_check "ftdiv cr0,f10,f11"
+func_check "ftdiv cr7,f10,f11"
+func_check "ftsqrt cr0,f10"
+func_check "ftsqrt cr7,f10"
+func_check "dcbtt r8,r9"
+func_check "dcbtstt r8,r9"
+func_check "dcffix f10,f12"
+func_check "dcffix. f20,f22"
+func_check "fre f14,f15"
+func_check "fre. f14,f15"
+func_check "fres f14,f15"
+func_check "fres. f14,f15"
+func_check "frsqrte f14,f15"
+func_check "frsqrte. f14,f15"
+func_check "frsqrtes f14,f15"
+func_check "frsqrtes. f14,f15"
+func_check "isel r2,r3,r4,28"
+func_check "yield"
+func_check "yield"
+func_check "ori r2,r2,0"
+func_check "nop"
+func_check "nop"
+func_check "ori r2,r2,0"
+func_check "mdoio"
+func_check "mdoio"
+func_check "mdoom"
+func_check "mdoom"
+func_check "mfppr r10"
+func_check "mfppr32 r11"
+func_check "mtppr r12"
+func_check "mtppr32 r13"
+func_check "tlbie r10,r11"
diff --git a/gdb/testsuite/gdb.arch/powerpc-power7.s b/gdb/testsuite/gdb.arch/powerpc-power7.s
new file mode 100644
index 0000000..c7b1858
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-power7.s
@@ -0,0 +1,121 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+ Copyright 2014-2017 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+ .text
+ .globl func
+func:
+ .long 0x7c642e98 /* lxvd2x vs3,r4,r5 */
+ .long 0x7d642e99 /* lxvd2x vs43,r4,r5 */
+ .long 0x7c642f98 /* stxvd2x vs3,r4,r5 */
+ .long 0x7d642f99 /* stxvd2x vs43,r4,r5 */
+ .long 0xf0642850 /* xxmrghd vs3,vs4,vs5 */
+ .long 0xf16c6857 /* xxmrghd vs43,vs44,vs45 */
+ .long 0xf0642b50 /* xxmrgld vs3,vs4,vs5 */
+ .long 0xf16c6b57 /* xxmrgld vs43,vs44,vs45 */
+ .long 0xf0642850 /* xxmrghd vs3,vs4,vs5 */
+ .long 0xf16c6857 /* xxmrghd vs43,vs44,vs45 */
+ .long 0xf0642b50 /* xxmrgld vs3,vs4,vs5 */
+ .long 0xf16c6b57 /* xxmrgld vs43,vs44,vs45 */
+ .long 0xf0642950 /* xxpermdi vs3,vs4,vs5,1 */
+ .long 0xf16c6957 /* xxpermdi vs43,vs44,vs45,1 */
+ .long 0xf0642a50 /* xxpermdi vs3,vs4,vs5,2 */
+ .long 0xf16c6a57 /* xxpermdi vs43,vs44,vs45,2 */
+ .long 0xf0642780 /* xvmovdp vs3,vs4 */
+ .long 0xf16c6787 /* xvmovdp vs43,vs44 */
+ .long 0xf0642780 /* xvmovdp vs3,vs4 */
+ .long 0xf16c6787 /* xvmovdp vs43,vs44 */
+ .long 0xf0642f80 /* xvcpsgndp vs3,vs4,vs5 */
+ .long 0xf16c6f87 /* xvcpsgndp vs43,vs44,vs45 */
+ .long 0x4c000324 /* doze */
+ .long 0x4c000364 /* nap */
+ .long 0x4c0003a4 /* sleep */
+ .long 0x4c0003e4 /* rvwinkle */
+ .long 0x7c830134 /* prtyw r3,r4 */
+ .long 0x7dcd0174 /* prtyd r13,r14 */
+ .long 0x7d5c02a6 /* mfcfar r10 */
+ .long 0x7d7c03a6 /* mtcfar r11 */
+ .long 0x7c832bf8 /* cmpb r3,r4,r5 */
+ .long 0x7d4b662a /* lwzcix r10,r11,r12 */
+ .long 0xee119004 /* dadd f16,f17,f18 */
+ .long 0xfe96c004 /* daddq f20,f22,f24 */
+ .long 0x7c60066c /* dss 3 */
+ .long 0x7e00066c /* dssall */
+ .long 0x7c2522ac /* dst r5,r4,1 */
+ .long 0x7e083aac /* dstt r8,r7,0 */
+ .long 0x7c6532ec /* dstst r5,r6,3 */
+ .long 0x7e442aec /* dststt r4,r5,2 */
+ .long 0x7d4b6356 /* divwe r10,r11,r12 */
+ .long 0x7d6c6b57 /* divwe. r11,r12,r13 */
+ .long 0x7d8d7756 /* divweo r12,r13,r14 */
+ .long 0x7dae7f57 /* divweo. r13,r14,r15 */
+ .long 0x7d4b6316 /* divweu r10,r11,r12 */
+ .long 0x7d6c6b17 /* divweu. r11,r12,r13 */
+ .long 0x7d8d7716 /* divweuo r12,r13,r14 */
+ .long 0x7dae7f17 /* divweuo. r13,r14,r15 */
+ .long 0x7e27d9f8 /* bpermd r7,r17,r27 */
+ .long 0x7e8a02f4 /* popcntw r10,r20 */
+ .long 0x7e8a03f4 /* popcntd r10,r20 */
+ .long 0x7e95b428 /* ldbrx r20,r21,r22 */
+ .long 0x7e95b528 /* stdbrx r20,r21,r22 */
+ .long 0x7d4056ee /* lfiwzx f10,0,r10 */
+ .long 0x7d4956ee /* lfiwzx f10,r9,r10 */
+ .long 0xec802e9c /* fcfids f4,f5 */
+ .long 0xec802e9d /* fcfids. f4,f5 */
+ .long 0xec802f9c /* fcfidus f4,f5 */
+ .long 0xec802f9d /* fcfidus. f4,f5 */
+ .long 0xfc80291c /* fctiwu f4,f5 */
+ .long 0xfc80291d /* fctiwu. f4,f5 */
+ .long 0xfc80291e /* fctiwuz f4,f5 */
+ .long 0xfc80291f /* fctiwuz. f4,f5 */
+ .long 0xfc802f5c /* fctidu f4,f5 */
+ .long 0xfc802f5d /* fctidu. f4,f5 */
+ .long 0xfc802f5e /* fctiduz f4,f5 */
+ .long 0xfc802f5f /* fctiduz. f4,f5 */
+ .long 0xfc802f9c /* fcfidu f4,f5 */
+ .long 0xfc802f9d /* fcfidu. f4,f5 */
+ .long 0xfc0a5900 /* ftdiv cr0,f10,f11 */
+ .long 0xff8a5900 /* ftdiv cr7,f10,f11 */
+ .long 0xfc005140 /* ftsqrt cr0,f10 */
+ .long 0xff805140 /* ftsqrt cr7,f10 */
+ .long 0x7e084a2c /* dcbtt r8,r9 */
+ .long 0x7e0849ec /* dcbtstt r8,r9 */
+ .long 0xed406644 /* dcffix f10,f12 */
+ .long 0xee80b645 /* dcffix. f20,f22 */
+ .long 0xfdc07830 /* fre f14,f15 */
+ .long 0xfdc07831 /* fre. f14,f15 */
+ .long 0xedc07830 /* fres f14,f15 */
+ .long 0xedc07831 /* fres. f14,f15 */
+ .long 0xfdc07834 /* frsqrte f14,f15 */
+ .long 0xfdc07835 /* frsqrte. f14,f15 */
+ .long 0xedc07834 /* frsqrtes f14,f15 */
+ .long 0xedc07835 /* frsqrtes. f14,f15 */
+ .long 0x7c43271e /* isel r2,r3,r4,28 */
+ .long 0x7f7bdb78 /* yield */
+ .long 0x7f7bdb78 /* yield */
+ .long 0x60420000 /* ori r2,r2,0 */
+ .long 0x60000000 /* nop */
+ .long 0x60000000 /* nop */
+ .long 0x60420000 /* ori r2,r2,0 */
+ .long 0x7fbdeb78 /* mdoio */
+ .long 0x7fbdeb78 /* mdoio */
+ .long 0x7fdef378 /* mdoom */
+ .long 0x7fdef378 /* mdoom */
+ .long 0x7d40e2a6 /* mfppr r10 */
+ .long 0x7d62e2a6 /* mfppr32 r11 */
+ .long 0x7d80e3a6 /* mtppr r12 */
+ .long 0x7da2e3a6 /* mtppr32 r13 */
+ .long 0x7d605264 /* tlbie r10,r11 */
diff --git a/gdb/testsuite/gdb.arch/powerpc-power8.exp b/gdb/testsuite/gdb.arch/powerpc-power8.exp
new file mode 100644
index 0000000..432dcb4
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-power8.exp
@@ -0,0 +1,248 @@
+# Copyright 2014-2017 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.
+
+# Test PowerPC instructions disassembly.
+
+standard_testfile .s
+set objfile [standard_output_file ${testfile}.o]
+
+if {![istarget "powerpc*-*-*"]} then {
+ verbose "Skipping PowerPC instructions disassembly."
+ return
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${objfile}" object {debug}] != "" } {
+ untested "PowerPC instructions disassembly"
+ return -1
+}
+
+clean_restart ${objfile}
+
+# Disassemble the function.
+set func ""
+
+gdb_test "set disassembler-options power8"
+set test "disass func"
+gdb_test_multiple $test $test {
+ -re "\r\nDump of assembler code for function func:(\r\n.*\r\n)End of assembler dump.\r\n$gdb_prompt $" {
+ set func $expect_out(1,string)
+ pass $test
+ }
+}
+
+proc instr_to_patt {instr} {
+ global decimal hex
+ # 0x0000000000000018 <+24>: stxvd2x vs43,r4,r5
+ return "\[ \t\]*$hex <\\+$decimal>:\[ \t\]*[string_to_regexp $instr]"
+}
+
+proc func_check {instr} {
+ global func
+
+ set test "found: $instr"
+ if [regexp -nocase -line [instr_to_patt $instr] $func] {
+ pass $test
+ } else {
+ fail $test
+ }
+}
+
+func_check "tabort. r5"
+func_check "tabortwc. 7,r8,r16"
+func_check "tabortdc. 20,r11,r10"
+func_check "tabortwci. 17,r10,-13"
+func_check "tabortdci. 29,r3,-5"
+func_check "tbegin. "
+func_check "tcheck cr7"
+func_check "tend. "
+func_check "tend. "
+func_check "tendall."
+func_check "tendall."
+func_check "treclaim. r24"
+func_check "trechkpt."
+func_check "tsuspend."
+func_check "tsuspend."
+func_check "tresume."
+func_check "tresume."
+func_check "ori r2,r2,0"
+func_check "nop"
+func_check "ori r2,r2,0"
+func_check "rfebb 0"
+func_check "rfebb "
+func_check "rfebb "
+func_check "bctar- 12,4*cr5+gt"
+func_check "bctarl- 4,4*cr1+so"
+func_check "bctar+ 12,4*cr3+lt"
+func_check "bctarl+ 4,eq"
+func_check "bctar 4,4*cr2+lt,1"
+func_check "bctarl 4,4*cr1+so,2"
+func_check "waitasec"
+func_check "msgsndp r8"
+func_check "mtsle 1"
+func_check "msgclrp r27"
+func_check "stqcx. r10,r10,r12"
+func_check "stqcx. r28,0,r7"
+func_check "lqarx r24,r19,r11"
+func_check "lqarx r22,0,r11"
+func_check "mfbhrbe r20,6"
+func_check "pbt. r29,r17,r16"
+func_check "pbt. r14,0,r7"
+func_check "clrbhrb"
+func_check "vpermxor v11,v10,v0,v23"
+func_check "vaddeuqm v24,v2,v7,v4"
+func_check "vaddecuq v10,v10,v8,v2"
+func_check "vsubeuqm v5,v15,v8,v19"
+func_check "vsubecuq v12,v31,v16,v29"
+func_check "vmulouw v20,v29,v13"
+func_check "vmuluwm v29,v0,v26"
+func_check "vaddudm v8,v21,v28"
+func_check "vmaxud v1,v26,v1"
+func_check "vrld v20,v3,v1"
+func_check "vcmpequd v4,v19,v11"
+func_check "vadduqm v23,v14,v30"
+func_check "vaddcuq v8,v8,v13"
+func_check "vmulosw v28,v27,v4"
+func_check "vmaxsd v3,v4,v4"
+func_check "vmuleuw v0,v19,v21"
+func_check "vminud v24,v20,v19"
+func_check "vcmpgtud v0,v28,v15"
+func_check "vmulesw v21,v0,v2"
+func_check "vminsd v9,v26,v9"
+func_check "vsrad v25,v29,v11"
+func_check "vcmpgtsd v11,v28,v11"
+func_check "bcdadd. v5,v8,v26,1"
+func_check "vpmsumb v4,v3,v12"
+func_check "bcdsub. v26,v31,v21,1"
+func_check "vpmsumh v5,v17,v16"
+func_check "vpkudum v23,v17,v20"
+func_check "vpmsumw v24,v21,v29"
+func_check "vpmsumd v9,v22,v13"
+func_check "vpkudus v18,v19,v18"
+func_check "vsubuqm v30,v16,v22"
+func_check "vcipher v14,v11,v7"
+func_check "vcipherlast v10,v2,v22"
+func_check "vgbbd v23,v13"
+func_check "vsubcuq v16,v25,v16"
+func_check "vorc v31,v1,v5"
+func_check "vncipher v4,v17,v31"
+func_check "vncipherlast v24,v2,v27"
+func_check "vbpermq v23,v21,v23"
+func_check "vpksdus v27,v18,v9"
+func_check "vnand v27,v29,v27"
+func_check "vsld v19,v19,v24"
+func_check "vsbox v5,v13"
+func_check "vpksdss v25,v3,v7"
+func_check "vcmpequd. v28,v8,v0"
+func_check "vupkhsw v26,v26"
+func_check "vshasigmaw v5,v7,0,6"
+func_check "veqv v28,v21,v14"
+func_check "vmrgow v1,v8,v19"
+func_check "vshasigmad v0,v10,0,10"
+func_check "vsrd v5,v27,v14"
+func_check "vupklsw v11,v13"
+func_check "vclzb v14,v16"
+func_check "vpopcntb v20,v27"
+func_check "vclzh v28,v11"
+func_check "vpopcnth v24,v9"
+func_check "vclzw v27,v31"
+func_check "vpopcntw v17,v19"
+func_check "vclzd v12,v29"
+func_check "vpopcntd v23,v22"
+func_check "vcmpgtud. v24,v20,v29"
+func_check "vcmpgtsd. v9,v6,v27"
+func_check "lxsiwzx vs62,r14,r26"
+func_check "lxsiwzx vs40,0,r25"
+func_check "lxsiwax vs25,0,r26"
+func_check "lxsiwax vs3,0,r3"
+func_check "mfvsrd r12,vs62"
+func_check "mffprwz r20,f12"
+func_check "stxsiwx vs14,r9,r14"
+func_check "stxsiwx vs21,0,r8"
+func_check "mtvsrd vs48,r11"
+func_check "mtvrwa v31,r23"
+func_check "mtfprwz f16,r26"
+func_check "lxsspx vs13,r19,r13"
+func_check "lxsspx vs18,0,r13"
+func_check "stxsspx vs43,r2,r4"
+func_check "stxsspx vs55,0,r11"
+func_check "xsaddsp vs54,vs48,vs25"
+func_check "xsmaddasp vs14,vs50,vs1"
+func_check "xssubsp vs26,vs22,vs42"
+func_check "xsmaddmsp vs27,vs53,vs52"
+func_check "xsrsqrtesp vs8,vs59"
+func_check "xssqrtsp vs12,vs41"
+func_check "xsmulsp vs57,vs11,vs32"
+func_check "xsmsubasp vs38,vs20,vs26"
+func_check "xsdivsp vs26,vs19,vs6"
+func_check "xsmsubmsp vs35,vs37,vs55"
+func_check "xsresp vs59,vs8"
+func_check "xsnmaddasp vs44,vs33,vs33"
+func_check "xsnmaddmsp vs17,vs62,vs30"
+func_check "xsnmsubasp vs54,vs52,vs31"
+func_check "xsnmsubmsp vs37,vs5,vs58"
+func_check "xxlorc vs30,vs54,vs44"
+func_check "xxlnand vs49,vs14,vs29"
+func_check "xxleqv vs62,vs22,vs30"
+func_check "xscvdpspn vs60,vs54"
+func_check "xsrsp vs22,vs45"
+func_check "xscvuxdsp vs26,vs59"
+func_check "xscvsxdsp vs38,vs49"
+func_check "xscvspdpn vs59,vs26"
+func_check "fmrgow f24,f14,f2"
+func_check "fmrgew f22,f7,f5"
+func_check "msgsnd r14"
+func_check "msgclr r23"
+func_check "lxvd2x vs40,0,r5"
+func_check "lxvd2x vs40,0,r5"
+func_check "lxvd2x vs10,r20,r6"
+func_check "lxvd2x vs10,r20,r6"
+func_check "stxvd2x vs41,0,r7"
+func_check "stxvd2x vs41,0,r7"
+func_check "stxvd2x vs11,r21,r8"
+func_check "stxvd2x vs11,r21,r8"
+func_check "lbarx r20,0,r7"
+func_check "lbarx r20,0,r7"
+func_check "lbarx r20,0,r7,1"
+func_check "lbarx r20,r1,r7"
+func_check "lbarx r20,r1,r7"
+func_check "lbarx r20,r1,r7,1"
+func_check "ldarx r21,0,r8"
+func_check "ldarx r21,0,r8"
+func_check "ldarx r21,0,r8,1"
+func_check "ldarx r21,r1,r8"
+func_check "ldarx r21,r1,r8"
+func_check "ldarx r21,r1,r8,1"
+func_check "lharx r22,0,r9"
+func_check "lharx r22,0,r9"
+func_check "lharx r22,0,r9,1"
+func_check "lharx r22,r1,r9"
+func_check "lharx r22,r1,r9"
+func_check "lharx r22,r1,r9,1"
+func_check "lwarx r23,0,r10"
+func_check "lwarx r23,0,r10"
+func_check "lwarx r23,0,r10,1"
+func_check "lwarx r23,r1,r10"
+func_check "lwarx r23,r1,r10"
+func_check "lwarx r23,r1,r10,1"
+func_check "stbcx. r10,0,r7"
+func_check "stbcx. r10,r1,r7"
+func_check "sthcx. r11,0,r8"
+func_check "sthcx. r11,r1,r8"
+func_check "stwcx. r12,0,r9"
+func_check "stwcx. r12,r1,r9"
+func_check "stdcx. r13,0,r10"
+func_check "stdcx. r13,r1,r10"
diff --git a/gdb/testsuite/gdb.arch/powerpc-power8.s b/gdb/testsuite/gdb.arch/powerpc-power8.s
new file mode 100644
index 0000000..3922b1b
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-power8.s
@@ -0,0 +1,205 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+ Copyright 2014-2017 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+ .text
+ .globl func
+func:
+ .long 0x7c05071d /* tabort. r5 */
+ .long 0x7ce8861d /* tabortwc. 7,r8,r16 */
+ .long 0x7e8b565d /* tabortdc. 20,r11,r10 */
+ .long 0x7e2a9e9d /* tabortwci. 17,r10,-13 */
+ .long 0x7fa3dedd /* tabortdci. 29,r3,-5 */
+ .long 0x7c00051d /* tbegin. */
+ .long 0x7f80059c /* tcheck cr7 */
+ .long 0x7c00055d /* tend. */
+ .long 0x7c00055d /* tend. */
+ .long 0x7e00055d /* tendall. */
+ .long 0x7e00055d /* tendall. */
+ .long 0x7c18075d /* treclaim. r24 */
+ .long 0x7c0007dd /* trechkpt. */
+ .long 0x7c0005dd /* tsuspend. */
+ .long 0x7c0005dd /* tsuspend. */
+ .long 0x7c2005dd /* tresume. */
+ .long 0x7c2005dd /* tresume. */
+ .long 0x60420000 /* ori r2,r2,0 */
+ .long 0x60000000 /* nop */
+ .long 0x60420000 /* ori r2,r2,0 */
+ .long 0x4c000124 /* rfebb 0 */
+ .long 0x4c000924 /* rfebb */
+ .long 0x4c000924 /* rfebb */
+ .long 0x4d950460 /* bctar- 12,4*cr5+gt */
+ .long 0x4c870461 /* bctarl- 4,4*cr1+so */
+ .long 0x4dac0460 /* bctar+ 12,4*cr3+lt */
+ .long 0x4ca20461 /* bctarl+ 4,eq */
+ .long 0x4c880c60 /* bctar 4,4*cr2+lt,1 */
+ .long 0x4c871461 /* bctarl 4,4*cr1+so,2 */
+ .long 0x7c00003c /* waitasec */
+ .long 0x7c00411c /* msgsndp r8 */
+ .long 0x7c200126 /* mtsle 1 */
+ .long 0x7c00d95c /* msgclrp r27 */
+ .long 0x7d4a616d /* stqcx. r10,r10,r12 */
+ .long 0x7f80396d /* stqcx. r28,0,r7 */
+ .long 0x7f135a28 /* lqarx r24,r19,r11 */
+ .long 0x7ec05a28 /* lqarx r22,0,r11 */
+ .long 0x7e80325c /* mfbhrbe r20,6 */
+ .long 0x7fb18329 /* pbt. r29,r17,r16 */
+ .long 0x7dc03b29 /* pbt. r14,0,r7 */
+ .long 0x7c00035c /* clrbhrb */
+ .long 0x116a05ed /* vpermxor v11,v10,v0,v23 */
+ .long 0x1302393c /* vaddeuqm v24,v2,v7,v4 */
+ .long 0x114a40bd /* vaddecuq v10,v10,v8,v2 */
+ .long 0x10af44fe /* vsubeuqm v5,v15,v8,v19 */
+ .long 0x119f877f /* vsubecuq v12,v31,v16,v29 */
+ .long 0x129d6888 /* vmulouw v20,v29,v13 */
+ .long 0x13a0d089 /* vmuluwm v29,v0,v26 */
+ .long 0x1115e0c0 /* vaddudm v8,v21,v28 */
+ .long 0x103a08c2 /* vmaxud v1,v26,v1 */
+ .long 0x128308c4 /* vrld v20,v3,v1 */
+ .long 0x109358c7 /* vcmpequd v4,v19,v11 */
+ .long 0x12eef100 /* vadduqm v23,v14,v30 */
+ .long 0x11086940 /* vaddcuq v8,v8,v13 */
+ .long 0x139b2188 /* vmulosw v28,v27,v4 */
+ .long 0x106421c2 /* vmaxsd v3,v4,v4 */
+ .long 0x1013aa88 /* vmuleuw v0,v19,v21 */
+ .long 0x13149ac2 /* vminud v24,v20,v19 */
+ .long 0x101c7ac7 /* vcmpgtud v0,v28,v15 */
+ .long 0x12a01388 /* vmulesw v21,v0,v2 */
+ .long 0x113a4bc2 /* vminsd v9,v26,v9 */
+ .long 0x133d5bc4 /* vsrad v25,v29,v11 */
+ .long 0x117c5bc7 /* vcmpgtsd v11,v28,v11 */
+ .long 0x10a8d601 /* bcdadd. v5,v8,v26,1 */
+ .long 0x10836408 /* vpmsumb v4,v3,v12 */
+ .long 0x135fae41 /* bcdsub. v26,v31,v21,1 */
+ .long 0x10b18448 /* vpmsumh v5,v17,v16 */
+ .long 0x12f1a44e /* vpkudum v23,v17,v20 */
+ .long 0x1315ec88 /* vpmsumw v24,v21,v29 */
+ .long 0x11366cc8 /* vpmsumd v9,v22,v13 */
+ .long 0x125394ce /* vpkudus v18,v19,v18 */
+ .long 0x13d0b500 /* vsubuqm v30,v16,v22 */
+ .long 0x11cb3d08 /* vcipher v14,v11,v7 */
+ .long 0x1142b509 /* vcipherlast v10,v2,v22 */
+ .long 0x12e06d0c /* vgbbd v23,v13 */
+ .long 0x12198540 /* vsubcuq v16,v25,v16 */
+ .long 0x13e12d44 /* vorc v31,v1,v5 */
+ .long 0x1091fd48 /* vncipher v4,v17,v31 */
+ .long 0x1302dd49 /* vncipherlast v24,v2,v27 */
+ .long 0x12f5bd4c /* vbpermq v23,v21,v23 */
+ .long 0x13724d4e /* vpksdus v27,v18,v9 */
+ .long 0x137ddd84 /* vnand v27,v29,v27 */
+ .long 0x1273c5c4 /* vsld v19,v19,v24 */
+ .long 0x10ad05c8 /* vsbox v5,v13 */
+ .long 0x13233dce /* vpksdss v25,v3,v7 */
+ .long 0x138804c7 /* vcmpequd. v28,v8,v0 */
+ .long 0x1340d64e /* vupkhsw v26,v26 */
+ .long 0x10a73682 /* vshasigmaw v5,v7,0,6 */
+ .long 0x13957684 /* veqv v28,v21,v14 */
+ .long 0x10289e8c /* vmrgow v1,v8,v19 */
+ .long 0x100a56c2 /* vshasigmad v0,v10,0,10 */
+ .long 0x10bb76c4 /* vsrd v5,v27,v14 */
+ .long 0x11606ece /* vupklsw v11,v13 */
+ .long 0x11c08702 /* vclzb v14,v16 */
+ .long 0x1280df03 /* vpopcntb v20,v27 */
+ .long 0x13805f42 /* vclzh v28,v11 */
+ .long 0x13004f43 /* vpopcnth v24,v9 */
+ .long 0x1360ff82 /* vclzw v27,v31 */
+ .long 0x12209f83 /* vpopcntw v17,v19 */
+ .long 0x1180efc2 /* vclzd v12,v29 */
+ .long 0x12e0b7c3 /* vpopcntd v23,v22 */
+ .long 0x1314eec7 /* vcmpgtud. v24,v20,v29 */
+ .long 0x1126dfc7 /* vcmpgtsd. v9,v6,v27 */
+ .long 0x7fced019 /* lxsiwzx vs62,r14,r26 */
+ .long 0x7d00c819 /* lxsiwzx vs40,0,r25 */
+ .long 0x7f20d098 /* lxsiwax vs25,0,r26 */
+ .long 0x7c601898 /* lxsiwax vs3,0,r3 */
+ .long 0x7fcc0067 /* mfvsrd r12,vs62 */
+ .long 0x7d9400e6 /* mffprwz r20,f12 */
+ .long 0x7dc97118 /* stxsiwx vs14,r9,r14 */
+ .long 0x7ea04118 /* stxsiwx vs21,0,r8 */
+ .long 0x7e0b0167 /* mtvsrd vs48,r11 */
+ .long 0x7ff701a7 /* mtvrwa v31,r23 */
+ .long 0x7e1a01e6 /* mtfprwz f16,r26 */
+ .long 0x7db36c18 /* lxsspx vs13,r19,r13 */
+ .long 0x7e406c18 /* lxsspx vs18,0,r13 */
+ .long 0x7d622519 /* stxsspx vs43,r2,r4 */
+ .long 0x7ee05d19 /* stxsspx vs55,0,r11 */
+ .long 0xf2d0c805 /* xsaddsp vs54,vs48,vs25 */
+ .long 0xf1d2080c /* xsmaddasp vs14,vs50,vs1 */
+ .long 0xf3565042 /* xssubsp vs26,vs22,vs42 */
+ .long 0xf375a04e /* xsmaddmsp vs27,vs53,vs52 */
+ .long 0xf100d82a /* xsrsqrtesp vs8,vs59 */
+ .long 0xf180482e /* xssqrtsp vs12,vs41 */
+ .long 0xf32b0083 /* xsmulsp vs57,vs11,vs32 */
+ .long 0xf0d4d089 /* xsmsubasp vs38,vs20,vs26 */
+ .long 0xf35330c0 /* xsdivsp vs26,vs19,vs6 */
+ .long 0xf065b8cf /* xsmsubmsp vs35,vs37,vs55 */
+ .long 0xf3604069 /* xsresp vs59,vs8 */
+ .long 0xf1810c0f /* xsnmaddasp vs44,vs33,vs33 */
+ .long 0xf23ef44c /* xsnmaddmsp vs17,vs62,vs30 */
+ .long 0xf2d4fc8d /* xsnmsubasp vs54,vs52,vs31 */
+ .long 0xf0a5d4cb /* xsnmsubmsp vs37,vs5,vs58 */
+ .long 0xf3d66556 /* xxlorc vs30,vs54,vs44 */
+ .long 0xf22eed91 /* xxlnand vs49,vs14,vs29 */
+ .long 0xf3d6f5d1 /* xxleqv vs62,vs22,vs30 */
+ .long 0xf380b42f /* xscvdpspn vs60,vs54 */
+ .long 0xf2c06c66 /* xsrsp vs22,vs45 */
+ .long 0xf340dca2 /* xscvuxdsp vs26,vs59 */
+ .long 0xf0c08ce3 /* xscvsxdsp vs38,vs49 */
+ .long 0xf360d52d /* xscvspdpn vs59,vs26 */
+ .long 0xff0e168c /* fmrgow f24,f14,f2 */
+ .long 0xfec72f8c /* fmrgew f22,f7,f5 */
+ .long 0x7c00719c /* msgsnd r14 */
+ .long 0x7c00b9dc /* msgclr r23 */
+ .long 0x7d002e99 /* lxvd2x vs40,0,r5 */
+ .long 0x7d002e99 /* lxvd2x vs40,0,r5 */
+ .long 0x7d543698 /* lxvd2x vs10,r20,r6 */
+ .long 0x7d543698 /* lxvd2x vs10,r20,r6 */
+ .long 0x7d203f99 /* stxvd2x vs41,0,r7 */
+ .long 0x7d203f99 /* stxvd2x vs41,0,r7 */
+ .long 0x7d754798 /* stxvd2x vs11,r21,r8 */
+ .long 0x7d754798 /* stxvd2x vs11,r21,r8 */
+ .long 0x7e803868 /* lbarx r20,0,r7 */
+ .long 0x7e803868 /* lbarx r20,0,r7 */
+ .long 0x7e803869 /* lbarx r20,0,r7,1 */
+ .long 0x7e813868 /* lbarx r20,r1,r7 */
+ .long 0x7e813868 /* lbarx r20,r1,r7 */
+ .long 0x7e813869 /* lbarx r20,r1,r7,1 */
+ .long 0x7ea040a8 /* ldarx r21,0,r8 */
+ .long 0x7ea040a8 /* ldarx r21,0,r8 */
+ .long 0x7ea040a9 /* ldarx r21,0,r8,1 */
+ .long 0x7ea140a8 /* ldarx r21,r1,r8 */
+ .long 0x7ea140a8 /* ldarx r21,r1,r8 */
+ .long 0x7ea140a9 /* ldarx r21,r1,r8,1 */
+ .long 0x7ec048e8 /* lharx r22,0,r9 */
+ .long 0x7ec048e8 /* lharx r22,0,r9 */
+ .long 0x7ec048e9 /* lharx r22,0,r9,1 */
+ .long 0x7ec148e8 /* lharx r22,r1,r9 */
+ .long 0x7ec148e8 /* lharx r22,r1,r9 */
+ .long 0x7ec148e9 /* lharx r22,r1,r9,1 */
+ .long 0x7ee05028 /* lwarx r23,0,r10 */
+ .long 0x7ee05028 /* lwarx r23,0,r10 */
+ .long 0x7ee05029 /* lwarx r23,0,r10,1 */
+ .long 0x7ee15028 /* lwarx r23,r1,r10 */
+ .long 0x7ee15028 /* lwarx r23,r1,r10 */
+ .long 0x7ee15029 /* lwarx r23,r1,r10,1 */
+ .long 0x7d403d6d /* stbcx. r10,0,r7 */
+ .long 0x7d413d6d /* stbcx. r10,r1,r7 */
+ .long 0x7d6045ad /* sthcx. r11,0,r8 */
+ .long 0x7d6145ad /* sthcx. r11,r1,r8 */
+ .long 0x7d80492d /* stwcx. r12,0,r9 */
+ .long 0x7d81492d /* stwcx. r12,r1,r9 */
+ .long 0x7da051ad /* stdcx. r13,0,r10 */
+ .long 0x7da151ad /* stdcx. r13,r1,r10 */
diff --git a/gdb/testsuite/gdb.arch/powerpc-power9.exp b/gdb/testsuite/gdb.arch/powerpc-power9.exp
new file mode 100644
index 0000000..cb9be17
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-power9.exp
@@ -0,0 +1,445 @@
+# Copyright 2014-2017 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.
+
+# Test PowerPC instructions disassembly.
+
+standard_testfile .s
+set objfile [standard_output_file ${testfile}.o]
+
+if {![istarget "powerpc*-*-*"]} then {
+ verbose "Skipping PowerPC instructions disassembly."
+ return
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${objfile}" object {debug}] != "" } {
+ untested "PowerPC instructions disassembly"
+ return -1
+}
+
+clean_restart ${objfile}
+
+# Disassemble the function.
+set func ""
+
+gdb_test "set disassembler-options power9"
+set test "disass func"
+gdb_test_multiple $test $test {
+ -re "\r\nDump of assembler code for function func:(\r\n.*\r\n)End of assembler dump.\r\n$gdb_prompt $" {
+ set func $expect_out(1,string)
+ pass $test
+ }
+}
+
+proc instr_to_patt {instr} {
+ global decimal hex
+ # 0x0000000000000018 <+24>: stxvd2x vs43,r4,r5
+ return "\[ \t\]*$hex <\\+$decimal>:\[ \t\]*[string_to_regexp $instr]"
+}
+
+proc func_check {instr} {
+ global func
+
+ set test "found: $instr"
+ if [regexp -nocase -line [instr_to_patt $instr] $func] {
+ pass $test
+ } else {
+ fail $test
+ }
+}
+
+func_check "cnttzd r3,r13"
+func_check "cnttzd. r4,r14"
+func_check "cnttzw r5,r15"
+func_check "cnttzw. r6,r16"
+func_check "modsd r10,r20,r21"
+func_check "modsw r11,r21,r22"
+func_check "modud r12,r22,r23"
+func_check "moduw r13,r23,r24"
+func_check "bcdcfn. v3,v4,0"
+func_check "bcdcfn. v3,v4,1"
+func_check "bcdcfsq. v4,v5,0"
+func_check "bcdcfsq. v4,v5,1"
+func_check "bcdcfz. v5,v6,0"
+func_check "bcdcfz. v5,v6,1"
+func_check "bcdcpsgn. v6,v7,v8"
+func_check "bcdctn. v7,v8"
+func_check "bcdctsq. v8,v9"
+func_check "bcdctz. v9,v10,0"
+func_check "bcdctz. v9,v10,1"
+func_check "bcdsetsgn. v10,v11,0"
+func_check "bcdsetsgn. v10,v11,1"
+func_check "bcdsr. v11,v12,v13,0"
+func_check "bcdsr. v11,v12,v13,1"
+func_check "bcds. v12,v13,v14,0"
+func_check "bcds. v12,v13,v14,1"
+func_check "bcdtrunc. v13,v14,v15,0"
+func_check "bcdtrunc. v13,v14,v15,1"
+func_check "bcdus. v14,v15,v16"
+func_check "bcdutrunc. v15,v16,v17"
+func_check "lxvll vs20,0,r21"
+func_check "lxvll vs20,r10,r21"
+func_check "stxvll vs21,0,r11"
+func_check "stxvll vs21,r10,r11"
+func_check "vmul10cuq v22,v23"
+func_check "vmul10ecuq v23,v24,v25"
+func_check "vmul10euq v24,v25,v26"
+func_check "vmul10uq v25,v26"
+func_check "xsaddqp v10,v11,v12"
+func_check "xsaddqpo v11,v12,v12"
+func_check "xsrqpi 0,v20,v30,0"
+func_check "xsrqpi 1,v20,v30,0"
+func_check "xsrqpi 0,v20,v30,3"
+func_check "xsrqpi 1,v20,v30,3"
+func_check "xsrqpix 0,v21,v31,0"
+func_check "xsrqpix 1,v21,v31,0"
+func_check "xsrqpix 0,v21,v31,3"
+func_check "xsrqpix 1,v21,v31,3"
+func_check "xsmulqp v12,v13,v14"
+func_check "xsmulqpo v13,v14,v15"
+func_check "xsrqpxp 0,v22,v23,0"
+func_check "xsrqpxp 1,v22,v23,0"
+func_check "xsrqpxp 0,v22,v23,3"
+func_check "xsrqpxp 1,v22,v23,3"
+func_check "xscpsgnqp v14,v15,v16"
+func_check "xscmpoqp cr0,v15,v16"
+func_check "xscmpoqp cr7,v15,v16"
+func_check "xscmpexpqp cr0,v16,v17"
+func_check "xscmpexpqp cr7,v16,v17"
+func_check "xsmaddqp v17,v18,v19"
+func_check "xsmaddqpo v18,v19,v20"
+func_check "xsmsubqp v19,v20,v21"
+func_check "xsmsubqpo v20,v21,v22"
+func_check "xsnmaddqp v21,v22,v23"
+func_check "xsnmaddqpo v22,v23,v24"
+func_check "xsnmsubqp v23,v24,v25"
+func_check "xsnmsubqpo v24,v25,v26"
+func_check "xssubqp v25,v26,v27"
+func_check "xssubqpo v26,v27,v28"
+func_check "xsdivqp v27,v28,v29"
+func_check "xsdivqpo v28,v29,v30"
+func_check "xscmpuqp cr0,v29,v30"
+func_check "xscmpuqp cr7,v29,v30"
+func_check "xststdcqp cr0,v30,0"
+func_check "xststdcqp cr7,v30,0"
+func_check "xststdcqp cr0,v31,127"
+func_check "xststdcqp cr7,v31,127"
+func_check "xsabsqp v10,v11"
+func_check "xsxexpqp v11,v12"
+func_check "xsnabsqp v12,v13"
+func_check "xsnegqp v13,v14"
+func_check "xsxsigqp v14,v15"
+func_check "xssqrtqp v15,v16"
+func_check "xssqrtqpo v16,v17"
+func_check "xscvqpuwz v17,v18"
+func_check "xscvudqp v18,v19"
+func_check "xscvqpswz v19,v20"
+func_check "xscvsdqp v20,v21"
+func_check "xscvqpudz v21,v22"
+func_check "xscvqpdp v22,v23"
+func_check "xscvqpdpo v23,v24"
+func_check "xscvdpqp v24,v25"
+func_check "xscvqpsdz v25,v26"
+func_check "xsiexpqp v26,v27,v28"
+func_check "vpermr v4,v5,v6,v7"
+func_check "vextractub v5,v6,0"
+func_check "vextractub v5,v6,15"
+func_check "vextractuh v6,v7,0"
+func_check "vextractuh v6,v7,15"
+func_check "vextractuw v7,v8,0"
+func_check "vextractuw v7,v8,15"
+func_check "vextractd v8,v9,0"
+func_check "vextractd v8,v9,15"
+func_check "vinsertb v9,v10,0"
+func_check "vinsertb v9,v10,15"
+func_check "vinserth v10,v11,0"
+func_check "vinserth v10,v11,15"
+func_check "vinsertw v11,v12,0"
+func_check "vinsertw v11,v12,15"
+func_check "vinsertd v12,v13,0"
+func_check "vinsertd v12,v13,15"
+func_check "mfvsrld r20,vs45"
+func_check "mtvsrws vs46,r21"
+func_check "mtvsrdd vs47,0,r23"
+func_check "mtvsrdd vs47,r22,r23"
+func_check "lxvx vs50,0,r11"
+func_check "lxvx vs0,r10,r11"
+func_check "lxvwsx vs51,0,r12"
+func_check "lxvwsx vs1,r10,r12"
+func_check "lxvh8x vs52,0,r13"
+func_check "lxvh8x vs2,r10,r13"
+func_check "lxvb16x vs53,0,r14"
+func_check "lxvb16x vs3,r10,r14"
+func_check "stxvx vs54,0,r15"
+func_check "stxvx vs4,r20,r15"
+func_check "stxvh8x vs55,0,r16"
+func_check "stxvh8x vs5,r20,r16"
+func_check "stxvb16x vs56,0,r17"
+func_check "stxvb16x vs6,r20,r17"
+func_check "xxextractuw vs4,vs5,0"
+func_check "xxextractuw vs40,vs50,15"
+func_check "xxspltib vs4,0"
+func_check "xxspltib vs4,128"
+func_check "xxspltib vs41,255"
+func_check "xxspltib vs41,255"
+func_check "xxinsertw vs5,vs6,0"
+func_check "xxinsertw vs50,vs60,15"
+func_check "xxbrh vs6,vs7"
+func_check "xxbrh vs56,vs57"
+func_check "xxbrw vs7,vs8"
+func_check "xxbrw vs57,vs58"
+func_check "xxbrd vs8,vs9"
+func_check "xxbrd vs58,vs59"
+func_check "xxbrq vs9,vs10"
+func_check "xxbrq vs59,vs60"
+func_check "lxsd v20,0(0)"
+func_check "lxsd v20,0(r10)"
+func_check "lxsd v20,8(0)"
+func_check "lxsd v20,8(r10)"
+func_check "lxsd v20,-8(0)"
+func_check "lxsd v20,-8(r10)"
+func_check "lxsd v20,32764(0)"
+func_check "lxsd v20,32764(r10)"
+func_check "lxsd v20,-32768(0)"
+func_check "lxsd v20,-32768(r10)"
+func_check "lxssp v30,0(0)"
+func_check "lxssp v30,0(r11)"
+func_check "lxssp v30,8(0)"
+func_check "lxssp v30,8(r11)"
+func_check "lxssp v30,-8(0)"
+func_check "lxssp v30,-8(r11)"
+func_check "lxssp v30,32764(0)"
+func_check "lxssp v30,32764(r11)"
+func_check "lxssp v30,-32768(0)"
+func_check "lxssp v30,-32768(r11)"
+func_check "lxv vs40,0(0)"
+func_check "lxv vs40,0(r12)"
+func_check "lxv vs40,16(0)"
+func_check "lxv vs40,16(r12)"
+func_check "lxv vs40,-16(0)"
+func_check "lxv vs10,-16(r12)"
+func_check "lxv vs10,32752(0)"
+func_check "lxv vs10,32752(r12)"
+func_check "lxv vs10,-32768(0)"
+func_check "lxv vs10,-32768(r12)"
+func_check "stxsd v21,0(0)"
+func_check "stxsd v21,0(r10)"
+func_check "stxsd v21,8(0)"
+func_check "stxsd v21,8(r10)"
+func_check "stxsd v21,-8(0)"
+func_check "stxsd v21,-8(r10)"
+func_check "stxsd v21,32764(0)"
+func_check "stxsd v21,32764(r10)"
+func_check "stxsd v21,-32768(0)"
+func_check "stxsd v21,-32768(r10)"
+func_check "stxssp v31,0(0)"
+func_check "stxssp v31,0(r11)"
+func_check "stxssp v31,8(0)"
+func_check "stxssp v31,8(r11)"
+func_check "stxssp v31,-8(0)"
+func_check "stxssp v31,-8(r11)"
+func_check "stxssp v31,32764(0)"
+func_check "stxssp v31,32764(r11)"
+func_check "stxssp v31,-32768(0)"
+func_check "stxssp v31,-32768(r11)"
+func_check "stxv vs41,0(0)"
+func_check "stxv vs41,0(r12)"
+func_check "stxv vs41,16(0)"
+func_check "stxv vs41,16(r12)"
+func_check "stxv vs41,-16(0)"
+func_check "stxv vs11,-16(r12)"
+func_check "stxv vs11,32752(0)"
+func_check "stxv vs11,32752(r12)"
+func_check "stxv vs11,-32768(0)"
+func_check "stxv vs11,-32768(r12)"
+func_check "xxperm vs20,vs22,vs24"
+func_check "xxperm vs40,vs42,vs44"
+func_check "xxpermr vs21,vs23,vs25"
+func_check "xxpermr vs41,vs43,vs45"
+func_check "extswsli r12,r20,0"
+func_check "extswsli r12,r20,1"
+func_check "extswsli r12,r20,63"
+func_check "extswsli. r13,r21,0"
+func_check "extswsli. r13,r21,1"
+func_check "extswsli. r13,r21,63"
+func_check "vrlwmi v14,v22,v23"
+func_check "vrldmi v15,v23,v24"
+func_check "vrlwnm v16,v24,v25"
+func_check "vrldnm v17,v25,v26"
+func_check "vbpermd v18,v26,v27"
+func_check "vnegw v19,v20"
+func_check "vnegd v20,v21"
+func_check "vprtybw v21,v22"
+func_check "vprtybd v22,v23"
+func_check "vprtybq v23,v24"
+func_check "vextsb2w v24,v25"
+func_check "vextsh2w v25,v26"
+func_check "vextsb2d v26,v27"
+func_check "vextsh2d v27,v28"
+func_check "vextsw2d v28,v29"
+func_check "vctzb v29,v30"
+func_check "vctzh v30,v31"
+func_check "vctzw v31,v30"
+func_check "vctzd v30,v29"
+func_check "lxsibzx vs10,0,r20"
+func_check "lxsibzx vs50,r10,r20"
+func_check "lxsihzx vs11,0,r21"
+func_check "lxsihzx vs51,r11,r21"
+func_check "stxsibx vs12,0,r22"
+func_check "stxsibx vs52,r12,r22"
+func_check "stxsihx vs13,0,r23"
+func_check "stxsihx vs53,r13,r23"
+func_check "maddhd r10,r11,r12,r13"
+func_check "maddhdu r20,r21,r22,r23"
+func_check "maddld r2,r3,r4,r5"
+func_check "xscmpexpdp cr0,vs10,vs20"
+func_check "xscmpexpdp cr7,vs40,vs50"
+func_check "xsiexpdp vs41,r11,r21"
+func_check "xststdcdp cr0,vs11,127"
+func_check "xststdcdp cr7,vs41,127"
+func_check "xststdcsp cr0,vs11,127"
+func_check "xststdcsp cr7,vs41,127"
+func_check "xsxexpdp r13,vs43"
+func_check "xsxsigdp r14,vs44"
+func_check "xviexpdp vs45,vs46,vs47"
+func_check "xviexpsp vs46,vs47,vs48"
+func_check "xvtstdcdp vs54,vs55,0"
+func_check "xvtstdcdp vs54,vs55,127"
+func_check "xvtstdcsp vs55,vs56,0"
+func_check "xvtstdcsp vs55,vs56,127"
+func_check "xvxexpdp vs57,vs58"
+func_check "xvxexpsp vs58,vs59"
+func_check "xvxsigdp vs59,vs60"
+func_check "xvxsigsp vs60,vs61"
+func_check "cmpeqb cr0,r6,r7"
+func_check "cmpeqb cr7,r6,r7"
+func_check "cmprb cr0,0,r8,r9"
+func_check "cmprb cr7,0,r8,r9"
+func_check "cmprb cr0,1,r8,r9"
+func_check "cmprb cr7,1,r8,r9"
+func_check "setb r15,cr0"
+func_check "setb r15,cr7"
+func_check "lxvl vs26,0,r10"
+func_check "lxvl vs56,r20,r10"
+func_check "stxvl vs27,0,r11"
+func_check "stxvl vs57,r21,r11"
+func_check "vclzlsbb r20,v30"
+func_check "vctzlsbb r21,v31"
+func_check "vcmpneb v10,v11,v12"
+func_check "vcmpneb. v20,v21,v22"
+func_check "vcmpneh v11,v12,v13"
+func_check "vcmpneh. v21,v22,v23"
+func_check "vcmpnew v12,v13,v14"
+func_check "vcmpnew. v22,v23,v24"
+func_check "vcmpnezb v13,v14,v15"
+func_check "vcmpnezb. v23,v24,v25"
+func_check "vcmpnezh v14,v15,v16"
+func_check "vcmpnezh. v24,v25,v26"
+func_check "vcmpnezw v15,v16,v17"
+func_check "vcmpnezw. v25,v26,v27"
+func_check "vextublx r16,r17,v10"
+func_check "vextubrx r17,r18,v11"
+func_check "vextuhlx r18,r19,v12"
+func_check "vextuhrx r19,r20,v13"
+func_check "vextuwlx r20,r21,v14"
+func_check "vextuwrx r21,r22,v15"
+func_check "dtstsfi cr0,0,f3"
+func_check "dtstsfi cr7,63,f3"
+func_check "dtstsfiq cr0,0,f4"
+func_check "dtstsfiq cr7,63,f4"
+func_check "xscvhpdp vs40,vs50"
+func_check "xscvdphp vs41,vs51"
+func_check "xvcvhpsp vs42,vs52"
+func_check "xvcvsphp vs43,vs53"
+func_check "addpcis r3,0"
+func_check "addpcis r3,0"
+func_check "addpcis r4,1"
+func_check "addpcis r4,1"
+func_check "addpcis r5,-2"
+func_check "addpcis r5,-2"
+func_check "addpcis r6,32767"
+func_check "addpcis r6,32767"
+func_check "addpcis r7,-32768"
+func_check "addpcis r7,-32768"
+func_check "slbsync"
+func_check "slbiag r10"
+func_check "slbieg r10,r11"
+func_check "slbmfee r3,r4"
+func_check "slbmfee r3,r4"
+func_check "slbmfee r3,r4,1"
+func_check "slbmfev r4,r5"
+func_check "slbmfev r4,r5"
+func_check "slbmfev r4,r5,1"
+func_check "tlbie r3,r4"
+func_check "tlbie r3,r4"
+func_check "tlbie r3,r4,3,1,1"
+func_check "tlbiel r3"
+func_check "tlbiel r3"
+func_check "tlbiel r3,r4,3,1,1"
+func_check "copy r12,r13"
+func_check "paste. r10,r11"
+func_check "cpabort"
+func_check "hwsync"
+func_check "hwsync"
+func_check "hwsync"
+func_check "lwsync"
+func_check "lwsync"
+func_check "ptesync"
+func_check "ptesync"
+func_check "ldat r20,0,0"
+func_check "ldat r20,r10,28"
+func_check "lwat r21,0,0"
+func_check "lwat r21,r11,28"
+func_check "stdat r22,0,0"
+func_check "stdat r22,r12,28"
+func_check "stwat r23,0,0"
+func_check "stwat r23,r13,28"
+func_check "urfid"
+func_check "rmieg r30"
+func_check "ldmx r10,0,r15"
+func_check "ldmx r10,r3,r15"
+func_check "stop"
+func_check "wait "
+func_check "wait "
+func_check "darn r3,0"
+func_check "darn r3,1"
+func_check "darn r3,2"
+func_check "mcrxrx cr0"
+func_check "mcrxrx cr7"
+func_check "vslv v20,v21,v22"
+func_check "vsrv v23,v24,v25"
+func_check "msgsync"
+func_check "xscmpeqdp vs30,vs40,vs50"
+func_check "xscmpgtdp vs31,vs41,vs51"
+func_check "xscmpgedp vs32,vs42,vs52"
+func_check "xsmincdp vs34,vs44,vs54"
+func_check "xsmaxcdp vs35,vs45,vs55"
+func_check "xsminjdp vs36,vs46,vs56"
+func_check "xsmaxjdp vs37,vs47,vs57"
+func_check "vmsumudm v20,v21,v22,v23"
+func_check "addex r11,r12,r13,0"
+func_check "addex r11,r12,r13,1"
+func_check "addex r11,r12,r13,2"
+func_check "mffs f25"
+func_check "mffs. f25"
+func_check "mffsce f26"
+func_check "mffscdrn f27,f20"
+func_check "mffscdrni f28,0"
+func_check "mffscdrni f28,7"
+func_check "mffscrn f29,f21"
+func_check "mffscrni f30,0"
+func_check "mffscrni f30,3"
+func_check "mffsl f31"
diff --git a/gdb/testsuite/gdb.arch/powerpc-power9.s b/gdb/testsuite/gdb.arch/powerpc-power9.s
new file mode 100644
index 0000000..65d8783
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-power9.s
@@ -0,0 +1,402 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+ Copyright 2014-2017 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+ .text
+ .globl func
+func:
+ .long 0x7da30474 /* cnttzd r3,r13 */
+ .long 0x7dc40475 /* cnttzd. r4,r14 */
+ .long 0x7de50434 /* cnttzw r5,r15 */
+ .long 0x7e060435 /* cnttzw. r6,r16 */
+ .long 0x7d54ae12 /* modsd r10,r20,r21 */
+ .long 0x7d75b616 /* modsw r11,r21,r22 */
+ .long 0x7d96ba12 /* modud r12,r22,r23 */
+ .long 0x7db7c216 /* moduw r13,r23,r24 */
+ .long 0x10672581 /* bcdcfn. v3,v4,0 */
+ .long 0x10672781 /* bcdcfn. v3,v4,1 */
+ .long 0x10822d81 /* bcdcfsq. v4,v5,0 */
+ .long 0x10822f81 /* bcdcfsq. v4,v5,1 */
+ .long 0x10a63581 /* bcdcfz. v5,v6,0 */
+ .long 0x10a63781 /* bcdcfz. v5,v6,1 */
+ .long 0x10c74341 /* bcdcpsgn. v6,v7,v8 */
+ .long 0x10e54581 /* bcdctn. v7,v8 */
+ .long 0x11004d81 /* bcdctsq. v8,v9 */
+ .long 0x11245581 /* bcdctz. v9,v10,0 */
+ .long 0x11245781 /* bcdctz. v9,v10,1 */
+ .long 0x115f5d81 /* bcdsetsgn. v10,v11,0 */
+ .long 0x115f5f81 /* bcdsetsgn. v10,v11,1 */
+ .long 0x116c6dc1 /* bcdsr. v11,v12,v13,0 */
+ .long 0x116c6fc1 /* bcdsr. v11,v12,v13,1 */
+ .long 0x118d74c1 /* bcds. v12,v13,v14,0 */
+ .long 0x118d76c1 /* bcds. v12,v13,v14,1 */
+ .long 0x11ae7d01 /* bcdtrunc. v13,v14,v15,0 */
+ .long 0x11ae7f01 /* bcdtrunc. v13,v14,v15,1 */
+ .long 0x11cf8481 /* bcdus. v14,v15,v16 */
+ .long 0x11f08d41 /* bcdutrunc. v15,v16,v17 */
+ .long 0x7e80aa5a /* lxvll vs20,0,r21 */
+ .long 0x7e8aaa5a /* lxvll vs20,r10,r21 */
+ .long 0x7ea05b5a /* stxvll vs21,0,r11 */
+ .long 0x7eaa5b5a /* stxvll vs21,r10,r11 */
+ .long 0x12d70001 /* vmul10cuq v22,v23 */
+ .long 0x12f8c841 /* vmul10ecuq v23,v24,v25 */
+ .long 0x1319d241 /* vmul10euq v24,v25,v26 */
+ .long 0x133a0201 /* vmul10uq v25,v26 */
+ .long 0xfd4b6008 /* xsaddqp v10,v11,v12 */
+ .long 0xfd6c6009 /* xsaddqpo v11,v12,v12 */
+ .long 0xfe80f00a /* xsrqpi 0,v20,v30,0 */
+ .long 0xfe81f00a /* xsrqpi 1,v20,v30,0 */
+ .long 0xfe80f60a /* xsrqpi 0,v20,v30,3 */
+ .long 0xfe81f60a /* xsrqpi 1,v20,v30,3 */
+ .long 0xfea0f80b /* xsrqpix 0,v21,v31,0 */
+ .long 0xfea1f80b /* xsrqpix 1,v21,v31,0 */
+ .long 0xfea0fe0b /* xsrqpix 0,v21,v31,3 */
+ .long 0xfea1fe0b /* xsrqpix 1,v21,v31,3 */
+ .long 0xfd8d7048 /* xsmulqp v12,v13,v14 */
+ .long 0xfdae7849 /* xsmulqpo v13,v14,v15 */
+ .long 0xfec0b84a /* xsrqpxp 0,v22,v23,0 */
+ .long 0xfec1b84a /* xsrqpxp 1,v22,v23,0 */
+ .long 0xfec0be4a /* xsrqpxp 0,v22,v23,3 */
+ .long 0xfec1be4a /* xsrqpxp 1,v22,v23,3 */
+ .long 0xfdcf80c8 /* xscpsgnqp v14,v15,v16 */
+ .long 0xfc0f8108 /* xscmpoqp cr0,v15,v16 */
+ .long 0xff8f8108 /* xscmpoqp cr7,v15,v16 */
+ .long 0xfc108948 /* xscmpexpqp cr0,v16,v17 */
+ .long 0xff908948 /* xscmpexpqp cr7,v16,v17 */
+ .long 0xfe329b08 /* xsmaddqp v17,v18,v19 */
+ .long 0xfe53a309 /* xsmaddqpo v18,v19,v20 */
+ .long 0xfe74ab48 /* xsmsubqp v19,v20,v21 */
+ .long 0xfe95b349 /* xsmsubqpo v20,v21,v22 */
+ .long 0xfeb6bb88 /* xsnmaddqp v21,v22,v23 */
+ .long 0xfed7c389 /* xsnmaddqpo v22,v23,v24 */
+ .long 0xfef8cbc8 /* xsnmsubqp v23,v24,v25 */
+ .long 0xff19d3c9 /* xsnmsubqpo v24,v25,v26 */
+ .long 0xff3adc08 /* xssubqp v25,v26,v27 */
+ .long 0xff5be409 /* xssubqpo v26,v27,v28 */
+ .long 0xff7cec48 /* xsdivqp v27,v28,v29 */
+ .long 0xff9df449 /* xsdivqpo v28,v29,v30 */
+ .long 0xfc1df508 /* xscmpuqp cr0,v29,v30 */
+ .long 0xff9df508 /* xscmpuqp cr7,v29,v30 */
+ .long 0xfc00f588 /* xststdcqp cr0,v30,0 */
+ .long 0xff80f588 /* xststdcqp cr7,v30,0 */
+ .long 0xfc7ffd88 /* xststdcqp cr0,v31,127 */
+ .long 0xfffffd88 /* xststdcqp cr7,v31,127 */
+ .long 0xfd405e48 /* xsabsqp v10,v11 */
+ .long 0xfd626648 /* xsxexpqp v11,v12 */
+ .long 0xfd886e48 /* xsnabsqp v12,v13 */
+ .long 0xfdb07648 /* xsnegqp v13,v14 */
+ .long 0xfdd27e48 /* xsxsigqp v14,v15 */
+ .long 0xfdfb8648 /* xssqrtqp v15,v16 */
+ .long 0xfe1b8e49 /* xssqrtqpo v16,v17 */
+ .long 0xfe219688 /* xscvqpuwz v17,v18 */
+ .long 0xfe429e88 /* xscvudqp v18,v19 */
+ .long 0xfe69a688 /* xscvqpswz v19,v20 */
+ .long 0xfe8aae88 /* xscvsdqp v20,v21 */
+ .long 0xfeb1b688 /* xscvqpudz v21,v22 */
+ .long 0xfed4be88 /* xscvqpdp v22,v23 */
+ .long 0xfef4c689 /* xscvqpdpo v23,v24 */
+ .long 0xff16ce88 /* xscvdpqp v24,v25 */
+ .long 0xff39d688 /* xscvqpsdz v25,v26 */
+ .long 0xff5be6c8 /* xsiexpqp v26,v27,v28 */
+ .long 0x108531fb /* vpermr v4,v5,v6,v7 */
+ .long 0x10a0320d /* vextractub v5,v6,0 */
+ .long 0x10af320d /* vextractub v5,v6,15 */
+ .long 0x10c03a4d /* vextractuh v6,v7,0 */
+ .long 0x10cf3a4d /* vextractuh v6,v7,15 */
+ .long 0x10e0428d /* vextractuw v7,v8,0 */
+ .long 0x10ef428d /* vextractuw v7,v8,15 */
+ .long 0x11004acd /* vextractd v8,v9,0 */
+ .long 0x110f4acd /* vextractd v8,v9,15 */
+ .long 0x1120530d /* vinsertb v9,v10,0 */
+ .long 0x112f530d /* vinsertb v9,v10,15 */
+ .long 0x11405b4d /* vinserth v10,v11,0 */
+ .long 0x114f5b4d /* vinserth v10,v11,15 */
+ .long 0x1160638d /* vinsertw v11,v12,0 */
+ .long 0x116f638d /* vinsertw v11,v12,15 */
+ .long 0x11806bcd /* vinsertd v12,v13,0 */
+ .long 0x118f6bcd /* vinsertd v12,v13,15 */
+ .long 0x7db40267 /* mfvsrld r20,vs45 */
+ .long 0x7dd50327 /* mtvsrws vs46,r21 */
+ .long 0x7de0bb67 /* mtvsrdd vs47,0,r23 */
+ .long 0x7df6bb67 /* mtvsrdd vs47,r22,r23 */
+ .long 0x7e405a19 /* lxvx vs50,0,r11 */
+ .long 0x7c0a5a18 /* lxvx vs0,r10,r11 */
+ .long 0x7e6062d9 /* lxvwsx vs51,0,r12 */
+ .long 0x7c2a62d8 /* lxvwsx vs1,r10,r12 */
+ .long 0x7e806e59 /* lxvh8x vs52,0,r13 */
+ .long 0x7c4a6e58 /* lxvh8x vs2,r10,r13 */
+ .long 0x7ea076d9 /* lxvb16x vs53,0,r14 */
+ .long 0x7c6a76d8 /* lxvb16x vs3,r10,r14 */
+ .long 0x7ec07b19 /* stxvx vs54,0,r15 */
+ .long 0x7c947b18 /* stxvx vs4,r20,r15 */
+ .long 0x7ee08759 /* stxvh8x vs55,0,r16 */
+ .long 0x7cb48758 /* stxvh8x vs5,r20,r16 */
+ .long 0x7f008fd9 /* stxvb16x vs56,0,r17 */
+ .long 0x7cd48fd8 /* stxvb16x vs6,r20,r17 */
+ .long 0xf0802a94 /* xxextractuw vs4,vs5,0 */
+ .long 0xf10f9297 /* xxextractuw vs40,vs50,15 */
+ .long 0xf08002d0 /* xxspltib vs4,0 */
+ .long 0xf08402d0 /* xxspltib vs4,128 */
+ .long 0xf127fad1 /* xxspltib vs41,255 */
+ .long 0xf127fad1 /* xxspltib vs41,255 */
+ .long 0xf0a032d4 /* xxinsertw vs5,vs6,0 */
+ .long 0xf24fe2d7 /* xxinsertw vs50,vs60,15 */
+ .long 0xf0c73f6c /* xxbrh vs6,vs7 */
+ .long 0xf307cf6f /* xxbrh vs56,vs57 */
+ .long 0xf0ef476c /* xxbrw vs7,vs8 */
+ .long 0xf32fd76f /* xxbrw vs57,vs58 */
+ .long 0xf1174f6c /* xxbrd vs8,vs9 */
+ .long 0xf357df6f /* xxbrd vs58,vs59 */
+ .long 0xf13f576c /* xxbrq vs9,vs10 */
+ .long 0xf37fe76f /* xxbrq vs59,vs60 */
+ .long 0xe6800002 /* lxsd v20,0(0) */
+ .long 0xe68a0002 /* lxsd v20,0(r10) */
+ .long 0xe680000a /* lxsd v20,8(0) */
+ .long 0xe68a000a /* lxsd v20,8(r10) */
+ .long 0xe680fffa /* lxsd v20,-8(0) */
+ .long 0xe68afffa /* lxsd v20,-8(r10) */
+ .long 0xe6807ffe /* lxsd v20,32764(0) */
+ .long 0xe68a7ffe /* lxsd v20,32764(r10) */
+ .long 0xe6808002 /* lxsd v20,-32768(0) */
+ .long 0xe68a8002 /* lxsd v20,-32768(r10) */
+ .long 0xe7c00003 /* lxssp v30,0(0) */
+ .long 0xe7cb0003 /* lxssp v30,0(r11) */
+ .long 0xe7c0000b /* lxssp v30,8(0) */
+ .long 0xe7cb000b /* lxssp v30,8(r11) */
+ .long 0xe7c0fffb /* lxssp v30,-8(0) */
+ .long 0xe7cbfffb /* lxssp v30,-8(r11) */
+ .long 0xe7c07fff /* lxssp v30,32764(0) */
+ .long 0xe7cb7fff /* lxssp v30,32764(r11) */
+ .long 0xe7c08003 /* lxssp v30,-32768(0) */
+ .long 0xe7cb8003 /* lxssp v30,-32768(r11) */
+ .long 0xf5000009 /* lxv vs40,0(0) */
+ .long 0xf50c0009 /* lxv vs40,0(r12) */
+ .long 0xf5000019 /* lxv vs40,16(0) */
+ .long 0xf50c0019 /* lxv vs40,16(r12) */
+ .long 0xf500fff9 /* lxv vs40,-16(0) */
+ .long 0xf54cfff1 /* lxv vs10,-16(r12) */
+ .long 0xf5407ff1 /* lxv vs10,32752(0) */
+ .long 0xf54c7ff1 /* lxv vs10,32752(r12) */
+ .long 0xf5408001 /* lxv vs10,-32768(0) */
+ .long 0xf54c8001 /* lxv vs10,-32768(r12) */
+ .long 0xf6a00002 /* stxsd v21,0(0) */
+ .long 0xf6aa0002 /* stxsd v21,0(r10) */
+ .long 0xf6a0000a /* stxsd v21,8(0) */
+ .long 0xf6aa000a /* stxsd v21,8(r10) */
+ .long 0xf6a0fffa /* stxsd v21,-8(0) */
+ .long 0xf6aafffa /* stxsd v21,-8(r10) */
+ .long 0xf6a07ffe /* stxsd v21,32764(0) */
+ .long 0xf6aa7ffe /* stxsd v21,32764(r10) */
+ .long 0xf6a08002 /* stxsd v21,-32768(0) */
+ .long 0xf6aa8002 /* stxsd v21,-32768(r10) */
+ .long 0xf7e00003 /* stxssp v31,0(0) */
+ .long 0xf7eb0003 /* stxssp v31,0(r11) */
+ .long 0xf7e0000b /* stxssp v31,8(0) */
+ .long 0xf7eb000b /* stxssp v31,8(r11) */
+ .long 0xf7e0fffb /* stxssp v31,-8(0) */
+ .long 0xf7ebfffb /* stxssp v31,-8(r11) */
+ .long 0xf7e07fff /* stxssp v31,32764(0) */
+ .long 0xf7eb7fff /* stxssp v31,32764(r11) */
+ .long 0xf7e08003 /* stxssp v31,-32768(0) */
+ .long 0xf7eb8003 /* stxssp v31,-32768(r11) */
+ .long 0xf520000d /* stxv vs41,0(0) */
+ .long 0xf52c000d /* stxv vs41,0(r12) */
+ .long 0xf520001d /* stxv vs41,16(0) */
+ .long 0xf52c001d /* stxv vs41,16(r12) */
+ .long 0xf520fffd /* stxv vs41,-16(0) */
+ .long 0xf56cfff5 /* stxv vs11,-16(r12) */
+ .long 0xf5607ff5 /* stxv vs11,32752(0) */
+ .long 0xf56c7ff5 /* stxv vs11,32752(r12) */
+ .long 0xf5608005 /* stxv vs11,-32768(0) */
+ .long 0xf56c8005 /* stxv vs11,-32768(r12) */
+ .long 0xf296c0d0 /* xxperm vs20,vs22,vs24 */
+ .long 0xf10a60d7 /* xxperm vs40,vs42,vs44 */
+ .long 0xf2b7c9d0 /* xxpermr vs21,vs23,vs25 */
+ .long 0xf12b69d7 /* xxpermr vs41,vs43,vs45 */
+ .long 0x7e8c06f4 /* extswsli r12,r20,0 */
+ .long 0x7e8c0ef4 /* extswsli r12,r20,1 */
+ .long 0x7e8cfef6 /* extswsli r12,r20,63 */
+ .long 0x7ead06f5 /* extswsli. r13,r21,0 */
+ .long 0x7ead0ef5 /* extswsli. r13,r21,1 */
+ .long 0x7eadfef7 /* extswsli. r13,r21,63 */
+ .long 0x11d6b885 /* vrlwmi v14,v22,v23 */
+ .long 0x11f7c0c5 /* vrldmi v15,v23,v24 */
+ .long 0x1218c985 /* vrlwnm v16,v24,v25 */
+ .long 0x1239d1c5 /* vrldnm v17,v25,v26 */
+ .long 0x125addcc /* vbpermd v18,v26,v27 */
+ .long 0x1266a602 /* vnegw v19,v20 */
+ .long 0x1287ae02 /* vnegd v20,v21 */
+ .long 0x12a8b602 /* vprtybw v21,v22 */
+ .long 0x12c9be02 /* vprtybd v22,v23 */
+ .long 0x12eac602 /* vprtybq v23,v24 */
+ .long 0x1310ce02 /* vextsb2w v24,v25 */
+ .long 0x1331d602 /* vextsh2w v25,v26 */
+ .long 0x1358de02 /* vextsb2d v26,v27 */
+ .long 0x1379e602 /* vextsh2d v27,v28 */
+ .long 0x139aee02 /* vextsw2d v28,v29 */
+ .long 0x13bcf602 /* vctzb v29,v30 */
+ .long 0x13ddfe02 /* vctzh v30,v31 */
+ .long 0x13fef602 /* vctzw v31,v30 */
+ .long 0x13dfee02 /* vctzd v30,v29 */
+ .long 0x7d40a61a /* lxsibzx vs10,0,r20 */
+ .long 0x7e4aa61b /* lxsibzx vs50,r10,r20 */
+ .long 0x7d60ae5a /* lxsihzx vs11,0,r21 */
+ .long 0x7e6bae5b /* lxsihzx vs51,r11,r21 */
+ .long 0x7d80b71a /* stxsibx vs12,0,r22 */
+ .long 0x7e8cb71b /* stxsibx vs52,r12,r22 */
+ .long 0x7da0bf5a /* stxsihx vs13,0,r23 */
+ .long 0x7eadbf5b /* stxsihx vs53,r13,r23 */
+ .long 0x114b6370 /* maddhd r10,r11,r12,r13 */
+ .long 0x1295b5f1 /* maddhdu r20,r21,r22,r23 */
+ .long 0x10432173 /* maddld r2,r3,r4,r5 */
+ .long 0xf00aa1d8 /* xscmpexpdp cr0,vs10,vs20 */
+ .long 0xf38891de /* xscmpexpdp cr7,vs40,vs50 */
+ .long 0xf12baf2d /* xsiexpdp vs41,r11,r21 */
+ .long 0xf07f5da8 /* xststdcdp cr0,vs11,127 */
+ .long 0xf3ff4daa /* xststdcdp cr7,vs41,127 */
+ .long 0xf07f5ca8 /* xststdcsp cr0,vs11,127 */
+ .long 0xf3ff4caa /* xststdcsp cr7,vs41,127 */
+ .long 0xf1a05d6e /* xsxexpdp r13,vs43 */
+ .long 0xf1c1656e /* xsxsigdp r14,vs44 */
+ .long 0xf1ae7fc7 /* xviexpdp vs45,vs46,vs47 */
+ .long 0xf1cf86c7 /* xviexpsp vs46,vs47,vs48 */
+ .long 0xf2c0bfab /* xvtstdcdp vs54,vs55,0 */
+ .long 0xf2dfbfef /* xvtstdcdp vs54,vs55,127 */
+ .long 0xf2e0c6ab /* xvtstdcsp vs55,vs56,0 */
+ .long 0xf2ffc6ef /* xvtstdcsp vs55,vs56,127 */
+ .long 0xf320d76f /* xvxexpdp vs57,vs58 */
+ .long 0xf348df6f /* xvxexpsp vs58,vs59 */
+ .long 0xf361e76f /* xvxsigdp vs59,vs60 */
+ .long 0xf389ef6f /* xvxsigsp vs60,vs61 */
+ .long 0x7c0639c0 /* cmpeqb cr0,r6,r7 */
+ .long 0x7f8639c0 /* cmpeqb cr7,r6,r7 */
+ .long 0x7c084980 /* cmprb cr0,0,r8,r9 */
+ .long 0x7f884980 /* cmprb cr7,0,r8,r9 */
+ .long 0x7c284980 /* cmprb cr0,1,r8,r9 */
+ .long 0x7fa84980 /* cmprb cr7,1,r8,r9 */
+ .long 0x7de00100 /* setb r15,cr0 */
+ .long 0x7dfc0100 /* setb r15,cr7 */
+ .long 0x7f40521a /* lxvl vs26,0,r10 */
+ .long 0x7f14521b /* lxvl vs56,r20,r10 */
+ .long 0x7f605b1a /* stxvl vs27,0,r11 */
+ .long 0x7f355b1b /* stxvl vs57,r21,r11 */
+ .long 0x1280f602 /* vclzlsbb r20,v30 */
+ .long 0x12a1fe02 /* vctzlsbb r21,v31 */
+ .long 0x114b6007 /* vcmpneb v10,v11,v12 */
+ .long 0x1295b407 /* vcmpneb. v20,v21,v22 */
+ .long 0x116c6847 /* vcmpneh v11,v12,v13 */
+ .long 0x12b6bc47 /* vcmpneh. v21,v22,v23 */
+ .long 0x118d7087 /* vcmpnew v12,v13,v14 */
+ .long 0x12d7c487 /* vcmpnew. v22,v23,v24 */
+ .long 0x11ae7907 /* vcmpnezb v13,v14,v15 */
+ .long 0x12f8cd07 /* vcmpnezb. v23,v24,v25 */
+ .long 0x11cf8147 /* vcmpnezh v14,v15,v16 */
+ .long 0x1319d547 /* vcmpnezh. v24,v25,v26 */
+ .long 0x11f08987 /* vcmpnezw v15,v16,v17 */
+ .long 0x133add87 /* vcmpnezw. v25,v26,v27 */
+ .long 0x1211560d /* vextublx r16,r17,v10 */
+ .long 0x12325f0d /* vextubrx r17,r18,v11 */
+ .long 0x1253664d /* vextuhlx r18,r19,v12 */
+ .long 0x12746f4d /* vextuhrx r19,r20,v13 */
+ .long 0x1295768d /* vextuwlx r20,r21,v14 */
+ .long 0x12b67f8d /* vextuwrx r21,r22,v15 */
+ .long 0xec001d46 /* dtstsfi cr0,0,f3 */
+ .long 0xefbf1d46 /* dtstsfi cr7,63,f3 */
+ .long 0xfc002546 /* dtstsfiq cr0,0,f4 */
+ .long 0xffbf2546 /* dtstsfiq cr7,63,f4 */
+ .long 0xf110956f /* xscvhpdp vs40,vs50 */
+ .long 0xf1319d6f /* xscvdphp vs41,vs51 */
+ .long 0xf158a76f /* xvcvhpsp vs42,vs52 */
+ .long 0xf179af6f /* xvcvsphp vs43,vs53 */
+ .long 0x4c600004 /* addpcis r3,0 */
+ .long 0x4c600004 /* addpcis r3,0 */
+ .long 0x4c800005 /* addpcis r4,1 */
+ .long 0x4c800005 /* addpcis r4,1 */
+ .long 0x4cbfffc4 /* addpcis r5,-2 */
+ .long 0x4cbfffc4 /* addpcis r5,-2 */
+ .long 0x4cdf7fc5 /* addpcis r6,32767 */
+ .long 0x4cdf7fc5 /* addpcis r6,32767 */
+ .long 0x4ce08004 /* addpcis r7,-32768 */
+ .long 0x4ce08004 /* addpcis r7,-32768 */
+ .long 0x7c0002a4 /* slbsync */
+ .long 0x7d4006a4 /* slbiag r10 */
+ .long 0x7d405ba4 /* slbieg r10,r11 */
+ .long 0x7c602726 /* slbmfee r3,r4 */
+ .long 0x7c602726 /* slbmfee r3,r4 */
+ .long 0x7c612726 /* slbmfee r3,r4,1 */
+ .long 0x7c802ea6 /* slbmfev r4,r5 */
+ .long 0x7c802ea6 /* slbmfev r4,r5 */
+ .long 0x7c812ea6 /* slbmfev r4,r5,1 */
+ .long 0x7c801a64 /* tlbie r3,r4 */
+ .long 0x7c801a64 /* tlbie r3,r4 */
+ .long 0x7c8f1a64 /* tlbie r3,r4,3,1,1 */
+ .long 0x7c001a24 /* tlbiel r3 */
+ .long 0x7c001a24 /* tlbiel r3 */
+ .long 0x7c8f1a24 /* tlbiel r3,r4,3,1,1 */
+ .long 0x7c2c6e0c /* copy r12,r13 */
+ .long 0x7c2a5f0d /* paste. r10,r11 */
+ .long 0x7c00068c /* cpabort */
+ .long 0x7c0004ac /* hwsync */
+ .long 0x7c0004ac /* hwsync */
+ .long 0x7c0004ac /* hwsync */
+ .long 0x7c2004ac /* lwsync */
+ .long 0x7c2004ac /* lwsync */
+ .long 0x7c4004ac /* ptesync */
+ .long 0x7c4004ac /* ptesync */
+ .long 0x7e8004cc /* ldat r20,0,0 */
+ .long 0x7e8ae4cc /* ldat r20,r10,28 */
+ .long 0x7ea0048c /* lwat r21,0,0 */
+ .long 0x7eabe48c /* lwat r21,r11,28 */
+ .long 0x7ec005cc /* stdat r22,0,0 */
+ .long 0x7ecce5cc /* stdat r22,r12,28 */
+ .long 0x7ee0058c /* stwat r23,0,0 */
+ .long 0x7eede58c /* stwat r23,r13,28 */
+ .long 0x4c000264 /* urfid */
+ .long 0x7c00f6e4 /* rmieg r30 */
+ .long 0x7d407a6a /* ldmx r10,0,r15 */
+ .long 0x7d437a6a /* ldmx r10,r3,r15 */
+ .long 0x4c0002e4 /* stop */
+ .long 0x7c00003c /* wait */
+ .long 0x7c00003c /* wait */
+ .long 0x7c6005e6 /* darn r3,0 */
+ .long 0x7c6105e6 /* darn r3,1 */
+ .long 0x7c6205e6 /* darn r3,2 */
+ .long 0x7c000480 /* mcrxrx cr0 */
+ .long 0x7f800480 /* mcrxrx cr7 */
+ .long 0x1295b744 /* vslv v20,v21,v22 */
+ .long 0x12f8cf04 /* vsrv v23,v24,v25 */
+ .long 0x7c0006ec /* msgsync */
+ .long 0xf3c8901e /* xscmpeqdp vs30,vs40,vs50 */
+ .long 0xf3e9985e /* xscmpgtdp vs31,vs41,vs51 */
+ .long 0xf00aa09f /* xscmpgedp vs32,vs42,vs52 */
+ .long 0xf04cb447 /* xsmincdp vs34,vs44,vs54 */
+ .long 0xf06dbc07 /* xsmaxcdp vs35,vs45,vs55 */
+ .long 0xf08ec4c7 /* xsminjdp vs36,vs46,vs56 */
+ .long 0xf0afcc87 /* xsmaxjdp vs37,vs47,vs57 */
+ .long 0x1295b5e3 /* vmsumudm v20,v21,v22,v23 */
+ .long 0x7d6c6954 /* addex r11,r12,r13,0 */
+ .long 0x7d6c6b54 /* addex r11,r12,r13,1 */
+ .long 0x7d6c6d54 /* addex r11,r12,r13,2 */
+ .long 0xff20048e /* mffs f25 */
+ .long 0xff20048f /* mffs. f25 */
+ .long 0xff41048e /* mffsce f26 */
+ .long 0xff74a48e /* mffscdrn f27,f20 */
+ .long 0xff95048e /* mffscdrni f28,0 */
+ .long 0xff953c8e /* mffscdrni f28,7 */
+ .long 0xffb6ac8e /* mffscrn f29,f21 */
+ .long 0xffd7048e /* mffscrni f30,0 */
+ .long 0xffd71c8e /* mffscrni f30,3 */
+ .long 0xfff8048e /* mffsl f31 */
diff --git a/gdb/testsuite/gdb.arch/powerpc-vsx.exp b/gdb/testsuite/gdb.arch/powerpc-vsx.exp
new file mode 100644
index 0000000..60fe9d4
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-vsx.exp
@@ -0,0 +1,225 @@
+# Copyright 2014-2017 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.
+
+# Test PowerPC instructions disassembly.
+
+standard_testfile .s
+set objfile [standard_output_file ${testfile}.o]
+
+if {![istarget "powerpc*-*-*"]} then {
+ verbose "Skipping PowerPC instructions disassembly."
+ return
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${objfile}" object {debug}] != "" } {
+ untested "PowerPC instructions disassembly"
+ return -1
+}
+
+clean_restart ${objfile}
+
+# Disassemble the function.
+set func ""
+
+gdb_test "set disassembler-options vsx"
+set test "disass func"
+gdb_test_multiple $test $test {
+ -re "\r\nDump of assembler code for function func:(\r\n.*\r\n)End of assembler dump.\r\n$gdb_prompt $" {
+ set func $expect_out(1,string)
+ pass $test
+ }
+}
+
+proc instr_to_patt {instr} {
+ global decimal hex
+ # 0x0000000000000018 <+24>: stxvd2x vs43,r4,r5
+ return "\[ \t\]*$hex <\\+$decimal>:\[ \t\]*[string_to_regexp $instr]"
+}
+
+proc func_check {instr} {
+ global func
+
+ set test "found: $instr"
+ if [regexp -nocase -line [instr_to_patt $instr] $func] {
+ pass $test
+ } else {
+ fail $test
+ }
+}
+
+func_check "lxsdx vs40,r10,r20"
+func_check "lxvd2x vs40,r10,r20"
+func_check "lxvdsx vs40,r10,r20"
+func_check "lxvw4x vs40,r10,r20"
+func_check "stxsdx vs40,r10,r20"
+func_check "stxvd2x vs40,r10,r20"
+func_check "stxvw4x vs40,r10,r20"
+func_check "xsabsdp vs40,vs60"
+func_check "xsadddp vs40,vs50,vs60"
+func_check "xscmpodp cr1,vs50,vs60"
+func_check "xscmpudp cr1,vs50,vs60"
+func_check "xscpsgndp vs40,vs50,vs60"
+func_check "xscvdpsp vs40,vs60"
+func_check "xscvdpsxds vs40,vs60"
+func_check "xscvdpsxws vs40,vs60"
+func_check "xscvdpuxds vs40,vs60"
+func_check "xscvdpuxws vs40,vs60"
+func_check "xscvspdp vs40,vs60"
+func_check "xscvsxddp vs40,vs60"
+func_check "xscvuxddp vs40,vs60"
+func_check "xsdivdp vs40,vs50,vs60"
+func_check "xsmaddadp vs40,vs50,vs60"
+func_check "xsmaddmdp vs40,vs50,vs60"
+func_check "xsmaxdp vs40,vs50,vs60"
+func_check "xsmindp vs40,vs50,vs60"
+func_check "xsmsubadp vs40,vs50,vs60"
+func_check "xsmsubmdp vs40,vs50,vs60"
+func_check "xsmuldp vs40,vs50,vs60"
+func_check "xsnabsdp vs40,vs60"
+func_check "xsnegdp vs40,vs60"
+func_check "xsnmaddadp vs40,vs50,vs60"
+func_check "xsnmaddmdp vs40,vs50,vs60"
+func_check "xsnmsubadp vs40,vs50,vs60"
+func_check "xsnmsubmdp vs40,vs50,vs60"
+func_check "xsrdpi vs40,vs60"
+func_check "xsrdpic vs40,vs60"
+func_check "xsrdpim vs40,vs60"
+func_check "xsrdpip vs40,vs60"
+func_check "xsrdpiz vs40,vs60"
+func_check "xsredp vs40,vs60"
+func_check "xsrsqrtedp vs40,vs60"
+func_check "xssqrtdp vs40,vs60"
+func_check "xssubdp vs40,vs50,vs60"
+func_check "xstdivdp cr1,vs50,vs60"
+func_check "xstsqrtdp cr1,vs60"
+func_check "xvabsdp vs40,vs60"
+func_check "xvabssp vs40,vs60"
+func_check "xvadddp vs40,vs50,vs60"
+func_check "xvaddsp vs40,vs50,vs60"
+func_check "xvcmpeqdp vs40,vs50,vs60"
+func_check "xvcmpeqdp. vs40,vs50,vs60"
+func_check "xvcmpeqsp vs40,vs50,vs60"
+func_check "xvcmpeqsp. vs40,vs50,vs60"
+func_check "xvcmpgedp vs40,vs50,vs60"
+func_check "xvcmpgedp. vs40,vs50,vs60"
+func_check "xvcmpgesp vs40,vs50,vs60"
+func_check "xvcmpgesp. vs40,vs50,vs60"
+func_check "xvcmpgtdp vs40,vs50,vs60"
+func_check "xvcmpgtdp. vs40,vs50,vs60"
+func_check "xvcmpgtsp vs40,vs50,vs60"
+func_check "xvcmpgtsp. vs40,vs50,vs60"
+func_check "xvcpsgndp vs40,vs50,vs60"
+func_check "xvmovdp vs40,vs60"
+func_check "xvmovdp vs40,vs60"
+func_check "xvcpsgnsp vs40,vs50,vs60"
+func_check "xvmovsp vs40,vs60"
+func_check "xvmovsp vs40,vs60"
+func_check "xvcvdpsp vs40,vs60"
+func_check "xvcvdpsxds vs40,vs60"
+func_check "xvcvdpsxws vs40,vs60"
+func_check "xvcvdpuxds vs40,vs60"
+func_check "xvcvdpuxws vs40,vs60"
+func_check "xvcvspdp vs40,vs60"
+func_check "xvcvspsxds vs40,vs60"
+func_check "xvcvspsxws vs40,vs60"
+func_check "xvcvspuxds vs40,vs60"
+func_check "xvcvspuxws vs40,vs60"
+func_check "xvcvsxddp vs40,vs60"
+func_check "xvcvsxdsp vs40,vs60"
+func_check "xvcvsxwdp vs40,vs60"
+func_check "xvcvsxwsp vs40,vs60"
+func_check "xvcvuxddp vs40,vs60"
+func_check "xvcvuxdsp vs40,vs60"
+func_check "xvcvuxwdp vs40,vs60"
+func_check "xvcvuxwsp vs40,vs60"
+func_check "xvdivdp vs40,vs50,vs60"
+func_check "xvdivsp vs40,vs50,vs60"
+func_check "xvmaddadp vs40,vs50,vs60"
+func_check "xvmaddmdp vs40,vs50,vs60"
+func_check "xvmaddasp vs40,vs50,vs60"
+func_check "xvmaddmsp vs40,vs50,vs60"
+func_check "xvmaxdp vs40,vs50,vs60"
+func_check "xvmaxsp vs40,vs50,vs60"
+func_check "xvmindp vs40,vs50,vs60"
+func_check "xvminsp vs40,vs50,vs60"
+func_check "xvmsubadp vs40,vs50,vs60"
+func_check "xvmsubmdp vs40,vs50,vs60"
+func_check "xvmsubasp vs40,vs50,vs60"
+func_check "xvmsubmsp vs40,vs50,vs60"
+func_check "xvmuldp vs40,vs50,vs60"
+func_check "xvmulsp vs40,vs50,vs60"
+func_check "xvnabsdp vs40,vs60"
+func_check "xvnabssp vs40,vs60"
+func_check "xvnegdp vs40,vs60"
+func_check "xvnegsp vs40,vs60"
+func_check "xvnmaddadp vs40,vs50,vs60"
+func_check "xvnmaddmdp vs40,vs50,vs60"
+func_check "xvnmaddasp vs40,vs50,vs60"
+func_check "xvnmaddmsp vs40,vs50,vs60"
+func_check "xvnmsubadp vs40,vs50,vs60"
+func_check "xvnmsubmdp vs40,vs50,vs60"
+func_check "xvnmsubasp vs40,vs50,vs60"
+func_check "xvnmsubmsp vs40,vs50,vs60"
+func_check "xvrdpi vs40,vs60"
+func_check "xvrdpic vs40,vs60"
+func_check "xvrdpim vs40,vs60"
+func_check "xvrdpip vs40,vs60"
+func_check "xvrdpiz vs40,vs60"
+func_check "xvredp vs40,vs60"
+func_check "xvresp vs40,vs60"
+func_check "xvrspi vs40,vs60"
+func_check "xvrspic vs40,vs60"
+func_check "xvrspim vs40,vs60"
+func_check "xvrspip vs40,vs60"
+func_check "xvrspiz vs40,vs60"
+func_check "xvrsqrtedp vs40,vs60"
+func_check "xvrsqrtesp vs40,vs60"
+func_check "xvsqrtdp vs40,vs60"
+func_check "xvsqrtsp vs40,vs60"
+func_check "xvsubdp vs40,vs50,vs60"
+func_check "xvsubsp vs40,vs50,vs60"
+func_check "xvtdivdp cr1,vs50,vs60"
+func_check "xvtdivsp cr1,vs50,vs60"
+func_check "xvtsqrtdp cr1,vs60"
+func_check "xvtsqrtsp cr1,vs60"
+func_check "xxland vs40,vs50,vs60"
+func_check "xxlandc vs40,vs50,vs60"
+func_check "xxlnor vs40,vs50,vs60"
+func_check "xxlor vs40,vs50,vs60"
+func_check "xxlxor vs40,vs50,vs60"
+func_check "xxmrghw vs40,vs50,vs60"
+func_check "xxmrglw vs40,vs50,vs60"
+func_check "xxmrghd vs40,vs50,vs60"
+func_check "xxpermdi vs40,vs50,vs60,1"
+func_check "xxpermdi vs40,vs50,vs60,2"
+func_check "xxmrgld vs40,vs50,vs60"
+func_check "xxspltd vs40,vs50,0"
+func_check "xxspltd vs40,vs50,0"
+func_check "xxspltd vs40,vs50,1"
+func_check "xxspltd vs40,vs50,1"
+func_check "xxmrghd vs40,vs50,vs60"
+func_check "xxmrghd vs40,vs50,vs60"
+func_check "xxmrgld vs40,vs50,vs60"
+func_check "xxswapd vs40,vs50"
+func_check "xxswapd vs40,vs50"
+func_check "xxsel vs40,vs50,vs60,vs62"
+func_check "xxsldwi vs40,vs50,vs60,2"
+func_check "xxspltw vs40,vs60,2"
+func_check "lxvd2x vs40,0,r20"
+func_check "lxvd2x vs40,r10,r20"
+func_check "stxvd2x vs40,0,r20"
+func_check "stxvd2x vs40,r10,r20"
diff --git a/gdb/testsuite/gdb.arch/powerpc-vsx.s b/gdb/testsuite/gdb.arch/powerpc-vsx.s
new file mode 100644
index 0000000..3986d73
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-vsx.s
@@ -0,0 +1,182 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+ Copyright 2014-2017 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+ .text
+ .globl func
+func:
+ .long 0x7d0aa499 /* lxsdx vs40,r10,r20 */
+ .long 0x7d0aa699 /* lxvd2x vs40,r10,r20 */
+ .long 0x7d0aa299 /* lxvdsx vs40,r10,r20 */
+ .long 0x7d0aa619 /* lxvw4x vs40,r10,r20 */
+ .long 0x7d0aa599 /* stxsdx vs40,r10,r20 */
+ .long 0x7d0aa799 /* stxvd2x vs40,r10,r20 */
+ .long 0x7d0aa719 /* stxvw4x vs40,r10,r20 */
+ .long 0xf100e567 /* xsabsdp vs40,vs60 */
+ .long 0xf112e107 /* xsadddp vs40,vs50,vs60 */
+ .long 0xf092e15e /* xscmpodp cr1,vs50,vs60 */
+ .long 0xf092e11e /* xscmpudp cr1,vs50,vs60 */
+ .long 0xf112e587 /* xscpsgndp vs40,vs50,vs60 */
+ .long 0xf100e427 /* xscvdpsp vs40,vs60 */
+ .long 0xf100e563 /* xscvdpsxds vs40,vs60 */
+ .long 0xf100e163 /* xscvdpsxws vs40,vs60 */
+ .long 0xf100e523 /* xscvdpuxds vs40,vs60 */
+ .long 0xf100e123 /* xscvdpuxws vs40,vs60 */
+ .long 0xf100e527 /* xscvspdp vs40,vs60 */
+ .long 0xf100e5e3 /* xscvsxddp vs40,vs60 */
+ .long 0xf100e5a3 /* xscvuxddp vs40,vs60 */
+ .long 0xf112e1c7 /* xsdivdp vs40,vs50,vs60 */
+ .long 0xf112e10f /* xsmaddadp vs40,vs50,vs60 */
+ .long 0xf112e14f /* xsmaddmdp vs40,vs50,vs60 */
+ .long 0xf112e507 /* xsmaxdp vs40,vs50,vs60 */
+ .long 0xf112e547 /* xsmindp vs40,vs50,vs60 */
+ .long 0xf112e18f /* xsmsubadp vs40,vs50,vs60 */
+ .long 0xf112e1cf /* xsmsubmdp vs40,vs50,vs60 */
+ .long 0xf112e187 /* xsmuldp vs40,vs50,vs60 */
+ .long 0xf100e5a7 /* xsnabsdp vs40,vs60 */
+ .long 0xf100e5e7 /* xsnegdp vs40,vs60 */
+ .long 0xf112e50f /* xsnmaddadp vs40,vs50,vs60 */
+ .long 0xf112e54f /* xsnmaddmdp vs40,vs50,vs60 */
+ .long 0xf112e58f /* xsnmsubadp vs40,vs50,vs60 */
+ .long 0xf112e5cf /* xsnmsubmdp vs40,vs50,vs60 */
+ .long 0xf100e127 /* xsrdpi vs40,vs60 */
+ .long 0xf100e1af /* xsrdpic vs40,vs60 */
+ .long 0xf100e1e7 /* xsrdpim vs40,vs60 */
+ .long 0xf100e1a7 /* xsrdpip vs40,vs60 */
+ .long 0xf100e167 /* xsrdpiz vs40,vs60 */
+ .long 0xf100e16b /* xsredp vs40,vs60 */
+ .long 0xf100e12b /* xsrsqrtedp vs40,vs60 */
+ .long 0xf100e12f /* xssqrtdp vs40,vs60 */
+ .long 0xf112e147 /* xssubdp vs40,vs50,vs60 */
+ .long 0xf092e1ee /* xstdivdp cr1,vs50,vs60 */
+ .long 0xf080e1aa /* xstsqrtdp cr1,vs60 */
+ .long 0xf100e767 /* xvabsdp vs40,vs60 */
+ .long 0xf100e667 /* xvabssp vs40,vs60 */
+ .long 0xf112e307 /* xvadddp vs40,vs50,vs60 */
+ .long 0xf112e207 /* xvaddsp vs40,vs50,vs60 */
+ .long 0xf112e31f /* xvcmpeqdp vs40,vs50,vs60 */
+ .long 0xf112e71f /* xvcmpeqdp. vs40,vs50,vs60 */
+ .long 0xf112e21f /* xvcmpeqsp vs40,vs50,vs60 */
+ .long 0xf112e61f /* xvcmpeqsp. vs40,vs50,vs60 */
+ .long 0xf112e39f /* xvcmpgedp vs40,vs50,vs60 */
+ .long 0xf112e79f /* xvcmpgedp. vs40,vs50,vs60 */
+ .long 0xf112e29f /* xvcmpgesp vs40,vs50,vs60 */
+ .long 0xf112e69f /* xvcmpgesp. vs40,vs50,vs60 */
+ .long 0xf112e35f /* xvcmpgtdp vs40,vs50,vs60 */
+ .long 0xf112e75f /* xvcmpgtdp. vs40,vs50,vs60 */
+ .long 0xf112e25f /* xvcmpgtsp vs40,vs50,vs60 */
+ .long 0xf112e65f /* xvcmpgtsp. vs40,vs50,vs60 */
+ .long 0xf112e787 /* xvcpsgndp vs40,vs50,vs60 */
+ .long 0xf11ce787 /* xvmovdp vs40,vs60 */
+ .long 0xf11ce787 /* xvmovdp vs40,vs60 */
+ .long 0xf112e687 /* xvcpsgnsp vs40,vs50,vs60 */
+ .long 0xf11ce687 /* xvmovsp vs40,vs60 */
+ .long 0xf11ce687 /* xvmovsp vs40,vs60 */
+ .long 0xf100e627 /* xvcvdpsp vs40,vs60 */
+ .long 0xf100e763 /* xvcvdpsxds vs40,vs60 */
+ .long 0xf100e363 /* xvcvdpsxws vs40,vs60 */
+ .long 0xf100e723 /* xvcvdpuxds vs40,vs60 */
+ .long 0xf100e323 /* xvcvdpuxws vs40,vs60 */
+ .long 0xf100e727 /* xvcvspdp vs40,vs60 */
+ .long 0xf100e663 /* xvcvspsxds vs40,vs60 */
+ .long 0xf100e263 /* xvcvspsxws vs40,vs60 */
+ .long 0xf100e623 /* xvcvspuxds vs40,vs60 */
+ .long 0xf100e223 /* xvcvspuxws vs40,vs60 */
+ .long 0xf100e7e3 /* xvcvsxddp vs40,vs60 */
+ .long 0xf100e6e3 /* xvcvsxdsp vs40,vs60 */
+ .long 0xf100e3e3 /* xvcvsxwdp vs40,vs60 */
+ .long 0xf100e2e3 /* xvcvsxwsp vs40,vs60 */
+ .long 0xf100e7a3 /* xvcvuxddp vs40,vs60 */
+ .long 0xf100e6a3 /* xvcvuxdsp vs40,vs60 */
+ .long 0xf100e3a3 /* xvcvuxwdp vs40,vs60 */
+ .long 0xf100e2a3 /* xvcvuxwsp vs40,vs60 */
+ .long 0xf112e3c7 /* xvdivdp vs40,vs50,vs60 */
+ .long 0xf112e2c7 /* xvdivsp vs40,vs50,vs60 */
+ .long 0xf112e30f /* xvmaddadp vs40,vs50,vs60 */
+ .long 0xf112e34f /* xvmaddmdp vs40,vs50,vs60 */
+ .long 0xf112e20f /* xvmaddasp vs40,vs50,vs60 */
+ .long 0xf112e24f /* xvmaddmsp vs40,vs50,vs60 */
+ .long 0xf112e707 /* xvmaxdp vs40,vs50,vs60 */
+ .long 0xf112e607 /* xvmaxsp vs40,vs50,vs60 */
+ .long 0xf112e747 /* xvmindp vs40,vs50,vs60 */
+ .long 0xf112e647 /* xvminsp vs40,vs50,vs60 */
+ .long 0xf112e38f /* xvmsubadp vs40,vs50,vs60 */
+ .long 0xf112e3cf /* xvmsubmdp vs40,vs50,vs60 */
+ .long 0xf112e28f /* xvmsubasp vs40,vs50,vs60 */
+ .long 0xf112e2cf /* xvmsubmsp vs40,vs50,vs60 */
+ .long 0xf112e387 /* xvmuldp vs40,vs50,vs60 */
+ .long 0xf112e287 /* xvmulsp vs40,vs50,vs60 */
+ .long 0xf100e7a7 /* xvnabsdp vs40,vs60 */
+ .long 0xf100e6a7 /* xvnabssp vs40,vs60 */
+ .long 0xf100e7e7 /* xvnegdp vs40,vs60 */
+ .long 0xf100e6e7 /* xvnegsp vs40,vs60 */
+ .long 0xf112e70f /* xvnmaddadp vs40,vs50,vs60 */
+ .long 0xf112e74f /* xvnmaddmdp vs40,vs50,vs60 */
+ .long 0xf112e60f /* xvnmaddasp vs40,vs50,vs60 */
+ .long 0xf112e64f /* xvnmaddmsp vs40,vs50,vs60 */
+ .long 0xf112e78f /* xvnmsubadp vs40,vs50,vs60 */
+ .long 0xf112e7cf /* xvnmsubmdp vs40,vs50,vs60 */
+ .long 0xf112e68f /* xvnmsubasp vs40,vs50,vs60 */
+ .long 0xf112e6cf /* xvnmsubmsp vs40,vs50,vs60 */
+ .long 0xf100e327 /* xvrdpi vs40,vs60 */
+ .long 0xf100e3af /* xvrdpic vs40,vs60 */
+ .long 0xf100e3e7 /* xvrdpim vs40,vs60 */
+ .long 0xf100e3a7 /* xvrdpip vs40,vs60 */
+ .long 0xf100e367 /* xvrdpiz vs40,vs60 */
+ .long 0xf100e36b /* xvredp vs40,vs60 */
+ .long 0xf100e26b /* xvresp vs40,vs60 */
+ .long 0xf100e227 /* xvrspi vs40,vs60 */
+ .long 0xf100e2af /* xvrspic vs40,vs60 */
+ .long 0xf100e2e7 /* xvrspim vs40,vs60 */
+ .long 0xf100e2a7 /* xvrspip vs40,vs60 */
+ .long 0xf100e267 /* xvrspiz vs40,vs60 */
+ .long 0xf100e32b /* xvrsqrtedp vs40,vs60 */
+ .long 0xf100e22b /* xvrsqrtesp vs40,vs60 */
+ .long 0xf100e32f /* xvsqrtdp vs40,vs60 */
+ .long 0xf100e22f /* xvsqrtsp vs40,vs60 */
+ .long 0xf112e347 /* xvsubdp vs40,vs50,vs60 */
+ .long 0xf112e247 /* xvsubsp vs40,vs50,vs60 */
+ .long 0xf092e3ee /* xvtdivdp cr1,vs50,vs60 */
+ .long 0xf092e2ee /* xvtdivsp cr1,vs50,vs60 */
+ .long 0xf080e3aa /* xvtsqrtdp cr1,vs60 */
+ .long 0xf080e2aa /* xvtsqrtsp cr1,vs60 */
+ .long 0xf112e417 /* xxland vs40,vs50,vs60 */
+ .long 0xf112e457 /* xxlandc vs40,vs50,vs60 */
+ .long 0xf112e517 /* xxlnor vs40,vs50,vs60 */
+ .long 0xf112e497 /* xxlor vs40,vs50,vs60 */
+ .long 0xf112e4d7 /* xxlxor vs40,vs50,vs60 */
+ .long 0xf112e097 /* xxmrghw vs40,vs50,vs60 */
+ .long 0xf112e197 /* xxmrglw vs40,vs50,vs60 */
+ .long 0xf112e057 /* xxmrghd vs40,vs50,vs60 */
+ .long 0xf112e157 /* xxpermdi vs40,vs50,vs60,1 */
+ .long 0xf112e257 /* xxpermdi vs40,vs50,vs60,2 */
+ .long 0xf112e357 /* xxmrgld vs40,vs50,vs60 */
+ .long 0xf1129057 /* xxspltd vs40,vs50,0 */
+ .long 0xf1129057 /* xxspltd vs40,vs50,0 */
+ .long 0xf1129357 /* xxspltd vs40,vs50,1 */
+ .long 0xf1129357 /* xxspltd vs40,vs50,1 */
+ .long 0xf112e057 /* xxmrghd vs40,vs50,vs60 */
+ .long 0xf112e057 /* xxmrghd vs40,vs50,vs60 */
+ .long 0xf112e357 /* xxmrgld vs40,vs50,vs60 */
+ .long 0xf1129257 /* xxswapd vs40,vs50 */
+ .long 0xf1129257 /* xxswapd vs40,vs50 */
+ .long 0xf112e7bf /* xxsel vs40,vs50,vs60,vs62 */
+ .long 0xf112e217 /* xxsldwi vs40,vs50,vs60,2 */
+ .long 0xf102e293 /* xxspltw vs40,vs60,2 */
+ .long 0x7d00a699 /* lxvd2x vs40,0,r20 */
+ .long 0x7d0aa699 /* lxvd2x vs40,r10,r20 */
+ .long 0x7d00a799 /* stxvd2x vs40,0,r20 */
+ .long 0x7d0aa799 /* stxvd2x vs40,r10,r20 */
diff --git a/gdb/testsuite/gdb.arch/powerpc-vsx2.exp b/gdb/testsuite/gdb.arch/powerpc-vsx2.exp
new file mode 100644
index 0000000..ce2e237
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-vsx2.exp
@@ -0,0 +1,118 @@
+# Copyright 2014-2017 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.
+
+# Test PowerPC instructions disassembly.
+
+standard_testfile .s
+set objfile [standard_output_file ${testfile}.o]
+
+if {![istarget "powerpc*-*-*"]} then {
+ verbose "Skipping PowerPC instructions disassembly."
+ return
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${objfile}" object {debug}] != "" } {
+ untested "PowerPC instructions disassembly"
+ return -1
+}
+
+clean_restart ${objfile}
+
+# Disassemble the function.
+set func ""
+
+gdb_test "set disassembler-options vsx"
+set test "disass func"
+gdb_test_multiple $test $test {
+ -re "\r\nDump of assembler code for function func:(\r\n.*\r\n)End of assembler dump.\r\n$gdb_prompt $" {
+ set func $expect_out(1,string)
+ pass $test
+ }
+}
+
+proc instr_to_patt {instr} {
+ global decimal hex
+ # 0x0000000000000018 <+24>: stxvd2x vs43,r4,r5
+ return "\[ \t\]*$hex <\\+$decimal>:\[ \t\]*[string_to_regexp $instr]"
+}
+
+proc func_check {instr} {
+ global func
+
+ set test "found: $instr"
+ if [regexp -nocase -line [instr_to_patt $instr] $func] {
+ pass $test
+ } else {
+ fail $test
+ }
+}
+
+func_check "lxsiwzx vs62,r14,r26"
+func_check "lxsiwzx vs40,0,r25"
+func_check "lxsiwax vs25,0,r26"
+func_check "lxsiwax vs3,0,r3"
+func_check "mfvsrd r12,vs30"
+func_check "mfvsrd r12,vs30"
+func_check "mfvsrd r12,vs62"
+func_check "mfvsrd r12,vs62"
+func_check "mffprwz r20,f12"
+func_check "mffprwz r20,f12"
+func_check "mfvrwz r21,v12"
+func_check "mfvrwz r21,v12"
+func_check "stxsiwx vs14,r9,r14"
+func_check "stxsiwx vs21,0,r8"
+func_check "mtvsrd vs11,r28"
+func_check "mtvsrd vs11,r28"
+func_check "mtvsrd vs43,r29"
+func_check "mtvsrd vs43,r29"
+func_check "mtfprwa f24,r22"
+func_check "mtfprwa f24,r22"
+func_check "mtvrwa v25,r23"
+func_check "mtvrwa v25,r23"
+func_check "mtfprwz f26,r27"
+func_check "mtfprwz f26,r27"
+func_check "mtvrwz v27,r28"
+func_check "mtvrwz v27,r28"
+func_check "lxsspx vs13,r19,r13"
+func_check "lxsspx vs18,0,r13"
+func_check "stxsspx vs43,r2,r4"
+func_check "stxsspx vs55,0,r11"
+func_check "xsaddsp vs54,vs48,vs25"
+func_check "xsmaddasp vs14,vs50,vs1"
+func_check "xssubsp vs26,vs22,vs42"
+func_check "xsmaddmsp vs27,vs53,vs52"
+func_check "xsrsqrtesp vs8,vs59"
+func_check "xssqrtsp vs12,vs41"
+func_check "xsmulsp vs57,vs11,vs32"
+func_check "xsmsubasp vs38,vs20,vs26"
+func_check "xsdivsp vs26,vs19,vs6"
+func_check "xsmsubmsp vs35,vs37,vs55"
+func_check "xsresp vs59,vs8"
+func_check "xsnmaddasp vs44,vs33,vs33"
+func_check "xsnmaddmsp vs17,vs62,vs30"
+func_check "xsnmsubasp vs54,vs52,vs31"
+func_check "xsnmsubmsp vs37,vs5,vs58"
+func_check "xxlorc vs30,vs54,vs44"
+func_check "xxlnand vs49,vs14,vs29"
+func_check "xxleqv vs62,vs22,vs30"
+func_check "xscvdpspn vs60,vs54"
+func_check "xsrsp vs22,vs45"
+func_check "xscvuxdsp vs26,vs59"
+func_check "xscvsxdsp vs38,vs49"
+func_check "xscvspdpn vs59,vs26"
+func_check "fmrgow f24,f14,f2"
+func_check "fmrgew f22,f7,f5"
diff --git a/gdb/testsuite/gdb.arch/powerpc-vsx2.s b/gdb/testsuite/gdb.arch/powerpc-vsx2.s
new file mode 100644
index 0000000..4ac411b
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-vsx2.s
@@ -0,0 +1,75 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+ Copyright 2014-2017 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+ .text
+ .globl func
+func:
+ .long 0x7fced019 /* lxsiwzx vs62,r14,r26 */
+ .long 0x7d00c819 /* lxsiwzx vs40,0,r25 */
+ .long 0x7f20d098 /* lxsiwax vs25,0,r26 */
+ .long 0x7c601898 /* lxsiwax vs3,0,r3 */
+ .long 0x7fcc0066 /* mfvsrd r12,vs30 */
+ .long 0x7fcc0066 /* mfvsrd r12,vs30 */
+ .long 0x7fcc0067 /* mfvsrd r12,vs62 */
+ .long 0x7fcc0067 /* mfvsrd r12,vs62 */
+ .long 0x7d9400e6 /* mffprwz r20,f12 */
+ .long 0x7d9400e6 /* mffprwz r20,f12 */
+ .long 0x7d9500e7 /* mfvrwz r21,v12 */
+ .long 0x7d9500e7 /* mfvrwz r21,v12 */
+ .long 0x7dc97118 /* stxsiwx vs14,r9,r14 */
+ .long 0x7ea04118 /* stxsiwx vs21,0,r8 */
+ .long 0x7d7c0166 /* mtvsrd vs11,r28 */
+ .long 0x7d7c0166 /* mtvsrd vs11,r28 */
+ .long 0x7d7d0167 /* mtvsrd vs43,r29 */
+ .long 0x7d7d0167 /* mtvsrd vs43,r29 */
+ .long 0x7f1601a6 /* mtfprwa f24,r22 */
+ .long 0x7f1601a6 /* mtfprwa f24,r22 */
+ .long 0x7f3701a7 /* mtvrwa v25,r23 */
+ .long 0x7f3701a7 /* mtvrwa v25,r23 */
+ .long 0x7f5b01e6 /* mtfprwz f26,r27 */
+ .long 0x7f5b01e6 /* mtfprwz f26,r27 */
+ .long 0x7f7c01e7 /* mtvrwz v27,r28 */
+ .long 0x7f7c01e7 /* mtvrwz v27,r28 */
+ .long 0x7db36c18 /* lxsspx vs13,r19,r13 */
+ .long 0x7e406c18 /* lxsspx vs18,0,r13 */
+ .long 0x7d622519 /* stxsspx vs43,r2,r4 */
+ .long 0x7ee05d19 /* stxsspx vs55,0,r11 */
+ .long 0xf2d0c805 /* xsaddsp vs54,vs48,vs25 */
+ .long 0xf1d2080c /* xsmaddasp vs14,vs50,vs1 */
+ .long 0xf3565042 /* xssubsp vs26,vs22,vs42 */
+ .long 0xf375a04e /* xsmaddmsp vs27,vs53,vs52 */
+ .long 0xf100d82a /* xsrsqrtesp vs8,vs59 */
+ .long 0xf180482e /* xssqrtsp vs12,vs41 */
+ .long 0xf32b0083 /* xsmulsp vs57,vs11,vs32 */
+ .long 0xf0d4d089 /* xsmsubasp vs38,vs20,vs26 */
+ .long 0xf35330c0 /* xsdivsp vs26,vs19,vs6 */
+ .long 0xf065b8cf /* xsmsubmsp vs35,vs37,vs55 */
+ .long 0xf3604069 /* xsresp vs59,vs8 */
+ .long 0xf1810c0f /* xsnmaddasp vs44,vs33,vs33 */
+ .long 0xf23ef44c /* xsnmaddmsp vs17,vs62,vs30 */
+ .long 0xf2d4fc8d /* xsnmsubasp vs54,vs52,vs31 */
+ .long 0xf0a5d4cb /* xsnmsubmsp vs37,vs5,vs58 */
+ .long 0xf3d66556 /* xxlorc vs30,vs54,vs44 */
+ .long 0xf22eed91 /* xxlnand vs49,vs14,vs29 */
+ .long 0xf3d6f5d1 /* xxleqv vs62,vs22,vs30 */
+ .long 0xf380b42f /* xscvdpspn vs60,vs54 */
+ .long 0xf2c06c66 /* xsrsp vs22,vs45 */
+ .long 0xf340dca2 /* xscvuxdsp vs26,vs59 */
+ .long 0xf0c08ce3 /* xscvsxdsp vs38,vs49 */
+ .long 0xf360d52d /* xscvspdpn vs59,vs26 */
+ .long 0xff0e168c /* fmrgow f24,f14,f2 */
+ .long 0xfec72f8c /* fmrgew f22,f7,f5 */
diff --git a/gdb/testsuite/gdb.arch/powerpc-vsx3.exp b/gdb/testsuite/gdb.arch/powerpc-vsx3.exp
new file mode 100644
index 0000000..8008c63
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-vsx3.exp
@@ -0,0 +1,184 @@
+# Copyright 2014-2017 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.
+
+# Test PowerPC instructions disassembly.
+
+standard_testfile .s
+set objfile [standard_output_file ${testfile}.o]
+
+if {![istarget "powerpc*-*-*"]} then {
+ verbose "Skipping PowerPC instructions disassembly."
+ return
+}
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${objfile}" object {debug}] != "" } {
+ untested "PowerPC instructions disassembly"
+ return -1
+}
+
+clean_restart ${objfile}
+
+# Disassemble the function.
+set func ""
+
+gdb_test "set disassembler-options vsx"
+set test "disass func"
+gdb_test_multiple $test $test {
+ -re "\r\nDump of assembler code for function func:(\r\n.*\r\n)End of assembler dump.\r\n$gdb_prompt $" {
+ set func $expect_out(1,string)
+ pass $test
+ }
+}
+
+proc instr_to_patt {instr} {
+ global decimal hex
+ # 0x0000000000000018 <+24>: stxvd2x vs43,r4,r5
+ return "\[ \t\]*$hex <\\+$decimal>:\[ \t\]*[string_to_regexp $instr]"
+}
+
+proc func_check {instr} {
+ global func
+
+ set test "found: $instr"
+ if [regexp -nocase -line [instr_to_patt $instr] $func] {
+ pass $test
+ } else {
+ fail $test
+ }
+}
+
+func_check "lxvx vs34,r6,r25"
+func_check "lxvx vs20,0,r10"
+func_check "lxvl vs20,r24,r10"
+func_check "lxvl vs54,0,r29"
+func_check "lxvll vs24,r20,r19"
+func_check "lxvll vs34,0,r14"
+func_check "mfvsrld r2,vs22"
+func_check "lxvwsx vs58,r26,r25"
+func_check "lxvwsx vs55,0,r29"
+func_check "stxvx vs14,r21,r4"
+func_check "stxvx vs30,0,r22"
+func_check "stxvl vs0,r26,r4"
+func_check "stxvl vs37,0,r22"
+func_check "mtvsrws vs24,r10"
+func_check "stxvll vs30,r21,r15"
+func_check "stxvll vs39,0,r14"
+func_check "mtvsrdd vs12,r6,r5"
+func_check "mtvsrdd vs38,0,r21"
+func_check "lxsibzx vs59,r28,r6"
+func_check "lxsibzx vs30,0,r8"
+func_check "lxvh8x vs42,r23,r17"
+func_check "lxvh8x vs36,0,r5"
+func_check "lxsihzx vs12,r9,r11"
+func_check "lxsihzx vs49,0,r13"
+func_check "lxvb16x vs37,r3,r19"
+func_check "lxvb16x vs0,0,r30"
+func_check "stxsibx vs2,r30,r6"
+func_check "stxsibx vs12,0,r13"
+func_check "stxvh8x vs16,r29,r8"
+func_check "stxvh8x vs55,0,r10"
+func_check "stxsihx vs34,r2,r23"
+func_check "stxsihx vs60,0,r23"
+func_check "stxvb16x vs23,r14,r12"
+func_check "stxvb16x vs19,0,r5"
+func_check "lxsd v24,0(0)"
+func_check "lxsd v15,16(r21)"
+func_check "lxssp v6,0(0)"
+func_check "lxssp v23,16(r9)"
+func_check "xscmpeqdp vs18,vs51,vs33"
+func_check "xscmpgtdp vs2,vs26,vs34"
+func_check "xscmpgedp vs5,vs26,vs20"
+func_check "xxperm vs44,vs10,vs43"
+func_check "xxpermr vs41,vs20,vs5"
+func_check "xscmpexpdp cr4,vs18,vs55"
+func_check "xxextractuw vs23,vs37,3"
+func_check "xxspltib vs54,235"
+func_check "xxinsertw vs15,vs30,4"
+func_check "xsmaxcdp vs12,vs11,vs7"
+func_check "xsmincdp vs32,vs25,vs24"
+func_check "xsmaxjdp vs25,vs53,vs12"
+func_check "xststdcsp cr2,vs36,127"
+func_check "xsminjdp vs32,vs21,vs45"
+func_check "xsxexpdp r17,vs50"
+func_check "xsxsigdp r7,vs40"
+func_check "xscvhpdp vs54,vs34"
+func_check "xscvdphp vs58,vs54"
+func_check "xststdcdp cr0,vs38,127"
+func_check "xvtstdcsp vs56,vs53,127"
+func_check "xviexpsp vs54,vs20,vs52"
+func_check "xsiexpdp vs57,r28,r29"
+func_check "xvxexpdp vs1,vs20"
+func_check "xvxsigdp vs54,vs59"
+func_check "xxbrh vs18,vs37"
+func_check "xvxexpsp vs14,vs1"
+func_check "xvxsigsp vs52,vs13"
+func_check "xxbrw vs19,vs5"
+func_check "xxbrd vs51,vs55"
+func_check "xvcvhpsp vs35,vs17"
+func_check "xvcvsphp vs15,vs45"
+func_check "xxbrq vs17,vs31"
+func_check "xvtstdcdp vs16,vs12,127"
+func_check "xviexpdp vs27,vs9,vs8"
+func_check "lxv vs4,0(0)"
+func_check "lxv vs40,16(r20)"
+func_check "stxv vs50,0(0)"
+func_check "stxv vs8,16(r16)"
+func_check "stxsd v3,0(0)"
+func_check "stxsd v17,16(r2)"
+func_check "stxssp v13,0(0)"
+func_check "stxssp v17,16(r13)"
+func_check "xsaddqp v8,v10,v18"
+func_check "xsaddqpo v5,v1,v29"
+func_check "xsrqpi 0,v12,v18,3"
+func_check "xsrqpix 1,v31,v19,0"
+func_check "xsmulqp v14,v1,v6"
+func_check "xsmulqpo v17,v7,v27"
+func_check "xsrqpxp 0,v4,v11,0"
+func_check "xscpsgnqp v29,v23,v28"
+func_check "xscmpoqp cr7,v13,v27"
+func_check "xscmpexpqp cr5,v21,v6"
+func_check "xsmaddqp v2,v19,v4"
+func_check "xsmaddqpo v30,v7,v16"
+func_check "xsmsubqp v21,v30,v15"
+func_check "xsmsubqpo v12,v17,v30"
+func_check "xsnmaddqp v6,v30,v12"
+func_check "xsnmaddqpo v12,v22,v12"
+func_check "xsnmsubqp v10,v29,v27"
+func_check "xsnmsubqpo v29,v29,v13"
+func_check "xssubqp v19,v27,v4"
+func_check "xssubqpo v13,v8,v1"
+func_check "xsdivqp v8,v3,v27"
+func_check "xsdivqpo v24,v20,v27"
+func_check "xscmpuqp cr7,v14,v4"
+func_check "xststdcqp cr4,v2,127"
+func_check "xsabsqp v31,v22"
+func_check "xsxexpqp v25,v3"
+func_check "xsnabsqp v10,v28"
+func_check "xsnegqp v19,v31"
+func_check "xsxsigqp v11,v13"
+func_check "xssqrtqp v13,v14"
+func_check "xssqrtqpo v1,v27"
+func_check "xscvqpuwz v3,v7"
+func_check "xscvudqp v20,v18"
+func_check "xscvqpswz v29,v29"
+func_check "xscvsdqp v2,v28"
+func_check "xscvqpudz v23,v4"
+func_check "xscvqpdp v3,v20"
+func_check "xscvqpdpo v1,v3"
+func_check "xscvdpqp v19,v12"
+func_check "xscvqpsdz v13,v4"
+func_check "xsiexpqp v7,v24,v7"
diff --git a/gdb/testsuite/gdb.arch/powerpc-vsx3.s b/gdb/testsuite/gdb.arch/powerpc-vsx3.s
new file mode 100644
index 0000000..297e1af
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/powerpc-vsx3.s
@@ -0,0 +1,141 @@
+/* This testcase is part of GDB, the GNU debugger.
+
+ Copyright 2014-2017 Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+ .text
+ .globl func
+func:
+ .long 0x7c46ca19 /* lxvx vs34,r6,r25 */
+ .long 0x7e805218 /* lxvx vs20,0,r10 */
+ .long 0x7e98521a /* lxvl vs20,r24,r10 */
+ .long 0x7ec0ea1b /* lxvl vs54,0,r29 */
+ .long 0x7f149a5a /* lxvll vs24,r20,r19 */
+ .long 0x7c40725b /* lxvll vs34,0,r14 */
+ .long 0x7ec20266 /* mfvsrld r2,vs22 */
+ .long 0x7f5acad9 /* lxvwsx vs58,r26,r25 */
+ .long 0x7ee0ead9 /* lxvwsx vs55,0,r29 */
+ .long 0x7dd52318 /* stxvx vs14,r21,r4 */
+ .long 0x7fc0b318 /* stxvx vs30,0,r22 */
+ .long 0x7c1a231a /* stxvl vs0,r26,r4 */
+ .long 0x7ca0b31b /* stxvl vs37,0,r22 */
+ .long 0x7f0a0326 /* mtvsrws vs24,r10 */
+ .long 0x7fd57b5a /* stxvll vs30,r21,r15 */
+ .long 0x7ce0735b /* stxvll vs39,0,r14 */
+ .long 0x7d862b66 /* mtvsrdd vs12,r6,r5 */
+ .long 0x7cc0ab67 /* mtvsrdd vs38,0,r21 */
+ .long 0x7f7c361b /* lxsibzx vs59,r28,r6 */
+ .long 0x7fc0461a /* lxsibzx vs30,0,r8 */
+ .long 0x7d578e59 /* lxvh8x vs42,r23,r17 */
+ .long 0x7c802e59 /* lxvh8x vs36,0,r5 */
+ .long 0x7d895e5a /* lxsihzx vs12,r9,r11 */
+ .long 0x7e206e5b /* lxsihzx vs49,0,r13 */
+ .long 0x7ca39ed9 /* lxvb16x vs37,r3,r19 */
+ .long 0x7c00f6d8 /* lxvb16x vs0,0,r30 */
+ .long 0x7c5e371a /* stxsibx vs2,r30,r6 */
+ .long 0x7d806f1a /* stxsibx vs12,0,r13 */
+ .long 0x7e1d4758 /* stxvh8x vs16,r29,r8 */
+ .long 0x7ee05759 /* stxvh8x vs55,0,r10 */
+ .long 0x7c42bf5b /* stxsihx vs34,r2,r23 */
+ .long 0x7f80bf5b /* stxsihx vs60,0,r23 */
+ .long 0x7eee67d8 /* stxvb16x vs23,r14,r12 */
+ .long 0x7e602fd8 /* stxvb16x vs19,0,r5 */
+ .long 0xe7000002 /* lxsd v24,0(0) */
+ .long 0xe5f50012 /* lxsd v15,16(r21) */
+ .long 0xe4c00003 /* lxssp v6,0(0) */
+ .long 0xe6e90013 /* lxssp v23,16(r9) */
+ .long 0xf253081e /* xscmpeqdp vs18,vs51,vs33 */
+ .long 0xf05a105a /* xscmpgtdp vs2,vs26,vs34 */
+ .long 0xf0baa098 /* xscmpgedp vs5,vs26,vs20 */
+ .long 0xf18a58d3 /* xxperm vs44,vs10,vs43 */
+ .long 0xf13429d1 /* xxpermr vs41,vs20,vs5 */
+ .long 0xf212b9da /* xscmpexpdp cr4,vs18,vs55 */
+ .long 0xf2e32a96 /* xxextractuw vs23,vs37,3 */
+ .long 0xf2c75ad1 /* xxspltib vs54,235 */
+ .long 0xf1e4f2d4 /* xxinsertw vs15,vs30,4 */
+ .long 0xf18b3c00 /* xsmaxcdp vs12,vs11,vs7 */
+ .long 0xf019c441 /* xsmincdp vs32,vs25,vs24 */
+ .long 0xf3356484 /* xsmaxjdp vs25,vs53,vs12 */
+ .long 0xf17f24aa /* xststdcsp cr2,vs36,127 */
+ .long 0xf0156cc3 /* xsminjdp vs32,vs21,vs45 */
+ .long 0xf220956e /* xsxexpdp r17,vs50 */
+ .long 0xf0e1456e /* xsxsigdp r7,vs40 */
+ .long 0xf2d0156f /* xscvhpdp vs54,vs34 */
+ .long 0xf351b56f /* xscvdphp vs58,vs54 */
+ .long 0xf07f35aa /* xststdcdp cr0,vs38,127 */
+ .long 0xf31faeef /* xvtstdcsp vs56,vs53,127 */
+ .long 0xf2d4a6c3 /* xviexpsp vs54,vs20,vs52 */
+ .long 0xf33cef2d /* xsiexpdp vs57,r28,r29 */
+ .long 0xf020a76c /* xvxexpdp vs1,vs20 */
+ .long 0xf2c1df6f /* xvxsigdp vs54,vs59 */
+ .long 0xf2472f6e /* xxbrh vs18,vs37 */
+ .long 0xf1c80f6c /* xvxexpsp vs14,vs1 */
+ .long 0xf2896f6d /* xvxsigsp vs52,vs13 */
+ .long 0xf26f2f6c /* xxbrw vs19,vs5 */
+ .long 0xf277bf6f /* xxbrd vs51,vs55 */
+ .long 0xf0788f6d /* xvcvhpsp vs35,vs17 */
+ .long 0xf1f96f6e /* xvcvsphp vs15,vs45 */
+ .long 0xf23fff6c /* xxbrq vs17,vs31 */
+ .long 0xf21f67ec /* xvtstdcdp vs16,vs12,127 */
+ .long 0xf36947c0 /* xviexpdp vs27,vs9,vs8 */
+ .long 0xf4800001 /* lxv vs4,0(0) */
+ .long 0xf5140019 /* lxv vs40,16(r20) */
+ .long 0xf640000d /* stxv vs50,0(0) */
+ .long 0xf5100015 /* stxv vs8,16(r16) */
+ .long 0xf4600002 /* stxsd v3,0(0) */
+ .long 0xf6220012 /* stxsd v17,16(r2) */
+ .long 0xf5a00003 /* stxssp v13,0(0) */
+ .long 0xf62d0013 /* stxssp v17,16(r13) */
+ .long 0xfd0a9008 /* xsaddqp v8,v10,v18 */
+ .long 0xfca1e809 /* xsaddqpo v5,v1,v29 */
+ .long 0xfd80960a /* xsrqpi 0,v12,v18,3 */
+ .long 0xffe1980b /* xsrqpix 1,v31,v19,0 */
+ .long 0xfdc13048 /* xsmulqp v14,v1,v6 */
+ .long 0xfe27d849 /* xsmulqpo v17,v7,v27 */
+ .long 0xfc80584a /* xsrqpxp 0,v4,v11,0 */
+ .long 0xffb7e0c8 /* xscpsgnqp v29,v23,v28 */
+ .long 0xff8dd908 /* xscmpoqp cr7,v13,v27 */
+ .long 0xfe953148 /* xscmpexpqp cr5,v21,v6 */
+ .long 0xfc532308 /* xsmaddqp v2,v19,v4 */
+ .long 0xffc78309 /* xsmaddqpo v30,v7,v16 */
+ .long 0xfebe7b48 /* xsmsubqp v21,v30,v15 */
+ .long 0xfd91f349 /* xsmsubqpo v12,v17,v30 */
+ .long 0xfcde6388 /* xsnmaddqp v6,v30,v12 */
+ .long 0xfd966389 /* xsnmaddqpo v12,v22,v12 */
+ .long 0xfd5ddbc8 /* xsnmsubqp v10,v29,v27 */
+ .long 0xffbd6bc9 /* xsnmsubqpo v29,v29,v13 */
+ .long 0xfe7b2408 /* xssubqp v19,v27,v4 */
+ .long 0xfda80c09 /* xssubqpo v13,v8,v1 */
+ .long 0xfd03dc48 /* xsdivqp v8,v3,v27 */
+ .long 0xff14dc49 /* xsdivqpo v24,v20,v27 */
+ .long 0xff8e2508 /* xscmpuqp cr7,v14,v4 */
+ .long 0xfe7f1588 /* xststdcqp cr4,v2,127 */
+ .long 0xffe0b648 /* xsabsqp v31,v22 */
+ .long 0xff221e48 /* xsxexpqp v25,v3 */
+ .long 0xfd48e648 /* xsnabsqp v10,v28 */
+ .long 0xfe70fe48 /* xsnegqp v19,v31 */
+ .long 0xfd726e48 /* xsxsigqp v11,v13 */
+ .long 0xfdbb7648 /* xssqrtqp v13,v14 */
+ .long 0xfc3bde49 /* xssqrtqpo v1,v27 */
+ .long 0xfc613e88 /* xscvqpuwz v3,v7 */
+ .long 0xfe829688 /* xscvudqp v20,v18 */
+ .long 0xffa9ee88 /* xscvqpswz v29,v29 */
+ .long 0xfc4ae688 /* xscvsdqp v2,v28 */
+ .long 0xfef12688 /* xscvqpudz v23,v4 */
+ .long 0xfc74a688 /* xscvqpdp v3,v20 */
+ .long 0xfc341e89 /* xscvqpdpo v1,v3 */
+ .long 0xfe766688 /* xscvdpqp v19,v12 */
+ .long 0xfdb92688 /* xscvqpsdz v13,v4 */
+ .long 0xfcf83ec8 /* xsiexpqp v7,v24,v7 */
diff --git a/gdb/testsuite/gdb.arch/s390-disassembler-options.exp b/gdb/testsuite/gdb.arch/s390-disassembler-options.exp
new file mode 100644
index 0000000..af791e4
--- /dev/null
+++ b/gdb/testsuite/gdb.arch/s390-disassembler-options.exp
@@ -0,0 +1,56 @@
+# Copyright 2014-2017 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# This file is part of the gdb testsuite.
+
+# This test exercises set/show disassembler-options results are preserved
+# across multiple set architecture calls.
+
+if {![istarget "s390*-*-*"]} then {
+ verbose "Skipping S390 disassembler options."
+ return
+}
+
+gdb_exit
+gdb_start
+
+set option "esa"
+set arch1 "s390:64-bit"
+set arch2 "s390:31-bit"
+
+gdb_test "set architecture $arch1" \
+ "The target architecture is assumed to be $arch1" \
+ "set architecture $arch1"
+
+gdb_test_no_output "set disassembler-options"
+gdb_test "show disassembler-options" \
+ "The current disassembler options are ''.*" \
+ "show NULL disassembler-options"
+
+gdb_test_no_output "set disassembler-options $option"
+gdb_test "show disassembler-options" \
+ "The current disassembler options are '$option'.*" \
+ "show disassembler-options $option"
+
+# Change architectures and verify the disassembler options have been preserved.
+
+gdb_test "set architecture $arch2" \
+ "The target architecture is assumed to be $arch2" \
+ "set architecture $arch2"
+
+gdb_test "show disassembler-options" \
+ "The current disassembler options are '$option'.*" \
+ "show disassembler-options $option"
+
diff --git a/gdb/testsuite/gdb.disasm/disassembler-options.exp b/gdb/testsuite/gdb.disasm/disassembler-options.exp
new file mode 100644
index 0000000..48f2b28
--- /dev/null
+++ b/gdb/testsuite/gdb.disasm/disassembler-options.exp
@@ -0,0 +1,34 @@
+# Copyright (C) 2017 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+# This test exercises set/show disassembler-options
+
+gdb_exit
+gdb_start
+
+gdb_test_no_output "set disassembler-options"
+gdb_test "show disassembler-options" \
+ "The current disassembler options are ''.*" \
+ "show NULL disassembler-options"
+
+set test "set disassembler-options invalid_option_value"
+gdb_test_multiple $test $test {
+ -re "Invalid disassembler option value: 'invalid_option_value'\." {
+ pass $test
+ }
+ -re "'set disassembler-options \.\.\.' is not supported on this architecture\." {
+ pass $test
+ }
+}
diff --git a/include/ChangeLog b/include/ChangeLog
index de28dcb..17e1752 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,19 @@
+2017-02-28 Peter Bergner <bergner@vnet.ibm.com>
+
+ * dis-asm.h (disasm_options_t): New typedef.
+ (parse_arm_disassembler_option): Remove prototype.
+ (set_arm_regname_option): Likewise.
+ (get_arm_regnames): Likewise.
+ (get_arm_regname_num_options): Likewise.
+ (disassemble_init_s390): New prototype.
+ (disassembler_options_powerpc): Likewise.
+ (disassembler_options_arm): Likewise.
+ (disassembler_options_s390): Likewise.
+ (remove_whitespace_and_extra_commas): Likewise.
+ (disassembler_options_cmp): Likewise.
+ (next_disassembler_option): New inline function.
+ (FOR_EACH_DISASSEMBLER_OPTION): New macro.
+
2017-02-28 Alan Modra <amodra@gmail.com>
* elf/ppc64.h (R_PPC64_16DX_HA): New. Expand fake reloc comment.
diff --git a/include/dis-asm.h b/include/dis-asm.h
index 4872920..f054450 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -222,6 +222,16 @@ typedef struct disassemble_info
} disassemble_info;
+/* This struct is used to pass information about valid disassembler options
+ and their descriptions from the target to the generic GDB functions that
+ set and display them. */
+
+typedef struct
+{
+ const char **name;
+ const char **description;
+} disasm_options_t;
+
/* Standard disassemblers. Disassemble one instruction at the given
target address. Return number of octets processed. */
@@ -332,14 +342,14 @@ extern void print_ppc_disassembler_options (FILE *);
extern void print_riscv_disassembler_options (FILE *);
extern void print_arm_disassembler_options (FILE *);
extern void print_arc_disassembler_options (FILE *);
-extern void parse_arm_disassembler_option (char *);
extern void print_s390_disassembler_options (FILE *);
-extern int get_arm_regname_num_options (void);
-extern int set_arm_regname_option (int);
-extern int get_arm_regnames (int, const char **, const char **, const char *const **);
extern bfd_boolean aarch64_symbol_is_valid (asymbol *, struct disassemble_info *);
extern bfd_boolean arm_symbol_is_valid (asymbol *, struct disassemble_info *);
extern void disassemble_init_powerpc (struct disassemble_info *);
+extern void disassemble_init_s390 (struct disassemble_info *);
+extern const disasm_options_t *disassembler_options_powerpc (void);
+extern const disasm_options_t *disassembler_options_arm (void);
+extern const disasm_options_t *disassembler_options_s390 (void);
/* Fetch the disassembler for a given BFD, if that support is available. */
extern disassembler_ftype disassembler (bfd *);
@@ -351,6 +361,29 @@ extern void disassemble_init_for_target (struct disassemble_info * dinfo);
/* Document any target specific options available from the disassembler. */
extern void disassembler_usage (FILE *);
+/* Remove whitespace and consecutive commas. */
+extern char *remove_whitespace_and_extra_commas (char *);
+
+/* Like STRCMP, but treat ',' the same as '\0' so that we match
+ strings like "foobar" against "foobar,xxyyzz,...". */
+extern int disassembler_options_cmp (const char *, const char *);
+
+/* A helper function for FOR_EACH_DISASSEMBLER_OPTION. */
+static inline char *
+next_disassembler_option (char *options)
+{
+ char *opt = strchr (options, ',');
+ if (opt != NULL)
+ opt++;
+ return opt;
+}
+
+/* A macro for iterating over each comma separated option in OPTIONS. */
+#define FOR_EACH_DISASSEMBLER_OPTION(OPT, OPTIONS) \
+ for ((OPT) = (OPTIONS); \
+ (OPT) != NULL; \
+ (OPT) = next_disassembler_option (OPT))
+
/* This block of definitions is for particular callers who read instructions
into a buffer before calling the instruction decoder. */
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 4eb33bc..0400fca 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,46 @@
+2017-02-28 Peter Bergner <bergner@vnet.ibm.com>
+
+ * disassemble.c Include "safe-ctype.h".
+ (disassemble_init_for_target): Handle s390 init.
+ (remove_whitespace_and_extra_commas): New function.
+ (disassembler_options_cmp): Likewise.
+ * arm-dis.c: Include "libiberty.h".
+ (NUM_ELEM): Delete.
+ (regnames): Use long disassembler style names.
+ Add force-thumb and no-force-thumb options.
+ (NUM_ARM_REGNAMES): Rename from this...
+ (NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE.
+ (get_arm_regname_num_options): Delete.
+ (set_arm_regname_option): Likewise.
+ (get_arm_regnames): Likewise.
+ (parse_disassembler_options): Likewise.
+ (parse_arm_disassembler_option): Rename from this...
+ (parse_arm_disassembler_options): ...to this. Make static.
+ Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options.
+ (print_insn): Use parse_arm_disassembler_options.
+ (disassembler_options_arm): New function.
+ (print_arm_disassembler_options): Handle updated regnames.
+ * ppc-dis.c: Include "libiberty.h".
+ (ppc_opts): Add "32" and "64" entries.
+ (ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp.
+ (powerpc_init_dialect): Add break to switch statement.
+ Use new FOR_EACH_DISASSEMBLER_OPTION macro.
+ (disassembler_options_powerpc): New function.
+ (print_ppc_disassembler_options): Use ARRAY_SIZE.
+ Remove printing of "32" and "64".
+ * s390-dis.c: Include "libiberty.h".
+ (init_flag): Remove unneeded variable.
+ (struct s390_options_t): New structure type.
+ (options): New structure.
+ (init_disasm): Rename from this...
+ (disassemble_init_s390): ...to this. Add initializations for
+ current_arch_mask and option_use_insn_len_bits_p. Remove init_flag.
+ (print_insn_s390): Delete call to init_disasm.
+ (disassembler_options_s390): New function.
+ (print_s390_disassembler_options): Print using information from
+ struct 'options'.
+ * po/opcodes.pot: Regenerate.
+
2017-02-28 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (PCMPESTR_Fixup): New.
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 2987403..e4f99b8 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -26,6 +26,7 @@
#include "opcode/arm.h"
#include "opintl.h"
#include "safe-ctype.h"
+#include "libiberty.h"
#include "floatformat.h"
/* FIXME: This shouldn't be done here. */
@@ -41,10 +42,6 @@
#define strneq(a,b,n) (strncmp ((a), (b), (n)) == 0)
#endif
-#ifndef NUM_ELEM
-#define NUM_ELEM(a) (sizeof (a) / sizeof (a)[0])
-#endif
-
/* Cached mapping symbol state. */
enum map_type
{
@@ -3198,18 +3195,20 @@ arm_regname;
static const arm_regname regnames[] =
{
- { "raw" , "Select raw register names",
+ { "reg-names-raw", N_("Select raw register names"),
{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"}},
- { "gcc", "Select register names used by GCC",
+ { "reg-names-gcc", N_("Select register names used by GCC"),
{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc" }},
- { "std", "Select register names used in ARM's ISA documentation",
+ { "reg-names-std", N_("Select register names used in ARM's ISA documentation"),
{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc" }},
- { "apcs", "Select register names used in the APCS",
+ { "force-thumb", N_("Assume all insns are Thumb insns"), {NULL} },
+ { "no-force-thumb", N_("Examine preceding label to determine an insn's type"), {NULL} },
+ { "reg-names-apcs", N_("Select register names used in the APCS"),
{ "a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4", "v5", "v6", "sl", "fp", "ip", "sp", "lr", "pc" }},
- { "atpcs", "Select register names used in the ATPCS",
+ { "reg-names-atpcs", N_("Select register names used in the ATPCS"),
{ "a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "IP", "SP", "LR", "PC" }},
- { "special-atpcs", "Select special register names used in the ATPCS",
- { "a1", "a2", "a3", "a4", "v1", "v2", "v3", "WR", "v5", "SB", "SL", "FP", "IP", "SP", "LR", "PC" }},
+ { "reg-names-special-atpcs", N_("Select special register names used in the ATPCS"),
+ { "a1", "a2", "a3", "a4", "v1", "v2", "v3", "WR", "v5", "SB", "SL", "FP", "IP", "SP", "LR", "PC" }}
};
static const char *const iwmmxt_wwnames[] =
@@ -3235,7 +3234,7 @@ static const char *const iwmmxt_cregnames[] =
/* Default to GCC register name set. */
static unsigned int regname_selected = 1;
-#define NUM_ARM_REGNAMES NUM_ELEM (regnames)
+#define NUM_ARM_OPTIONS ARRAY_SIZE (regnames)
#define arm_regnames regnames[regname_selected].reg_names
static bfd_boolean force_thumb = FALSE;
@@ -3254,31 +3253,6 @@ static bfd_vma ifthen_address;
/* Functions. */
-int
-get_arm_regname_num_options (void)
-{
- return NUM_ARM_REGNAMES;
-}
-
-int
-set_arm_regname_option (int option)
-{
- int old = regname_selected;
- regname_selected = option;
- return old;
-}
-
-int
-get_arm_regnames (int option,
- const char **setname,
- const char **setdescription,
- const char *const **register_names)
-{
- *setname = regnames[option].name;
- *setdescription = regnames[option].description;
- *register_names = regnames[option].reg_names;
- return 16;
-}
/* Decode a bitfield of the form matching regexp (N(-N)?,)*N(-N)?.
Returns pointer to following character of the format string and
@@ -6124,64 +6098,39 @@ arm_symbol_is_valid (asymbol * sym,
return (name && *name != '$' && strncmp (name, "__tagsym$$", 10));
}
-/* Parse an individual disassembler option. */
+/* Parse the string of disassembler options. */
-void
-parse_arm_disassembler_option (char *option)
+static void
+parse_arm_disassembler_options (char *options)
{
- if (option == NULL)
- return;
+ char *opt;
- if (CONST_STRNEQ (option, "reg-names-"))
+ FOR_EACH_DISASSEMBLER_OPTION (opt, options)
{
- int i;
-
- option += 10;
-
- for (i = NUM_ARM_REGNAMES; i--;)
- if (strneq (option, regnames[i].name, strlen (regnames[i].name)))
- {
- regname_selected = i;
- break;
- }
+ if (CONST_STRNEQ (opt, "reg-names-"))
+ {
+ unsigned int i;
+ for (i = 0; i < NUM_ARM_OPTIONS; i++)
+ if (disassembler_options_cmp (opt, regnames[i].name) == 0)
+ {
+ regname_selected = i;
+ break;
+ }
- if (i < 0)
- /* XXX - should break 'option' at following delimiter. */
- fprintf (stderr, _("Unrecognised register name set: %s\n"), option);
+ if (i >= NUM_ARM_OPTIONS)
+ fprintf (stderr, _("Unrecognised register name set: %s\n"), opt);
+ }
+ else if (CONST_STRNEQ (opt, "force-thumb"))
+ force_thumb = 1;
+ else if (CONST_STRNEQ (opt, "no-force-thumb"))
+ force_thumb = 0;
+ else
+ fprintf (stderr, _("Unrecognised disassembler option: %s\n"), opt);
}
- else if (CONST_STRNEQ (option, "force-thumb"))
- force_thumb = 1;
- else if (CONST_STRNEQ (option, "no-force-thumb"))
- force_thumb = 0;
- else
- /* XXX - should break 'option' at following delimiter. */
- fprintf (stderr, _("Unrecognised disassembler option: %s\n"), option);
return;
}
-/* Parse the string of disassembler options, spliting it at whitespaces
- or commas. (Whitespace separators supported for backwards compatibility). */
-
-static void
-parse_disassembler_options (char *options)
-{
- if (options == NULL)
- return;
-
- while (*options)
- {
- parse_arm_disassembler_option (options);
-
- /* Skip forward to next seperator. */
- while ((*options) && (! ISSPACE (*options)) && (*options != ','))
- ++ options;
- /* Skip forward past seperators. */
- while (ISSPACE (*options) || (*options == ','))
- ++ options;
- }
-}
-
static bfd_boolean
mapping_symbol_for_insn (bfd_vma pc, struct disassemble_info *info,
enum map_type *map_symbol);
@@ -6473,7 +6422,7 @@ print_insn (bfd_vma pc, struct disassemble_info *info, bfd_boolean little)
if (info->disassembler_options)
{
- parse_disassembler_options (info->disassembler_options);
+ parse_arm_disassembler_options (info->disassembler_options);
/* To avoid repeated parsing of these options, we remove them here. */
info->disassembler_options = NULL;
@@ -6842,21 +6791,51 @@ print_insn_little_arm (bfd_vma pc, struct disassemble_info *info)
return print_insn (pc, info, TRUE);
}
+const disasm_options_t *
+disassembler_options_arm (void)
+{
+ static disasm_options_t *opts = NULL;
+
+ if (opts == NULL)
+ {
+ unsigned int i;
+ opts = XNEW (disasm_options_t);
+ opts->name = XNEWVEC (const char *, NUM_ARM_OPTIONS + 1);
+ opts->description = XNEWVEC (const char *, NUM_ARM_OPTIONS + 1);
+ for (i = 0; i < NUM_ARM_OPTIONS; i++)
+ {
+ opts->name[i] = regnames[i].name;
+ if (regnames[i].description != NULL)
+ opts->description[i] = _(regnames[i].description);
+ else
+ opts->description[i] = NULL;
+ }
+ /* The array we return must be NULL terminated. */
+ opts->name[i] = NULL;
+ opts->description[i] = NULL;
+ }
+
+ return opts;
+}
+
void
print_arm_disassembler_options (FILE *stream)
{
- int i;
-
+ unsigned int i, max_len = 0;
fprintf (stream, _("\n\
The following ARM specific disassembler options are supported for use with\n\
the -M switch:\n"));
- for (i = NUM_ARM_REGNAMES; i--;)
- fprintf (stream, " reg-names-%s %*c%s\n",
- regnames[i].name,
- (int)(14 - strlen (regnames[i].name)), ' ',
- regnames[i].description);
+ for (i = 0; i < NUM_ARM_OPTIONS; i++)
+ {
+ unsigned int len = strlen (regnames[i].name);
+ if (max_len < len)
+ max_len = len;
+ }
- fprintf (stream, " force-thumb Assume all insns are Thumb insns\n");
- fprintf (stream, " no-force-thumb Examine preceding label to determine an insn's type\n\n");
+ for (i = 0, max_len++; i < NUM_ARM_OPTIONS; i++)
+ fprintf (stream, " %s%*c %s\n",
+ regnames[i].name,
+ (int)(max_len - strlen (regnames[i].name)), ' ',
+ _(regnames[i].description));
}
diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index 1b15242..eef0658 100644
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -20,6 +20,7 @@
#include "sysdep.h"
#include "dis-asm.h"
+#include "safe-ctype.h"
#ifdef ARCH_all
#define ARCH_aarch64
@@ -649,7 +650,76 @@ disassemble_init_for_target (struct disassemble_info * info)
disassemble_init_powerpc (info);
break;
#endif
+#ifdef ARCH_s390
+ case bfd_arch_s390:
+ disassemble_init_s390 (info);
+ break;
+#endif
default:
break;
}
}
+
+/* Remove whitespace and consecutive commas from OPTIONS. */
+
+char *
+remove_whitespace_and_extra_commas (char *options)
+{
+ char *str;
+ size_t i, len;
+
+ if (options == NULL)
+ return NULL;
+
+ /* Strip off all trailing whitespace and commas. */
+ for (len = strlen (options); len > 0; len--)
+ {
+ if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
+ break;
+ options[len - 1] = '\0';
+ }
+
+ /* Convert all remaining whitespace to commas. */
+ for (i = 0; options[i] != '\0'; i++)
+ if (ISSPACE (options[i]))
+ options[i] = ',';
+
+ /* Remove consecutive commas. */
+ for (str = options; *str != '\0'; str++)
+ if (*str == ',' && (*(str + 1) == ',' || str == options))
+ {
+ char *next = str + 1;
+ while (*next == ',')
+ next++;
+ len = strlen (next);
+ if (str != options)
+ str++;
+ memmove (str, next, len);
+ next[len - (size_t)(next - str)] = '\0';
+ }
+ return (strlen (options) != 0) ? options : NULL;
+}
+
+/* Like STRCMP, but treat ',' the same as '\0' so that we match
+ strings like "foobar" against "foobar,xxyyzz,...". */
+
+int
+disassembler_options_cmp (const char *s1, const char *s2)
+{
+ unsigned char c1, c2;
+
+ do
+ {
+ c1 = (unsigned char) *s1++;
+ if (c1 == ',')
+ c1 = '\0';
+ c2 = (unsigned char) *s2++;
+ if (c2 == ',')
+ c2 = '\0';
+ if (c1 == '\0')
+ return c1 - c2;
+ }
+ while (c1 == c2);
+
+ return c1 - c2;
+}
diff --git a/opcodes/po/opcodes.pot b/opcodes/po/opcodes.pot
index 56c7a23..e64a678 100644
--- a/opcodes/po/opcodes.pot
+++ b/opcodes/po/opcodes.pot
@@ -8,7 +8,7 @@ msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: bug-binutils@gnu.org\n"
-"POT-Creation-Date: 2016-12-23 09:23+0100\n"
+"POT-Creation-Date: 2017-02-08 13:38-0600\n"
"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
"Language-Team: LANGUAGE <LL@li.org>\n"
@@ -18,8 +18,7 @@ msgstr ""
"Content-Transfer-Encoding: 8bit\n"
#. Invalid option.
-#. XXX - should break 'option' at following delimiter.
-#: aarch64-dis.c:81 arc-dis.c:699 arm-dis.c:6158
+#: aarch64-dis.c:81 arc-dis.c:769 arm-dis.c:6158
#, c-format
msgid "Unrecognised disassembler option: %s\n"
msgstr ""
@@ -54,7 +53,7 @@ msgid ""
msgstr ""
#: aarch64-dis.c:3215 mips-dis.c:2477 mips-dis.c:2485 mips-dis.c:2487
-#: riscv-dis.c:505
+#: riscv-dis.c:506
#, c-format
msgid "\n"
msgstr ""
@@ -262,7 +261,7 @@ msgstr ""
msgid "jump hint unaligned"
msgstr ""
-#: arc-dis.c:323
+#: arc-dis.c:368
msgid ""
"\n"
"Warning: disassembly may be wrong due to guessed opcode class choice.\n"
@@ -270,7 +269,7 @@ msgid ""
"\t\t\t\t"
msgstr ""
-#: arc-dis.c:1182
+#: arc-dis.c:1267
#, c-format
msgid ""
"\n"
@@ -278,37 +277,37 @@ msgid ""
"with -M switch (multiple options should be separated by commas):\n"
msgstr ""
-#: arc-dis.c:1186
+#: arc-dis.c:1271
#, c-format
msgid " dsp Recognize DSP instructions.\n"
msgstr ""
-#: arc-dis.c:1188
+#: arc-dis.c:1273
#, c-format
msgid " spfp Recognize FPX SP instructions.\n"
msgstr ""
-#: arc-dis.c:1190
+#: arc-dis.c:1275
#, c-format
msgid " dpfp Recognize FPX DP instructions.\n"
msgstr ""
-#: arc-dis.c:1192
+#: arc-dis.c:1277
#, c-format
msgid " quarkse_em Recognize FPU QuarkSE-EM instructions.\n"
msgstr ""
-#: arc-dis.c:1194
+#: arc-dis.c:1279
#, c-format
msgid " fpuda Recognize double assist FPU instructions.\n"
msgstr ""
-#: arc-dis.c:1196
+#: arc-dis.c:1281
#, c-format
msgid " fpus Recognize single precision FPU instructions.\n"
msgstr ""
-#: arc-dis.c:1198
+#: arc-dis.c:1283
#, c-format
msgid " fpud Recognize double precision FPU instructions.\n"
msgstr ""
@@ -454,17 +453,49 @@ msgstr ""
msgid "Value must be in the range 0 to 31"
msgstr ""
-#: arm-dis.c:3634
+#: arm-dis.c:3202
+msgid "Select raw register names"
+msgstr ""
+
+#: arm-dis.c:3204
+msgid "Select register names used by GCC"
+msgstr ""
+
+#: arm-dis.c:3206
+msgid "Select register names used in ARM's ISA documentation"
+msgstr ""
+
+#: arm-dis.c:3208
+msgid "Select register names used in the APCS"
+msgstr ""
+
+#: arm-dis.c:3210
+msgid "Select register names used in the ATPCS"
+msgstr ""
+
+#: arm-dis.c:3212
+msgid "Select special register names used in the ATPCS"
+msgstr ""
+
+#. All non "reg-names-* options must be listed last.
+#: arm-dis.c:3216
+msgid "Assume all insns are Thumb insns"
+msgstr ""
+
+#: arm-dis.c:3217
+msgid "Examine preceding label to determine an insn's type"
+msgstr ""
+
+#: arm-dis.c:3638
msgid "<illegal precision>"
msgstr ""
-#. XXX - should break 'option' at following delimiter.
-#: arm-dis.c:6150
+#: arm-dis.c:6151
#, c-format
msgid "Unrecognised register name set: %s\n"
msgstr ""
-#: arm-dis.c:6850
+#: arm-dis.c:6855
#, c-format
msgid ""
"\n"
@@ -472,17 +503,17 @@ msgid ""
"the -M switch:\n"
msgstr ""
-#: avr-dis.c:114 avr-dis.c:135
+#: avr-dis.c:115 avr-dis.c:136
#, c-format
msgid "undefined"
msgstr ""
-#: avr-dis.c:214
+#: avr-dis.c:215
#, c-format
msgid "Internal disassembler error"
msgstr ""
-#: avr-dis.c:267
+#: avr-dis.c:268
#, c-format
msgid "unknown constraint `%c'"
msgstr ""
@@ -573,12 +604,12 @@ msgstr ""
#: ip2k-asm.c:789 ip2k-asm.c:896 iq2000-asm.c:644 iq2000-asm.c:648
#: iq2000-asm.c:737 iq2000-asm.c:844 lm32-asm.c:534 lm32-asm.c:538
#: lm32-asm.c:627 lm32-asm.c:734 m32c-asm.c:1769 m32c-asm.c:1773
-#: m32c-asm.c:1862 m32c-asm.c:1969 m32r-asm.c:513 m32r-asm.c:517
-#: m32r-asm.c:606 m32r-asm.c:713 mep-asm.c:1472 mep-asm.c:1476 mep-asm.c:1565
-#: mep-asm.c:1672 mt-asm.c:780 mt-asm.c:784 mt-asm.c:873 mt-asm.c:980
-#: or1k-asm.c:688 or1k-asm.c:692 or1k-asm.c:781 or1k-asm.c:888 xc16x-asm.c:561
-#: xc16x-asm.c:565 xc16x-asm.c:654 xc16x-asm.c:761 xstormy16-asm.c:461
-#: xstormy16-asm.c:465 xstormy16-asm.c:554 xstormy16-asm.c:661
+#: m32c-asm.c:1862 m32c-asm.c:1969 m32r-asm.c:513 m32r-asm.c:517 m32r-asm.c:606
+#: m32r-asm.c:713 mep-asm.c:1472 mep-asm.c:1476 mep-asm.c:1565 mep-asm.c:1672
+#: mt-asm.c:780 mt-asm.c:784 mt-asm.c:873 mt-asm.c:980 or1k-asm.c:688
+#: or1k-asm.c:692 or1k-asm.c:781 or1k-asm.c:888 xc16x-asm.c:561 xc16x-asm.c:565
+#: xc16x-asm.c:654 xc16x-asm.c:761 xstormy16-asm.c:461 xstormy16-asm.c:465
+#: xstormy16-asm.c:554 xstormy16-asm.c:661
msgid "unrecognized instruction"
msgstr ""
@@ -636,9 +667,8 @@ msgid "*unknown*"
msgstr ""
#: epiphany-dis.c:277 fr30-dis.c:298 frv-dis.c:395 ip2k-dis.c:287
-#: iq2000-dis.c:188 lm32-dis.c:146 m32c-dis.c:890 m32r-dis.c:278
-#: mep-dis.c:1186 mt-dis.c:289 or1k-dis.c:140 xc16x-dis.c:419
-#: xstormy16-dis.c:167
+#: iq2000-dis.c:188 lm32-dis.c:146 m32c-dis.c:890 m32r-dis.c:278 mep-dis.c:1186
+#: mt-dis.c:289 or1k-dis.c:140 xc16x-dis.c:419 xstormy16-dis.c:167
#, c-format
msgid "Unrecognized field %d while printing insn.\n"
msgstr ""
@@ -760,11 +790,11 @@ msgstr ""
msgid "%02x\t\t*unknown*"
msgstr ""
-#: i386-dis.c:12198
+#: i386-dis.c:12200
msgid "<internal disassembler error>"
msgstr ""
-#: i386-dis.c:12490
+#: i386-dis.c:12492
#, c-format
msgid ""
"\n"
@@ -773,145 +803,145 @@ msgid ""
"with the -M switch (multiple options should be separated by commas):\n"
msgstr ""
-#: i386-dis.c:12494
+#: i386-dis.c:12496
#, c-format
msgid " x86-64 Disassemble in 64bit mode\n"
msgstr ""
-#: i386-dis.c:12495
+#: i386-dis.c:12497
#, c-format
msgid " i386 Disassemble in 32bit mode\n"
msgstr ""
-#: i386-dis.c:12496
+#: i386-dis.c:12498
#, c-format
msgid " i8086 Disassemble in 16bit mode\n"
msgstr ""
-#: i386-dis.c:12497
+#: i386-dis.c:12499
#, c-format
msgid " att Display instruction in AT&T syntax\n"
msgstr ""
-#: i386-dis.c:12498
+#: i386-dis.c:12500
#, c-format
msgid " intel Display instruction in Intel syntax\n"
msgstr ""
-#: i386-dis.c:12499
+#: i386-dis.c:12501
#, c-format
msgid ""
" att-mnemonic\n"
" Display instruction in AT&T mnemonic\n"
msgstr ""
-#: i386-dis.c:12501
+#: i386-dis.c:12503
#, c-format
msgid ""
" intel-mnemonic\n"
" Display instruction in Intel mnemonic\n"
msgstr ""
-#: i386-dis.c:12503
+#: i386-dis.c:12505
#, c-format
msgid " addr64 Assume 64bit address size\n"
msgstr ""
-#: i386-dis.c:12504
+#: i386-dis.c:12506
#, c-format
msgid " addr32 Assume 32bit address size\n"
msgstr ""
-#: i386-dis.c:12505
+#: i386-dis.c:12507
#, c-format
msgid " addr16 Assume 16bit address size\n"
msgstr ""
-#: i386-dis.c:12506
+#: i386-dis.c:12508
#, c-format
msgid " data32 Assume 32bit data size\n"
msgstr ""
-#: i386-dis.c:12507
+#: i386-dis.c:12509
#, c-format
msgid " data16 Assume 16bit data size\n"
msgstr ""
-#: i386-dis.c:12508
+#: i386-dis.c:12510
#, c-format
msgid " suffix Always display instruction suffix in AT&T syntax\n"
msgstr ""
-#: i386-dis.c:12509
+#: i386-dis.c:12511
#, c-format
msgid " amd64 Display instruction in AMD64 ISA\n"
msgstr ""
-#: i386-dis.c:12510
+#: i386-dis.c:12512
#, c-format
msgid " intel64 Display instruction in Intel64 ISA\n"
msgstr ""
-#: i386-dis.c:13061
+#: i386-dis.c:13063
msgid "64-bit address is disabled"
msgstr ""
-#: i386-gen.c:674 ia64-gen.c:306
+#: i386-gen.c:679 ia64-gen.c:306
#, c-format
msgid "%s: Error: "
msgstr ""
-#: i386-gen.c:838
+#: i386-gen.c:843
#, c-format
msgid "%s: %d: Unknown bitfield: %s\n"
msgstr ""
-#: i386-gen.c:840
+#: i386-gen.c:845
#, c-format
msgid "Unknown bitfield: %s\n"
msgstr ""
-#: i386-gen.c:899
+#: i386-gen.c:904
#, c-format
msgid "%s: %d: Missing `)' in bitfield: %s\n"
msgstr ""
-#: i386-gen.c:1170
+#: i386-gen.c:1175
#, c-format
msgid "can't find i386-opc.tbl for reading, errno = %s\n"
msgstr ""
-#: i386-gen.c:1301
+#: i386-gen.c:1306
#, c-format
msgid "can't find i386-reg.tbl for reading, errno = %s\n"
msgstr ""
-#: i386-gen.c:1378
+#: i386-gen.c:1383
#, c-format
msgid "can't create i386-init.h, errno = %s\n"
msgstr ""
-#: i386-gen.c:1468 ia64-gen.c:2829
+#: i386-gen.c:1473 ia64-gen.c:2829
#, c-format
msgid "unable to change directory to \"%s\", errno = %s\n"
msgstr ""
-#: i386-gen.c:1480 i386-gen.c:1483
+#: i386-gen.c:1485 i386-gen.c:1488
#, c-format
msgid "CpuMax != %d!\n"
msgstr ""
-#: i386-gen.c:1487
+#: i386-gen.c:1492
#, c-format
msgid "%d unused bits in i386_cpu_flags.\n"
msgstr ""
-#: i386-gen.c:1494
+#: i386-gen.c:1499
#, c-format
msgid "%d unused bits in i386_operand_type.\n"
msgstr ""
-#: i386-gen.c:1508
+#: i386-gen.c:1513
#, c-format
msgid "can't create i386-tbl.h, errno = %s\n"
msgstr ""
@@ -1181,12 +1211,12 @@ msgstr ""
msgid "Invalid size specifier"
msgstr ""
-#: m68k-dis.c:1278
+#: m68k-dis.c:1292
#, c-format
msgid "<function code %d>"
msgstr ""
-#: m68k-dis.c:1437
+#: m68k-dis.c:1455
#, c-format
msgid "<internal error in opcode table: %s %s>\n"
msgstr ""
@@ -1229,7 +1259,7 @@ msgstr ""
msgid "Value is not aligned enough"
msgstr ""
-#: mips-dis.c:1633 mips-dis.c:1844
+#: mips-dis.c:1634 mips-dis.c:1846
#, c-format
msgid "# internal error, undefined operand in `%s %s'"
msgstr ""
@@ -1359,20 +1389,20 @@ msgstr ""
msgid "Error: read from memory failed"
msgstr ""
-#: msp430-dis.c:485
+#: msp430-dis.c:499
msgid "Warning: illegal as emulation instr"
msgstr ""
#. R2/R3 are illegal as dest: may be data section.
-#: msp430-dis.c:569
+#: msp430-dis.c:591
msgid "Warning: illegal as 2-op instr"
msgstr ""
-#: msp430-dis.c:950
+#: msp430-dis.c:1002
msgid "Warning: unrecognised CALLA addressing mode"
msgstr ""
-#: msp430-dis.c:1232 msp430-dis.c:1249 msp430-dis.c:1270
+#: msp430-dis.c:1303 msp430-dis.c:1324 msp430-dis.c:1345
#, c-format
msgid "Warning: reserved use of A/L and B/W bits detected"
msgstr ""
@@ -1403,12 +1433,12 @@ msgstr ""
msgid "$<undefined>"
msgstr ""
-#: ppc-dis.c:345
+#: ppc-dis.c:347
#, c-format
msgid "warning: ignoring unknown -M%s option\n"
msgstr ""
-#: ppc-dis.c:775
+#: ppc-dis.c:793
#, c-format
msgid ""
"\n"
@@ -1490,12 +1520,12 @@ msgstr ""
msgid "Unrecognized disassembler option: %s\n"
msgstr ""
-#: riscv-dis.c:342
+#: riscv-dis.c:343
#, c-format
msgid "# internal error, undefined modifier (%c)"
msgstr ""
-#: riscv-dis.c:494
+#: riscv-dis.c:495
#, c-format
msgid ""
"\n"
@@ -1503,14 +1533,14 @@ msgid ""
"with the -M switch (multiple options should be separated by commas):\n"
msgstr ""
-#: riscv-dis.c:498
+#: riscv-dis.c:499
#, c-format
msgid ""
"\n"
" numeric Print numeric reigster names, rather than ABI names.\n"
msgstr ""
-#: riscv-dis.c:501
+#: riscv-dis.c:502
#, c-format
msgid ""
"\n"
@@ -1518,29 +1548,24 @@ msgid ""
" than into pseudoinstructions.\n"
msgstr ""
-#: s390-dis.c:366
-#, c-format
-msgid ""
-"\n"
-"The following S/390 specific disassembler options are supported for use\n"
-"with the -M switch (multiple options should be separated by commas):\n"
+#: s390-dis.c:42
+msgid "Disassemble in ESA architecture mode"
msgstr ""
-#: s390-dis.c:370
-#, c-format
-msgid " esa Disassemble in ESA architecture mode\n"
+#: s390-dis.c:43
+msgid "Disassemble in z/Architecture mode"
msgstr ""
-#: s390-dis.c:371
-#, c-format
-msgid " zarch Disassemble in z/Architecture mode\n"
+#: s390-dis.c:44
+msgid "Print unknown instructions according to length from first two bits"
msgstr ""
-#: s390-dis.c:372
+#: s390-dis.c:400
#, c-format
msgid ""
-" insnlength Print unknown instructions according to length from first two "
-"bits\n"
+"\n"
+"The following S/390 specific disassembler options are supported for use\n"
+"with the -M switch (multiple options should be separated by commas):\n"
msgstr ""
#: score-dis.c:662 score-dis.c:869 score-dis.c:1030 score-dis.c:1144
diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c
index e0eff7a..3f8aef8 100644
--- a/opcodes/ppc-dis.c
+++ b/opcodes/ppc-dis.c
@@ -26,6 +26,7 @@
#include "elf/ppc.h"
#include "opintl.h"
#include "opcode/ppc.h"
+#include "libiberty.h"
/* This file provides several disassembler functions, all of which use
the disassembler interface defined in dis-asm.h. Several functions
@@ -172,8 +173,12 @@ struct ppc_mopt ppc_opts[] = {
0 },
{ "ppc32", PPC_OPCODE_PPC,
0 },
+ { "32", PPC_OPCODE_PPC,
+ 0 },
{ "ppc64", PPC_OPCODE_PPC | PPC_OPCODE_64,
0 },
+ { "64", PPC_OPCODE_PPC | PPC_OPCODE_64,
+ 0 },
{ "ppc64bridge", PPC_OPCODE_PPC | PPC_OPCODE_64_BRIDGE,
0 },
{ "ppcps", PPC_OPCODE_PPC | PPC_OPCODE_PPCPS,
@@ -252,8 +257,8 @@ ppc_parse_cpu (ppc_cpu_t ppc_cpu, ppc_cpu_t *sticky, const char *arg)
{
unsigned int i;
- for (i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
- if (strcmp (ppc_opts[i].opt, arg) == 0)
+ for (i = 0; i < ARRAY_SIZE (ppc_opts); i++)
+ if (disassembler_options_cmp (ppc_opts[i].opt, arg) == 0)
{
if (ppc_opts[i].sticky)
{
@@ -264,7 +269,7 @@ ppc_parse_cpu (ppc_cpu_t ppc_cpu, ppc_cpu_t *sticky, const char *arg)
ppc_cpu = ppc_opts[i].cpu;
break;
}
- if (i >= sizeof (ppc_opts) / sizeof (ppc_opts[0]))
+ if (i >= ARRAY_SIZE (ppc_opts))
return 0;
ppc_cpu |= *sticky;
@@ -278,7 +283,6 @@ powerpc_init_dialect (struct disassemble_info *info)
{
ppc_cpu_t dialect = 0;
ppc_cpu_t sticky = 0;
- char *arg;
struct dis_private *priv = calloc (sizeof (*priv), 1);
if (priv == NULL)
@@ -324,29 +328,22 @@ powerpc_init_dialect (struct disassemble_info *info)
break;
default:
dialect = ppc_parse_cpu (dialect, &sticky, "power9") | PPC_OPCODE_ANY;
+ break;
}
- arg = info->disassembler_options;
- while (arg != NULL)
+ char *opt;
+ FOR_EACH_DISASSEMBLER_OPTION (opt, info->disassembler_options)
{
ppc_cpu_t new_cpu = 0;
- char *end = strchr (arg, ',');
-
- if (end != NULL)
- *end = 0;
- if ((new_cpu = ppc_parse_cpu (dialect, &sticky, arg)) != 0)
- dialect = new_cpu;
- else if (strcmp (arg, "32") == 0)
+ if (disassembler_options_cmp (opt, "32") == 0)
dialect &= ~(ppc_cpu_t) PPC_OPCODE_64;
- else if (strcmp (arg, "64") == 0)
+ else if (disassembler_options_cmp (opt, "64") == 0)
dialect |= PPC_OPCODE_64;
+ else if ((new_cpu = ppc_parse_cpu (dialect, &sticky, opt)) != 0)
+ dialect = new_cpu;
else
- fprintf (stderr, _("warning: ignoring unknown -M%s option\n"), arg);
-
- if (end != NULL)
- *end++ = ',';
- arg = end;
+ fprintf (stderr, _("warning: ignoring unknown -M%s option\n"), opt);
}
info->private_data = priv;
@@ -767,6 +764,26 @@ print_insn_powerpc (bfd_vma memaddr,
return 4;
}
+const disasm_options_t *
+disassembler_options_powerpc (void)
+{
+ static disasm_options_t *opts = NULL;
+
+ if (opts == NULL)
+ {
+ size_t i, num_options = ARRAY_SIZE (ppc_opts);
+ opts = XNEW (disasm_options_t);
+ opts->name = XNEWVEC (const char *, num_options + 1);
+ for (i = 0; i < num_options; i++)
+ opts->name[i] = ppc_opts[i].opt;
+ /* The array we return must be NULL terminated. */
+ opts->name[i] = NULL;
+ opts->description = NULL;
+ }
+
+ return opts;
+}
+
void
print_ppc_disassembler_options (FILE *stream)
{
@@ -776,7 +793,7 @@ print_ppc_disassembler_options (FILE *stream)
The following PPC specific disassembler options are supported for use with\n\
the -M switch:\n"));
- for (col = 0, i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
+ for (col = 0, i = 0; i < ARRAY_SIZE (ppc_opts); i++)
{
col += fprintf (stream, " %s,", ppc_opts[i].opt);
if (col > 66)
@@ -785,5 +802,5 @@ the -M switch:\n"));
col = 0;
}
}
- fprintf (stream, " 32, 64\n");
+ fprintf (stream, "\n");
}
diff --git a/opcodes/s390-dis.c b/opcodes/s390-dis.c
index 328ba2d..2d97a2a 100644
--- a/opcodes/s390-dis.c
+++ b/opcodes/s390-dis.c
@@ -25,16 +25,30 @@
#include "dis-asm.h"
#include "opintl.h"
#include "opcode/s390.h"
+#include "libiberty.h"
-static int init_flag = 0;
static int opc_index[256];
static int current_arch_mask = 0;
static int option_use_insn_len_bits_p = 0;
+typedef struct
+{
+ const char *name;
+ const char *description;
+} s390_options_t;
+
+static const s390_options_t options[] =
+{
+ { "esa" , N_("Disassemble in ESA architecture mode") },
+ { "zarch", N_("Disassemble in z/Architecture mode") },
+ { "insnlength", N_("Print unknown instructions according to "
+ "length from first two bits") }
+};
+
/* Set up index table for first opcode byte. */
-static void
-init_disasm (struct disassemble_info *info)
+void
+disassemble_init_s390 (struct disassemble_info *info)
{
int i;
const char *p;
@@ -46,6 +60,9 @@ init_disasm (struct disassemble_info *info)
for (i = s390_num_opcodes; i--; )
opc_index[s390_opcodes[i].opcode[0]] = i;
+ current_arch_mask = 1 << S390_OPCODE_ZARCH;
+ option_use_insn_len_bits_p = 0;
+
for (p = info->disassembler_options; p != NULL; )
{
if (CONST_STRNEQ (p, "esa"))
@@ -61,11 +78,6 @@ init_disasm (struct disassemble_info *info)
if (p != NULL)
p++;
}
-
- if (!current_arch_mask)
- current_arch_mask = 1 << S390_OPCODE_ZARCH;
-
- init_flag = 1;
}
/* Derive the length of an instruction from its first byte. */
@@ -266,9 +278,6 @@ print_insn_s390 (bfd_vma memaddr, struct disassemble_info *info)
unsigned int value;
int status, opsize, bufsize, bytes_to_dump, i;
- if (init_flag == 0)
- init_disasm (info);
-
/* The output looks better if we put 6 bytes on a line. */
info->bytes_per_line = 6;
@@ -360,15 +369,48 @@ print_insn_s390 (bfd_vma memaddr, struct disassemble_info *info)
return 0;
}
+const disasm_options_t *
+disassembler_options_s390 (void)
+{
+ static disasm_options_t *opts = NULL;
+
+ if (opts == NULL)
+ {
+ size_t i, num_options = ARRAY_SIZE (options);
+ opts = XNEW (disasm_options_t);
+ opts->name = XNEWVEC (const char *, num_options + 1);
+ opts->description = XNEWVEC (const char *, num_options + 1);
+ for (i = 0; i < num_options; i++)
+ {
+ opts->name[i] = options[i].name;
+ opts->description[i] = _(options[i].description);
+ }
+ /* The array we return must be NULL terminated. */
+ opts->name[i] = NULL;
+ opts->description[i] = NULL;
+ }
+
+ return opts;
+}
+
void
print_s390_disassembler_options (FILE *stream)
{
+ unsigned int i, max_len = 0;
fprintf (stream, _("\n\
The following S/390 specific disassembler options are supported for use\n\
with the -M switch (multiple options should be separated by commas):\n"));
- fprintf (stream, _(" esa Disassemble in ESA architecture mode\n"));
- fprintf (stream, _(" zarch Disassemble in z/Architecture mode\n"));
- fprintf (stream, _(" insnlength Print unknown instructions according "
- "to length from first two bits\n"));
+ for (i = 0; i < ARRAY_SIZE (options); i++)
+ {
+ unsigned int len = strlen (options[i].name);
+ if (max_len < len)
+ max_len = len;
+ }
+
+ for (i = 0, max_len++; i < ARRAY_SIZE (options); i++)
+ fprintf (stream, " %s%*c %s\n",
+ options[i].name,
+ (int)(max_len - strlen (options[i].name)), ' ',
+ _(options[i].description));
}