Add multi-sim support to simulator.

6 files changed, 3243 insertions, 799 deletions

diff --git a/sim/igen/ChangeLog b/sim/igen/ChangeLog
index 038f891..2cd50e4 100644
--- a/sim/igen/ChangeLog
+++ b/sim/igen/ChangeLog
@@ -1,3 +1,81 @@
+Tue Sep  9 03:30:26 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* igen.c (gen_run_c): New function. Generate sim_engine_run that
+ 	looks at the currently selected architecture.
+
+	* gen-engine.c, gen-idecode.c: Add multi-sim support - generate
+ 	one engine per model.
+	
+	* gen-semantics.c, gen-icache.c gen-support.c:
+ 	Update.
+
+	* ld-insn.h, ld-insn-h (load_insn_table): Rewrite.  table.h only
+ 	returns a line at a time.  Parse multi-word instructions.  Add
+ 	multi-sim support.
+
+	* table.h, table.c: Simplify.  Only parse a single line at a time.
+  	ld-insn can handle the rest.
+
+	* filter.h, filter.c (filter_parse, filter_add, filter_is_subset,
+ 	filter_is_common, filter_is_member, filter_next): New filter
+ 	operations.
+	(dump_filter): Ditto.
+	
+	* gen.h, gen.c: New file.  Takes the insn table and turns it into
+ 	a set of decode tables and semantic functions.
+	
+	* ld-insn.c: Copy generator code from here.
+	* gen.c: To here.
+
+Fri Aug  8 11:43:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* misc.h (NZALLOC): Allocate an N element array of TYPE.
+
+	* table.h, table.c: Simplify table parser so that it only
+ 	understands colon delimited lines and code blocks.
+	(table_read): Parse '{' ... '}' as a code block.
+	(table_print_code): New function, print out a code block to file.
+	(main): Add suport for standalone testing.
+	
+	* ld-insn.h, ld-insn.c:
+	
+	
+Mon Sep  1 11:41:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* gen-idecode.c (error_leaf_contains_multiple_insn): Make static.
+	(print_jump_definition, print_jump, print_jump_internal_function,
+ 	print_jump_insn, print_jump_until_stop_body): Delete, moved to
+ 	sim-engine.c
+
+	* igen.c (print_itrace_format): Delete unused variable chp.
+	(gen-engine.h): Include.
+
+	* table.c (current_file_name, current_line_entry,
+ 	current_line_entry): Make static.
+
+Wed Aug  6 12:31:17 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* configure.in: Define AR_FOR_BUILD, AR_FLAGS_FOR_BUILD,
+ 	RANLIB_FOR_BUILD and CFLAGS_FOR_BUILD.
+	* configure.in: Include simulator common/aclocal.m4.
+	* configure.in: Add --enable-sim-warnings option.
+	* configure: Re-generate.
+	
+	* Makefile.in: Use.
+
+	* Makefile.in (tmp-filter): New rule.
+	(igen.o, tmp-table, tmp-ld-decode, tmp-ld-cache, tmp-ld-insn,
+ 	ld-decode.o, ld-cache.o, ld-insn.o): Fix dependencies.
+	
+	* gen.h, gen.c: New files.
+  	
+	* Makefile.in (gen.o, tmp-gen): New rules, update all
+ 	dependencies.
+	
+Tue Jun 24 11:46:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* ld-insn.c (load_insn_table): Accept %s as a function type.
+
 Thu Jun  5 17:14:32 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 
 	* igen.c (print_itrace_prefix): Move printing of insn prefix to
diff --git a/sim/igen/gen-itable.c b/sim/igen/gen-itable.c
new file mode 100644
index 0000000..735412e
--- /dev/null
+++ b/sim/igen/gen-itable.c
@@ -0,0 +1,246 @@
+/*  This file is part of the program psim.
+
+    Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ 
+    */
+
+
+
+#include "misc.h"
+#include "lf.h"
+#include "table.h"
+#include "filter.h"
+#include "igen.h"
+
+#include "ld-insn.h"
+#include "ld-decode.h"
+
+#include "gen.h"
+
+#include "gen-itable.h"
+
+#ifndef NULL
+#define NULL 0
+#endif
+
+
+
+static void
+itable_h_insn (lf *file,
+	       insn_table *entry,
+	       insn_entry *instruction,
+	       void *data)
+{
+  lf_print__line_ref (file, instruction->line);
+  lf_printf (file, "  ");
+  print_function_name (file,
+		       instruction->name,
+		       instruction->format_name,
+		       NULL,
+		       NULL,
+		       function_name_prefix_itable);
+  lf_printf (file, ",\n");
+}
+
+
+/* print the list of all the different options */
+
+static void
+itable_print_enum (lf *file,
+		   filter *set,
+		   char *name)
+{
+  char *elem;
+  lf_printf (file, "typedef enum {\n");
+  lf_indent (file, +2);
+  for (elem = filter_next (set, "");
+       elem != NULL;
+       elem = filter_next (set, elem))
+    {
+      lf_printf (file, "%sitable_%s_%s,\n",
+		 options.prefix.itable.name, name, elem);
+      if (strlen (options.prefix.itable.name) > 0)
+	{
+	  lf_indent_suppress (file);
+	  lf_printf (file, "#define itable_%s_%s %sitable_%s_%s\n",
+		     name, elem, options.prefix.itable.name, name, elem);
+	}
+    }
+  lf_printf (file, "nr_%sitable_%ss,", options.prefix.itable.name, name);
+  
+  lf_indent (file, -2);
+  lf_printf (file, "\n} %sitable_%ss;\n", options.prefix.itable.name, name);
+  if (strlen (options.prefix.itable.name) > 0)
+    {
+      lf_indent_suppress (file);
+      lf_printf (file, "#define itable_%ss %sitable_%ss\n",
+		 name, options.prefix.itable.name, name);
+      lf_indent_suppress (file);
+      lf_printf (file, "#define nr_itable_%ss nr_%sitable_%ss\n",
+		 name, options.prefix.itable.name, name);
+    }
+  lf_printf (file, "\n");
+}
+
+extern void 
+gen_itable_h (lf *file,
+	      insn_table *isa)
+{
+
+  /* output an enumerated type for each instruction */
+  lf_printf (file, "typedef enum {\n");
+  insn_table_traverse_insn (file, isa, itable_h_insn, NULL);
+  lf_printf (file, "  nr_%sitable_entries,\n", options.prefix.itable.name);
+  lf_printf (file, "} %sitable_index;\n", options.prefix.itable.name);
+  lf_printf (file, "\n");
+
+  /* output an enumeration type for each flag */
+  itable_print_enum (file, isa->flags, "flag");
+    
+  /* output an enumeration of all the possible options */
+  itable_print_enum (file, isa->options, "option");
+
+  /* output an enumeration of all the processor models */
+  itable_print_enum (file, isa->model->processors, "processor");
+
+  /* output the table that contains the actual instruction info */
+  lf_printf (file, "typedef struct _%sitable_instruction_info {\n",
+	     options.prefix.itable.name);
+  lf_printf (file, "  %sitable_index nr;\n", options.prefix.itable.name);
+  lf_printf (file, "  char *format;\n");
+  lf_printf (file, "  char *form;\n");
+  lf_printf (file, "  char *flags;\n");
+  lf_printf (file, "  char flag[nr_%sitable_flags];\n",
+	     options.prefix.itable.name);
+  lf_printf (file, "  char *options;\n");
+  lf_printf (file, "  char option[nr_%sitable_options];\n",
+	     options.prefix.itable.name);
+  lf_printf (file, "  char *processors;\n");
+  lf_printf (file, "  char processor[nr_%sitable_processors];\n",
+	     options.prefix.itable.name);
+  lf_printf (file, "  char *name;\n");
+  lf_printf (file, "  char *file;\n");
+  lf_printf (file, "  int line_nr;\n");
+  lf_printf (file, "} %sitable_info;\n", options.prefix.itable.name);
+  lf_printf (file, "\n");
+  lf_printf (file, "extern %sitable_info %sitable[nr_%sitable_entries];\n",
+	     options.prefix.itable.name, options.prefix.itable.name,
+	     options.prefix.itable.name);
+  if (strlen (options.prefix.itable.name) > 0)
+    {
+      lf_indent_suppress (file);
+      lf_printf (file, "#define itable %sitable\n",
+		 options.prefix.itable.name);
+    }
+}
+
+
+/****************************************************************/
+
+static void
+itable_print_set (lf *file,
+		  filter *set,
+		  filter *members)
+{
+  char *elem;
+  lf_printf (file, "\"");
+  elem = filter_next (members, "");
+  if (elem != NULL)
+    {
+      while (1)
+	{
+	  lf_printf (file, "%s", elem);
+	  elem = filter_next (members, elem);
+	  if (elem == NULL)
+	    break;
+	  lf_printf (file, ",");
+	}
+    }
+  lf_printf (file, "\",\n");
+
+  lf_printf(file, "{");
+  for (elem = filter_next (set, "");
+       elem != NULL;
+       elem = filter_next (set, elem))
+    {
+      if (filter_is_member (members, elem))
+	{
+	  lf_printf (file, " 1,");
+	}
+      else
+	{
+	  lf_printf (file, " 0,");
+	}
+      
+    }
+  lf_printf(file, " },\n");
+}
+
+
+static void
+itable_c_insn (lf *file,
+	       insn_table *isa,
+	       insn_entry *instruction,
+	       void *data)
+{
+  lf_printf (file, "{ ");
+  lf_indent (file, +2);
+  print_function_name (file,
+		       instruction->name,
+		       instruction->format_name,
+		       NULL,
+		       NULL,
+		       function_name_prefix_itable);
+  lf_printf (file, ",\n");
+  lf_printf (file, "\"");
+  print_insn_words (file, instruction);
+  lf_printf (file, "\",\n");
+  lf_printf (file, "\"%s\",\n", instruction->format_name);
+
+  itable_print_set (file, isa->flags, instruction->flags);
+  itable_print_set (file, isa->options, instruction->options);
+  itable_print_set (file, isa->model->processors, instruction->processors);
+
+  lf_printf(file, "\"%s\",\n", instruction->name);
+  lf_printf(file, "\"%s\",\n",
+	    filter_filename (instruction->line->file_name));
+  lf_printf(file, "%d,\n", instruction->line->line_nr);
+  lf_printf(file, "},\n");
+  lf_indent (file, -2);
+}
+
+
+extern void 
+gen_itable_c (lf *file,
+	      insn_table *isa)
+{
+  /* leader */
+  lf_printf(file, "#include \"%sitable.h\"\n", options.prefix.itable.name);
+  lf_printf(file, "\n");
+
+  /* FIXME - output model data??? */
+  /* FIXME - output assembler data??? */
+
+  /* output the table that contains the actual instruction info */
+  lf_printf(file, "%sitable_info %sitable[nr_%sitable_entries] = {\n",
+	    options.prefix.itable.name,
+	    options.prefix.itable.name,
+	    options.prefix.itable.name);
+  insn_table_traverse_insn (file, isa, itable_c_insn, NULL);
+
+  lf_printf(file, "};\n");
+}
diff --git a/sim/igen/gen-semantics.c b/sim/igen/gen-semantics.c
index a8f73a3..88b6012 100644
--- a/sim/igen/gen-semantics.c
+++ b/sim/igen/gen-semantics.c
@@ -24,12 +24,12 @@
 #include "lf.h"
 #include "table.h"
 #include "filter.h"
+#include "igen.h"
 
-#include "ld-decode.h"
-#include "ld-cache.h"
 #include "ld-insn.h"
+#include "ld-decode.h"
 
-#include "igen.h"
+#include "gen.h"
 
 #include "gen-semantics.h"
 #include "gen-icache.h"
@@ -37,53 +37,62 @@
 
 
 static void
-print_semantic_function_header(lf *file,
-			       const char *basename,
-			       insn_bits *expanded_bits,
-			       int is_function_definition)
+print_semantic_function_header (lf *file,
+				const char *basename,
+				const char *format_name,
+				opcode_bits *expanded_bits,
+				int is_function_definition,
+				int nr_prefetched_words)
 {
   int indent;
   lf_printf(file, "\n");
-  lf_print_function_type_function(file, print_semantic_function_type, "EXTERN_SEMANTICS",
-				  (is_function_definition ? "\n" : " "));
-  indent = print_function_name(file,
-			       basename,
-			       expanded_bits,
-			       function_name_prefix_semantics);
+  lf_print__function_type_function (file, print_semantic_function_type,
+				    "EXTERN_SEMANTICS",
+				    (is_function_definition ? "\n" : " "));
+  indent = print_function_name (file,
+				basename,
+				format_name,
+				NULL,
+				expanded_bits,
+				function_name_prefix_semantics);
   if (is_function_definition)
-    lf_indent(file, +indent);
+    {
+      indent += lf_printf (file, " ");
+      lf_indent (file, +indent);
+    }
   else
-    lf_printf(file, "\n");
-  lf_printf(file, "(");
-  print_semantic_function_formal(file);
-  lf_printf(file, ")");
+    {
+      lf_printf (file, "\n");
+    }
+  lf_printf (file, "(");
+  lf_indent (file, +1);
+  print_semantic_function_formal (file, nr_prefetched_words);
+  lf_indent (file, -1);
+  lf_printf (file, ")");
   if (is_function_definition)
-    lf_indent(file, -indent);
+    {
+      lf_indent (file, -indent);
+    }
   else
-    lf_printf(file, ";");
-  lf_printf(file, "\n");
+    {
+      lf_printf (file, ";");
+    }
+  lf_printf (file, "\n");
 }
 
 void
-print_semantic_declaration(insn_table *entry,
-			   lf *file,
-			   void *data,
-			   insn *instruction,
-			   int depth)
+print_semantic_declaration (lf *file,
+			    insn_entry *insn,
+			    opcode_bits *expanded_bits,
+			    insn_opcodes *opcodes,
+			    int nr_prefetched_words)
 {
-  if (generate_expanded_instructions) {
-    ASSERT(entry->nr_insn == 1);
-    print_semantic_function_header(file,
-				   instruction->file_entry->fields[insn_name],
-				   entry->expanded_bits,
-				   0/* is not function definition*/);
-  }
-  else {
-    print_semantic_function_header(file,
-				   instruction->file_entry->fields[insn_name],
-				   NULL,
-				   0/* is not function definition*/);
-  }
+  print_semantic_function_header (file,
+				  insn->name,
+				  insn->format_name,
+				  expanded_bits,
+				  0/* is not function definition*/,
+				  nr_prefetched_words);
 }
 
 
@@ -92,226 +101,277 @@ print_semantic_declaration(insn_table *entry,
 
 
 void
-print_idecode_invalid(lf *file,
-		      const char *result,
-		      invalid_type type)
+print_idecode_invalid (lf *file,
+		       const char *result,
+		       invalid_type type)
 {
   const char *name;
-  switch (type) {
-  default: name = "unknown"; break;
-  case invalid_illegal: name = "illegal"; break;
-  case invalid_fp_unavailable: name = "fp_unavailable"; break;
-  case invalid_wrong_slot: name = "wrong_slot"; break;
-  }
-  if ((code & generate_jumps))
-    lf_printf(file, "goto %s_%s;\n",
-	      (code & generate_with_icache) ? "icache" : "semantic",
-	      name);
-  else if ((code & generate_with_icache)) {
-    lf_printf(file, "%s %sicache_%s(", result, global_name_prefix, name);
-    print_icache_function_actual(file);
-    lf_printf(file, ");\n");
-  }
-  else {
-    lf_printf(file, "%s %ssemantic_%s(", result, global_name_prefix, name);
-    print_semantic_function_actual(file);
-    lf_printf(file, ");\n");
-  }
+  switch (type)
+    {
+    default: name = "unknown"; break;
+    case invalid_illegal: name = "illegal"; break;
+    case invalid_fp_unavailable: name = "fp_unavailable"; break;
+    case invalid_wrong_slot: name = "wrong_slot"; break;
+    }
+  if (options.gen.code == generate_jumps)
+    {
+      lf_printf (file, "goto %s_%s;\n",
+		 (options.gen.icache ? "icache" : "semantic"),
+		 name);
+    }
+  else if (options.gen.icache)
+    {
+      lf_printf (file, "%s %sicache_%s (", result, options.prefix.global.name, name);
+      print_icache_function_actual (file, 0);
+      lf_printf (file, ");\n");
+    }
+  else
+    {
+      lf_printf (file, "%s %ssemantic_%s (", result, options.prefix.global.name, name);
+      print_semantic_function_actual (file, 0);
+      lf_printf (file, ");\n");
+    }
 }
 
 
 void
-print_semantic_body(lf *file,
-		    insn *instruction,
-		    insn_bits *expanded_bits,
-		    opcode_field *opcodes)
+print_semantic_body (lf *file,
+		     insn_entry *instruction,
+		     opcode_bits *expanded_bits,
+		     insn_opcodes *opcodes)
 {
-  print_itrace(file, instruction->file_entry, 0/*put_value_in_cache*/);
-
+  print_itrace (file, instruction, 0/*put_value_in_cache*/);
+  
   /* validate the instruction, if a cache this has already been done */
-  if (!(code & generate_with_icache))
-    print_idecode_validate(file, instruction, opcodes);
-
+  if (!options.gen.icache)
+    {
+      print_idecode_validate (file, instruction, opcodes);
+    }
+  
   /* generate the profiling call - this is delayed until after the
      instruction has been verified */
-  lf_printf(file, "\n");
-  lf_indent_suppress(file);
-  lf_printf(file, "#if defined(WITH_MON)\n");
-  lf_printf(file, "/* monitoring: */\n");
-  lf_printf(file, "if (WITH_MON & MONITOR_INSTRUCTION_ISSUE) {\n");
-  lf_printf(file, "  mon_issue(");
-  print_function_name(file,
-		      instruction->file_entry->fields[insn_name],
-		      NULL,
-		      function_name_prefix_itable);
-  lf_printf(file, ", cpu, cia);\n");
-  lf_printf(file, "}\n");
-  lf_indent_suppress(file);
-  lf_printf(file, "#endif\n");
-  lf_printf(file, "\n");
-
+  {
+    lf_printf (file, "\n");
+    lf_indent_suppress (file);
+    lf_printf (file, "#if defined (WITH_MON)\n");
+    lf_printf (file, "/* monitoring: */\n");
+    lf_printf (file, "if (WITH_MON & MONITOR_INSTRUCTION_ISSUE)\n");
+    lf_printf (file, "  mon_issue (");
+    print_function_name (file,
+			 instruction->name,
+			 instruction->format_name,
+			 NULL,
+			 NULL,
+			 function_name_prefix_itable);
+    lf_printf (file, ", cpu, cia);\n");
+    lf_indent_suppress (file);
+    lf_printf (file, "#endif\n");
+    lf_printf (file, "\n");
+  }
+  
   /* determine the new instruction address */
-  lf_printf(file, "/* keep the next instruction address handy */\n");
-  if ((code & generate_with_semantic_returning_modified_nia_only))
-    lf_printf(file, "nia = -1;\n");
-  else if ((code & generate_with_semantic_delayed_branch)) {
-    lf_printf(file, "nia.ip = cia.dp; /* instruction pointer */\n");
-    lf_printf(file, "nia.dp = cia.dp + %d; /* delayed-slot pointer */\n",
-	      insn_bit_size / 8);
+  {
+    lf_printf(file, "/* keep the next instruction address handy */\n");
+    if (options.gen.nia == nia_is_invalid)
+      {
+	lf_printf(file, "nia = %sINVALID_INSTRUCTION_ADDRESS;\n",
+		  options.prefix.global.uname);
+      }
+    else
+      {
+	int nr_immeds = instruction->nr_words - 1;
+	if (options.gen.delayed_branch)
+	  {
+	    if (nr_immeds > 0)
+	      {
+		lf_printf (file, "cia.dp += %d * %d; %s\n",
+			   options.insn_bit_size / 8, nr_immeds,
+			   "/* skip dp immeds */");
+	      }
+	    lf_printf (file, "nia.ip = cia.dp; %s\n",
+		       "/* instruction pointer */");
+	    lf_printf (file, "nia.dp = cia.dp + %d; %s\n",
+		       options.insn_bit_size / 8,
+		       "/* delayed-slot pointer */");
+	  }
+	else
+	  {
+	    if (nr_immeds > 0)
+	      {
+		lf_printf (file, "nia = cia + %d * (%d + 1); %s\n",
+			   options.insn_bit_size / 8, nr_immeds,
+			   "/* skip immeds as well */");
+		
+	      }
+	    else
+	      {
+		lf_printf (file, "nia = cia + %d;\n",
+			   options.insn_bit_size / 8);
+	      }
+	  }
+      }
   }
-  else
-    lf_printf(file, "nia = cia + %d;\n", insn_bit_size / 8);
-
+  
   /* if conditional, generate code to verify that the instruction
      should be issued */
-  if (it_is("c", instruction->file_entry->fields[insn_options])
-      || (code & generate_with_semantic_conditional_issue)) {
-    lf_printf(file, "\n");
-    lf_printf(file, "/* execute only if conditional passes */\n");
-    lf_printf(file, "if (IS_CONDITION_OK) {\n");
-    lf_indent(file, +2);
-    /* FIXME - need to log a conditional failure */
-  }
+  if (filter_is_member (instruction->options, "c")
+      || options.gen.conditional_issue)
+    {
+      lf_printf (file, "\n");
+      lf_printf (file, "/* execute only if conditional passes */\n");
+      lf_printf (file, "if (IS_CONDITION_OK)\n");
+      lf_printf (file, "  {\n");
+      lf_indent (file, +4);
+      /* FIXME - need to log a conditional failure */
+    }
   
-  /* Architecture expects r0 to be zero.  Instead of having to check
-     every read to see if it is refering to r0 just zap the r0
-     register */
-  if ((code & generate_with_semantic_zero_r0))
+  /* Architecture expects a REG to be zero.  Instead of having to
+     check every read to see if it is refering to that REG just zap it
+     at the start of every instruction */
+  if (options.gen.zero_reg)
     {
       lf_printf (file, "\n");
-      lf_printf (file, "GPR(0) = 0;\n");
+      lf_printf (file, "GPR(%d) = 0;\n", options.gen.zero_reg_nr);
     }
-
+  
   /* generate the code (or at least something */
-  lf_printf(file, "\n");
-  lf_printf(file, "/* semantics: */\n");
-  if (instruction->file_entry->annex != NULL) {
-    /* true code */
-    table_entry_print_cpp_line_nr(file, instruction->file_entry);
-    lf_printf(file, "{\n");
-    lf_indent(file, +2);
-    lf_print__c_code(file, instruction->file_entry->annex);
-    lf_indent(file, -2);
-    lf_printf(file, "}\n");
-    lf_print__internal_reference(file);
-  }
-  else if (it_is("nop", instruction->file_entry->fields[insn_flags])) {
-    lf_print__internal_reference(file);
-  }
-  else {
-    /* abort so it is implemented now */
-    table_entry_print_cpp_line_nr(file, instruction->file_entry);
-    lf_printf(file, "sim_engine_abort (SD, CPU, cia, \"%s:%d:0x%%08lx:%%s unimplemented\\n\",\n",
-	      filter_filename(instruction->file_entry->file_name),
-	      instruction->file_entry->line_nr);
-    if ((code & generate_with_semantic_delayed_branch))
-      lf_printf(file, "              (long)cia.ip,\n");
-    else
-      lf_printf(file, "              (long)cia,\n");
-    lf_printf(file, "              itable[MY_INDEX].name);\n");
-    lf_print__internal_reference(file);
-  }
-
+  lf_printf (file, "\n");
+  lf_printf (file, "/* semantics: */\n");
+  if (instruction->code != NULL)
+    {
+      /* true code */
+      lf_printf (file, "{\n");
+      lf_indent (file, +2);
+      lf_print__line_ref (file, instruction->code->line);
+      table_print_code (file, instruction->code);
+      lf_indent (file, -2);
+      lf_printf (file, "}\n");
+      lf_print__internal_ref (file);
+    }
+  else if (filter_is_member (instruction->options, "nop"))
+    {
+      lf_print__internal_ref (file);
+    }
+  else
+    {
+      /* abort so it is implemented now */
+      lf_print__line_ref (file, instruction->line);
+      lf_printf (file, "sim_engine_abort (SD, CPU, cia, \"%s:%d:0x%%08lx:%%s unimplemented\\n\",\n",
+		 filter_filename (instruction->line->file_name),
+		 instruction->line->line_nr);
+      if (options.gen.delayed_branch)
+	{
+	  lf_printf (file, "              (long)cia.ip,\n");
+	}
+      else
+	{
+	  lf_printf (file, "              (long)cia,\n");
+	}
+      lf_printf (file, "              %sitable[MY_INDEX].name);\n",
+		 options.prefix.itable.name);
+      lf_print__internal_ref (file);
+    }
+  
   /* Close off the conditional execution */
-  if (it_is("c", instruction->file_entry->fields[insn_options])
-      || (code & generate_with_semantic_conditional_issue)) {
-    lf_indent(file, -2);
-    lf_printf(file, "}\n");
-  }  
+  if (filter_is_member (instruction->options, "c")
+      || options.gen.conditional_issue)
+    {
+      lf_indent (file, -4);
+      lf_printf (file, "  }\n");
+    }  
 }
 
 static void
-print_c_semantic(lf *file,
-		 insn *instruction,
-		 insn_bits *expanded_bits,
-		 opcode_field *opcodes,
-		 cache_table *cache_rules)
+print_c_semantic (lf *file,
+		  insn_entry *instruction,
+		  opcode_bits *expanded_bits,
+		  insn_opcodes *opcodes,
+		  cache_entry *cache_rules,
+		  int nr_prefetched_words)
 {
-
-  lf_printf(file, "{\n");
-  lf_indent(file, +2);
-
-  print_my_defines(file, expanded_bits, instruction->file_entry);
-  lf_printf(file, "\n");
-  print_icache_body(file,
-		    instruction,
-		    expanded_bits,
-		    cache_rules,
-		    ((code & generate_with_direct_access)
-		     ? define_variables
-		     : declare_variables),
-		    ((code & generate_with_icache)
-		     ? get_values_from_icache
-		     : do_not_use_icache));
-
-  lf_printf(file, "%sinstruction_address nia;\n", global_name_prefix);
-  print_semantic_body(file,
-		      instruction,
-		      expanded_bits,
-		      opcodes);
-  lf_printf(file, "return nia;\n");
-
+  
+  lf_printf (file, "{\n");
+  lf_indent (file, +2);
+  
+  print_my_defines (file,
+		    instruction->name,
+		    instruction->format_name,
+		    expanded_bits);
+  lf_printf (file, "\n");
+  print_icache_body (file,
+		     instruction,
+		     expanded_bits,
+		     cache_rules,
+		     (options.gen.direct_access
+		      ? define_variables
+		      : declare_variables),
+		     (options.gen.icache
+		      ? get_values_from_icache
+		      : do_not_use_icache),
+		     nr_prefetched_words);
+  
+  lf_printf (file, "%sinstruction_address nia;\n", options.prefix.global.name);
+  print_semantic_body (file,
+		       instruction,
+		       expanded_bits,
+		       opcodes);
+  lf_printf (file, "return nia;\n");
+  
   /* generate something to clean up any #defines created for the cache */
-  if (code & generate_with_direct_access)
-    print_icache_body(file,
-		      instruction,
-		      expanded_bits,
-		      cache_rules,
-		      undef_variables,
-		      ((code & generate_with_icache)
-		       ? get_values_from_icache
-		       : do_not_use_icache));
-
-  lf_indent(file, -2);
-  lf_printf(file, "}\n");
+  if (options.gen.direct_access)
+    {
+      print_icache_body (file,
+			 instruction,
+			 expanded_bits,
+			 cache_rules,
+			 undef_variables,
+			 (options.gen.icache
+			  ? get_values_from_icache
+			  : do_not_use_icache),
+			 nr_prefetched_words);
+    }
+  
+  lf_indent (file, -2);
+  lf_printf (file, "}\n");
 }
 
 static void
-print_c_semantic_function(lf *file,
-			  insn *instruction,
-			  insn_bits *expanded_bits,
-			  opcode_field *opcodes,
-			  cache_table *cache_rules)
+print_c_semantic_function (lf *file,
+			   insn_entry *instruction,
+			   opcode_bits *expanded_bits,
+			   insn_opcodes *opcodes,
+			   cache_entry *cache_rules,
+			   int nr_prefetched_words)
 {
   /* build the semantic routine to execute the instruction */
-  print_semantic_function_header(file,
-				 instruction->file_entry->fields[insn_name],
-				 expanded_bits,
-				 1/*is-function-definition*/);
-  print_c_semantic(file,
-		   instruction,
-		   expanded_bits,
-		   opcodes,
-		   cache_rules);
+  print_semantic_function_header (file,
+				  instruction->name,
+				  instruction->format_name,
+				  expanded_bits,
+				  1/*is-function-definition*/,
+				  nr_prefetched_words);
+  print_c_semantic (file,
+		    instruction,
+		    expanded_bits,
+		    opcodes,
+		    cache_rules,
+		    nr_prefetched_words);
 }
 
 void
-print_semantic_definition(insn_table *entry,
-			  lf *file,
-			  void *data,
-			  insn *instruction,
-			  int depth)
+print_semantic_definition (lf *file,
+			   insn_entry *insn,
+			   opcode_bits *expanded_bits,
+			   insn_opcodes *opcodes,
+			   cache_entry *cache_rules,
+			   int nr_prefetched_words)
 {
-  cache_table *cache_rules = (cache_table*)data;
-  if (generate_expanded_instructions) {
-    ASSERT(entry->nr_insn == 1
-	   && entry->opcode == NULL
-	   && entry->parent != NULL
-	   && entry->parent->opcode != NULL);
-    ASSERT(entry->nr_insn == 1
-	   && entry->opcode == NULL
-	   && entry->parent != NULL
-	   && entry->parent->opcode != NULL
-	   && entry->parent->opcode_rule != NULL);
-    print_c_semantic_function(file,
-			      entry->insns,
-			      entry->expanded_bits,
-			      entry->parent->opcode,
-			      cache_rules);
-  }
-  else {
-    print_c_semantic_function(file, instruction,
-			      NULL, NULL,
-			      cache_rules);
-  }
+  print_c_semantic_function (file,
+			     insn,
+			     expanded_bits,
+			     opcodes,
+			     cache_rules,
+			     nr_prefetched_words);
 }
+
+
diff --git a/sim/igen/gen-support.c b/sim/igen/gen-support.c
index 1e4e09e..bd8f34b 100644
--- a/sim/igen/gen-support.c
+++ b/sim/igen/gen-support.c
@@ -23,146 +23,160 @@
 #include "table.h"
 #include "filter.h"
 
-#include "ld-decode.h"
-#include "ld-cache.h"
+#include "igen.h"
+
 #include "ld-insn.h"
+#include "ld-decode.h"
 
-#include "igen.h"
+#include "gen.h"
 
 #include "gen-semantics.h"
 #include "gen-support.h"
 
 static void
-print_support_function_name(lf *file,
-			    table_entry *function,
-			    int is_function_definition)
+print_support_function_name (lf *file,
+			     function_entry *function,
+			     int is_function_definition)
 {
-  if (it_is("internal", function->fields[insn_flags])) {
-    lf_print_function_type_function(file, print_semantic_function_type, "INLINE_SUPPORT",
-				    (is_function_definition ? "\n" : " "));
-    print_function_name(file,
-			function->fields[function_name],
-			NULL,
-			function_name_prefix_semantics);
-    lf_printf(file, "\n(");
-    print_semantic_function_formal(file);
-    lf_printf(file, ")");
-    if (!is_function_definition)
-      lf_printf(file, ";");
-    lf_printf(file, "\n");
-  }
-  else {
-    /* map the name onto a globally valid name */
-    if (!is_function_definition && strcmp(global_name_prefix, "") != 0) {
-      lf_indent_suppress(file);
-      lf_printf(file, "#define %s %s%s\n",
-		function->fields[function_name],
-		global_name_prefix,
-		function->fields[function_name]);
+  if (function->is_internal)
+    {
+      lf_print__function_type_function (file, print_semantic_function_type,
+					"INLINE_SUPPORT",
+					(is_function_definition ? "\n" : " "));
+      print_function_name (file,
+			   function->name,
+			   NULL,
+			   NULL,
+			   NULL,
+			   function_name_prefix_semantics);
+      lf_printf (file, "\n(");
+      lf_indent (file, +1);
+      print_semantic_function_formal (file, 0);
+      lf_indent (file, -1);
+      lf_printf (file, ")");
+      if (!is_function_definition)
+	lf_printf (file, ";");
+      lf_printf (file, "\n");
+    }
+  else
+    {
+      /* map the name onto a globally valid name */
+      if (!is_function_definition
+	  && strcmp (options.prefix.global.name, "") != 0)
+	{
+	  lf_indent_suppress (file);
+	  lf_printf (file, "#define %s %s%s\n",
+		     function->name,
+		     options.prefix.global.name,
+		     function->name);
+	}
+      lf_print__function_type (file,
+			       function->type,
+			       "INLINE_SUPPORT",
+			       (is_function_definition ? "\n" : " "));
+      lf_printf (file, "%s%s\n(",
+		 options.prefix.global.name,
+		 function->name);
+      if (options.gen.smp)
+	lf_printf (file,
+		   "sim_cpu *cpu, %sinstruction_address cia, int MY_INDEX",
+		   options.prefix.global.name);
+      else
+	lf_printf (file,
+		   "SIM_DESC sd, %sinstruction_address cia, int MY_INDEX",
+		   options.prefix.global.name);
+      if (function->param != NULL
+	  && strlen (function->param) > 0)
+	lf_printf (file, ", %s", function->param);
+      lf_printf (file, ")%s", (is_function_definition ? "\n" : ";\n"));
     }
-    lf_print_function_type(file,
-			   function->fields[function_type],
-			   "INLINE_SUPPORT",
-			   (is_function_definition ? "\n" : " "));
-    lf_printf(file, "%s%s\n(",
-	      global_name_prefix,
-	      function->fields[function_name]);
-    if (generate_smp)
-      lf_printf(file, "sim_cpu *cpu");
-    else
-      lf_printf(file, "SIM_DESC sd");
-    if (strcmp(function->fields[function_param], "") != 0)
-      lf_printf(file, ", %s", function->fields[function_param]);
-    lf_printf(file, ")%s", (is_function_definition ? "\n" : ";\n"));
-  }
 }
 
 
 static void
-support_h_function(insn_table *entry,
-		   lf *file,
-		   void *data,
-		   table_entry *function)
+support_h_function (lf *file,
+		    function_entry *function,
+		    void *data)
 {
-  ASSERT(function->fields[function_type] != NULL);
-  ASSERT(function->fields[function_param] != NULL);
-  print_support_function_name(file,
-			      function,
-			      0/*!is_definition*/);
+  ASSERT (function->type != NULL);
+  print_support_function_name (file,
+			       function,
+			       0/*!is_definition*/);
   lf_printf(file, "\n");
 }
 
 
 extern void
-gen_support_h(insn_table *table,
-	      lf *file)
+gen_support_h (lf *file,
+	       insn_table *table)
 {
   /* output the definition of `_SD'*/
-  if (generate_smp) {
-    lf_printf(file, "#define _SD cpu\n");
-    lf_printf(file, "#define SD cpu->sd\n");
-    lf_printf(file, "#define CPU cpu\n");
-  }
-  else {
-    lf_printf(file, "#define _SD sd\n");
-    lf_printf(file, "#define SD sd\n");
-    lf_printf(file, "#define CPU (&sd->cpu)\n");
-  }
+  if (options.gen.smp) 
+    {
+      lf_printf(file, "#define _SD cpu, cia, MY_INDEX\n");
+      lf_printf(file, "#define SD CPU_STATE (cpu)\n");
+      lf_printf(file, "#define CPU cpu\n");
+    }
+  else
+    {
+      lf_printf(file, "#define _SD sd, cia, MY_INDEX\n");
+      lf_printf(file, "#define SD sd\n");
+      lf_printf(file, "#define CPU (STATE_CPU (sd, 0))\n");
+    }
   lf_printf(file, "\n");
   /* output a declaration for all functions */
-  insn_table_traverse_function(table,
-			       file, NULL,
-			       support_h_function);
+  function_entry_traverse (file, table->functions,
+			   support_h_function,
+			   NULL);
   lf_printf(file, "\n");
   lf_printf(file, "#if defined(SUPPORT_INLINE)\n");
   lf_printf(file, "# if ((SUPPORT_INLINE & INCLUDE_MODULE)\\\n");
   lf_printf(file, "      && (SUPPORT_INLINE & INCLUDED_BY_MODULE))\n");
-  lf_printf(file, "#  include \"%ssupport.c\"\n", global_name_prefix);
+  lf_printf(file, "#  include \"%ssupport.c\"\n", options.prefix.global.name);
   lf_printf(file, "# endif\n");
   lf_printf(file, "#endif\n");
 }
 
 static void
-support_c_function(insn_table *table,
-		   lf *file,
-		   void *data,
-		   table_entry *function)
+support_c_function (lf *file,
+		    function_entry *function,
+		    void *data)
 {
-  ASSERT (function->fields[function_type] != NULL);
+  ASSERT (function->type != NULL);
   print_support_function_name (file,
 			       function,
 			       1/*!is_definition*/);
-  table_entry_print_cpp_line_nr (file, function);
   lf_printf (file, "{\n");
   lf_indent (file, +2);
-  if (function->annex == NULL)
-    error ("%s:%d: Function without body (or null statement)",
-	   function->file_name,
-	   function->line_nr);
-    lf_print__c_code (file, function->annex);
-  if (it_is ("internal", function->fields[insn_flags]))
+  if (function->code == NULL)
+    error (function->line,
+	   "Function without body (or null statement)");
+  lf_print__line_ref (file, function->code->line);
+  table_print_code (file, function->code);
+  if (function->is_internal)
     {
       lf_printf (file, "sim_io_error (sd, \"Internal function must longjump\\n\");\n");
       lf_printf (file, "return cia;\n");
     }
   lf_indent (file, -2);
   lf_printf (file, "}\n");
-  lf_print__internal_reference (file);
+  lf_print__internal_ref (file);
   lf_printf (file, "\n");
 }
 
 
 void
-gen_support_c(insn_table *table,
-	      lf *file)
+gen_support_c (lf *file,
+	       insn_table *table)
 {
   lf_printf(file, "#include \"sim-main.h\"\n");
-  lf_printf(file, "#include \"%sidecode.h\"\n", global_name_prefix);
-  lf_printf(file, "#include \"%ssupport.h\"\n", global_name_prefix);
+  lf_printf(file, "#include \"%sidecode.h\"\n", options.prefix.idecode.name);
+  lf_printf(file, "#include \"%sitable.h\"\n", options.prefix.itable.name);
+  lf_printf(file, "#include \"%ssupport.h\"\n", options.prefix.support.name);
   lf_printf(file, "\n");
 
   /* output a definition (c-code) for all functions */
-  insn_table_traverse_function(table,
-			       file, NULL,
-			       support_c_function);
+  function_entry_traverse (file, table->functions,
+			   support_c_function,
+			   NULL);
 }
diff --git a/sim/igen/gen.c b/sim/igen/gen.c
new file mode 100644
index 0000000..927f165
--- /dev/null
+++ b/sim/igen/gen.c
@@ -0,0 +1,1498 @@
+/*  This file is part of the program psim.
+
+    Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ 
+    */
+
+
+#include "misc.h"
+#include "lf.h"
+#include "table.h"
+#include "filter.h"
+
+#include "igen.h"
+#include "ld-insn.h"
+#include "ld-decode.h"
+#include "gen.h"
+
+static insn_uint
+sub_val (insn_uint val,
+	 insn_field_entry *field,
+	 int first_pos,
+	 int last_pos)
+{
+  return ((val >> (field->last - last_pos))
+	  & (((insn_uint)1 << (last_pos - first_pos + 1)) - 1));
+}
+
+static void
+update_depth (lf *file,
+	      gen_entry *entry,
+	      int depth,
+	      void *data)
+{
+  int *max_depth = (int*)data;
+  if (*max_depth < depth)
+    *max_depth = depth;
+}
+
+
+int
+gen_entry_depth (gen_entry *table)
+{
+  int depth = 0;
+  gen_entry_traverse_tree (NULL,
+			   table,
+			   1,
+			   NULL, /*start*/
+			   update_depth,
+			   NULL, /*end*/
+			   &depth); /* data */
+  return depth;
+}
+
+
+static void
+print_gen_entry_path (line_ref *line,
+		      gen_entry *table,
+		      error_func *print)
+{
+  if (table->parent == NULL)
+    {
+      if (table->top->processor != NULL)
+	print (line, "%s", table->top->processor);
+      else
+	print (line, "");
+    }
+  else
+    {
+      print_gen_entry_path (line, table->parent, print);
+      print (NULL, ".%d", table->opcode_nr);
+    }
+}
+
+static void
+print_gen_entry_insns (gen_entry *table,
+		       error_func *print,
+		       char *first_message,
+		       char *next_message)
+{
+  insn_list *i;
+  char *message;
+  message = first_message;
+  for (i = table->insns; i != NULL; i = i->next)
+    {
+      insn_entry *insn = i->insn;
+      print_gen_entry_path (insn->line, table, print);
+      print (NULL, ": %s.%s %s\n",
+	     insn->format_name,
+	     insn->name,
+	     message);
+      if (next_message != NULL)
+	message = next_message;
+    }
+}
+
+
+/* same as strcmp */
+static int
+insn_word_cmp (insn_word_entry *l, insn_word_entry *r)
+{
+  while (1)
+    {
+      int bit_nr;
+      if (l == NULL && r == NULL)
+	return 0; /* all previous fields the same */
+      if (l == NULL)
+	return -1; /* left shorter than right */
+      if (r == NULL)
+	return +1; /* left longer than right */
+      for (bit_nr = 0;
+	   bit_nr < options.insn_bit_size;
+	   bit_nr++)
+	{
+	  if (l->bit[bit_nr]->mask < r->bit[bit_nr]->mask)
+	    return -1;
+	  if (l->bit[bit_nr]->mask > r->bit[bit_nr]->mask)
+	    return 1;
+	  if (l->bit[bit_nr]->value < r->bit[bit_nr]->value)
+	    return -1;
+	  if (l->bit[bit_nr]->value > r->bit[bit_nr]->value)
+	    return 1;
+	}
+      l = l->next;
+      r = r->next;
+    }
+}
+
+static int
+opcode_bit_cmp (opcode_bits *l,
+		opcode_bits *r)
+{
+  if (l == NULL && r == NULL)
+    return 0; /* all previous bits the same */
+  if (l == NULL)
+    return -1; /* left shorter than right */
+  if (r == NULL)
+    return +1; /* left longer than right */
+  /* most significant word */
+  if (l->field->word_nr < r->field->word_nr)
+    return +1; /* left has more significant word */
+  if (l->field->word_nr > r->field->word_nr)
+    return -1; /* right has more significant word */
+  /* most significant bit? */
+  if (l->first < r->first)
+    return +1; /* left as more significant bit */
+  if (l->first > r->first)
+    return -1; /* right as more significant bit */
+  /* nr bits? */
+  if (l->last < r->last)
+    return +1; /* left as less bits */
+  if (l->last > r->last)
+    return -1; /* right as less bits */
+  /* value? */
+  if (l->value < r->value)
+    return -1;
+  if (l->value > r->value)
+    return 1;
+  return 0;
+}
+
+static int
+opcode_bits_cmp (opcode_bits *l,
+		 opcode_bits *r)
+{
+  while (1)
+    {
+      int cmp;
+      if (l == NULL && r == NULL)
+	return 0; /* all previous bits the same */
+      cmp = opcode_bit_cmp (l, r);
+      if (cmp != 0)
+	return cmp;
+      l = l->next;
+      r = r->next;
+    }
+}
+
+static opcode_bits *
+new_opcode_bits (opcode_bits *old_bits,
+		 int value,
+		 int first,
+		 int last,
+		 insn_field_entry *field,
+		 opcode_field *opcode)
+{
+  opcode_bits *new_bits = ZALLOC (opcode_bits);
+  new_bits->field = field;
+  new_bits->value = value;
+  new_bits->first = first;
+  new_bits->last = last;
+  new_bits->opcode = opcode;
+  
+  if (old_bits != NULL)
+    {
+      opcode_bits *new_list;
+      opcode_bits **last = &new_list;
+      new_list = new_opcode_bits (old_bits->next,
+				  old_bits->value,
+				  old_bits->first,
+				  old_bits->last,
+				  old_bits->field,
+				  old_bits->opcode);
+      while (*last != NULL)
+	{
+	  int cmp = opcode_bit_cmp (new_bits, *last);
+	  if (cmp < 0) /* new < new_list */
+	    {
+	      break;
+	    }
+	  if (cmp == 0)
+	    {
+	      ERROR ("Duplicated insn bits in list");
+	    }
+	  last = &(*last)->next;
+	}
+      new_bits->next = *last;
+      *last = new_bits;
+      return new_list;
+    }
+  else
+    {
+      return new_bits;
+    }
+}
+
+
+
+
+typedef enum {
+  merge_duplicate_insns,
+  report_duplicate_insns,
+} duplicate_insn_actions;
+
+static insn_list *
+insn_list_insert (insn_list **cur_insn_ptr,
+		  int *nr_insns,
+		  insn_entry *insn,
+		  opcode_bits *expanded_bits,
+		  opcode_field *opcodes,
+		  int nr_prefetched_words,
+		  duplicate_insn_actions duplicate_action)
+{
+  /* insert it according to the order of the fields & bits */
+  while ((*cur_insn_ptr) != NULL)
+    {
+      int word_cmp = insn_word_cmp (insn->words,
+				    (*cur_insn_ptr)->insn->words);
+      if (word_cmp < 0)
+	{
+	  /* found insertion point - new_insn < cur_insn->next */
+	  break;
+	}
+      else if (word_cmp == 0)
+	{
+	  /* words same, try for bit fields */
+	  int bit_cmp = opcode_bits_cmp (expanded_bits,
+					 (*cur_insn_ptr)->expanded_bits);
+	  if (bit_cmp < 0)
+	    {
+	      /* found insertion point - new_insn < cur_insn->next */
+	      break;
+	    }
+	  else if (bit_cmp == 0)
+	    {
+	      switch (duplicate_action)
+		{
+		case report_duplicate_insns:
+		  /* two instructions with the same constant field
+		     values across all words and bits */
+		  warning (insn->line,
+			   "Location of second (duplicated?) instruction");
+		  error ((*cur_insn_ptr)->insn->line,
+			 "Two instructions with identical constant fields\n");
+		case merge_duplicate_insns:
+		  /* Add the opcode path to the instructions list */
+		  if (opcodes != NULL)
+		    {
+		      insn_opcodes **last = &(*cur_insn_ptr)->opcodes;
+		      while (*last != NULL)
+			{
+			  last = &(*last)->next;
+			}
+		      (*last) = ZALLOC (insn_opcodes);
+		      (*last)->opcode = opcodes;
+		    }
+		  /* Use the larger nr_prefetched_words */
+		  if ((*cur_insn_ptr)->nr_prefetched_words < nr_prefetched_words)
+		    (*cur_insn_ptr)->nr_prefetched_words = nr_prefetched_words;
+		  return (*cur_insn_ptr);
+		}
+	    }
+	}
+      /* keep looking - new_insn > cur_insn->next */
+      cur_insn_ptr = &(*cur_insn_ptr)->next;
+    }
+  
+  /* create a new list entry and insert it */
+  {
+    insn_list *new_insn = ZALLOC (insn_list);
+    new_insn->insn = insn;
+    new_insn->expanded_bits = expanded_bits;
+    new_insn->next = (*cur_insn_ptr);
+    new_insn->nr_prefetched_words = nr_prefetched_words;
+    if (opcodes != NULL)
+      {
+	new_insn->opcodes = ZALLOC (insn_opcodes);
+	new_insn->opcodes->opcode = opcodes;
+      }
+    (*cur_insn_ptr) = new_insn;
+  }
+  
+  *nr_insns += 1;
+
+  return (*cur_insn_ptr);
+}
+
+
+extern void
+gen_entry_traverse_tree (lf *file,
+			 gen_entry *table,
+			 int depth,
+			 gen_entry_handler *start,
+			 gen_entry_handler *leaf,
+			 gen_entry_handler *end,
+			 void *data)
+{
+  gen_entry *entry;
+  
+  ASSERT (table != NULL);
+  ASSERT (table->opcode != NULL);
+  ASSERT (table->nr_entries > 0);
+  ASSERT (table->entries != 0);
+  
+  /* prefix */
+  if (start != NULL && depth >= 0)
+    {
+      start (file, table, depth, data);
+    }
+  /* infix leaves */
+  for (entry = table->entries;
+       entry != NULL;
+       entry = entry->sibling)
+    {
+      if (entry->entries != NULL && depth != 0)
+	{
+	  gen_entry_traverse_tree (file, entry, depth + 1,
+				   start, leaf, end, data);
+	}
+      else if (depth >= 0)
+	{
+	  if (leaf != NULL)
+	    {
+	      leaf (file, entry, depth, data);
+	    }
+	}
+    }
+  /* postfix */
+  if (end != NULL && depth >= 0)
+    {
+      end (file, table, depth, data);
+    }
+}
+
+
+
+/* create a list element containing a single gen_table entry */
+
+static gen_list *
+make_table (insn_table *isa,
+	    decode_table *rules,
+	    char *processor)
+{
+  insn_entry *insn;
+  gen_list *entry = ZALLOC (gen_list);
+  entry->table = ZALLOC (gen_entry);
+  entry->table->top = entry;
+  entry->processor = processor;
+  entry->isa = isa;
+  for (insn = isa->insns; insn != NULL; insn = insn->next)
+    {
+      if (processor == NULL
+	  || insn->processors == NULL
+	  || filter_is_member (insn->processors, processor))
+	{
+	  insn_list_insert (&entry->table->insns,
+			    &entry->table->nr_insns,
+			    insn,
+			    NULL, /* expanded_bits - none yet */
+			    NULL, /* opcodes - none yet */
+			    0, /* nr_prefetched_words - none yet */
+			    report_duplicate_insns);
+	}
+    }
+  entry->table->opcode_rule = rules;
+  return entry;
+}
+
+
+gen_table *
+make_gen_tables (insn_table *isa,
+		 decode_table *rules)
+{
+  gen_table *gen = ZALLOC (gen_table);
+  gen->isa = isa;
+  gen->rules = rules;
+  if (options.gen.multi_sim)
+    {
+      gen_list **last = &gen->tables;
+      char *processor;
+      filter *processors;
+      if (options.model_filter != NULL)
+	processors = options.model_filter;
+      else
+	processors = isa->model->processors;
+      for (processor = filter_next (processors, "");
+	   processor != NULL;
+	   processor = filter_next (processors, processor))
+	{
+	  *last = make_table (isa, rules, processor);
+	  last = &(*last)->next;
+	}
+    }
+  else
+    {
+      gen->tables = make_table (isa, rules, NULL);
+    }
+  return gen;
+}
+  
+  
+/****************************************************************/
+
+#if 0
+typedef enum {
+  field_is_not_constant = 0,
+  field_constant_int = 1,
+  field_constant_reserved = 2,
+  field_constant_string = 3
+} constant_field_types;
+
+static constant_field_types
+insn_field_is_constant (insn_field *field,
+		        decode_table *rule)
+{
+  switch (field->type)
+    {
+    case insn_field_int:
+      /* field is an integer */
+      return field_constant_int;
+    case insn_field_reserved:
+      /* field is `/' and treating that as a constant */
+      if (rule->with_zero_reserved)
+	return field_constant_reserved;
+      else
+	return field_is_not_constant;
+    case insn_field_wild:
+      return field_is_not_constant; /* never constant */
+    case insn_field_string:
+      /* field, though variable, is on the list of forced constants */
+      if (filter_is_member (rule->constant_field_names, field->val_string))
+	return field_constant_string;
+      else
+	return field_is_not_constant;
+    }
+  ERROR ("Internal error");
+  return field_is_not_constant;
+}
+#endif
+
+
+/****************************************************************/
+
+
+/* Is the bit, according to the decode rule, identical across all the
+   instructions? */
+static int
+insns_bit_useless (insn_list *insns,
+		   decode_table *rule,
+		   int bit_nr)
+{
+  insn_list *entry;
+  int value = -1;
+  int is_useless = 1; /* cleared if something actually found */
+  for (entry = insns; entry != NULL; entry = entry->next)
+    {
+      insn_word_entry *word = entry->insn->word[rule->word_nr];
+      insn_bit_entry *bit = word->bit[bit_nr];
+      switch (bit->field->type)
+	{
+	case insn_field_wild:
+	case insn_field_reserved:
+	  /* neither useless or useful - ignore */
+	  break;
+	case insn_field_int:
+	  switch (rule->search)
+	    {
+	    case decode_find_strings:
+	      /* an integer isn't a string */
+	      return 1;
+	    case decode_find_constants:
+	    case decode_find_mixed:
+	      /* an integer is useful if its value isn't the same
+                 between all instructions? */
+	      if (value < 0)
+		value = bit->value;
+	      else if (value != bit->value)
+		is_useless = 0;
+	      break;
+	    }
+	  break;
+	case insn_field_string:
+	  switch (rule->search)
+	    {
+	    case decode_find_strings:
+	      /* at least one string, keep checking */
+	      is_useless = 0;
+	      break;
+	    case decode_find_constants:
+	    case decode_find_mixed:
+	      /* a string field forced to constant */
+	      if (filter_is_member (rule->constant_field_names,
+				    bit->field->val_string))
+		is_useless = 0;
+	      else if (rule->search == decode_find_constants)
+		/* the string field isn't constant */
+		return 1;
+	      break;
+	    }
+	}
+    }
+  return is_useless;
+}
+
+
+/* go through a gen-table's list of instruction formats looking for a
+   range of bits that meet the decode table RULEs requirements */
+
+static opcode_field *
+gen_entry_find_opcode_field (insn_list *insns,
+			     decode_table *rule,
+			     int string_only)
+{
+  opcode_field curr_opcode;
+  ASSERT (rule != NULL);
+
+  memset (&curr_opcode, 0, sizeof (curr_opcode));
+  curr_opcode.word_nr = rule->word_nr;
+  curr_opcode.first = rule->first;
+  curr_opcode.last = rule->last;
+
+  /* Try to reduce the size of first..last in accordance with the
+     decode rules */
+
+  while (curr_opcode.first <= rule->last)
+    {
+      if (insns_bit_useless (insns, rule, curr_opcode.first))
+	curr_opcode.first ++;
+      else
+	break;
+    }
+  while (curr_opcode.last >= rule->first)
+    {
+      if (insns_bit_useless (insns, rule, curr_opcode.last))
+	curr_opcode.last --;
+      else
+	break;
+    }
+
+
+#if 0
+  for (entry = insns; entry != NULL; entry = entry->next)
+    {
+      insn_word_entry *fields = entry->insn->word[rule->word_nr];
+      opcode_field new_opcode;
+      
+      ASSERT (fields != NULL);
+      
+      /* find a start point for the opcode field */
+      new_opcode.first = rule->first;
+      while (new_opcode.first <= rule->last
+	     && (!string_only
+		 || (insn_field_is_constant(fields->bit[new_opcode.first], rule)
+		     != field_constant_string))
+	     && (string_only
+		 || (insn_field_is_constant(fields->bit[new_opcode.first], rule)
+		     == field_is_not_constant)))
+	{
+	  int new_first = fields->bit[new_opcode.first]->last + 1;
+	  ASSERT (new_first > new_opcode.first);
+	  new_opcode.first = new_first;
+	}
+      ASSERT(new_opcode.first > rule->last
+	     || (string_only
+		 && insn_field_is_constant(fields->bit[new_opcode.first],
+					   rule) == field_constant_string)
+	     || (!string_only
+		 && insn_field_is_constant(fields->bit[new_opcode.first],
+					   rule)));
+      
+      /* find the end point for the opcode field */
+      new_opcode.last = rule->last;
+      while (new_opcode.last >= rule->first
+	     && (!string_only
+		 || insn_field_is_constant(fields->bit[new_opcode.last],
+					   rule) != field_constant_string)
+	     && (string_only
+		 || !insn_field_is_constant(fields->bit[new_opcode.last],
+					    rule)))
+	{
+	  int new_last = fields->bit[new_opcode.last]->first - 1;
+	  ASSERT (new_last < new_opcode.last);
+	  new_opcode.last = new_last;
+	}
+      ASSERT(new_opcode.last < rule->first
+	     || (string_only
+		 && insn_field_is_constant(fields->bit[new_opcode.last],
+					   rule) == field_constant_string)
+	     || (!string_only
+		 && insn_field_is_constant(fields->bit[new_opcode.last],
+					   rule)));
+      
+      /* now see if our current opcode needs expanding to include the
+	 interesting fields within this instruction */
+      if (new_opcode.first <= rule->last
+	  && curr_opcode.first > new_opcode.first)
+	curr_opcode.first = new_opcode.first;
+      if (new_opcode.last >= rule->first
+	  && curr_opcode.last < new_opcode.last)
+	curr_opcode.last = new_opcode.last;
+      
+    }
+#endif
+
+  /* did the final opcode field end up being empty? */
+  if (curr_opcode.first > curr_opcode.last)
+    {
+      return NULL;
+    }
+  ASSERT (curr_opcode.last >= rule->first);
+  ASSERT (curr_opcode.first <= rule->last);
+  ASSERT (curr_opcode.first <= curr_opcode.last);
+
+  /* Ensure that, for the non string only case, the opcode includes
+     the range forced_first .. forced_last */
+  if (!string_only
+      && curr_opcode.first > rule->force_first)
+    {
+      curr_opcode.first = rule->force_first;
+    }
+  if (!string_only
+      && curr_opcode.last < rule->force_last)
+    {
+      curr_opcode.last = rule->force_last;
+    }
+
+  /* For the string only case, force just the lower bound (so that the
+     shift can be eliminated) */
+  if (string_only
+      && rule->force_last == options.insn_bit_size - 1)
+    {
+      curr_opcode.last = options.insn_bit_size - 1;
+    }
+
+  /* handle any special cases */
+  switch (rule->type)
+    {
+    case normal_decode_rule:
+      /* let the above apply */
+      curr_opcode.nr_opcodes =
+	(1 << (curr_opcode.last - curr_opcode.first + 1));
+      break;
+    case boolean_rule:
+      curr_opcode.is_boolean = 1;
+      curr_opcode.boolean_constant = rule->constant;
+      curr_opcode.nr_opcodes = 2;
+      break;
+    }
+
+  {
+    opcode_field *new_field = ZALLOC (opcode_field);
+    memcpy (new_field, &curr_opcode, sizeof (opcode_field));
+    return new_field;
+  }
+}
+
+
+static void
+gen_entry_insert_insn (gen_entry *table,
+		       insn_entry *old_insn,
+		       int new_word_nr,
+		       int new_nr_prefetched_words,
+		       int new_opcode_nr,
+		       opcode_bits *new_bits)
+{
+  gen_entry **entry = &table->entries;
+  
+  /* find the new table for this entry */
+  while ((*entry) != NULL && (*entry)->opcode_nr < new_opcode_nr)
+    {
+      entry = &(*entry)->sibling;
+    }
+  
+  if ((*entry) == NULL || (*entry)->opcode_nr != new_opcode_nr)
+    {
+      /* insert the missing entry */
+      gen_entry *new_entry = ZALLOC (gen_entry);
+      new_entry->sibling = (*entry);
+      (*entry) = new_entry;
+      table->nr_entries++;
+      /* fill it in */
+      new_entry->top = table->top;
+      new_entry->opcode_nr = new_opcode_nr;
+      new_entry->word_nr = new_word_nr;
+      new_entry->expanded_bits = new_bits;
+      new_entry->opcode_rule = table->opcode_rule->next;
+      new_entry->parent = table;
+      new_entry->nr_prefetched_words = new_nr_prefetched_words;
+    }
+  /* ASSERT new_bits == cur_entry bits */
+  ASSERT ((*entry) != NULL && (*entry)->opcode_nr == new_opcode_nr);
+  insn_list_insert (&(*entry)->insns,
+		    &(*entry)->nr_insns,
+		    old_insn,
+		    NULL, /* expanded_bits - only in final list */
+		    NULL, /* opcodes - only in final list */
+		    new_nr_prefetched_words, /* for this table */
+		    report_duplicate_insns);
+}
+
+
+static void
+gen_entry_expand_opcode (gen_entry *table,
+			 insn_entry *instruction,
+			 int bit_nr,
+			 int opcode_nr,
+			 opcode_bits *bits)
+{
+  if (bit_nr > table->opcode->last)
+    {
+      /* Only include the hardwired bit information with an entry IF
+         that entry (and hence its functions) are being duplicated.  */
+      if (table->opcode_rule->with_duplicates)
+	{
+	  gen_entry_insert_insn (table, instruction,
+				 table->opcode->word_nr,
+				 table->nr_prefetched_words,
+				 opcode_nr, bits);
+	}
+      else
+	{
+	  gen_entry_insert_insn (table, instruction,
+				 table->opcode->word_nr,
+				 table->nr_prefetched_words,
+				 opcode_nr, NULL);
+	}
+    }
+  else
+    {
+      insn_word_entry *word = instruction->word[table->opcode->word_nr];
+      insn_field_entry *field = word->bit[bit_nr]->field;
+      int last_pos = ((field->last < table->opcode->last)
+		      ? field->last : table->opcode->last);
+      int first_pos = ((field->first > table->opcode->first)
+		       ? field->first : table->opcode->first);
+      int width = last_pos - first_pos + 1;
+      switch (field->type)
+	{
+	case insn_field_int:
+	  {
+	    int val;
+	    val = sub_val (field->val_int, field, first_pos, last_pos);
+	    gen_entry_expand_opcode (table, instruction,
+				     last_pos + 1,
+				     ((opcode_nr << width) | val),
+				     bits);
+	    break;
+	  }
+	default:
+	  {
+	    if (field->type == insn_field_reserved)
+	      gen_entry_expand_opcode (table, instruction,
+				       last_pos + 1,
+				       ((opcode_nr << width)),
+				       bits);
+	    else
+	      {
+		int val;
+		int last_val = (table->opcode->is_boolean
+				? 2 : (1 << width));
+		for (val = 0; val < last_val; val++)
+		  {
+		    /* check to see if the value has been limited */
+		    insn_field_exclusion *exclusion;
+		    for (exclusion = field->exclusions;
+			 exclusion != NULL;
+			 exclusion = exclusion->next)
+		      {
+			int value = sub_val (exclusion->value, field,
+					     first_pos, last_pos);
+			if (value == val)
+			  break;
+		      }
+		    if (exclusion == NULL)
+		      {
+			/* Only add additional hardwired bit
+                           information if the entry is not going to
+                           later be combined */
+			if (table->opcode_rule->with_combine)
+			  {
+			    gen_entry_expand_opcode (table, instruction,
+						     last_pos + 1,
+						     ((opcode_nr << width) | val),
+						     bits);
+			  }
+			else
+			  {
+			    opcode_bits *new_bits = new_opcode_bits (bits, val,
+								     first_pos, last_pos,
+								     field,
+								     table->opcode);
+			    gen_entry_expand_opcode (table, instruction,
+						     last_pos + 1,
+						     ((opcode_nr << width) | val),
+						     new_bits);
+			  }
+		      }
+		  }
+	      }
+	  }
+	}
+    }
+}
+
+static void
+gen_entry_insert_expanding (gen_entry *table,
+			    insn_entry *instruction)
+{
+  gen_entry_expand_opcode (table,
+			   instruction,
+			   table->opcode->first,
+			   0,
+			   table->expanded_bits);
+}
+
+
+static int
+insns_match_format_names (insn_list *insns,
+			  filter *format_names)
+{
+  if (format_names != NULL)
+    {
+      insn_list *i;
+      for (i = insns; i != NULL; i = i->next)
+	{
+	  if ( i->insn->format_name != NULL
+	       && !filter_is_member (format_names, i->insn->format_name))
+	    return 0;
+	}
+    }
+  return 1;
+}
+
+static int
+table_matches_path (gen_entry *table,
+		    decode_path_list *paths)
+{
+  if (paths == NULL)
+    return 1;
+  while (paths != NULL)
+    {
+      gen_entry *entry = table;
+      decode_path *path = paths->path;
+      while (1)
+	{
+	  if (entry == NULL && path == NULL)
+	    return 1;
+	  if (entry == NULL || path == NULL)
+	    break;
+	  if (entry->opcode_nr != path->opcode_nr)
+	    break;
+	  entry = entry->parent;
+	  path = path->parent;
+	}
+      paths = paths->next;
+    }
+  return 0;
+}
+
+
+static int
+insns_match_conditions (insn_list *insns,
+			decode_cond *conditions)
+{
+  if (conditions != NULL)
+    {
+      insn_list *i;
+      for (i = insns; i != NULL; i = i->next)
+	{
+	  decode_cond *cond;
+	  for (cond = conditions; cond != NULL; cond = cond->next)
+	    {
+	      int bit_nr;
+	      if (i->insn->nr_words <= cond->word_nr)
+		return 0;
+	      for (bit_nr = 0; bit_nr < options.insn_bit_size; bit_nr++)
+		{
+		  if (!cond->mask[bit_nr])
+		    continue;
+		  if (!i->insn->word[cond->word_nr]->bit[bit_nr]->mask)
+		    return 0;
+		  if ((i->insn->word[cond->word_nr]->bit[bit_nr]->value
+		       == cond->value[bit_nr])
+		      == !cond->is_equal)
+		    return 0;
+		}
+	    }
+	}
+    }
+  return 1;
+}
+
+static int
+insns_match_nr_words (insn_list *insns,
+		      int nr_words)
+{
+  insn_list *i;
+  for (i = insns; i != NULL; i = i->next)
+    {
+      if (i->insn->nr_words < nr_words)
+	return 0;
+    }
+  return 1;
+}
+
+static int
+insn_list_cmp (insn_list *l,
+	       insn_list *r)
+{
+  while (1)
+    {
+      insn_entry *insn;
+      if (l == NULL && r == NULL)
+	return 0;
+      if (l == NULL)
+	return -1;
+      if (r == NULL)
+	return 1;
+      if (l->insn != r->insn)
+	return -1; /* somewhat arbitrary at present */
+      /* skip this insn */
+      insn = l->insn;
+      while (l != NULL && l->insn == insn)
+	l = l->next;
+      while (r != NULL && r->insn == insn)
+	r = r->next;
+    }
+}
+
+
+
+static void
+gen_entry_expand_insns (gen_entry *table)
+{
+  decode_table *opcode_rule;
+
+  ASSERT(table->nr_insns >= 1);
+  
+  /* determine a valid opcode */
+  for (opcode_rule = table->opcode_rule;
+       opcode_rule != NULL;
+       opcode_rule = opcode_rule->next)
+    {
+      char *discard_reason;
+      if (table->top->processor != NULL
+	  && opcode_rule->model_names != NULL
+	  && !filter_is_member (opcode_rule->model_names,
+				table->top->processor))
+	{
+	  /* the rule isn't applicable to this processor */
+	  discard_reason = "wrong model";
+	}
+      else if (table->nr_insns == 1 && opcode_rule->conditions == NULL)
+	{
+	  /* for safety, require a pre-codition when attempting to
+             apply a rule to a single instruction */
+	  discard_reason = "need pre-condition when nr-insn == 1";
+	}
+      else if (table->nr_insns == 1 && !opcode_rule->with_duplicates)
+	{
+	  /* Little point in expanding a single instruction when we're
+             not duplicating the semantic functions that this table
+             calls */
+	  discard_reason = "need duplication with nr-insns == 1";
+	}
+      else if (!insns_match_format_names (table->insns, opcode_rule->format_names))
+	{
+	  discard_reason = "wrong format name";
+	}
+      else if (!insns_match_nr_words (table->insns, opcode_rule->word_nr + 1))
+	{
+	  discard_reason = "wrong nr words";
+	}
+      else if (!table_matches_path (table, opcode_rule->paths))
+	{
+	  discard_reason = "path failed";
+	}
+      else if (!insns_match_conditions (table->insns, opcode_rule->conditions))
+	{
+	  discard_reason = "condition failed";
+	}
+      else
+	{
+	  discard_reason = "no opcode field";
+	  table->opcode =
+	    gen_entry_find_opcode_field (table->insns,
+					 opcode_rule,
+					 table->nr_insns == 1/*string-only*/
+					 );
+	  if (table->opcode != NULL)
+	    {
+	      table->opcode_rule = opcode_rule;
+	      break;
+	    }
+	}
+
+      if (options.trace.rule_rejection)
+	{
+	  print_gen_entry_path (opcode_rule->line, table, notify);
+	  notify (NULL, ": rule discarded - %s\n", discard_reason);
+	}
+    }
+  
+  /* did we find anything */
+  if (opcode_rule == NULL)
+    {
+      /* the decode table failed, this set of instructions haven't
+         been uniquely identified */
+      if (table->nr_insns > 1)
+	{
+	  print_gen_entry_insns (table, warning,
+				 "was not uniquely decoded",
+				 "decodes to the same entry");
+	  error (NULL, "");
+	}
+      return;
+    }
+
+  /* Determine the number of words that must have been prefetched for
+     this table to function */
+  if (table->parent == NULL)
+    table->nr_prefetched_words = table->opcode_rule->word_nr + 1;
+  else if (table->opcode_rule->word_nr + 1 > table->parent->nr_prefetched_words)
+    table->nr_prefetched_words = table->opcode_rule->word_nr + 1;
+  else
+    table->nr_prefetched_words = table->parent->nr_prefetched_words;
+
+  /* back link what we found to its parent */
+  if (table->parent != NULL)
+    {
+      ASSERT(table->parent->opcode != NULL);
+      table->opcode->parent = table->parent->opcode;
+    }
+
+  /* expand the raw instructions according to the opcode */
+  {
+    insn_list *entry;
+    for (entry = table->insns; entry != NULL; entry = entry->next)
+      {
+	gen_entry_insert_expanding (table, entry->insn);
+      }
+  }
+
+  if (options.trace.rule_selection)
+    {
+      print_gen_entry_path (table->opcode_rule->line, table, notify);
+      notify (NULL,
+	      ": decode - word %d, bits [%d..%d] in [%d..%d], opcodes %d, entries %d\n",
+	      table->opcode->word_nr,
+	      i2target (options.hi_bit_nr, table->opcode->first),
+	      i2target (options.hi_bit_nr, table->opcode->last),
+	      i2target (options.hi_bit_nr, table->opcode_rule->first),
+	      i2target (options.hi_bit_nr, table->opcode_rule->last),
+	      table->opcode->nr_opcodes,
+	      table->nr_entries);
+    }
+
+  /* dump the results */
+  if (options.trace.entries)
+    {
+      gen_entry *entry;
+      for (entry = table->entries; entry != NULL; entry = entry->sibling)
+	{
+	  insn_list *l;
+	  print_gen_entry_path (table->opcode_rule->line, entry, notify);
+	  notify (NULL, ": %d - entries %d -",
+		  entry->opcode_nr,
+		  entry->nr_insns);
+	  for (l = entry->insns; l != NULL; l = l->next)
+	    notify (NULL, " %s.%s", l->insn->format_name, l->insn->name);
+	  notify (NULL, "\n");
+	}
+    }
+	
+  /* perform a combine pass if needed */
+  if (table->opcode_rule->with_combine)
+    {
+      gen_entry *entry;
+      for (entry = table->entries; entry != NULL; entry = entry->sibling)
+	{
+	  if (entry->combined_parent == NULL)
+	    {
+	      gen_entry **last = &entry->combined_next;
+	      gen_entry *alt;
+	      for (alt = entry->sibling; alt != NULL; alt = alt->sibling)
+		{
+		  if (alt->combined_parent == NULL
+		      && insn_list_cmp (entry->insns, alt->insns) == 0)
+		    {
+		      alt->combined_parent = entry;
+		      *last = alt;
+		      last = &alt->combined_next;
+		    }
+		}
+	    }
+	}
+      if (options.trace.combine)
+	{
+	  int nr_unique = 0;
+	  gen_entry *entry;
+	  for (entry = table->entries; entry != NULL; entry = entry->sibling)
+	    {
+	      if (entry->combined_parent == NULL)
+		{
+		  insn_list *l;
+		  gen_entry *duplicate;
+		  nr_unique++;
+		  print_gen_entry_path (table->opcode_rule->line, entry, notify);
+		  for (duplicate = entry->combined_next;
+		       duplicate != NULL;
+		       duplicate = duplicate->combined_next)
+		    {
+		      notify (NULL, "+%d", duplicate->opcode_nr);
+		    }
+		  notify (NULL, ": entries %d -", entry->nr_insns);
+		  for (l = entry->insns; l != NULL; l = l->next)
+		    {
+		      notify (NULL, " %s.%s",
+			      l->insn->format_name,
+			      l->insn->name);
+		    }
+		  notify (NULL, "\n");
+		}
+	    }
+	  print_gen_entry_path (table->opcode_rule->line, table, notify);
+	  notify (NULL, ": combine - word %d, bits [%d..%d] in [%d..%d], opcodes %d, entries %d, unique %d\n",
+		  table->opcode->word_nr,
+		  i2target (options.hi_bit_nr, table->opcode->first),
+		  i2target (options.hi_bit_nr, table->opcode->last),
+		  i2target (options.hi_bit_nr, table->opcode_rule->first),
+		  i2target (options.hi_bit_nr, table->opcode_rule->last),
+		  table->opcode->nr_opcodes,
+		  table->nr_entries,
+		  nr_unique);
+	}
+    }
+	
+  /* Check that the rule did more than re-arange the order of the
+     instructions */
+  {
+      gen_entry *entry;
+      for (entry = table->entries; entry != NULL; entry = entry->sibling)
+	{
+	  if (entry->combined_parent == NULL)
+	    {
+	      if (insn_list_cmp (table->insns, entry->insns) == 0)
+		{
+		  print_gen_entry_path (table->opcode_rule->line, table, warning);
+		  warning (NULL, ": Applying rule just copied all instructions\n");
+		  print_gen_entry_insns (entry, warning, "Copied", NULL);
+		  error (NULL, "");
+		}
+	    }
+	}    
+  }
+
+  /* if some form of expanded table, fill in the missing dots */
+  switch (table->opcode_rule->gen)
+    {
+    case padded_switch_gen:
+    case array_gen:
+    case goto_switch_gen:
+      if (!table->opcode->is_boolean)
+	{
+	  gen_entry **entry = &table->entries;
+	  gen_entry *illegals = NULL;
+	  gen_entry **last_illegal = &illegals;
+	  int opcode_nr = 0;
+	  while (opcode_nr < table->opcode->nr_opcodes)
+	    {
+	      if ((*entry) == NULL || (*entry)->opcode_nr != opcode_nr)
+		{
+		  /* missing - insert it under our feet at *entry */
+		  gen_entry_insert_insn (table,
+					 table->top->isa->illegal_insn,
+					 table->opcode->word_nr,
+					 0, /* nr_prefetched_words == 0 for invalid */
+					 opcode_nr, NULL);
+		  ASSERT ((*entry) != NULL);
+		  ASSERT ((*entry)->opcode_nr == opcode_nr);
+		  (*last_illegal) = *entry;
+		  (*last_illegal)->combined_parent = illegals;
+		  last_illegal = &(*last_illegal)->combined_next;
+		}
+	      entry = &(*entry)->sibling;
+	      opcode_nr++;
+	    }
+	  /* oops, will have pointed the first illegal insn back to
+             its self.  Fix this */
+	  if (illegals != NULL)
+	    illegals->combined_parent = NULL;
+	}
+      break;
+    case switch_gen:
+    case invalid_gen:
+      /* ignore */
+      break;
+    }
+
+  /* and do the same for the newly created sub entries but *only*
+     expand entries that haven't been combined. */
+  {
+    gen_entry *entry;
+    for (entry = table->entries; entry != NULL; entry =  entry->sibling)
+      {
+	if (entry->combined_parent == NULL)
+	  {
+	    gen_entry_expand_insns (entry);
+	  }
+      }
+  }
+}
+
+void
+gen_tables_expand_insns (gen_table *gen)
+{
+  gen_list *entry;
+  for (entry = gen->tables; entry != NULL; entry = entry->next)
+    {
+      gen_entry_expand_insns (entry->table);
+    }
+}
+
+
+/* create a list of all the semantic functions that need to be
+   generated.  Eliminate any duplicates. Verify that the decode stage
+   worked. */
+
+static void
+make_gen_semantics_list (lf *file,
+			 gen_entry *entry,
+			 int depth,
+			 void *data)
+{
+  gen_table *gen = (gen_table*) data;
+  insn_list *insn;
+  /* Not interested in an entrie that have been combined into some
+     other entry at the same level */
+  if (entry->combined_parent != NULL)
+    return;
+
+  /* a leaf should contain exactly one instruction. If not the decode
+     stage failed. */
+  ASSERT (entry->nr_insns == 1);
+
+  /* Enter this instruction into the list of semantic functions. */
+  insn = insn_list_insert (&gen->semantics, &gen->nr_semantics,
+			   entry->insns->insn,
+			   entry->expanded_bits,
+			   entry->parent->opcode,
+			   entry->insns->nr_prefetched_words,
+			   merge_duplicate_insns);
+  /* point the table entry at the real semantic function */
+  ASSERT (insn != NULL);
+  entry->insns->semantic = insn;
+}
+
+
+void
+gen_tables_expand_semantics (gen_table *gen)
+{
+  gen_list *entry;
+  for (entry = gen->tables; entry != NULL; entry = entry->next)
+    {
+      gen_entry_traverse_tree (NULL,
+			       entry->table,
+			       1, /* depth */
+			       NULL, /* start-handler */
+			       make_gen_semantics_list, /* leaf-handler */
+			       NULL, /* end-handler */
+			       gen); /* data */
+  }
+}
+
+
+
+#ifdef MAIN
+
+
+static void
+dump_opcode_field (lf *file,
+		   char *prefix,
+		   opcode_field *field,
+		   char *suffix,
+		   int levels)
+{
+  lf_printf (file, "%s(opcode_field *) 0x%lx", prefix, (long) field);
+  if (levels && field != NULL) {
+    lf_indent (file, +1);
+    lf_printf (file, "\n(first %d)", field->first);
+    lf_printf (file, "\n(last %d)", field->last);
+    lf_printf (file, "\n(nr_opcodes %d)", field->nr_opcodes);
+    lf_printf (file, "\n(is_boolean %d)", field->is_boolean);
+    lf_printf (file, "\n(boolean_constant %d)", field->boolean_constant);
+    dump_opcode_field(file, "\n(parent ", field->parent, ")", levels - 1);
+    lf_indent (file, -1);
+  }
+  lf_printf (file, "%s", suffix);
+}
+
+
+static void
+dump_opcode_bits (lf *file,
+		  char *prefix,
+		  opcode_bits *bits,
+		  char *suffix,
+		  int levels)
+{
+  lf_printf (file, "%s(opcode_bits *) 0x%lx", prefix, (long) bits);
+  
+  if (levels && bits != NULL)
+    {
+      lf_indent (file, +1);
+      lf_printf (file, "\n(value %d)", bits->value);
+      dump_opcode_field (file, "\n(opcode ", bits->opcode, ")", 0);
+      dump_insn_field (file, "\n(field ", bits->field, ")");
+      dump_opcode_bits (file, "\n(next ", bits->next, ")", levels - 1);
+      lf_indent (file, -1);
+    }
+  lf_printf (file, "%s", suffix);
+}
+
+
+
+static void
+dump_insn_list (lf *file,
+		char *prefix,
+		insn_list *entry,
+		char *suffix)
+{
+  lf_printf (file, "%s(insn_list *) 0x%lx", prefix, (long) entry);
+
+  if (entry != NULL) {
+    lf_indent (file, +1);
+    dump_insn_entry (file, "\n(insn ", entry->insn, ")");
+    lf_printf (file, "\n(next 0x%lx)", (long) entry->next);
+    lf_indent (file, -1);
+  }
+  lf_printf (file, "%s", suffix);
+}
+
+
+static void
+dump_insn_word_entry_list_entries (lf *file,
+			       char *prefix,
+			       insn_list *entry,
+			       char *suffix)
+{
+  lf_printf (file, "%s", prefix);
+  while (entry != NULL)
+    {
+      dump_insn_list (file, "\n(", entry, ")");
+      entry = entry->next;
+    }
+  lf_printf (file, "%s", suffix);
+}
+
+
+static void
+dump_gen_entry (lf *file,
+		char *prefix,
+		gen_entry *table,
+		char *suffix,
+		int levels)
+{
+
+  lf_printf (file, "%s(gen_entry *) 0x%lx", prefix, (long) table);
+
+  if (levels && table != NULL) {
+
+    lf_indent (file, +1);
+    lf_printf (file, "\n(opcode_nr %d)", table->opcode_nr);
+    lf_printf (file, "\n(word_nr %d)", table->word_nr);
+    dump_opcode_bits (file, "\n(expanded_bits ", table->expanded_bits, ")", -1);
+    lf_printf (file, "\n(nr_insns %d)", table->nr_insns);
+    dump_insn_word_entry_list_entries (file, "\n(insns ", table->insns, ")");
+    dump_decode_rule (file, "\n(opcode_rule ", table->opcode_rule, ")");
+    dump_opcode_field (file, "\n(opcode ", table->opcode, ")", 0);
+    lf_printf (file, "\n(nr_entries %d)", table->nr_entries);
+    dump_gen_entry (file, "\n(entries ", table->entries, ")", table->nr_entries);
+    dump_gen_entry (file, "\n(sibling ", table->sibling, ")", levels - 1);
+    dump_gen_entry (file, "\n(parent ", table->parent, ")", 0);
+    lf_indent (file, -1);
+  }
+  lf_printf (file, "%s", suffix);
+}
+
+static void
+dump_gen_list (lf *file,
+	       char *prefix,
+	       gen_list *entry,
+	       char *suffix,
+	       int levels)
+{
+  while (entry != NULL)
+    {
+      lf_printf (file, "%s(gen_list *) 0x%lx", prefix, (long) entry);
+      dump_gen_entry (file, "\n(", entry->table, ")", levels);
+      lf_printf (file, "\n(next (gen_list *) 0x%lx)", (long) entry->next);
+      lf_printf (file, "%s", suffix);
+    }
+}
+
+
+static void
+dump_gen_table (lf *file,
+		char *prefix,
+		gen_table *gen,
+		char *suffix,
+		int levels)
+{
+  lf_printf (file, "%s(gen_table *) 0x%lx", prefix, (long) gen);
+  lf_printf (file, "\n(isa (insn_table *) 0x%lx)", (long) gen->isa);
+  lf_printf (file, "\n(rules (decode_table *) 0x%lx)", (long) gen->rules);
+  dump_gen_list (file, "\n(", gen->tables, ")", levels);
+  lf_printf (file, "%s", suffix);
+}
+
+
+igen_options options;
+
+int
+main (int argc,
+      char **argv)
+{
+  decode_table *decode_rules;
+  insn_table *instructions;
+  gen_table *gen;
+  lf *l;
+
+  if (argc != 7)
+    error (NULL, "Usage: insn <filter-in> <hi-bit-nr> <insn-bit-size> <widths> <decode-table> <insn-table>\n");
+
+  INIT_OPTIONS (options);
+
+  filter_parse (&options.flags_filter, argv[1]);
+
+  options.hi_bit_nr = a2i(argv[2]);
+  options.insn_bit_size = a2i(argv[3]);
+  options.insn_specifying_widths = a2i(argv[4]);
+  ASSERT(options.hi_bit_nr < options.insn_bit_size);
+
+  instructions = load_insn_table (argv[6], NULL);
+  decode_rules = load_decode_table (argv[5]);
+  gen = make_gen_tables (instructions, decode_rules);
+
+  gen_tables_expand_insns (gen);
+
+  l = lf_open ("-", "stdout", lf_omit_references, lf_is_text, "tmp-ld-insn");
+
+  dump_gen_table (l, "(", gen, ")\n", -1);
+  return 0;
+}
+
+#endif
diff --git a/sim/igen/igen.c b/sim/igen/igen.c
index 2354d61..26ac78d 100644
--- a/sim/igen/igen.c
+++ b/sim/igen/igen.c
@@ -26,34 +26,25 @@
 #include "lf.h"
 #include "table.h"
 #include "config.h"
-
 #include "filter.h"
 
+#include "igen.h"
+
+#include "ld-insn.h"
 #include "ld-decode.h"
 #include "ld-cache.h"
-#include "ld-insn.h"
 
-#include "igen.h"
+#include "gen.h"
 
 #include "gen-model.h"
 #include "gen-icache.h"
 #include "gen-itable.h"
 #include "gen-idecode.h"
 #include "gen-semantics.h"
+#include "gen-engine.h"
 #include "gen-support.h"
+#include "gen-engine.h"
 
-int hi_bit_nr = 0;
-int insn_bit_size = default_insn_bit_size;
-int insn_specifying_widths = 0;
-const char *global_name_prefix = "";
-const char *global_uname_prefix = "";
-int semantic_zero_reg_nr = 0;
-
-int code = generate_calls;
-
-int generate_expanded_instructions;
-int icache_size = 1024;
-int generate_smp;
 
 /****************************************************************/
 
@@ -61,39 +52,75 @@ int generate_smp;
 /* Semantic functions */
 
 int
-print_semantic_function_formal(lf *file)
+print_semantic_function_formal (lf *file,
+				int nr_prefetched_words)
 {
-  int nr;
-  if ((code & generate_with_icache))
-    nr = lf_printf(file, "SIM_DESC sd,\n %sidecode_cache *cache_entry,\n %sinstruction_address cia",
-		   global_name_prefix, global_name_prefix);
-  else if (generate_smp)
-    nr = lf_printf(file, "sim_cpu *cpu,\n %sinstruction_word instruction,\n %sinstruction_address cia",
-		   global_name_prefix, global_name_prefix);
+  int nr = 0;
+  int word_nr;
+  if (options.gen.icache || nr_prefetched_words < 0)
+    {
+      nr += lf_printf (file, "SIM_DESC sd,\n");
+      nr += lf_printf (file, "%sidecode_cache *cache_entry,\n",
+		       options.prefix.global.name);
+      nr += lf_printf (file, "%sinstruction_address cia",
+		       options.prefix.global.name);
+    }
+  else if (options.gen.smp)
+    {
+      nr += lf_printf (file, "sim_cpu *cpu,\n");
+      for (word_nr = 0; word_nr < nr_prefetched_words; word_nr++)
+	{
+	  nr += lf_printf (file, "%sinstruction_word instruction_%d,\n",
+			   options.prefix.global.name,
+			   word_nr);
+	}
+      nr += lf_printf (file, "%sinstruction_address cia",
+		       options.prefix.global.name);
+    }
   else
-    nr = lf_printf(file, "SIM_DESC sd,\n %sinstruction_word instruction,\n %sinstruction_address cia",
-		   global_name_prefix, global_name_prefix);
+    {
+      nr += lf_printf (file, "SIM_DESC sd,\n");
+      for (word_nr = 0; word_nr < nr_prefetched_words; word_nr++)
+	{
+	  nr += lf_printf (file, "%sinstruction_word instruction_%d,\n",
+			   options.prefix.global.name,
+			   word_nr);
+	}
+      nr += lf_printf (file, "%sinstruction_address cia",
+		       options.prefix.global.name);
+    }
   return nr;
 }
 
 int
-print_semantic_function_actual(lf *file)
+print_semantic_function_actual (lf *file,
+				int nr_prefetched_words)
 {
-  int nr;
-  if ((code & generate_with_icache))
-    nr = lf_printf(file, "sd, cache_entry, cia");
-  else if (generate_smp)
-    nr = lf_printf(file, "cpu, instruction, cia");
+  int nr = 0;
+  int word_nr;
+  if (options.gen.icache || nr_prefetched_words < 0)
+    {
+      nr += lf_printf (file, "sd, cache_entry, cia");
+    }
   else
-    nr = lf_printf(file, "sd, instruction, cia");
+    {
+      if (options.gen.smp)
+	nr += lf_printf (file, "cpu");
+      else
+	nr += lf_printf (file, "sd");
+      for (word_nr = 0; word_nr < nr_prefetched_words; word_nr++)
+	nr += lf_printf (file, ", instruction_%d", word_nr);
+      nr += lf_printf (file, ", cia");
+    }
   return nr;
 }
 
 int
-print_semantic_function_type(lf *file)
+print_semantic_function_type (lf *file)
 {
-  int nr;
-  nr = lf_printf(file, "%sinstruction_address", global_name_prefix);
+  int nr = 0;
+  nr += lf_printf (file, "%sinstruction_address",
+		   options.prefix.global.name);
   return nr;
 }
 
@@ -101,38 +128,54 @@ print_semantic_function_type(lf *file)
 /* Idecode functions */
 
 int
-print_icache_function_formal(lf *file)
+print_icache_function_formal (lf *file,
+			      int nr_prefetched_words)
 {
   int nr = 0;
-  if (generate_smp)
-    nr += lf_printf(file, "sim_cpu *cpu,\n");
+  int word_nr;
+  if (options.gen.smp)
+      nr += lf_printf (file, "sim_cpu *cpu,\n");
   else
-    nr += lf_printf(file, "SIM_DESC sd,\n");
-  nr += lf_printf(file, " %sinstruction_word instruction,\n", global_name_prefix);
-  nr += lf_printf(file, " %sinstruction_address cia,\n", global_name_prefix);
-  nr += lf_printf(file, " %sidecode_cache *cache_entry", global_name_prefix);
+      nr += lf_printf (file, "SIM_DESC sd,\n");
+  for (word_nr = 0; word_nr < nr_prefetched_words; word_nr++)
+    nr += lf_printf (file, " %sinstruction_word instruction_%d,\n",
+		     options.prefix.global.name, word_nr);
+  nr += lf_printf (file, " %sinstruction_address cia,\n",
+		   options.prefix.global.name);
+  nr += lf_printf (file, " %sidecode_cache *cache_entry",
+		   options.prefix.global.name);
   return nr;
 }
 
 int
-print_icache_function_actual(lf *file)
+print_icache_function_actual (lf *file,
+			      int nr_prefetched_words)
 {
-  int nr;
-  if (generate_smp)
-    nr = lf_printf(file, "cpu, instruction, cia, cache_entry");
+  int nr = 0;
+  int word_nr;
+  if (options.gen.smp)
+    nr += lf_printf (file, "cpu");
   else
-    nr = lf_printf(file, "sd, instruction, cia, cache_entry");
+    nr += lf_printf (file, "sd");
+  for (word_nr = 0; word_nr < nr_prefetched_words; word_nr++)
+    nr += lf_printf (file, ", instruction_%d", word_nr);
+  nr += lf_printf (file, ", cia, cache_entry");
   return nr;
 }
 
 int
-print_icache_function_type(lf *file)
+print_icache_function_type (lf *file)
 {
   int nr;
-  if ((code & generate_with_semantic_icache))
-    nr = print_semantic_function_type(file);
+  if (options.gen.semantic_icache)
+    {
+      nr = print_semantic_function_type (file);
+    }
   else
-    nr = lf_printf(file, "%sidecode_semantic *", global_name_prefix);
+    {
+      nr = lf_printf (file, "%sidecode_semantic *",
+		      options.prefix.global.name);
+    }
   return nr;
 }
 
@@ -140,77 +183,103 @@ print_icache_function_type(lf *file)
 /* Function names */
 
 static int
-print_insn_bits(lf *file, insn_bits *bits)
+print_opcode_bits (lf *file,
+		   opcode_bits *bits)
 {
   int nr = 0;
   if (bits == NULL)
     return nr;
-  nr += print_insn_bits(file, bits->last);
-  nr += lf_putchr(file, '_');
-  nr += lf_putstr(file, bits->field->val_string);
+  nr += lf_putchr (file, '_');
+  nr += lf_putstr (file, bits->field->val_string);
   if (bits->opcode->is_boolean && bits->value == 0)
-    nr += lf_putint(file, bits->opcode->boolean_constant);
+    nr += lf_putint (file, bits->opcode->boolean_constant);
   else if (!bits->opcode->is_boolean) {
     if (bits->opcode->last < bits->field->last)
-      nr += lf_putint(file, bits->value << (bits->field->last - bits->opcode->last));
+      nr += lf_putint (file, bits->value << (bits->field->last - bits->opcode->last));
     else
-      nr += lf_putint(file, bits->value);
+      nr += lf_putint (file, bits->value);
   }
+  nr += print_opcode_bits (file, bits->next);
+  return nr;
+}
+
+static int
+print_c_name (lf *file,
+	      const char *name)
+{
+  int nr = 0;
+  const char *pos;
+  for (pos = name; *pos != '\0'; pos++)
+    {
+      switch (*pos)
+	{
+	case '/':
+	case '-':
+	  break;
+	case ' ':
+	case '.':
+	  nr += lf_putchr (file, '_');
+	  break;
+	default:
+	  nr += lf_putchr (file, *pos);
+	  break;
+	}
+    }
   return nr;
 }
 
 extern int
-print_function_name(lf *file,
-		    const char *basename,
-		    insn_bits *expanded_bits,
-		    lf_function_name_prefixes prefix)
+print_function_name (lf *file,
+		     const char *basename,
+		     const char *format_name,
+		     const char *model_name,
+		     opcode_bits *expanded_bits,
+		     lf_function_name_prefixes prefix)
 {
   int nr = 0;
   /* the prefix */
-  switch (prefix) {
-  case function_name_prefix_semantics:
-    nr += lf_putstr(file, global_name_prefix);
-    nr += lf_putstr(file, "semantic_");
-    break;
-  case function_name_prefix_idecode:
-    nr += lf_putstr(file, global_name_prefix);
-    nr += lf_printf(file, "idecode_");
-    break;
-  case function_name_prefix_itable:
-    nr += lf_putstr(file, "itable_");
-    break;
-  case function_name_prefix_icache:
-    nr += lf_putstr(file, global_name_prefix);
-    nr += lf_putstr(file, "icache_");
-    break;
-  default:
-    break;
-  }
+  switch (prefix)
+    {
+    case function_name_prefix_semantics:
+      nr += lf_printf (file, "%s", options.prefix.semantics.name);
+      nr += lf_printf (file, "semantic_");
+      break;
+    case function_name_prefix_idecode:
+      nr += lf_printf (file, "%s", options.prefix.idecode.name);
+      nr += lf_printf (file, "idecode_");
+      break;
+    case function_name_prefix_itable:
+      nr += lf_printf (file, "%sitable_", options.prefix.itable.name);
+      break;
+    case function_name_prefix_icache:
+      nr += lf_printf (file, "%s", options.prefix.icache.name);
+      nr += lf_printf (file, "icache_");
+      break;
+    case function_name_prefix_engine:
+      nr += lf_printf (file, "%s", options.prefix.engine.name);
+      nr += lf_printf (file, "engine_");
+    default:
+      break;
+    }
+  
+  if (model_name != NULL)
+    {
+      nr += print_c_name (file, model_name);
+      nr += lf_printf (file, "_");
+    }
 
-  /* the function name */
-  {
-    const char *pos;
-    for (pos = basename;
-	 *pos != '\0';
-	 pos++) {
-      switch (*pos) {
-      case '/':
-      case '-':
-	break;
-      case ' ':
-      case '.':
-	nr += lf_putchr(file, '_');
-	break;
-      default:
-	nr += lf_putchr(file, *pos);
-	break;
-      }
+  /* the format name if available */
+  if (format_name != NULL)
+    {
+      nr += print_c_name (file, format_name);
+      nr += lf_printf (file, "_");
     }
-  }
 
+  /* the function name */
+  nr += print_c_name (file, basename);
+  
   /* the suffix */
-  if (generate_expanded_instructions)
-    nr += print_insn_bits(file, expanded_bits);
+  nr += print_opcode_bits (file, expanded_bits);
 
   return nr;
 }
@@ -218,8 +287,9 @@ print_function_name(lf *file,
 
 void
 print_my_defines (lf *file,
-		  insn_bits *expanded_bits,
-		  table_entry *file_entry)
+		  const char *basename,
+		  const char *format_name,
+		  opcode_bits *expanded_bits)
 {
   /* #define MY_INDEX xxxxx */
   lf_indent_suppress (file);
@@ -227,63 +297,74 @@ print_my_defines (lf *file,
   lf_indent_suppress (file);
   lf_printf (file, "#define MY_INDEX ");
   print_function_name (file,
-		       file_entry->fields[insn_name],
+		       basename, format_name, NULL,
 		       NULL,
 		       function_name_prefix_itable);
   lf_printf (file, "\n");
   /* #define MY_PREFIX xxxxxx */
   lf_indent_suppress (file);
+  lf_printf (file, "#undef ");
+  print_function_name (file,
+		       basename, format_name, NULL,
+		       expanded_bits,
+		       function_name_prefix_none);
+  lf_printf (file, "\n");
+  lf_indent_suppress (file);
   lf_printf (file, "#undef MY_PREFIX\n");
   lf_indent_suppress (file);
   lf_printf (file, "#define MY_PREFIX ");
   print_function_name (file,
-		       file_entry->fields[insn_name],
+		       basename, format_name, NULL,
 		       expanded_bits,
 		       function_name_prefix_none);
   lf_printf (file, "\n");
+  /* #define MY_NAME xxxxxx */
+  lf_indent_suppress (file);
+  lf_indent_suppress (file);
+  lf_printf (file, "#undef MY_NAME\n");
+  lf_indent_suppress (file);
+  lf_printf (file, "#define MY_NAME \"");
+  print_function_name (file,
+		       basename, format_name, NULL,
+		       expanded_bits,
+		       function_name_prefix_none);
+  lf_printf (file, "\"\n");
 }
 
 
 static int
 print_itrace_prefix (lf *file,
-		     table_entry *file_entry,
 		     const char *phase_lc)
 {
   const char *prefix = "trace_one_insn (";
   int indent = strlen (prefix);
   lf_printf (file, "%sSD, CPU, %s, TRACE_LINENUM_P (CPU),\n",
-	     prefix, (code & generate_with_semantic_delayed_branch) ? "cia.ip" : "cia");
+	     prefix, (options.gen.delayed_branch ? "cia.ip" : "cia"));
   lf_indent (file, +indent);
-  lf_printf (file, "itable[MY_INDEX].file,\n");
-  lf_printf (file, "itable[MY_INDEX].line_nr,\n");
+  lf_printf (file, "%sitable[MY_INDEX].file,\n", options.prefix.itable.name);
+  lf_printf (file, "%sitable[MY_INDEX].line_nr,\n", options.prefix.itable.name);
   lf_printf (file, "\"%s\",\n", phase_lc);
+  lf_printf (file, "\"%%-18s - ");
   return indent;
 }
 
 
 static void
 print_itrace_format (lf *file,
-		     table_assembler_entry *assembler)
+		     insn_mnemonic_entry *assembler)
 {
   /* pass=1 is fmt string; pass=2 is is arguments */
   int pass;
-  const char *chp;
   /* print the format string */
   for (pass = 1; pass <= 2; pass++)
     {
       const char *chp = assembler->format;
       chp++; /* skip the leading quote */
       /* prefix the format with the insn `name' */
-      if (pass == 1)
-	{
-	  lf_printf (file, "\"%%s - %%s - ");
-	}
-      else
+      if (pass == 2)
 	{
 	  lf_printf (file, ",\n");
-	  lf_printf (file, "itable[MY_INDEX].name");
-	  lf_printf (file, ",\n");
-	  lf_printf (file, "XSTRING(MY_PREFIX)");
+	  lf_printf (file, "%sitable[MY_INDEX].name", options.prefix.itable.name);
 	}
       /* write out the format/args */
       while (*chp != '\0')
@@ -307,9 +388,7 @@ print_itrace_format (lf *file,
 	      while (chp[0] != '<' && chp[0] != '\0')
 		chp++;
 	      if (chp[0] != '<')
-		error ("%s:%d: Missing `<' after `%%'",
-		       assembler->file_name,
-		       assembler->line_nr);
+		error (assembler->line, "Missing `<' after `%%'\n");
 	      chp++;
 	      /* [ "func" # ] OR "param" */
 	      func = chp;
@@ -326,9 +405,7 @@ print_itrace_format (lf *file,
 		}
 	      strlen_param = chp - param;
 	      if (chp[0] != '>')
-		error ("%s:%d: Missing closing `>' in assembler string",
-		       assembler->file_name,
-		       assembler->line_nr);
+		error (assembler->line, "Missing closing `>' in assembler string\n");
 	      chp++;
 	      /* now process it */
 	      if (pass == 2)
@@ -359,7 +436,7 @@ print_itrace_format (lf *file,
 		    lf_printf (file, "%%s");
 		  else
 		    {
-		      lf_printf (file, "%sstr_", global_name_prefix);
+		      lf_printf (file, "%sstr_", options.prefix.global.name);
 		      lf_write (file, func, strlen_func);
 		      lf_printf (file, " (_SD, ");
 		      lf_write (file, param, strlen_param);
@@ -389,9 +466,7 @@ print_itrace_format (lf *file,
 		    }
 		}
 	      else
-		error ("%s:%d: Unknown assembler string format",
-		       assembler->file_name,
-		       assembler->line_nr);
+		error (assembler->line, "Unknown assembler string format\n");
 	    }
 	  else
 	    {
@@ -407,7 +482,7 @@ print_itrace_format (lf *file,
 
 void
 print_itrace (lf *file,
-	      table_entry *file_entry,
+	      insn_entry *insn,
 	      int idecode)
 {
   const char *phase = (idecode) ? "DECODE" : "INSN";
@@ -418,9 +493,9 @@ print_itrace (lf *file,
   lf_printf (file, "/* trace the instructions execution if enabled */\n");
   lf_printf (file, "if (TRACE_%s_P (CPU)) {\n", phase);
   lf_indent (file, +2);
-  if (file_entry->assembler != NULL)
+  if (insn->mnemonics != NULL)
     {
-      table_assembler_entry *assembler = file_entry->assembler;
+      insn_mnemonic_entry *assembler = insn->mnemonics;
       int is_first = 1;
       do
 	{
@@ -431,14 +506,12 @@ print_itrace (lf *file,
 			 is_first ? "" : "else ",
 			 assembler->condition);
 	      lf_indent (file, +2);
-	      indent = print_itrace_prefix (file, file_entry, phase_lc);
+	      indent = print_itrace_prefix (file, phase_lc);
 	      print_itrace_format (file, assembler);
 	      lf_indent (file, -indent);
 	      lf_indent (file, -2);
 	      if (assembler->next == NULL)
-		error ("%s:%d: Missing final unconditional assembler",
-		       assembler->file_name,
-		       assembler->line_nr);
+		error (assembler->line, "Missing final unconditional assembler\n");
 	    }
 	  else
 	    {
@@ -448,15 +521,13 @@ print_itrace (lf *file,
 		  lf_printf (file, "else\n");
 		  lf_indent (file, +2);
 		}
-	      indent = print_itrace_prefix (file, file_entry, phase_lc);
+	      indent = print_itrace_prefix (file, phase_lc);
 	      print_itrace_format (file, assembler);
 	      lf_indent (file, -indent);
 	      if (!is_first)
 		lf_indent (file, -2);
 	      if (assembler->next != NULL)
-		error ("%s:%d: Unconditional assembler is not last",
-		       assembler->file_name,
-		       assembler->line_nr);
+		error (assembler->line, "Unconditional assembler is not last\n");
 	    }
 	  is_first = 0;
 	  assembler = assembler->next;
@@ -465,10 +536,9 @@ print_itrace (lf *file,
     }
   else
     {
-      int indent = print_itrace_prefix (file, file_entry, phase_lc);
-      lf_printf (file, "\"%%s - %%s - ?\",\n");
-      lf_printf (file, "itable[MY_INDEX].name,\n");
-      lf_printf (file, "XSTRING(MY_PREFIX));\n");
+      int indent = print_itrace_prefix (file, phase_lc);
+      lf_printf (file, "?\",\n");
+      lf_printf (file, "itable[MY_INDEX].name);\n");
       lf_indent (file, -indent);
     }
   lf_indent (file, -2);
@@ -478,71 +548,99 @@ print_itrace (lf *file,
 }
 
 
+void
+print_sim_engine_abort (lf *file,
+			const char *message)
+{
+  lf_printf (file, "sim_engine_abort (SD, CPU, cia, ");
+  lf_printf (file, "\"%s\"", message);
+  lf_printf (file, ");\n");
+}
+
+
 /****************************************************************/
 
 
 static void
-gen_semantics_h(insn_table *table,
-		lf *file,
-		igen_code generate)
+gen_semantics_h (lf *file,
+		 insn_list *semantics,
+		 int max_nr_words)
 {
-  lf_printf(file, "typedef ");
-  print_semantic_function_type(file);
-  lf_printf(file, " %sidecode_semantic\n(", global_name_prefix);
-  print_semantic_function_formal(file);
-  lf_printf(file, ");\n");
-  lf_printf(file, "\n");
-  if ((code & generate_calls)) {
-    if (generate_expanded_instructions)
-      insn_table_traverse_tree(table,
-			       file, NULL,
-			       1,
-			       NULL, /* start */
-			       print_semantic_declaration, /* leaf */
-			       NULL, /* end */
-			       NULL); /* padding */
-    else
-      insn_table_traverse_insn(table,
-			       file, NULL,
-			       print_semantic_declaration);
-    
-  }
-  else {
-    lf_print__this_file_is_empty(file);
-  }
+  int word_nr;
+  insn_list *semantic;
+  for (word_nr = -1; word_nr <= max_nr_words; word_nr++)
+    {
+      lf_printf (file, "typedef ");
+      print_semantic_function_type (file);
+      lf_printf (file, " %sidecode_semantic",
+		 options.prefix.global.name);
+      if (word_nr >= 0)
+	lf_printf (file, "_%d", word_nr);
+      lf_printf (file, "\n(");
+      lf_indent (file, +1);
+      print_semantic_function_formal (file, word_nr);
+      lf_indent (file, -1);
+      lf_printf (file, ");\n");
+      lf_printf (file, "\n");
+    }
+  switch (options.gen.code)
+    {
+    case generate_calls:
+      for (semantic = semantics; semantic != NULL; semantic = semantic->next)
+	{
+	  /* Ignore any special/internal instructions */
+	  if (semantic->insn->nr_words == 0)
+	    continue;
+	  print_semantic_declaration (file,
+				      semantic->insn,
+				      semantic->expanded_bits,
+				      semantic->opcodes,
+				      semantic->nr_prefetched_words);
+	}
+      break;
+    case generate_jumps:
+      lf_print__this_file_is_empty (file, "generating jumps");
+      break;
+    }
 }
 
 
 static void
-gen_semantics_c(insn_table *table,
-		cache_table *cache_rules,
-		lf *file,
-		igen_code generate)
+gen_semantics_c (lf *file,
+		 insn_list *semantics,
+		 cache_entry *cache_rules)
 {
-  if ((code & generate_calls)) {
-    lf_printf(file, "\n");
-    lf_printf(file, "#include \"sim-main.h\"\n");
-    lf_printf(file, "#include \"%sidecode.h\"\n", global_name_prefix);
-    lf_printf(file, "#include \"%ssemantics.h\"\n", global_name_prefix);
-    lf_printf(file, "#include \"%ssupport.h\"\n", global_name_prefix);
-    lf_printf(file, "\n");
-    if (generate_expanded_instructions)
-      insn_table_traverse_tree(table,
-			       file, cache_rules,
-			       1,
-			       NULL, /* start */
-			       print_semantic_definition, /* leaf */
-			       NULL, /* end */
-			       NULL); /* padding */
-    else
-      insn_table_traverse_insn(table,
-			       file, cache_rules,
-			       print_semantic_definition);
-    
-  }
-  else {
-    lf_print__this_file_is_empty(file);
-  }
+  if (options.gen.code == generate_calls)
+    {
+      insn_list *semantic;
+      lf_printf (file, "\n");
+      lf_printf (file, "#include \"sim-main.h\"\n");
+      lf_printf (file, "#include \"%sitable.h\"\n",
+		 options.prefix.itable.name);
+      lf_printf (file, "#include \"%sidecode.h\"\n",
+		 options.prefix.idecode.name);
+      lf_printf (file, "#include \"%ssemantics.h\"\n",
+		 options.prefix.semantics.name);
+      lf_printf (file, "#include \"%ssupport.h\"\n",
+		 options.prefix.support.name);
+      lf_printf (file, "\n");
+      for (semantic = semantics; semantic != NULL; semantic = semantic->next)
+	{
+	  /* Ignore any special/internal instructions */
+	  if (semantic->insn->nr_words == 0)
+	    continue;
+	  print_semantic_definition (file,
+				     semantic->insn,
+				     semantic->expanded_bits,
+				     semantic->opcodes,
+				     cache_rules,
+				     semantic->nr_prefetched_words);
+	}
+    }
+  else
+    {
+      lf_print__this_file_is_empty (file, "generating jump engine");
+    }
 }
 
 
@@ -550,326 +648,776 @@ gen_semantics_c(insn_table *table,
 
 
 static void
-gen_icache_h(insn_table *table,
-	     lf *file,
-	     igen_code generate)
+gen_icache_h (lf *file,
+	      insn_list *semantic,
+	      function_entry *functions,
+	      int max_nr_words)
 {
-  lf_printf(file, "typedef ");
-  print_icache_function_type(file);
-  lf_printf(file, " %sidecode_icache\n(", global_name_prefix);
-  print_icache_function_formal(file);
-  lf_printf(file, ");\n");
-  lf_printf(file, "\n");
-  if ((code & generate_calls)
-      && (code & generate_with_icache)) {
-    insn_table_traverse_function(table,
-				 file, NULL,
-				 print_icache_internal_function_declaration);
-    if (generate_expanded_instructions)
-      insn_table_traverse_tree(table,
-			       file, NULL,
-			       1,
-			       NULL, /* start */
-			       print_icache_declaration, /* leaf */
-			       NULL, /* end */
-			       NULL); /* padding */
-    else
-      insn_table_traverse_insn(table,
-			       file, NULL,
-			       print_icache_declaration);
-    
-  }
-  else {
-    lf_print__this_file_is_empty(file);
-  }
+  int word_nr;
+  for (word_nr = 0; word_nr <= max_nr_words; word_nr++)
+    {
+      lf_printf (file, "typedef ");
+      print_icache_function_type(file);
+      lf_printf (file, " %sidecode_icache_%d\n(",
+		 options.prefix.global.name,
+		 word_nr);
+      print_icache_function_formal(file, word_nr);
+      lf_printf (file, ");\n");
+      lf_printf (file, "\n");
+    }
+  if (options.gen.code == generate_calls
+      && options.gen.icache)
+    {
+      function_entry_traverse (file, functions,
+			       print_icache_internal_function_declaration,
+			       NULL);
+      while (semantic != NULL)
+	{
+	  print_icache_declaration (file,
+				    semantic->insn,
+				    semantic->expanded_bits,
+				    semantic->opcodes,
+				    semantic->nr_prefetched_words);
+	  semantic = semantic->next;
+	}
+    }
+  else
+    {
+      lf_print__this_file_is_empty (file, "generating jump engine");
+    }
 }
 
 static void
-gen_icache_c(insn_table *table,
-	     cache_table *cache_rules,
-	     lf *file,
-	     igen_code generate)
+gen_icache_c (lf *file,
+	      insn_list *semantic,
+	      function_entry *functions,
+	      cache_entry *cache_rules)
 {
   /* output `internal' invalid/floating-point unavailable functions
      where needed */
-  if ((code & generate_calls)
-      && (code & generate_with_icache)) {
-    lf_printf(file, "\n");
-    lf_printf(file, "#include \"cpu.h\"\n");
-    lf_printf(file, "#include \"idecode.h\"\n");
-    lf_printf(file, "#include \"semantics.h\"\n");
-    lf_printf(file, "#include \"icache.h\"\n");
-    lf_printf(file, "#include \"support.h\"\n");
-    lf_printf(file, "\n");
-    insn_table_traverse_function(table,
-				 file, NULL,
-				 print_icache_internal_function_definition);
-    lf_printf(file, "\n");
-    if (generate_expanded_instructions)
-      insn_table_traverse_tree(table,
-			       file, cache_rules,
-			       1,
-			       NULL, /* start */
-			       print_icache_definition, /* leaf */
-			       NULL, /* end */
-			       NULL); /* padding */
-    else
-      insn_table_traverse_insn(table,
-			       file, cache_rules,
-			       print_icache_definition);
-    
-  }
-  else {
-    lf_print__this_file_is_empty(file);
-  }
+  if (options.gen.code == generate_calls
+      && options.gen.icache)
+    {
+      lf_printf (file, "\n");
+      lf_printf (file, "#include \"cpu.h\"\n");
+      lf_printf (file, "#include \"idecode.h\"\n");
+      lf_printf (file, "#include \"semantics.h\"\n");
+      lf_printf (file, "#include \"icache.h\"\n");
+      lf_printf (file, "#include \"support.h\"\n");
+      lf_printf (file, "\n");
+      function_entry_traverse (file, functions,
+			       print_icache_internal_function_definition,
+			       NULL);
+      lf_printf (file, "\n");
+      while (semantic != NULL)
+	{
+	  print_icache_definition (file,
+				   semantic->insn,
+				   semantic->expanded_bits,
+				   semantic->opcodes,
+				   cache_rules,
+				   semantic->nr_prefetched_words);
+	  semantic = semantic->next;
+	}
+    }
+  else
+    {
+      lf_print__this_file_is_empty (file, "generating jump engine");
+    }
+}
+
+
+/****************************************************************/
+
+
+static void
+gen_idecode_h (lf *file,
+	       gen_table *gen,
+	       insn_table *insns,
+	       cache_entry *cache_rules)
+{
+  lf_printf (file, "typedef unsigned%d %sinstruction_word;\n",
+	     options.insn_bit_size, options.prefix.global.name);
+  if (options.gen.delayed_branch)
+    {
+      lf_printf (file, "typedef struct _%sinstruction_address {\n",
+		 options.prefix.global.name);
+      lf_printf (file, "  address_word ip; /* instruction pointer */\n");
+      lf_printf (file, "  address_word dp; /* delayed-slot pointer */\n");
+      lf_printf (file, "} %sinstruction_address;\n", options.prefix.global.name);
+    }
+  else
+    {
+      lf_printf (file, "typedef address_word %sinstruction_address;\n",
+		 options.prefix.global.name);
+      
+    }
+  if (options.gen.nia == nia_is_invalid
+      && strlen (options.prefix.global.uname) > 0)
+    {
+      lf_indent_suppress (file);
+      lf_printf (file, "#define %sINVALID_INSTRUCTION_ADDRESS ",
+		 options.prefix.global.uname);
+      lf_printf (file, "INVALID_INSTRUCTION_ADDRESS\n");
+    }
+  lf_printf (file, "\n");
+  print_icache_struct (file, insns, cache_rules);
+  lf_printf (file, "\n");
+  if (options.gen.icache)
+    {
+      ERROR ("FIXME - idecode with icache suffering from bit-rot");
+    }
+  else
+    {
+      gen_list *entry;
+      for (entry = gen->tables; entry != NULL; entry = entry->next)
+	{
+	  print_idecode_issue_function_header (file,
+					       entry->processor,
+					       0/*is definition*/,
+					       1/*ALWAYS ONE WORD*/);
+	}
+    }
+}
+
+
+static void
+gen_idecode_c (lf *file,
+	       gen_table *gen,
+	       insn_table *isa,
+	       cache_entry *cache_rules)
+{
+  /* the intro */
+  lf_printf (file, "#include \"sim-main.h\"\n");
+  lf_printf (file, "#include \"%sidecode.h\"\n", options.prefix.global.name);
+  lf_printf (file, "#include \"%ssemantics.h\"\n", options.prefix.global.name);
+  lf_printf (file, "#include \"%sicache.h\"\n", options.prefix.global.name);
+  lf_printf (file, "#include \"%ssupport.h\"\n", options.prefix.global.name);
+  lf_printf (file, "\n");
+  lf_printf (file, "\n");
+
+  print_idecode_globals (file);
+  lf_printf (file, "\n");
+  
+  switch (options.gen.code)
+    {
+    case generate_calls:
+      {
+	gen_list *entry;
+	for (entry = gen->tables; entry != NULL; entry = entry->next)
+	  {
+	    print_idecode_lookups (file, entry->table, cache_rules);
+	
+	    /* output the main idecode routine */
+	    if (!options.gen.icache)
+	      {
+		print_idecode_issue_function_header (file,
+						     entry->processor,
+						     1/*is definition*/,
+						     1/*ALWAYS ONE WORD*/);
+		lf_printf (file, "{\n");
+		lf_indent (file, +2);
+		lf_printf (file, "%sinstruction_address nia;\n",
+			   options.prefix.global.name);
+		print_idecode_body (file, entry->table, "nia =");
+		lf_printf (file, "return nia;");
+		lf_indent (file, -2);
+		lf_printf (file, "}\n");
+	      }
+	  }
+	break;
+      }
+    case generate_jumps:
+      {
+	lf_print__this_file_is_empty (file, "generating a jump engine");
+	break;
+      }
+    }
 }
 
 
 /****************************************************************/
 
 
+static void
+gen_run_c (lf *file,
+	   gen_table *gen)
+{
+  gen_list *entry;
+  lf_printf (file, "#include \"sim-main.h\"\n");
+  lf_printf (file, "#include \"engine.h\"\n");
+  lf_printf (file, "#include \"bfd.h\"\n");
+  lf_printf (file, "\n");
+  lf_printf (file, "void\n");
+  lf_printf (file, "sim_engine_run (SIM_DESC sd,\n");
+  lf_printf (file, "                int next_cpu_nr,\n");
+  lf_printf (file, "                int siggnal)\n");
+  lf_printf (file, "{\n");
+  lf_indent (file, +2);
+  lf_printf (file, "int mach;\n");
+  lf_printf (file, "if (STATE_ARCHITECTURE (sd) == NULL)\n");
+  lf_printf (file, "  mach = 0;\n");
+  lf_printf (file, "else\n");
+  lf_printf (file, "  mach = STATE_ARCHITECTURE (sd)->mach;\n");
+  lf_printf (file, "switch (mach)\n");
+  lf_printf (file, "  {\n");
+  lf_indent (file, +2);
+  for (entry = gen->tables; entry != NULL; entry = entry->next)
+    {
+      lf_printf (file, "case bfd_mach_%s:\n", entry->processor);
+      lf_indent (file, +2);
+      print_function_name (file,
+			   "run",
+			   NULL, /* format name */
+			   entry->processor,
+			   NULL, /* expanded bits */
+			   function_name_prefix_engine);
+      lf_printf (file, " (sd, next_cpu_nr, siggnal);\n");
+      lf_printf (file, "break;\n");
+      lf_indent (file, -2);
+    }
+  lf_printf (file, "default:\n");
+  lf_indent (file, +2);
+  lf_printf (file, "sim_engine_abort (sd, NULL, NULL_CIA,\n");
+  lf_printf (file, "                  \"sim_engine_run - unknown machine\");\n");
+  lf_printf (file, "break;\n");
+  lf_indent (file, -2);
+  lf_indent (file, -2);
+  lf_printf (file, "  }\n");
+  lf_indent (file, -2);
+  lf_printf (file, "}\n");
+}
+
+
+/****************************************************************/
+
+static gen_table *
+do_gen (insn_table *isa,
+	decode_table *decode_rules)
+{
+  gen_table *gen;
+  if (decode_rules == NULL)
+    error (NULL, "Must specify a decode table\n");
+  if (isa == NULL)
+    error (NULL, "Must specify an instruction table\n");
+  if (decode_table_max_word_nr (decode_rules) > 0)
+    options.gen.multi_word = decode_table_max_word_nr (decode_rules);
+  gen = make_gen_tables (isa, decode_rules);
+  gen_tables_expand_insns (gen);
+  gen_tables_expand_semantics (gen);
+  return gen;
+}
+
+/****************************************************************/
+
+igen_options options;
+
 int
-main(int argc,
-     char **argv,
-     char **envp)
+main (int argc,
+      char **argv,
+      char **envp)
 {
-  cache_table *cache_rules = NULL;
+  cache_entry *cache_rules = NULL;
   lf_file_references file_references = lf_include_references;
   decode_table *decode_rules = NULL;
-  filter *filters = NULL;
-  insn_table *instructions = NULL;
+  insn_table *isa = NULL;
+  gen_table *gen = NULL;
   char *real_file_name = NULL;
   int is_header = 0;
   int ch;
+  lf *standard_out = lf_open ("-", "stdout", lf_omit_references, lf_is_text, "igen");
 
-  if (argc == 1) {
-    printf("Usage:\n");
-    printf("  igen <config-opts> ... <input-opts>... <output-opts>...\n");
-    printf("Config options:\n");
-    printf("  -F <filter-flag>      eg -F 32 to include 32bit instructions\n");
-    printf("  -I <icache-size>  Specify size of cracking cache\n");
-    printf("  -B <bit-size>         Set the number of bits in an instruction\n");
-    printf("  -H <high-bit>         Set the number of the high (msb) instruction bit\n");
-    printf("  -N <nr-cpus>          Specify the max number of cpus the simulation will support\n");
-    printf("  -T <mechanism>        Override the decode mechanism specified by the decode rules\n");
-    printf("  -P <prefix>           Prepend all functions with the specified prefix\n");
-    printf("  -G <gen-option>   Any of the following options:\n");
-    printf("                      field-widths - instruction table specifies widths (not ofsesets)\n");
-    printf("                      jumps - use jumps instead of function calls\n");
-    printf("                      duplicate - expand (duplicate) semantic functions\n");
-    printf("                      omit-line-numbers - do not include line nr info in output\n");
-    printf("                      direct-access - use #defines to directly access values\n");
-    printf("                      icache - generate an instruction cracking cache\n");
-    printf("                      semantic-icache - include semantic code in cracking functions\n");
-    printf("                      insn-in-icache - save original instruction when cracking\n");
-    printf("                      default-nia-minus-one - instead of cia + insn-size\n");
-    printf("                      delayed-branch - instead of cia + insn-size\n");
-    printf("                      zero-r<N> - arch assumes GPR(<N>) == 0, keep it that way\n");
-    printf("                      conditional-issue - conditionally issue each instruction\n");
-    printf("                      validate-slot - perform slot verification as part of decode\n");
-    printf("\n");
-    printf("Input options:\n");
-    printf("  -o <decode-rules>\n");
-    printf("  -k <cache-rules>\n");
-    printf("  -i <instruction-table>\n");
-    printf("\n");
-    printf("Output options:\n");
-    printf("  -n <real-name>        Specify the real name of the next output file\n"); 
-    printf("  -h 		    Generate header file\n");
-    printf("  -c <output-file>      output icache\n");
-    printf("  -d <output-file>      output idecode\n");
-    printf("  -e <output-file>      output engine\n");
-    printf("  -f <output-file>      output support functions\n");
-    printf("  -m <output-file>      output model\n");
-    printf("  -s <output-file>      output schematic\n");
-    printf("  -t <output-file>      output itable\n");
-  }
+  INIT_OPTIONS (options);
 
+  if (argc == 1)
+    {
+      printf ("Usage:\n");
+      printf ("\n");
+      printf ("  igen <config-opts> ... <input-opts>... <output-opts>...\n");
+      printf ("\n");
+      printf ("Config options:\n");
+      printf ("\n");
+      printf ("  -B <bit-size>\n");
+      printf ("\t Set the number of bits in an instruction (depreciated).\n");
+      printf ("\t This option can now be set directly in the instruction table.\n");
+      printf ("\n");
+      printf ("  -D <data-structure>\n");
+      printf ("\t Dump the specified data structure to stdout. Valid structures include:\n");
+      printf ("\t processor-names - list the names of all the processors (models)\n");
+      printf ("\n");
+      printf ("  -F <filter-list>\n");
+      printf ("\t Filter out any instructions with a non-empty flags field that contains\n");
+      printf ("\t a flag not listed in the <filter-list>.\n");
+      printf ("\n");
+      printf ("  -H <high-bit>\n");
+      printf ("\t Set the number of the high (most significant) instruction bit (depreciated).\n");
+      printf ("\t This option can now be set directly in the instruction table.\n");
+      printf ("\n");
+      printf ("  -I <icache-size>\n");
+      printf ("\t Specify size of the cracking instruction cache (default %d instructions).\n",
+	      options.gen.icache_size);
+      printf ("\t Implies -G icache.\n");
+      printf ("\n");
+      printf ("  -M <model-list>\n");
+      printf ("\t Filter out any instructions that do not support at least one of the listed\n");
+      printf ("\t models (An instructions with no model information is considered to support\n");
+      printf ("\n all models.).\n");
+      printf ("\n");
+      printf ("  -N <nr-cpus>\n");
+      printf ("\t Generate a simulator supporting <nr-cpus>\n");
+      printf ("\t Specify `-N 0' to disable generation of the SMP. Specifying `-N 1' will\n");
+      printf ("\t still generate an SMP enabled simulator but will only support one CPU.\n");
+      printf ("\n");
+      printf ("  -T <mechanism>\n");
+      printf ("\t Override the decode mechanism specified by the decode rules\n");
+      printf ("\n");
+      printf ("  -P <prefix>\n");
+      printf ("\t Prepend global names (except itable) with the string <prefix>.\n");
+      printf ("\t Specify -P <module>=<prefix> to set the <modules> prefix.\n");
+      printf ("\n");
+      printf ("  -Werror\n");
+      printf ("\t Make warnings errors\n");
+      printf ("\n");
+      printf ("  -G [!]<gen-option>\n");
+      printf ("\t Any of the following options:\n");
+      printf ("\n");
+      printf ("\t decode-duplicate       - Override the decode rules, forcing the duplication of\n");
+      printf ("\t                          semantic functions\n");
+      printf ("\t decode-combine         - Combine any duplicated entries within a table\n");
+      printf ("\t decode-zero-reserved   - Override the decode rules, forcing reserved bits to be\n");
+      printf ("\t                          treated as zero.\n");
+      printf ("\t decode-switch-is-goto  - Overfide the padded-switch code type as a goto-switch\n");
+      printf ("\n");
+      printf ("\t gen-conditional-issue  - conditionally issue each instruction\n");
+      printf ("\t gen-delayed-branch     - need both cia and nia passed around\n");
+      printf ("\t gen-direct-access      - use #defines to directly access values\n");
+      printf ("\t gen-zero-r<N>          - arch assumes GPR(<N>) == 0, keep it that way\n");
+      printf ("\t gen-icache             - generate an instruction cracking cache\n");
+      printf ("\t gen-insn-in-icache     - save original instruction when cracking\n");
+      printf ("\t gen-multi-sim          - generate multiple simulators - one per model\n");
+      printf ("\t                          By default, a single simulator that will\n");
+      printf ("\t                          execute any instruction is generated\n");
+      printf ("\t gen-multi-word         - generate code allowing for multi-word insns\n");
+      printf ("\t gen-semantic-icache    - include semantic code in cracking functions\n");
+      printf ("\t gen-slot-verification  - perform slot verification as part of decode\n");
+      printf ("\t gen-nia-invalid        - NIA defaults to nia_invalid\n");
+      printf ("\t gen-nia-void           - do not compute/return NIA\n");
+      printf ("\n");
+      printf ("\t trace-combine          - report combined entries a rule application\n");
+      printf ("\t trace-entries          - report entries after a rules application\n");
+      printf ("\t trace-rule-rejection   - report each rule as rejected\n");
+      printf ("\t trace-rule-selection   - report each rule as selected\n");
+      printf ("\n");
+      printf ("\t field-widths          - instruction formats specify widths (depreciated)\n");
+      printf ("\t                         By default, an instruction format specifies bit\n");
+      printf ("\t                         positions\n");
+      printf ("\t                         This option can now be set directly in the\n");
+      printf ("\t                         instruction table\n");
+      printf ("\t jumps                 - use jumps instead of function calls\n");
+      printf ("\t omit-line-numbers     - do not include line number information in the output\n");
+      printf ("\n");
+      printf ("Input options:\n");
+      printf ("\n");
+      printf ("  -k <cache-rules> (depreciated)\n");
+      printf ("  -o <decode-rules>\n");
+      printf ("  -i <instruction-table>\n");
+      printf ("\n");
+      printf ("Output options:\n");
+      printf ("\n");
+      printf ("  -x                    Perform expansion (required)\n");
+      printf ("  -n <real-name>        Specify the real name of the next output file\n"); 
+      printf ("  -h 		       Generate the header (.h) file rather than the body (.c)\n");
+      printf ("  -c <output-file>      output icache\n");
+      printf ("  -d <output-file>      output idecode\n");
+      printf ("  -e <output-file>      output engine\n");
+      printf ("  -f <output-file>      output support functions\n");
+      printf ("  -m <output-file>      output model\n");
+      printf ("  -r <output-file>      output multi-sim run\n");
+      printf ("  -s <output-file>      output schematic\n");
+      printf ("  -t <output-file>      output itable\n");
+    }
+  
   while ((ch = getopt(argc, argv,
-		      "F:I:B:H:N:T:P:G:o:k:i:n:hc:d:e:m:s:t:f:"))
-	 != -1) {
-    fprintf(stderr, "\t-%c %s\n", ch, (optarg ? optarg : ""));
-
-    switch(ch) {
-
-    case 'F':
-      filters = new_filter(optarg, filters);
-      break;
+		      "B:D:F:G:H:I:M:N:P:T:W:o:k:i:n:hc:d:e:m:r:s:t:f:x"))
+	 != -1)
+    {
+      fprintf (stderr, "  -%c ", ch);
+      if (optarg)
+	fprintf (stderr, "%s ", optarg);
+      fprintf (stderr, "\\\n");
+      
+      switch(ch)
+	{
+	  
+	case 'M':
+	  filter_parse (&options.model_filter, optarg);
+	  break;
 
-    case 'I':
-      icache_size = a2i(optarg);
-      code |= generate_with_icache;
-      break;
+	case 'D':
+	  if (strcmp (optarg, "processor-names"))
+	    {
+	      char *processor;
+	      for (processor = filter_next (options.model_filter, "");
+		   processor != NULL;
+		   processor = filter_next (options.model_filter, processor))
+		lf_printf (standard_out, "%s\n", processor);
+	    }
+	  else
+	    error (NULL, "Unknown data structure %s, not dumped\n", optarg);
+	  break;
 
-    case 'B':
-      insn_bit_size = a2i(optarg);
-      ASSERT(insn_bit_size > 0 && insn_bit_size <= max_insn_bit_size
-	     && (hi_bit_nr == insn_bit_size-1 || hi_bit_nr == 0));
-      break;
+	case 'F':
+	  filter_parse (&options.flags_filter, optarg);
+	  break;
+	  
+	case 'I':
+	  options.gen.icache_size = a2i (optarg);
+	  options.gen.icache = 1;
+	  break;
+	  
+	case 'B':
+	  options.insn_bit_size = a2i (optarg);
+	  if (options.insn_bit_size <= 0
+	      || options.insn_bit_size > max_insn_bit_size)
+	    {
+	      error (NULL, "Instruction bitsize must be in range 1..%d\n",
+		     max_insn_bit_size);
+	    }
+	  if (options.hi_bit_nr != options.insn_bit_size - 1
+	      && options.hi_bit_nr != 0)
+	    {
+	      error (NULL, "Conflict betweem hi-bit-nr and insn-bit-size\n");
+	    }
+	  break;
+	  
+	case 'H':
+	  options.hi_bit_nr = a2i (optarg);
+	  if (options.hi_bit_nr != options.insn_bit_size - 1
+	      && options.hi_bit_nr != 0)
+	    {
+	      error (NULL, "Conflict between hi-bit-nr and insn-bit-size\n");
+	    }
+	  break;
+	  
+	case 'N':
+	  options.gen.smp = a2i (optarg);
+	  break;
+	  
+	case 'P':
+	  {
+	    igen_prefix_name *names;
+	    char *chp;
+	    chp = strchr (optarg, '=');
+	    if (chp == NULL)
+	      {
+		names = &options.prefix.global;
+		chp = optarg;
+	      }
+	    else
+	      {
+		chp = chp + 1; /* skip `=' */
+		if (strncmp (optarg, "global=", chp - optarg) == 0)
+		  {
+		    names = &options.prefix.global;
+		  }
+		if (strncmp (optarg, "engine=", chp - optarg) == 0)
+		  {
+		    names = &options.prefix.engine;
+		  }
+		if (strncmp (optarg, "icache=", chp - optarg) == 0)
+		  {
+		    names = &options.prefix.icache;
+		  }
+		if (strncmp (optarg, "idecode=", chp - optarg) == 0)
+		  {
+		    names = &options.prefix.idecode;
+		  }
+		if (strncmp (optarg, "itable=", chp - optarg) == 0)
+		  {
+		    names = &options.prefix.itable;
+		  }
+		if (strncmp (optarg, "semantics=", chp - optarg) == 0)
+		  {
+		    names = &options.prefix.semantics;
+		  }
+		if (strncmp (optarg, "support=", chp - optarg) == 0)
+		  {
+		    names = &options.prefix.support;
+		  }
+		else
+		  {
+		    names = NULL;
+		    error (NULL, "Prefix `%s' unreconized\n", optarg);
+		  }
+	      }
+	    names->name = strdup (chp);
+	    names->uname = strdup (chp);
+	    chp = names->uname;
+	    while (*chp) {
+	      if (islower(*chp))
+		*chp = toupper(*chp);
+	      chp++;
+	    }
+	    if (names == &options.prefix.global)
+	      {
+		options.prefix.engine = options.prefix.global;
+		options.prefix.icache = options.prefix.global;
+		options.prefix.idecode = options.prefix.global;
+		/* options.prefix.itable = options.prefix.global; */
+		options.prefix.semantics = options.prefix.global;
+		options.prefix.support = options.prefix.global;
+	      }
+	    break;
+	  }
+	
+	case 'W':
+	  {
+	    if (strcmp (optarg, "error") == 0)
+	      options.warning = error;
+	    else
+	      error (NULL, "Unknown -W argument `%s'\n", optarg);
+	    break;
+	  }
+
+
+	case 'G':
+	  if (strcmp (optarg, "decode-duplicate") == 0)
+	    {
+	      options.decode.duplicate = 1;
+	    }
+	  else if (strcmp (optarg, "decode-combine") == 0)
+	    {
+	      options.decode.combine = 1;
+	    }
+	  else if (strcmp (optarg, "decode-zero-reserved") == 0)
+	    {
+	      options.decode.zero_reserved = 1;
+	    }
 
-    case 'H':
-      hi_bit_nr = a2i(optarg);
-      ASSERT(hi_bit_nr == insn_bit_size-1 || hi_bit_nr == 0);
-      break;
+	  else if (strcmp (optarg, "gen-conditional-issue") == 0)
+	    {
+	      options.gen.conditional_issue = 1;
+	    }
+	  else if (strcmp (optarg, "conditional-issue") == 0)
+	    {
+	      options.gen.conditional_issue = 1;
+	      options.warning (NULL, "Option conditional-issue replaced by gen-conditional-issue\n");
+	    }
+	  else if (strcmp (optarg, "gen-delayed-branch") == 0)
+	    {
+	      options.gen.delayed_branch = 1;
+	    }
+	  else if (strcmp (optarg, "delayed-branch") == 0)
+	    {
+	      options.gen.delayed_branch = 1;
+	      options.warning (NULL, "Option delayed-branch replaced by gen-delayed-branch\n");
+	    }
+	  else if (strcmp (optarg, "gen-direct-access") == 0)
+	    {
+	      options.gen.direct_access = 1;
+	    }
+	  else if (strcmp (optarg, "direct-access") == 0)
+	    {
+	      options.gen.direct_access = 1;
+	      options.warning (NULL, "Option direct-access replaced by gen-direct-access\n");
+	    }
+	  else if (strncmp (optarg, "gen-zero-r", strlen ("gen-zero-r")) == 0)
+	    {
+	      options.gen.zero_reg = 1;
+	      options.gen.zero_reg_nr = atoi (optarg + strlen ("gen-zero-r"));
+	    }
+	  else if (strncmp (optarg, "zero-r", strlen ("zero-r")) == 0)
+	    {
+	      options.gen.zero_reg = 1;
+	      options.gen.zero_reg_nr = atoi (optarg + strlen ("zero-r"));
+	      options.warning (NULL, "Option zero-r<N> replaced by gen-zero-r<N>\n");
+	    }
+	  else if (strcmp (optarg, "gen-icache") == 0)
+	    {
+	      options.gen.icache = 1;
+	    }
+	  else if (strcmp (optarg, "gen-insn-in-icache") == 0)
+	    {
+	      options.gen.insn_in_icache = 1;
+	    }
+	  else if (strcmp (optarg, "gen-multi-sim") == 0)
+	    {
+	      options.gen.multi_sim = 1;
+	    }
+	  else if (strcmp (optarg, "gen-multi-word") == 0)
+	    {
+	      options.gen.multi_word = 1;
+	    }
+	  else if (strcmp (optarg, "gen-semantic-icache") == 0)
+	    {
+	      options.gen.semantic_icache = 1;
+	    }
+	  else if (strcmp (optarg, "gen-slot-verification") == 0)
+	    {
+	      options.gen.slot_verification = 1;
+	    }
+	  else if (strcmp (optarg, "verify-slot") == 0)
+	    {
+	      options.gen.slot_verification = 1;
+	      options.warning (NULL, "Option verify-slot replaced by gen-slot-verification\n");
+	    }
+	  else if (strcmp (optarg, "gen-nia-invalid") == 0)
+	    {
+	      options.gen.nia = nia_is_invalid;
+	    }
+	  else if (strcmp (optarg, "default-nia-minus-one") == 0)
+	    {
+	      options.gen.nia = nia_is_invalid;
+	      options.warning (NULL, "Option default-nia-minus-one replaced by gen-nia-invalid\n");
+	    }
+	  else if (strcmp (optarg, "gen-nia-void") == 0)
+	    {
+	      options.gen.nia = nia_is_void;
+	    }
+	  else if (strcmp (optarg, "trace-combine") == 0)
+	    {
+	      options.trace.combine = 1;
+	    }
+	  else if (strcmp (optarg, "trace-entries") == 0)
+	    {
+	      options.trace.entries = 1;
+	    }
+	  else if (strcmp (optarg, "trace-rule-rejection") == 0)
+	    {
+	      options.trace.rule_rejection = 1;
+	    }
+	  else if (strcmp (optarg, "trace-rule-selection") == 0)
+	    {
+	      options.trace.rule_selection = 1;
+	    }
+	  else if (strcmp (optarg, "jumps") == 0)
+	    {
+	      options.gen.code = generate_jumps;
+	    }
+	  else if (strcmp (optarg, "field-widths") == 0)
+	    {
+	      options.insn_specifying_widths = 1;
+	    }
+	  else if (strcmp (optarg, "omit-line-numbers") == 0)
+	    {
+	      file_references = lf_omit_references;
+	    }
+	  else
+	    error (NULL, "Unknown option %s\n", optarg);
+	  break;
+	  
+	case 'i':
+	  isa = load_insn_table (optarg, cache_rules);
+	  if (isa->illegal_insn == NULL)
+	    error (NULL, "illegal-instruction missing from insn table\n");
+	  break;
 
-    case 'N':
-      generate_smp = a2i(optarg);
-      break;
+	case 'x':
+	  gen = do_gen (isa, decode_rules);
+	  break;
 
-    case 'T':
-      force_decode_gen_type(optarg);
-      break;
+	case 'o':
+	  decode_rules = load_decode_table (optarg);
+	  break;
 
-    case 'P':
-      {
-	char *chp;
-	global_name_prefix = strdup(optarg);
-	chp = strdup(optarg);
-	global_uname_prefix = chp;
-	while (*chp) {
-	  if (islower(*chp))
-	    *chp = toupper(*chp);
-	  chp++;
-	}
-      }
-      break;
+	case 'k':
+	  if (isa != NULL)
+	    error (NULL, "Cache file must appear before the insn file\n");
+	  cache_rules = load_cache_table (optarg);
+	  break;
 
-    case 'G':
-      if (strcmp(optarg, "jumps") == 0) {
-	code &= ~generate_calls;
-	code |= generate_jumps;
-      }
-      else if (strcmp(optarg, "field-widths") == 0) {
-	insn_specifying_widths = 1;
-      }
-      else if (strcmp(optarg, "duplicate") == 0) {
-	generate_expanded_instructions = 1;
-      }
-      else if (strcmp(optarg, "omit-line-numbers") == 0) {
-	file_references = lf_omit_references;
-      }
-      else if (strcmp(optarg, "direct-access") == 0) {
-	code |= generate_with_direct_access;
-      }
-      else if (strcmp(optarg, "icache") == 0) {
-      }
-      else if (strcmp(optarg, "semantic-icache") == 0) {
-	code |= generate_with_icache;
-	code |= generate_with_semantic_icache;
-      }
-      else if (strcmp(optarg, "insn-in-icache") == 0) {
-	code |= generate_with_icache;
-	code |= generate_with_insn_in_icache;
-      }
-      else if (strcmp(optarg, "default-nia-minus-one") == 0) {
-	code |= generate_with_semantic_returning_modified_nia_only;
-	code &= ~generate_with_semantic_delayed_branch;
-      }
-      else if (strcmp(optarg, "delayed-branch") == 0) {
-	code |= generate_with_semantic_delayed_branch;
-	code &= ~generate_with_semantic_returning_modified_nia_only;
-      }
-      else if (strcmp(optarg, "conditional-issue") == 0) {
-	code |= generate_with_semantic_conditional_issue;
-      }
-      else if (strncmp (optarg, "zero-r", strlen ("zero-r")) == 0) {
-	code |= generate_with_semantic_zero_reg;
-	semantic_zero_reg_nr = atoi (optarg + strlen ("zero-r"));
-      }
-      else if (strcmp(optarg, "verify-slot") == 0) {
-	code |= generate_with_idecode_slot_verification;
-      }
-      else
-	error("Unknown option %s", optarg);
-      break;
+	case 'n':
+	  real_file_name = strdup(optarg);
+	  break;
 
-    case 'i':
-      if (decode_rules == NULL || cache_rules == NULL) {
-	fprintf(stderr, "Must specify decode and cache tables\n");
-	exit (1);
-      }
-      instructions = load_insn_table(optarg, decode_rules, filters);
-      fprintf(stderr, "\texpanding ...\n");
-      insn_table_expand_insns(instructions);
-      break;
-    case 'o':
-      decode_rules = load_decode_table(optarg, hi_bit_nr);
-      break;
-    case 'k':
-      cache_rules = load_cache_table(optarg, hi_bit_nr);
-      break;
-    case 'n':
-      real_file_name = strdup(optarg);
-      break;
-    case 'h':
-      is_header = 1;
-      break;
-    case 's':
-    case 'd':
-    case 'e':
-    case 'm':
-    case 't':
-    case 'f':
-    case 'c':
-      {
-	lf *file = lf_open(optarg, real_file_name, file_references,
-			   (is_header ? lf_is_h : lf_is_c),
-			   argv[0]);
-	lf_print__file_start(file);
-	ASSERT(instructions != NULL);
-	switch (ch) {
-	case 's':
-	  if(is_header)
-	    gen_semantics_h(instructions, file, code);
-	  else
-	    gen_semantics_c(instructions, cache_rules, file, code);
+	case 'h':
+	  is_header = 1;
 	  break;
+	  
+	case 'c':
 	case 'd':
-	  if (is_header)
-	    gen_idecode_h(file, instructions, cache_rules);
-	  else
-	    gen_idecode_c(file, instructions, cache_rules);
-	  break;
 	case 'e':
-	  if (is_header)
-	    gen_engine_h(file, instructions, cache_rules);
-	  else
-	    gen_engine_c(file, instructions, cache_rules);
-	  break;
+	case 'f':
 	case 'm':
-	  if (is_header)
-	    gen_model_h(instructions, file);
-	  else
-	    gen_model_c(instructions, file);
-	  break;
+	case 'r':
+	case 's':
 	case 't':
-	  if (is_header)
-	    gen_itable_h(instructions, file);
-	  else
-	    gen_itable_c(instructions, file);
-	  break;
-	case 'f':
-	  if (is_header)
-	    gen_support_h(instructions, file);
-	  else
-	    gen_support_c(instructions, file);
-	  break;
-	case 'c':
-	  if (is_header)
-	    gen_icache_h(instructions, file, code);
-	  else
-	    gen_icache_c(instructions, cache_rules, file, code);
-	  break;
+	  {
+	    lf *file = lf_open(optarg, real_file_name, file_references,
+			       (is_header ? lf_is_h : lf_is_c),
+			       argv[0]);
+	    if (gen == NULL && ch != 't' && ch != 'm' && ch != 'f')
+	      {
+		options.warning (NULL, "Explicitly generate tables with -x option\n");
+		gen = do_gen (isa, decode_rules);
+	      }
+	    lf_print__file_start(file);
+	    switch (ch)
+	      {
+	      case 'm':
+		if (is_header)
+		  gen_model_h (file, isa);
+		else
+		  gen_model_c (file, isa);
+		break;
+	      case 't':
+		if (is_header)
+		  gen_itable_h (file, isa);
+		else
+		  gen_itable_c (file, isa);
+		break;
+	      case 'f':
+		if (is_header)
+		  gen_support_h (file, isa);
+		else
+		  gen_support_c (file, isa);
+		break;
+	      case 'r':
+		if (is_header)
+		  options.warning (NULL, "-hr option ignored\n");
+		else
+		  gen_run_c (file, gen);
+		break;
+	      case 's':
+		if(is_header)
+		  gen_semantics_h (file, gen->semantics, isa->max_nr_words);
+		else
+		  gen_semantics_c (file, gen->semantics, isa->caches);
+		break;
+	      case 'd':
+		if (is_header)
+		  gen_idecode_h (file, gen, isa, cache_rules);
+		else
+		  gen_idecode_c (file, gen, isa, cache_rules);
+		break;
+	      case 'e':
+		if (is_header)
+		  gen_engine_h (file, gen, isa, cache_rules);
+		else
+		  gen_engine_c (file, gen, isa, cache_rules);
+		break;
+	      case 'c':
+		if (is_header)
+		  gen_icache_h (file,
+				gen->semantics,
+				isa->functions,
+				isa->max_nr_words);
+		else
+		  gen_icache_c (file,
+				gen->semantics,
+				isa->functions,
+				cache_rules);
+		break;
+	      }
+	    lf_print__file_finish(file);
+	    lf_close(file);
+	    is_header = 0;
+	  }
+	real_file_name = NULL;
+	break;
+	default:
+	  ERROR ("Bad switch");
 	}
-	lf_print__file_finish(file);
-	lf_close(file);
-	is_header = 0;
-      }
-      real_file_name = NULL;
-      break;
-    default:
-      error("unknown option\n");
     }
-  }
-  return 0;
+  return (0);
 }