diff options
author | Tristan Gingold <gingold@adacore.com> | 2011-06-14 09:03:52 +0000 |
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committer | Tristan Gingold <gingold@adacore.com> | 2011-06-14 09:03:52 +0000 |
commit | 2fb4b302aae40bf05c70dbcfb34a14959435354f (patch) | |
tree | a677d28b72fc4c47a6a78539082074945aa2ab58 | |
parent | 5ce5db06f19972530c86aacc3b501723b788699e (diff) | |
download | gdb-2fb4b302aae40bf05c70dbcfb34a14959435354f.zip gdb-2fb4b302aae40bf05c70dbcfb34a14959435354f.tar.gz gdb-2fb4b302aae40bf05c70dbcfb34a14959435354f.tar.bz2 |
gas/
2011-06-14 Tristan Gingold <gingold@adacore.com>
* config/tc-ppc.h (struct ppc_tc_sy): Complete comment on within.
(tc_new_dot_label): Define.
(ppc_new_dot_label): Declare.
* config/tc-ppc.c (ppc_frob_label): Set within target field.
(ppc_fix_adjustable): Use this field to adjust the reloc.
(ppc_new_dot_label): New function.
gas/testsuite/
2011-06-14 Tristan Gingold <gingold@adacore.com>
* gas/ppc/test1xcoff32.d: Adjust for csect anchor.
-rw-r--r-- | gas/ChangeLog | 9 | ||||
-rw-r--r-- | gas/config/tc-ppc.c | 62 | ||||
-rw-r--r-- | gas/config/tc-ppc.h | 8 | ||||
-rw-r--r-- | gas/testsuite/ChangeLog | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/ppc/test1xcoff32.d | 6 |
5 files changed, 39 insertions, 50 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 43a1dff..66cf820 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,12 @@ +2011-06-14 Tristan Gingold <gingold@adacore.com> + + * config/tc-ppc.h (struct ppc_tc_sy): Complete comment on within. + (tc_new_dot_label): Define. + (ppc_new_dot_label): Declare. + * config/tc-ppc.c (ppc_frob_label): Set within target field. + (ppc_fix_adjustable): Use this field to adjust the reloc. + (ppc_new_dot_label): New function. + 2011-06-14 Alan Modra <amodra@gmail.com> * po/POTFILES.in: Regenerate. diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index 2051e96..aba7097 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -5352,6 +5352,7 @@ ppc_frob_label (symbolS *sym) symbol_append (sym, symbol_get_tc (ppc_current_csect)->within, &symbol_rootP, &symbol_lastP); symbol_get_tc (ppc_current_csect)->within = sym; + symbol_get_tc (sym)->within = ppc_current_csect; } #ifdef OBJ_ELF @@ -5841,55 +5842,17 @@ ppc_fix_adjustable (fixS *fix) || (ppc_after_toc_frag != NULL && val >= ppc_after_toc_frag->fr_address))) { - symbolS *csect; - symbolS *next_csect; - - if (symseg == text_section) - csect = ppc_text_csects; - else if (symseg == data_section) - csect = ppc_data_csects; - else - abort (); + symbolS *csect = tc->within; - /* Skip the initial dummy symbol. */ - csect = symbol_get_tc (csect)->next; - - if (csect != (symbolS *) NULL) - { - while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL - && (symbol_get_frag (next_csect)->fr_address <= val)) - { - /* If the csect address equals the symbol value, then we - have to look through the full symbol table to see - whether this is the csect we want. Note that we will - only get here if the csect has zero length. */ - if (symbol_get_frag (csect)->fr_address == val - && S_GET_VALUE (csect) == val) - { - symbolS *scan; + /* If the symbol was not declared by a label (eg: a section symbol), + use the section instead of the csect. This doesn't happen in + normal AIX assembly code. */ + if (csect == NULL) + csect = seg_info (symseg)->sym; - for (scan = symbol_next (csect); - scan != NULL; - scan = symbol_next (scan)) - { - if (symbol_get_tc (scan)->subseg != 0) - break; - if (scan == fix->fx_addsy) - break; - } + fix->fx_offset += val - symbol_get_frag (csect)->fr_address; + fix->fx_addsy = csect; - /* If we found the symbol before the next csect - symbol, then this is the csect we want. */ - if (scan == fix->fx_addsy) - break; - } - - csect = next_csect; - } - - fix->fx_offset += val - symbol_get_frag (csect)->fr_address; - fix->fx_addsy = csect; - } return 0; } @@ -5931,6 +5894,13 @@ ppc_force_relocation (fixS *fix) return generic_force_reloc (fix); } +void +ppc_new_dot_label (symbolS *sym) +{ + /* Anchor this label to the current csect for relocations. */ + symbol_get_tc (sym)->within = ppc_current_csect; +} + #endif /* OBJ_XCOFF */ #ifdef OBJ_ELF diff --git a/gas/config/tc-ppc.h b/gas/config/tc-ppc.h index 9706f6f..a11d396 100644 --- a/gas/config/tc-ppc.h +++ b/gas/config/tc-ppc.h @@ -143,8 +143,9 @@ struct ppc_tc_sy for symbols that are not csects. */ subsegT subseg; /* For a csect symbol, the last symbol which has been defined in - this csect, or NULL if none have been defined so far. For a .bs - symbol, the referenced csect symbol. */ + this csect, or NULL if none have been defined so far. + For a .bs symbol, the referenced csect symbol. + For a label, the enclosing csect. */ symbolS *within; union { @@ -207,6 +208,9 @@ do { \ extern void ppc_xcoff_end (void); #define md_end ppc_xcoff_end +#define tc_new_dot_label(sym) ppc_new_dot_label (sym) +extern void ppc_new_dot_label (symbolS *); + #endif /* OBJ_XCOFF */ extern const char ppc_symbol_chars[]; diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 6970e51..d1da3f8 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2011-06-14 Tristan Gingold <gingold@adacore.com> + + * gas/ppc/test1xcoff32.d: Adjust for csect anchor. + 2011-06-13 Walter Lee <walt@tilera.com> * gas/tilepro/t_constants.s: New file. diff --git a/gas/testsuite/gas/ppc/test1xcoff32.d b/gas/testsuite/gas/ppc/test1xcoff32.d index 56de4d4..75e93a8 100644 --- a/gas/testsuite/gas/ppc/test1xcoff32.d +++ b/gas/testsuite/gas/ppc/test1xcoff32.d @@ -55,6 +55,8 @@ AUX val 4 prmhsh 0 snhsh 0 typ 1 algn 2 clss 3 stb 0 snstb 0 AUX val 0 prmhsh 0 snhsh 0 typ 0 algn 0 clss 0 stb 0 snstb 0 \[ 36\]\(sec 0\)\(fl 0x00\)\(ty 0\)\(scl 2\) \(nx 1\) 0x00000000 esym1 AUX val 0 prmhsh 0 snhsh 0 typ 0 algn 0 clss 0 stb 0 snstb 0 +\[ 38\]\(sec 1\)\(fl 0x00\)\(ty 0\)\(scl 3\) \(nx 1\) 0x00000000 \.text +AUX scnlen 0x68 nreloc 7 nlnno 0 Disassembly of section \.text: @@ -67,7 +69,7 @@ Disassembly of section \.text: 8: 80 63 00 00 l r3,0\(r3\) c: 80 63 00 04 l r3,4\(r3\) 10: 80 63 00 04 l r3,4\(r3\) - 14: 80 63 00 00 l r3,0\(r3\) + 14: 80 63 00 08 l r3,8\(r3\) 0+0018 <dubious_references_to_default_RW_csect>: 18: 80 63 00 00 l r3,0\(r3\) @@ -136,4 +138,4 @@ Disassembly of section \.data: 0+008c <ignored6>: 8c: 00 00 00 00 \.long 0x0 - 8c: R_POS \.crazy_table + 8c: R_POS \.text |