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authorMatthew Malcomson <matthew.malcomson@arm.com>2018-11-06 17:09:34 +0000
committerRichard Earnshaw <Richard.Earnshaw@arm.com>2018-11-06 17:09:34 +0000
commitf86e17aacf47c7b49ed0f6b23a481784f3946133 (patch)
treebe7efa2c893c2c8a56bf4608cc4e1bf2ea0bfb9c
parentbc52d49c1d0e9b5d196132efb41addaf0bddad4f (diff)
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[arm] fix testsuite breakage on pe-coff
The PE target can insert NOP's for padding to 4 byte alignment. This was causing a testcase failure, this commit fixes the testcase. This commit also escapes some full-stops in the testcase regexp. 2018-11-06 Matthew Malcomson <matthew.malcomson@arm.com> * testsuite/gas/arm/neon-cond-bad_t2.d: Fix testcase for PE target.
-rw-r--r--gas/ChangeLog4
-rw-r--r--gas/testsuite/gas/arm/neon-cond-bad_t2.d6
2 files changed, 8 insertions, 2 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 3aa87c7..d8cbf7e 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,9 @@
2018-11-06 Matthew Malcomson <matthew.malcomson@arm.com>
+ * testsuite/gas/arm/neon-cond-bad_t2.d: Fix testcase for PE target.
+
+2018-11-06 Matthew Malcomson <matthew.malcomson@arm.com>
+
* config/tc-arm.c (do_neon_cvt_1): Add check for neon and condition
codes to half-precision conversion.
* testsuite/gas/arm/neon-cond-bad-inc.s: Check vcvteq disallowed.
diff --git a/gas/testsuite/gas/arm/neon-cond-bad_t2.d b/gas/testsuite/gas/arm/neon-cond-bad_t2.d
index abff084..47717ba 100644
--- a/gas/testsuite/gas/arm/neon-cond-bad_t2.d
+++ b/gas/testsuite/gas/arm/neon-cond-bad_t2.d
@@ -31,8 +31,8 @@ Disassembly of section \.text:
0[0-9a-f]+ <[^>]+> ef21 0d02 vsubeq\.f32 d0, d1, d2
0[0-9a-f]+ <[^>]+> ef22 0d44 vsubeq\.f32 q0, q1, q2
0[0-9a-f]+ <[^>]+> bf04 itt eq
-0[0-9a-f]+ <[^>]+> ffb6 1602 vcvteq.f16.f32 d1, q1
-0[0-9a-f]+ <[^>]+> ffb6 2701 vcvteq.f32.f16 q1, d1
+0[0-9a-f]+ <[^>]+> ffb6 1602 vcvteq\.f16\.f32 d1, q1
+0[0-9a-f]+ <[^>]+> ffb6 2701 vcvteq\.f32\.f16 q1, d1
0[0-9a-f]+ <[^>]+> bf04 itt eq
0[0-9a-f]+ <[^>]+> ffb9 0701 vabseq\.f32 d0, d1
0[0-9a-f]+ <[^>]+> ffb9 0742 vabseq\.f32 q0, q1
@@ -56,3 +56,5 @@ Disassembly of section \.text:
0[0-9a-f]+ <[^>]+> eea0 1b10 vdupeq\.32 q0, r1
0[0-9a-f]+ <[^>]+> ffb4 0c01 vdupeq\.32 d0, d1\[0\]
0[0-9a-f]+ <[^>]+> ffbc 0c41 vdupeq\.32 q0, d1\[1\]
+# PE targets can insert an extra NOP for padding -- avoid that breaking tests.
+#pass