Add new AArch64 FP16 FM{A|S} instructions.

This patch separates the new FP16 instructions backported from Armv8.4-a to Armv8.2-a
into a new flag order to distinguish them from the rest of the already existing optional
FP16 instructions in Armv8.2-a.

The new flag "+fp16fml" is available from Armv8.2-a and implies +fp16 and is mandatory on
Armv8.4-a.

gas/

	* config/tc-aarch64.c (fp16fml): New.
	* doc/c-aarch64.texi (fp16fml): New.
	* testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d (fp16): Make fp16fml.
	* testsuite/gas/aarch64/armv8_3-a-crypto-fp16.d (fp16): Make fp16fml.

include/

	* opcode/aarch64.h: (AARCH64_FEATURE_F16_FML): New.
	(AARCH64_ARCH_V8_4): Enable AARCH64_FEATURE_F16_FML by default.

opcodes/

	* aarch64-tbl.h (aarch64_feature_fp_16_v8_2): Require AARCH64_FEATURE_F16_FML
	and AARCH64_FEATURE_F16.

9 files changed, 30 insertions, 5 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 78b2f94..ee1ec6f 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,12 @@
 2017-11-16  Tamar Christina  <tamar.christina@arm.com>
 
+	* config/tc-aarch64.c (fp16fml): New.
+	* doc/c-aarch64.texi (fp16fml): New.
+	* testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d (fp16): Make fp16fml.
+	* testsuite/gas/aarch64/armv8_3-a-crypto-fp16.d (fp16): Make fp16fml.
+
+2017-11-16  Tamar Christina  <tamar.christina@arm.com>
+
 	* opcodes/aarch64-tbl.h
 	(aarch64_feature_crypto): Add ARCH64_FEATURE_SIMD and AARCH64_FEATURE_FP.
 	(aarch64_feature_crypto_v8_2, aarch64_feature_sm4): Likewise.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 8754237..4ae0624 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -8499,6 +8499,9 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
 			AARCH64_FEATURE (AARCH64_FEATURE_SIMD, 0)},
   {"fp16",		AARCH64_FEATURE (AARCH64_FEATURE_F16, 0),
 			AARCH64_FEATURE (AARCH64_FEATURE_FP, 0)},
+  {"fp16fml",		AARCH64_FEATURE (AARCH64_FEATURE_F16_FML, 0),
+			AARCH64_FEATURE (AARCH64_FEATURE_FP
+					 | AARCH64_FEATURE_F16, 0)},
   {"profile",		AARCH64_FEATURE (AARCH64_FEATURE_PROFILE, 0),
 			AARCH64_ARCH_NONE},
   {"sve",		AARCH64_FEATURE (AARCH64_FEATURE_SVE, 0),
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 7d872b0..538b103 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -176,6 +176,9 @@ automatically cause those extensions to be disabled.
  @code{simd} and @code{compnum}.
 @item @code{dotprod} @tab ARMv8.2-A @tab ARMv8.4-A or later
  @tab Enable the Dot Product extension.  This implies @code{simd}.
+@item @code{fp16fml} @tab ARMv8.2-A @tab ARMv8.4-A or later
+ @tab Enable ARMv8.2 16-bit floating-point multiplication variant support.
+ This implies @code{fp16}.
 @end multitable
 
 @node AArch64 Syntax
diff --git a/gas/testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d b/gas/testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d
index 10c7786e..244ba14 100644
--- a/gas/testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d
+++ b/gas/testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d
@@ -1,4 +1,4 @@
-#as: -march=armv8.2-a+crypto+sm4+sha3+fp16
+#as: -march=armv8.2-a+crypto+sm4+sha3+fp16fml
 #objdump: -dr
 
 .*:     file format .*
diff --git a/gas/testsuite/gas/aarch64/armv8_3-a-crypto-fp16.d b/gas/testsuite/gas/aarch64/armv8_3-a-crypto-fp16.d
index 93909f1..6a4c9e3 100644
--- a/gas/testsuite/gas/aarch64/armv8_3-a-crypto-fp16.d
+++ b/gas/testsuite/gas/aarch64/armv8_3-a-crypto-fp16.d
@@ -1,4 +1,4 @@
-#as: -march=armv8.3-a+crypto+sm4+sha3+fp16
+#as: -march=armv8.3-a+crypto+sm4+sha3+fp16fml
 #source: armv8_2-a-crypto-fp16.s
 #objdump: -dr
 
diff --git a/include/ChangeLog b/include/ChangeLog
index 79b6eeb..670456c 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,8 @@
+2017-11-16  Tamar Christina  <tamar.christina@arm.com>
+
+	* opcode/aarch64.h: (AARCH64_FEATURE_F16_FML): New.
+	(AARCH64_ARCH_V8_4): Enable AARCH64_FEATURE_F16_FML by default.
+
 2017-11-15  Tamar Christina  <tamar.christina@arm.com>
 
 	* opcode/arm.h: (ARM_EXT2_FP16_FML): New.
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 37c4a43..73ebd80 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -61,6 +61,7 @@ typedef uint32_t aarch64_insn;
 #define AARCH64_FEATURE_RCPC	0x20000000	/* RCPC instructions.  */
 #define AARCH64_FEATURE_COMPNUM	0x40000000	/* Complex # instructions.  */
 #define AARCH64_FEATURE_DOTPROD 0x080000000     /* Dot Product instructions.  */
+#define AARCH64_FEATURE_F16_FML	0x1000000000ULL	/* v8.2 FP16FML ins.  */
 
 /* Architectures are the sum of the base and extensions.  */
 #define AARCH64_ARCH_V8		AARCH64_FEATURE (AARCH64_FEATURE_V8, \
@@ -82,7 +83,8 @@ typedef uint32_t aarch64_insn;
 						 | AARCH64_FEATURE_COMPNUM)
 #define AARCH64_ARCH_V8_4	AARCH64_FEATURE (AARCH64_ARCH_V8_3,	\
 						 AARCH64_FEATURE_V8_4   \
-						 | AARCH64_FEATURE_DOTPROD)
+						 | AARCH64_FEATURE_DOTPROD \
+						 | AARCH64_FEATURE_F16_FML)
 
 #define AARCH64_ARCH_NONE	AARCH64_FEATURE (0, 0)
 #define AARCH64_ANY		AARCH64_FEATURE (-1, 0)	/* Any basic core.  */
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index de2024b..84eaa6f 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,10 @@
 2017-11-16  Tamar Christina  <tamar.christina@arm.com>
 
+	* aarch64-tbl.h (aarch64_feature_fp_16_v8_2): Require AARCH64_FEATURE_F16_FML
+	and AARCH64_FEATURE_F16.
+
+2017-11-16  Tamar Christina  <tamar.christina@arm.com>
+
 	* aarch64-tbl.h (sha512h, sha512h2, sha512su0, sha512su1, eor3): New.
 	(rax1, xar, bcax, sm3ss1, sm3tt1a, sm3tt1b, sm3tt2a, sm3tt2b): New.
 	(sm3partw1, sm3partw2, sm4e, sm4ekey, fmlal, fmlsl): New.
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index ad6fae4..11587dc 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2143,8 +2143,8 @@ static const aarch64_feature_set aarch64_feature_sha3 =
   AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_SHA2
 		   | AARCH64_FEATURE_SHA3 | AARCH64_FEATURE_SIMD | AARCH64_FEATURE_FP, 0);
 static const aarch64_feature_set aarch64_feature_fp_16_v8_2 =
-  AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_F16
-		   | AARCH64_FEATURE_FP, 0);
+  AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_F16_FML
+		   | AARCH64_FEATURE_F16 | AARCH64_FEATURE_FP, 0);
 
 #define CORE		&aarch64_feature_v8
 #define FP		&aarch64_feature_fp