diff options
| author | Jan Beulich <jbeulich@novell.com> | 2017-11-13 12:27:45 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2017-11-13 12:27:45 +0100 |
| commit | 5b2b928e83538b23eb1b3f585b14c3d6cf1bfd7e (patch) | |
| tree | dd6ba54ecbc06cd414371aa9cfe8f1e4f3c2c742 | |
| parent | 6465780617638ce65bd7458e30b34ebdc1a99f52 (diff) | |
| download | gdb-5b2b928e83538b23eb1b3f585b14c3d6cf1bfd7e.zip gdb-5b2b928e83538b23eb1b3f585b14c3d6cf1bfd7e.tar.gz gdb-5b2b928e83538b23eb1b3f585b14c3d6cf1bfd7e.tar.bz2 | |
gas/arm64: don't emit stack pointer symbol table entries
Without this change, all of
mov z0.b, p0/m, wsp
mov z0.b, wsp
mov z0.d, p0/m, sp
mov z0.d, sp
insert stray symbols into the symbol table.
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/config/tc-aarch64.c | 11 |
2 files changed, 11 insertions, 5 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 0eb8c0d..86876a1 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,10 @@ 2017-11-13 Jan Beulich <jbeulich@suse.com> + * config/tc-aarch64.c (R_Z_BHSDQ_VZP): Rename to ... + (R_Z_SP_BHSDQ_VZP): ... and include both stack pointer variants. + +2017-11-13 Jan Beulich <jbeulich@suse.com> + * testsuite/gas/ia64/group-1.d: Adjust expectations. * testsuite/gas/ia64/group-2.d: Likewise. * testsuite/gas/ia64/xdata.d: Likewise. diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 84b3dc7..8754237 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -304,10 +304,11 @@ struct reloc_entry | REG_TYPE(Z_32) | REG_TYPE(Z_64) | REG_TYPE(VN) \ | REG_TYPE(FP_B) | REG_TYPE(FP_H) \ | REG_TYPE(FP_S) | REG_TYPE(FP_D) | REG_TYPE(FP_Q)) \ - /* Typecheck: as above, but also Zn and Pn. This should only be \ - used for SVE instructions, since Zn and Pn are valid symbols \ + /* Typecheck: as above, but also Zn, Pn, and {W}SP. This should only \ + be used for SVE instructions, since Zn and Pn are valid symbols \ in other contexts. */ \ - MULTI_REG_TYPE(R_Z_BHSDQ_VZP, REG_TYPE(R_32) | REG_TYPE(R_64) \ + MULTI_REG_TYPE(R_Z_SP_BHSDQ_VZP, REG_TYPE(R_32) | REG_TYPE(R_64) \ + | REG_TYPE(SP_32) | REG_TYPE(SP_64) \ | REG_TYPE(Z_32) | REG_TYPE(Z_64) | REG_TYPE(VN) \ | REG_TYPE(FP_B) | REG_TYPE(FP_H) \ | REG_TYPE(FP_S) | REG_TYPE(FP_D) | REG_TYPE(FP_Q) \ @@ -415,7 +416,7 @@ get_reg_expected_msg (aarch64_reg_type reg_type) "register expected"); break; case REG_TYPE_R_Z_BHSDQ_V: - case REG_TYPE_R_Z_BHSDQ_VZP: + case REG_TYPE_R_Z_SP_BHSDQ_VZP: msg = N_("register expected"); break; case REG_TYPE_BHSDQ: /* any [BHSDQ]P FP */ @@ -5269,7 +5270,7 @@ parse_operands (char *str, const aarch64_opcode *opcode) skip_whitespace (str); if (AARCH64_CPU_HAS_FEATURE (AARCH64_FEATURE_SVE, *opcode->avariant)) - imm_reg_type = REG_TYPE_R_Z_BHSDQ_VZP; + imm_reg_type = REG_TYPE_R_Z_SP_BHSDQ_VZP; else imm_reg_type = REG_TYPE_R_Z_BHSDQ_V; |