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author | Rinat Zelig <rinat@mellanox.com> | 2017-03-16 10:05:22 +0000 |
---|---|---|
committer | Andrew Burgess <andrew.burgess@embecosm.com> | 2017-03-16 10:07:22 +0000 |
commit | 2c52e2e8c9e8f733cc0772d1400b0f4d3eb7379c (patch) | |
tree | 0958bb6beb631f5eed8c3cc0dc6576d001fdde0a | |
parent | e189bfe660d335f3b7c61446c9b5d3b0f0701606 (diff) | |
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gas/arc: Limit special handling of t/nt flag to ARCv2
In a later commit I'll be adding a new version of the ".nt" flag for an
ARC700 extension (NPS400) which does not require this same special
handling.
In this commit I have restricted the special flag handling to only apply
if we are assembling for ARCv2. This is a restructuring commit, and
there should be no user visible changes after this commit.
gas/ChangeLog:
* config/tc-arc.c (assemble_insn): Only handle ".t" and ".nt"
specially for ARCv2.
-rw-r--r-- | gas/ChangeLog | 5 | ||||
-rw-r--r-- | gas/config/tc-arc.c | 18 |
2 files changed, 18 insertions, 5 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 58a7327..cf51667 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2017-03-16 Rinat Zelig <rinat@mellanox.com> + + * config/tc-arc.c (assemble_insn): Only handle ".t" and ".nt" + specially for ARCv2. + 2017-03-14 Kito Cheng <kito.cheng@gmail.com> * config/tc-riscv.c (validate_riscv_insn): Add 'o' RVC immediate diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c index a1fd71d..f806ca3 100644 --- a/gas/config/tc-arc.c +++ b/gas/config/tc-arc.c @@ -4010,11 +4010,19 @@ assemble_insn (const struct arc_opcode *opcode, if (!strcmp (flg_operand->name, "d")) has_delay_slot = TRUE; - /* There is an exceptional case when we cannot insert a flag - just as it is. The .T flag must be handled in relation with - the relative address. */ - if (!strcmp (flg_operand->name, "t") - || !strcmp (flg_operand->name, "nt")) + /* There is an exceptional case when we cannot insert a flag just as + it is. On ARCv2 the '.t' and '.nt' flags must be handled in + relation with the relative address. Unfortunately, some of the + ARC700 extensions (NPS400) also have a '.nt' flag that should be + handled in the normal way. + + Flag operands don't have an architecture field, so we can't + directly validate that FLAG_OPERAND is valid for the current + architecture, what we do instead is just validate that we're + assembling for an ARCv2 architecture. */ + if ((selected_cpu.flags & ARC_OPCODE_ARCV2) + && (!strcmp (flg_operand->name, "t") + || !strcmp (flg_operand->name, "nt"))) { unsigned bitYoperand = 0; /* FIXME! move selection bbit/brcc in arc-opc.c. */ |