MIPS/GAS: Fix an ISA override not lifting ABI restrictions

Correct a regression introduced with commit 919731affbef ("Add MIPS
.module directive") causing code like:

	.set	mips3
	dli	$2, 0x9000000080000000

to fail assembly with the following error message produced:

Error: number (0x9000000080000000) larger than 32 bits

if built with `mips3' selected as the global ISA (e.g. `-march=mips3').
This is because a `.set' directive doing an ISA override does not lift
the ABI restriction on register sizes if the ISA remains unchanged.
Previously the directive always set register sizes from the ISA chosen,
which is what some code expects.  Restore the old semantics then.

	gas/
	* config/tc-mips.c (code_option_type): New enum.
	(parse_code_option): Return status indicating option type.
	(s_mipsset): Update `parse_code_option' call site accordingly.
	Always set register sizes from the ISA with ISA overrides.
	(s_module): Update `parse_code_option' call site.
	* testsuite/gas/mips/isa-override-1.d: New test.
	* testsuite/gas/mips/micromips@isa-override-1.d: New test.
	* testsuite/gas/mips/mips1@isa-override-1.d: New test.
	* testsuite/gas/mips/mips2@isa-override-1.d: New test.
	* testsuite/gas/mips/mips32@isa-override-1.d: New test.
	* testsuite/gas/mips/mips32r2@isa-override-1.d: New test.
	* testsuite/gas/mips/mips32r3@isa-override-1.d: New test.
	* testsuite/gas/mips/mips32r5@isa-override-1.d: New test.
	* testsuite/gas/mips/mips32r6@isa-override-1.d: New test.
	* testsuite/gas/mips/mips64r2@isa-override-1.d: New test.
	* testsuite/gas/mips/mips64r3@isa-override-1.d: New test.
	* testsuite/gas/mips/mips64r5@isa-override-1.d: New test.
	* testsuite/gas/mips/mips64r6@isa-override-1.d: New test.
	* testsuite/gas/mips/r3000@isa-override-1.d: New test.
	* testsuite/gas/mips/r3900@isa-override-1.d: New test.
	* testsuite/gas/mips/r5900@isa-override-1.d: New test.
	* testsuite/gas/mips/octeon@isa-override-1.d: New test.
	* testsuite/gas/mips/octeon3@isa-override-1.d: New test.
	* testsuite/gas/mips/isa-override-2.l: New list test.
	* testsuite/gas/mips/mips1@isa-override-2.l: New list test.
	* testsuite/gas/mips/mips2@isa-override-2.l: New list test.
	* testsuite/gas/mips/mips32@isa-override-2.l: New list test.
	* testsuite/gas/mips/mips32r2@isa-override-2.l: New list test.
	* testsuite/gas/mips/mips32r3@isa-override-2.l: New list test.
	* testsuite/gas/mips/mips32r5@isa-override-2.l: New list test.
	* testsuite/gas/mips/mips32r6@isa-override-2.l: New list test.
	* testsuite/gas/mips/r3000@isa-override-2.l: New list test.
	* testsuite/gas/mips/r3900@isa-override-2.l: New list test.
	* testsuite/gas/mips/octeon3@isa-override-2.l: New list test.
	* testsuite/gas/mips/octeon3@isa-override-1.l: New stderr
	output.
	* testsuite/gas/mips/isa-override-1.s: New test source.
	* testsuite/gas/mips/r5900@isa-override-1.s: New test source.
	* testsuite/gas/mips/isa-override-2.s: New test source.
	* testsuite/gas/mips/mips1@isa-override-2.s: New test source.
	* testsuite/gas/mips/mips2@isa-override-2.s: New test source.
	* testsuite/gas/mips/mips32@isa-override-2.s: New test source.
	* testsuite/gas/mips/mips32r2@isa-override-2.s: New test source.
	* testsuite/gas/mips/mips32r3@isa-override-2.s: New test source.
	* testsuite/gas/mips/mips32r5@isa-override-2.s: New test source.
	* testsuite/gas/mips/mips32r6@isa-override-2.s: New test source.
	* testsuite/gas/mips/r3000@isa-override-2.s: New test source.
	* testsuite/gas/mips/r3900@isa-override-2.s: New test source.
	* testsuite/gas/mips/octeon3@isa-override-2.s: New test source.
	* testsuite/gas/mips/mips.exp: Run the new tests.

46 files changed, 775 insertions, 8 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 69cfbe1..f95948d 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,56 @@
+2016-04-22  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/tc-mips.c (code_option_type): New enum.
+	(parse_code_option): Return status indicating option type.
+	(s_mipsset): Update `parse_code_option' call site accordingly.
+	Always set register sizes from the ISA with ISA overrides.
+	(s_module): Update `parse_code_option' call site.
+	* testsuite/gas/mips/isa-override-1.d: New test.
+	* testsuite/gas/mips/micromips@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips1@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips2@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips32@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips32r2@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips32r3@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips32r5@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips32r6@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips64r2@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips64r3@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips64r5@isa-override-1.d: New test.
+	* testsuite/gas/mips/mips64r6@isa-override-1.d: New test.
+	* testsuite/gas/mips/r3000@isa-override-1.d: New test.
+	* testsuite/gas/mips/r3900@isa-override-1.d: New test.
+	* testsuite/gas/mips/r5900@isa-override-1.d: New test.
+	* testsuite/gas/mips/octeon@isa-override-1.d: New test.
+	* testsuite/gas/mips/octeon3@isa-override-1.d: New test.
+	* testsuite/gas/mips/isa-override-2.l: New list test.
+	* testsuite/gas/mips/mips1@isa-override-2.l: New list test.
+	* testsuite/gas/mips/mips2@isa-override-2.l: New list test.
+	* testsuite/gas/mips/mips32@isa-override-2.l: New list test.
+	* testsuite/gas/mips/mips32r2@isa-override-2.l: New list test.
+	* testsuite/gas/mips/mips32r3@isa-override-2.l: New list test.
+	* testsuite/gas/mips/mips32r5@isa-override-2.l: New list test.
+	* testsuite/gas/mips/mips32r6@isa-override-2.l: New list test.
+	* testsuite/gas/mips/r3000@isa-override-2.l: New list test.
+	* testsuite/gas/mips/r3900@isa-override-2.l: New list test.
+	* testsuite/gas/mips/octeon3@isa-override-2.l: New list test.
+	* testsuite/gas/mips/octeon3@isa-override-1.l: New stderr
+	output.
+	* testsuite/gas/mips/isa-override-1.s: New test source.
+	* testsuite/gas/mips/r5900@isa-override-1.s: New test source.
+	* testsuite/gas/mips/isa-override-2.s: New test source.
+	* testsuite/gas/mips/mips1@isa-override-2.s: New test source.
+	* testsuite/gas/mips/mips2@isa-override-2.s: New test source.
+	* testsuite/gas/mips/mips32@isa-override-2.s: New test source.
+	* testsuite/gas/mips/mips32r2@isa-override-2.s: New test source.
+	* testsuite/gas/mips/mips32r3@isa-override-2.s: New test source.
+	* testsuite/gas/mips/mips32r5@isa-override-2.s: New test source.
+	* testsuite/gas/mips/mips32r6@isa-override-2.s: New test source.
+	* testsuite/gas/mips/r3000@isa-override-2.s: New test source.
+	* testsuite/gas/mips/r3900@isa-override-2.s: New test source.
+	* testsuite/gas/mips/octeon3@isa-override-2.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
 2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 
 	* cgen.c: Likewise.
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index bfc639e..daceef1 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -15513,10 +15513,29 @@ struct mips_option_stack
 
 static struct mips_option_stack *mips_opts_stack;
 
-static bfd_boolean
+/* Return status for .set/.module option handling.  */
+
+enum code_option_type
+{
+  /* Unrecognized option.  */
+  OPTION_TYPE_BAD = -1,
+
+  /* Ordinary option.  */
+  OPTION_TYPE_NORMAL,
+
+  /* ISA changing option.  */
+  OPTION_TYPE_ISA
+};
+
+/* Handle common .set/.module options.  Return status indicating option
+   type.  */
+
+static enum code_option_type
 parse_code_option (char * name)
 {
+  bfd_boolean isa_set = FALSE;
   const struct mips_ase *ase;
+
   if (strncmp (name, "at=", 3) == 0)
     {
       char *s = name + 3;
@@ -15589,6 +15608,7 @@ parse_code_option (char * name)
 	    {
 	      mips_opts.arch = p->cpu;
 	      mips_opts.isa = p->isa;
+	      isa_set = TRUE;
 	    }
 	}
       else if (strncmp (name, "mips", 4) == 0)
@@ -15602,6 +15622,7 @@ parse_code_option (char * name)
 	    {
 	      mips_opts.arch = p->cpu;
 	      mips_opts.isa = p->isa;
+	      isa_set = TRUE;
 	    }
 	}
       else
@@ -15620,8 +15641,9 @@ parse_code_option (char * name)
   else if (strcmp (name, "nosym32") == 0)
     mips_opts.sym32 = FALSE;
   else
-    return FALSE;
-  return TRUE;
+    return OPTION_TYPE_BAD;
+
+  return isa_set ? OPTION_TYPE_ISA : OPTION_TYPE_NORMAL;
 }
 
 /* Handle the .set pseudo-op.  */
@@ -15629,8 +15651,8 @@ parse_code_option (char * name)
 static void
 s_mipsset (int x ATTRIBUTE_UNUSED)
 {
+  enum code_option_type type = OPTION_TYPE_NORMAL;
   char *name = input_line_pointer, ch;
-  int prev_isa = mips_opts.isa;
 
   file_mips_check_options ();
 
@@ -15707,12 +15729,16 @@ s_mipsset (int x ATTRIBUTE_UNUSED)
 	  free (s);
 	}
     }
-  else if (!parse_code_option (name))
-    as_warn (_("tried to set unrecognized symbol: %s\n"), name);
+  else
+    {
+      type = parse_code_option (name);
+      if (type == OPTION_TYPE_BAD)
+	as_warn (_("tried to set unrecognized symbol: %s\n"), name);
+    }
 
   /* The use of .set [arch|cpu]= historically 'fixes' the width of gp and fp
      registers based on what is supported by the arch/cpu.  */
-  if (mips_opts.isa != prev_isa)
+  if (type == OPTION_TYPE_ISA)
     {
       switch (mips_opts.isa)
 	{
@@ -15779,7 +15805,7 @@ s_module (int ignore ATTRIBUTE_UNUSED)
 
   if (!file_mips_opts_checked)
     {
-      if (!parse_code_option (name))
+      if (parse_code_option (name) == OPTION_TYPE_BAD)
 	as_bad (_(".module used with unrecognized symbol: %s\n"), name);
 
       /* Update module level settings from mips_opts.  */
diff --git a/gas/testsuite/gas/mips/isa-override-1.d b/gas/testsuite/gas/mips/isa-override-1.d
new file mode 100644
index 0000000..70f34e2
--- /dev/null
+++ b/gas/testsuite/gas/mips/isa-override-1.d
@@ -0,0 +1,49 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 44811800 	mtc1	at,\$f3
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
+[0-9a-f]+ <[^>]*> dc820000 	ld	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 340189ab 	li	at,0x89ab
+[0-9a-f]+ <[^>]*> 00010c38 	dsll	at,at,0x10
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> 3c029000 	lui	v0,0x9000
+[0-9a-f]+ <[^>]*> 00021438 	dsll	v0,v0,0x10
+[0-9a-f]+ <[^>]*> 34428000 	ori	v0,v0,0x8000
+[0-9a-f]+ <[^>]*> 00021438 	dsll	v0,v0,0x10
+[0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 00010c38 	dsll	at,at,0x10
+[0-9a-f]+ <[^>]*> 342189ab 	ori	at,at,0x89ab
+[0-9a-f]+ <[^>]*> 00010c38 	dsll	at,at,0x10
+[0-9a-f]+ <[^>]*> 44a11000 	dmtc1	at,\$f2
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 44811800 	mtc1	at,\$f3
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 44811800 	mtc1	at,\$f3
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/isa-override-1.s b/gas/testsuite/gas/mips/isa-override-1.s
new file mode 100644
index 0000000..9a38981
--- /dev/null
+++ b/gas/testsuite/gas/mips/isa-override-1.s
@@ -0,0 +1,31 @@
+	.text
+	.globl	foo
+	.ent	foo
+foo:
+	ld	$2, 0($4)
+	or	$2, 0x89ab0000
+	l.d	$f2, 0($4)
+	li.d	$f2, 1.0000005128531484
+	.set	push
+	.set	mips3
+	ld	$2, 0($4)
+	or	$2, 0x89ab0000
+	dli	$2, 0x9000000080000000
+	l.d	$f2, 0($4)
+	li.d	$f2, 1.0000005128531484
+	.set	mips0
+	ld	$2, 0($4)
+	or	$2, 0x89ab0000
+	l.d	$f2, 0($4)
+	li.d	$f2, 1.0000005128531484
+	.set	mips3
+	.set	pop
+	ld	$2, 0($4)
+	or	$2, 0x89ab0000
+	l.d	$f2, 0($4)
+	li.d	$f2, 1.0000005128531484
+	.end	foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/isa-override-2.l b/gas/testsuite/gas/mips/isa-override-2.l
new file mode 100644
index 0000000..cd215bc
--- /dev/null
+++ b/gas/testsuite/gas/mips/isa-override-2.l
@@ -0,0 +1,4 @@
+.*: Assembler messages:
+.*:5: Error: number \(0x9000000080000000\) larger than 32 bits
+.*:10: Error: number \(0x9000000080000000\) larger than 32 bits
+.*:13: Error: number \(0x9000000080000000\) larger than 32 bits
diff --git a/gas/testsuite/gas/mips/isa-override-2.s b/gas/testsuite/gas/mips/isa-override-2.s
new file mode 100644
index 0000000..402c118
--- /dev/null
+++ b/gas/testsuite/gas/mips/isa-override-2.s
@@ -0,0 +1,18 @@
+	.text
+	.globl	foo
+	.ent	foo
+foo:
+	dli	$2, 0x9000000080000000
+	.set	push
+	.set	mips3
+	dli	$2, 0x9000000080000000
+	.set	mips0
+	dli	$2, 0x9000000080000000
+	.set	mips3
+	.set	pop
+	dli	$2, 0x9000000080000000
+	.end	foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/micromips@isa-override-1.d b/gas/testsuite/gas/mips/micromips@isa-override-1.d
new file mode 100644
index 0000000..e600ff8
--- /dev/null
+++ b/gas/testsuite/gas/mips/micromips@isa-override-1.d
@@ -0,0 +1,50 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: isa-override-1.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> fc44 0000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> fc64 0004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 41a1 89ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 0022 1290 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> bc44 0000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 41a1 3ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 5422 383b 	mthc1	at,\$f2
+[0-9a-f]+ <[^>]*> 41a1 89ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 5422 283b 	mtc1	at,\$f2
+[0-9a-f]+ <[^>]*> dc44 0000 	ld	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 5020 89ab 	li	at,0x89ab
+[0-9a-f]+ <[^>]*> 5821 8000 	dsll	at,at,0x10
+[0-9a-f]+ <[^>]*> 0022 1290 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> 41a2 9000 	lui	v0,0x9000
+[0-9a-f]+ <[^>]*> 5842 8000 	dsll	v0,v0,0x10
+[0-9a-f]+ <[^>]*> 5042 8000 	ori	v0,v0,0x8000
+[0-9a-f]+ <[^>]*> 5842 8000 	dsll	v0,v0,0x10
+[0-9a-f]+ <[^>]*> bc44 0000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 41a1 3ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 5821 8000 	dsll	at,at,0x10
+[0-9a-f]+ <[^>]*> 5021 89ab 	ori	at,at,0x89ab
+[0-9a-f]+ <[^>]*> 5821 8000 	dsll	at,at,0x10
+[0-9a-f]+ <[^>]*> 5422 2c3b 	dmtc1	at,\$2
+[0-9a-f]+ <[^>]*> fc44 0000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> fc64 0004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 41a1 89ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 0022 1290 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> bc44 0000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 41a1 3ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 5422 383b 	mthc1	at,\$f2
+[0-9a-f]+ <[^>]*> 41a1 89ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 5422 283b 	mtc1	at,\$f2
+[0-9a-f]+ <[^>]*> fc44 0000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> fc64 0004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 41a1 89ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 0022 1290 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> bc44 0000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 41a1 3ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 5422 383b 	mthc1	at,\$f2
+[0-9a-f]+ <[^>]*> 41a1 89ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 5422 283b 	mtc1	at,\$f2
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 078fde2..8ee0b31 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -1496,6 +1496,9 @@ if { [istarget mips*-*-vxworks*] } {
     run_list_test "option-pic-vxworks-2" "-mvxworks-pic" \
 	"MIPS invalid switch to SVR4 PIC from VxWorks PIC"
 
+    run_dump_test_arches "isa-override-1" "" [mips_arch_list_matching mips1]
+    run_list_test_arches "isa-override-2" "-32" [mips_arch_list_matching mips1]
+
     run_dump_test_arches "r6"		[mips_arch_list_matching mips32r6]
     if $has_newabi {
 	run_dump_test_arches "r6-n32"	[mips_arch_list_matching mips64r6]
diff --git a/gas/testsuite/gas/mips/mips1@isa-override-1.d b/gas/testsuite/gas/mips/mips1@isa-override-1.d
new file mode 100644
index 0000000..80371b8
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips1@isa-override-1.d
@@ -0,0 +1,53 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: isa-override-1.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> c48[32]0000 	lwc1	\$f[32],0\(a0\)
+[0-9a-f]+ <[^>]*> c48[23]0004 	lwc1	\$f[23],4\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 44811800 	mtc1	at,\$f3
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
+[0-9a-f]+ <[^>]*> dc820000 	0xdc820000
+[0-9a-f]+ <[^>]*> 340189ab 	li	at,0x89ab
+[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> 3c029000 	lui	v0,0x9000
+[0-9a-f]+ <[^>]*> 00021438 	0x21438
+[0-9a-f]+ <[^>]*> 34428000 	ori	v0,v0,0x8000
+[0-9a-f]+ <[^>]*> 00021438 	0x21438
+[0-9a-f]+ <[^>]*> d4820000 	0xd4820000
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 342189ab 	ori	at,at,0x89ab
+[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 44a11000 	0x44a11000
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> c48[32]0000 	lwc1	\$f[32],0\(a0\)
+[0-9a-f]+ <[^>]*> c48[23]0004 	lwc1	\$f[23],4\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 44811800 	mtc1	at,\$f3
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> c48[32]0000 	lwc1	\$f[32],0\(a0\)
+[0-9a-f]+ <[^>]*> c48[23]0004 	lwc1	\$f[23],4\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 44811800 	mtc1	at,\$f3
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips1@isa-override-2.l b/gas/testsuite/gas/mips/mips1@isa-override-2.l
new file mode 100644
index 0000000..2ec6684
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips1@isa-override-2.l
@@ -0,0 +1,4 @@
+.*: Assembler messages:
+.*:5: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000'
+.*:10: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000'
+.*:13: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000'
diff --git a/gas/testsuite/gas/mips/mips1@isa-override-2.s b/gas/testsuite/gas/mips/mips1@isa-override-2.s
new file mode 100644
index 0000000..402c118
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips1@isa-override-2.s
@@ -0,0 +1,18 @@
+	.text
+	.globl	foo
+	.ent	foo
+foo:
+	dli	$2, 0x9000000080000000
+	.set	push
+	.set	mips3
+	dli	$2, 0x9000000080000000
+	.set	mips0
+	dli	$2, 0x9000000080000000
+	.set	mips3
+	.set	pop
+	dli	$2, 0x9000000080000000
+	.end	foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/mips2@isa-override-1.d b/gas/testsuite/gas/mips/mips2@isa-override-1.d
new file mode 100644
index 0000000..5341e0d
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips2@isa-override-1.d
@@ -0,0 +1,50 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: isa-override-1.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 44811800 	mtc1	at,\$f3
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
+[0-9a-f]+ <[^>]*> dc820000 	ldc3	\$2,0\(a0\)
+[0-9a-f]+ <[^>]*> 340189ab 	li	at,0x89ab
+[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> 3c029000 	lui	v0,0x9000
+[0-9a-f]+ <[^>]*> 00021438 	0x21438
+[0-9a-f]+ <[^>]*> 34428000 	ori	v0,v0,0x8000
+[0-9a-f]+ <[^>]*> 00021438 	0x21438
+[0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 342189ab 	ori	at,at,0x89ab
+[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 44a11000 	0x44a11000
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 44811800 	mtc1	at,\$f3
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 44811800 	mtc1	at,\$f3
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips2@isa-override-2.l b/gas/testsuite/gas/mips/mips2@isa-override-2.l
new file mode 100644
index 0000000..19ad921
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips2@isa-override-2.l
@@ -0,0 +1,4 @@
+.*: Assembler messages:
+.*:5: Error: opcode not supported on this processor: mips2 \(mips2\) `dli \$2,0x9000000080000000'
+.*:10: Error: opcode not supported on this processor: mips2 \(mips2\) `dli \$2,0x9000000080000000'
+.*:13: Error: opcode not supported on this processor: mips2 \(mips2\) `dli \$2,0x9000000080000000'
diff --git a/gas/testsuite/gas/mips/mips2@isa-override-2.s b/gas/testsuite/gas/mips/mips2@isa-override-2.s
new file mode 100644
index 0000000..402c118
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips2@isa-override-2.s
@@ -0,0 +1,18 @@
+	.text
+	.globl	foo
+	.ent	foo
+foo:
+	dli	$2, 0x9000000080000000
+	.set	push
+	.set	mips3
+	dli	$2, 0x9000000080000000
+	.set	mips0
+	dli	$2, 0x9000000080000000
+	.set	mips3
+	.set	pop
+	dli	$2, 0x9000000080000000
+	.end	foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/mips32@isa-override-1.d b/gas/testsuite/gas/mips/mips32@isa-override-1.d
new file mode 100644
index 0000000..75a8f0a
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips32@isa-override-1.d
@@ -0,0 +1,5 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: isa-override-1.s
+#dump: mips2@isa-override-1.d
diff --git a/gas/testsuite/gas/mips/mips32@isa-override-2.l b/gas/testsuite/gas/mips/mips32@isa-override-2.l
new file mode 100644
index 0000000..2f693d6
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips32@isa-override-2.l
@@ -0,0 +1,4 @@
+.*: Assembler messages:
+.*:5: Error: opcode not supported on this processor: mips32 \(mips32\) `dli \$2,0x9000000080000000'
+.*:10: Error: opcode not supported on this processor: mips32 \(mips32\) `dli \$2,0x9000000080000000'
+.*:13: Error: opcode not supported on this processor: mips32 \(mips32\) `dli \$2,0x9000000080000000'
diff --git a/gas/testsuite/gas/mips/mips32@isa-override-2.s b/gas/testsuite/gas/mips/mips32@isa-override-2.s
new file mode 100644
index 0000000..402c118
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips32@isa-override-2.s
@@ -0,0 +1,18 @@
+	.text
+	.globl	foo
+	.ent	foo
+foo:
+	dli	$2, 0x9000000080000000
+	.set	push
+	.set	mips3
+	dli	$2, 0x9000000080000000
+	.set	mips0
+	dli	$2, 0x9000000080000000
+	.set	mips3
+	.set	pop
+	dli	$2, 0x9000000080000000
+	.end	foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/mips32r2@isa-override-1.d b/gas/testsuite/gas/mips/mips32r2@isa-override-1.d
new file mode 100644
index 0000000..0ab21b9
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips32r2@isa-override-1.d
@@ -0,0 +1,50 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: isa-override-1.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 44e11000 	mthc1	at,\$f2
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
+[0-9a-f]+ <[^>]*> dc820000 	ldc3	\$2,0\(a0\)
+[0-9a-f]+ <[^>]*> 340189ab 	li	at,0x89ab
+[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> 3c029000 	lui	v0,0x9000
+[0-9a-f]+ <[^>]*> 00021438 	0x21438
+[0-9a-f]+ <[^>]*> 34428000 	ori	v0,v0,0x8000
+[0-9a-f]+ <[^>]*> 00021438 	0x21438
+[0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 342189ab 	ori	at,at,0x89ab
+[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 44a11000 	0x44a11000
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 44e11000 	mthc1	at,\$f2
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 44e11000 	mthc1	at,\$f2
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips32r2@isa-override-2.l b/gas/testsuite/gas/mips/mips32r2@isa-override-2.l
new file mode 100644
index 0000000..d4d4aea
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips32r2@isa-override-2.l
@@ -0,0 +1,4 @@
+.*: Assembler messages:
+.*:5: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dli \$2,0x9000000080000000'
+.*:10: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dli \$2,0x9000000080000000'
+.*:13: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dli \$2,0x9000000080000000'
diff --git a/gas/testsuite/gas/mips/mips32r2@isa-override-2.s b/gas/testsuite/gas/mips/mips32r2@isa-override-2.s
new file mode 100644
index 0000000..402c118
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips32r2@isa-override-2.s
@@ -0,0 +1,18 @@
+	.text
+	.globl	foo
+	.ent	foo
+foo:
+	dli	$2, 0x9000000080000000
+	.set	push
+	.set	mips3
+	dli	$2, 0x9000000080000000
+	.set	mips0
+	dli	$2, 0x9000000080000000
+	.set	mips3
+	.set	pop
+	dli	$2, 0x9000000080000000
+	.end	foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/mips32r3@isa-override-1.d b/gas/testsuite/gas/mips/mips32r3@isa-override-1.d
new file mode 100644
index 0000000..5aa2f5b
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips32r3@isa-override-1.d
@@ -0,0 +1,5 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: isa-override-1.s
+#dump: mips32r2@isa-override-1.d
diff --git a/gas/testsuite/gas/mips/mips32r3@isa-override-2.l b/gas/testsuite/gas/mips/mips32r3@isa-override-2.l
new file mode 100644
index 0000000..a32137d
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips32r3@isa-override-2.l
@@ -0,0 +1,4 @@
+.*: Assembler messages:
+.*:5: Error: opcode not supported on this processor: mips32r3 \(mips32r3\) `dli \$2,0x9000000080000000'
+.*:10: Error: opcode not supported on this processor: mips32r3 \(mips32r3\) `dli \$2,0x9000000080000000'
+.*:13: Error: opcode not supported on this processor: mips32r3 \(mips32r3\) `dli \$2,0x9000000080000000'
diff --git a/gas/testsuite/gas/mips/mips32r3@isa-override-2.s b/gas/testsuite/gas/mips/mips32r3@isa-override-2.s
new file mode 100644
index 0000000..402c118
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips32r3@isa-override-2.s
@@ -0,0 +1,18 @@
+	.text
+	.globl	foo
+	.ent	foo
+foo:
+	dli	$2, 0x9000000080000000
+	.set	push
+	.set	mips3
+	dli	$2, 0x9000000080000000
+	.set	mips0
+	dli	$2, 0x9000000080000000
+	.set	mips3
+	.set	pop
+	dli	$2, 0x9000000080000000
+	.end	foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/mips32r5@isa-override-1.d b/gas/testsuite/gas/mips/mips32r5@isa-override-1.d
new file mode 100644
index 0000000..5aa2f5b
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips32r5@isa-override-1.d
@@ -0,0 +1,5 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: isa-override-1.s
+#dump: mips32r2@isa-override-1.d
diff --git a/gas/testsuite/gas/mips/mips32r5@isa-override-2.l b/gas/testsuite/gas/mips/mips32r5@isa-override-2.l
new file mode 100644
index 0000000..dedc04f
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips32r5@isa-override-2.l
@@ -0,0 +1,4 @@
+.*: Assembler messages:
+.*:5: Error: opcode not supported on this processor: mips32r5 \(mips32r5\) `dli \$2,0x9000000080000000'
+.*:10: Error: opcode not supported on this processor: mips32r5 \(mips32r5\) `dli \$2,0x9000000080000000'
+.*:13: Error: opcode not supported on this processor: mips32r5 \(mips32r5\) `dli \$2,0x9000000080000000'
diff --git a/gas/testsuite/gas/mips/mips32r5@isa-override-2.s b/gas/testsuite/gas/mips/mips32r5@isa-override-2.s
new file mode 100644
index 0000000..402c118
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips32r5@isa-override-2.s
@@ -0,0 +1,18 @@
+	.text
+	.globl	foo
+	.ent	foo
+foo:
+	dli	$2, 0x9000000080000000
+	.set	push
+	.set	mips3
+	dli	$2, 0x9000000080000000
+	.set	mips0
+	dli	$2, 0x9000000080000000
+	.set	mips3
+	.set	pop
+	dli	$2, 0x9000000080000000
+	.end	foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/mips32r6@isa-override-1.d b/gas/testsuite/gas/mips/mips32r6@isa-override-1.d
new file mode 100644
index 0000000..5aa2f5b
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips32r6@isa-override-1.d
@@ -0,0 +1,5 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: isa-override-1.s
+#dump: mips32r2@isa-override-1.d
diff --git a/gas/testsuite/gas/mips/mips32r6@isa-override-2.l b/gas/testsuite/gas/mips/mips32r6@isa-override-2.l
new file mode 100644
index 0000000..dda7cdf
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips32r6@isa-override-2.l
@@ -0,0 +1,4 @@
+.*: Assembler messages:
+.*:5: Error: opcode not supported on this processor: mips32r6 \(mips32r6\) `dli \$2,0x9000000080000000'
+.*:10: Error: opcode not supported on this processor: mips32r6 \(mips32r6\) `dli \$2,0x9000000080000000'
+.*:13: Error: opcode not supported on this processor: mips32r6 \(mips32r6\) `dli \$2,0x9000000080000000'
diff --git a/gas/testsuite/gas/mips/mips32r6@isa-override-2.s b/gas/testsuite/gas/mips/mips32r6@isa-override-2.s
new file mode 100644
index 0000000..402c118
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips32r6@isa-override-2.s
@@ -0,0 +1,18 @@
+	.text
+	.globl	foo
+	.ent	foo
+foo:
+	dli	$2, 0x9000000080000000
+	.set	push
+	.set	mips3
+	dli	$2, 0x9000000080000000
+	.set	mips0
+	dli	$2, 0x9000000080000000
+	.set	mips3
+	.set	pop
+	dli	$2, 0x9000000080000000
+	.end	foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/mips64r2@isa-override-1.d b/gas/testsuite/gas/mips/mips64r2@isa-override-1.d
new file mode 100644
index 0000000..d53fb2c
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips64r2@isa-override-1.d
@@ -0,0 +1,50 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: isa-override-1.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 44e11000 	mthc1	at,\$f2
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
+[0-9a-f]+ <[^>]*> dc820000 	ld	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 340189ab 	li	at,0x89ab
+[0-9a-f]+ <[^>]*> 00010c38 	dsll	at,at,0x10
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> 3c029000 	lui	v0,0x9000
+[0-9a-f]+ <[^>]*> 00021438 	dsll	v0,v0,0x10
+[0-9a-f]+ <[^>]*> 34428000 	ori	v0,v0,0x8000
+[0-9a-f]+ <[^>]*> 00021438 	dsll	v0,v0,0x10
+[0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 00010c38 	dsll	at,at,0x10
+[0-9a-f]+ <[^>]*> 342189ab 	ori	at,at,0x89ab
+[0-9a-f]+ <[^>]*> 00010c38 	dsll	at,at,0x10
+[0-9a-f]+ <[^>]*> 44a11000 	dmtc1	at,\$f2
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 44e11000 	mthc1	at,\$f2
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
+[0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
+[0-9a-f]+ <[^>]*> 44e11000 	mthc1	at,\$f2
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips64r3@isa-override-1.d b/gas/testsuite/gas/mips/mips64r3@isa-override-1.d
new file mode 100644
index 0000000..79873cc
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips64r3@isa-override-1.d
@@ -0,0 +1,5 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: isa-override-1.s
+#dump: mips64r2@isa-override-1.d
diff --git a/gas/testsuite/gas/mips/mips64r5@isa-override-1.d b/gas/testsuite/gas/mips/mips64r5@isa-override-1.d
new file mode 100644
index 0000000..79873cc
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips64r5@isa-override-1.d
@@ -0,0 +1,5 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: isa-override-1.s
+#dump: mips64r2@isa-override-1.d
diff --git a/gas/testsuite/gas/mips/mips64r6@isa-override-1.d b/gas/testsuite/gas/mips/mips64r6@isa-override-1.d
new file mode 100644
index 0000000..79873cc
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips64r6@isa-override-1.d
@@ -0,0 +1,5 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: isa-override-1.s
+#dump: mips64r2@isa-override-1.d
diff --git a/gas/testsuite/gas/mips/octeon3@isa-override-1.d b/gas/testsuite/gas/mips/octeon3@isa-override-1.d
new file mode 100644
index 0000000..dc3e9c5
--- /dev/null
+++ b/gas/testsuite/gas/mips/octeon3@isa-override-1.d
@@ -0,0 +1,6 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: isa-override-1.s
+#stderr: octeon3@isa-override-1.l
+#dump: mips64r2@isa-override-1.d
diff --git a/gas/testsuite/gas/mips/octeon3@isa-override-1.l b/gas/testsuite/gas/mips/octeon3@isa-override-1.l
new file mode 100644
index 0000000..3774f17
--- /dev/null
+++ b/gas/testsuite/gas/mips/octeon3@isa-override-1.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*:10: Warning: the `virt' extension requires MIPS64 revision 2 or greater
diff --git a/gas/testsuite/gas/mips/octeon3@isa-override-2.l b/gas/testsuite/gas/mips/octeon3@isa-override-2.l
new file mode 100644
index 0000000..6ca0d8d
--- /dev/null
+++ b/gas/testsuite/gas/mips/octeon3@isa-override-2.l
@@ -0,0 +1,5 @@
+.*: Assembler messages:
+.*:5: Error: number \(0x9000000080000000\) larger than 32 bits
+.*:7: Warning: the `virt' extension requires MIPS64 revision 2 or greater
+.*:10: Error: number \(0x9000000080000000\) larger than 32 bits
+.*:13: Error: number \(0x9000000080000000\) larger than 32 bits
diff --git a/gas/testsuite/gas/mips/octeon3@isa-override-2.s b/gas/testsuite/gas/mips/octeon3@isa-override-2.s
new file mode 100644
index 0000000..402c118
--- /dev/null
+++ b/gas/testsuite/gas/mips/octeon3@isa-override-2.s
@@ -0,0 +1,18 @@
+	.text
+	.globl	foo
+	.ent	foo
+foo:
+	dli	$2, 0x9000000080000000
+	.set	push
+	.set	mips3
+	dli	$2, 0x9000000080000000
+	.set	mips0
+	dli	$2, 0x9000000080000000
+	.set	mips3
+	.set	pop
+	dli	$2, 0x9000000080000000
+	.end	foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/octeon@isa-override-1.d b/gas/testsuite/gas/mips/octeon@isa-override-1.d
new file mode 100644
index 0000000..79873cc
--- /dev/null
+++ b/gas/testsuite/gas/mips/octeon@isa-override-1.d
@@ -0,0 +1,5 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: isa-override-1.s
+#dump: mips64r2@isa-override-1.d
diff --git a/gas/testsuite/gas/mips/r3000@isa-override-1.d b/gas/testsuite/gas/mips/r3000@isa-override-1.d
new file mode 100644
index 0000000..8e090ef
--- /dev/null
+++ b/gas/testsuite/gas/mips/r3000@isa-override-1.d
@@ -0,0 +1,5 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: isa-override-1.s
+#dump: mips1@isa-override-1.d
diff --git a/gas/testsuite/gas/mips/r3000@isa-override-2.l b/gas/testsuite/gas/mips/r3000@isa-override-2.l
new file mode 100644
index 0000000..2ec6684
--- /dev/null
+++ b/gas/testsuite/gas/mips/r3000@isa-override-2.l
@@ -0,0 +1,4 @@
+.*: Assembler messages:
+.*:5: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000'
+.*:10: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000'
+.*:13: Error: opcode not supported on this processor: mips1 \(mips1\) `dli \$2,0x9000000080000000'
diff --git a/gas/testsuite/gas/mips/r3000@isa-override-2.s b/gas/testsuite/gas/mips/r3000@isa-override-2.s
new file mode 100644
index 0000000..402c118
--- /dev/null
+++ b/gas/testsuite/gas/mips/r3000@isa-override-2.s
@@ -0,0 +1,18 @@
+	.text
+	.globl	foo
+	.ent	foo
+foo:
+	dli	$2, 0x9000000080000000
+	.set	push
+	.set	mips3
+	dli	$2, 0x9000000080000000
+	.set	mips0
+	dli	$2, 0x9000000080000000
+	.set	mips3
+	.set	pop
+	dli	$2, 0x9000000080000000
+	.end	foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/r3900@isa-override-1.d b/gas/testsuite/gas/mips/r3900@isa-override-1.d
new file mode 100644
index 0000000..8e090ef
--- /dev/null
+++ b/gas/testsuite/gas/mips/r3900@isa-override-1.d
@@ -0,0 +1,5 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: isa-override-1.s
+#dump: mips1@isa-override-1.d
diff --git a/gas/testsuite/gas/mips/r3900@isa-override-2.l b/gas/testsuite/gas/mips/r3900@isa-override-2.l
new file mode 100644
index 0000000..18c982a
--- /dev/null
+++ b/gas/testsuite/gas/mips/r3900@isa-override-2.l
@@ -0,0 +1,4 @@
+.*: Assembler messages:
+.*:5: Error: opcode not supported on this processor: r3900 \(mips1\) `dli \$2,0x9000000080000000'
+.*:10: Error: opcode not supported on this processor: r3900 \(mips1\) `dli \$2,0x9000000080000000'
+.*:13: Error: opcode not supported on this processor: r3900 \(mips1\) `dli \$2,0x9000000080000000'
diff --git a/gas/testsuite/gas/mips/r3900@isa-override-2.s b/gas/testsuite/gas/mips/r3900@isa-override-2.s
new file mode 100644
index 0000000..402c118
--- /dev/null
+++ b/gas/testsuite/gas/mips/r3900@isa-override-2.s
@@ -0,0 +1,18 @@
+	.text
+	.globl	foo
+	.ent	foo
+foo:
+	dli	$2, 0x9000000080000000
+	.set	push
+	.set	mips3
+	dli	$2, 0x9000000080000000
+	.set	mips0
+	dli	$2, 0x9000000080000000
+	.set	mips3
+	.set	pop
+	dli	$2, 0x9000000080000000
+	.end	foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/r5900@isa-override-1.d b/gas/testsuite/gas/mips/r5900@isa-override-1.d
new file mode 100644
index 0000000..7e9c0e2
--- /dev/null
+++ b/gas/testsuite/gas/mips/r5900@isa-override-1.d
@@ -0,0 +1,28 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> dc820000 	ld	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 340189ab 	li	at,0x89ab
+[0-9a-f]+ <[^>]*> 00010c38 	dsll	at,at,0x10
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> 3c029000 	lui	v0,0x9000
+[0-9a-f]+ <[^>]*> 00021438 	dsll	v0,v0,0x10
+[0-9a-f]+ <[^>]*> 34428000 	ori	v0,v0,0x8000
+[0-9a-f]+ <[^>]*> 00021438 	dsll	v0,v0,0x10
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+[0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/r5900@isa-override-1.s b/gas/testsuite/gas/mips/r5900@isa-override-1.s
new file mode 100644
index 0000000..02352f8
--- /dev/null
+++ b/gas/testsuite/gas/mips/r5900@isa-override-1.s
@@ -0,0 +1,23 @@
+	.text
+	.globl	foo
+	.ent	foo
+foo:
+	ld	$2, 0($4)
+	or	$2, 0x89ab0000
+	.set	push
+	.set	mips3
+	ld	$2, 0($4)
+	or	$2, 0x89ab0000
+	dli	$2, 0x9000000080000000
+	.set	mips0
+	ld	$2, 0($4)
+	or	$2, 0x89ab0000
+	.set	mips3
+	.set	pop
+	ld	$2, 0($4)
+	or	$2, 0x89ab0000
+	.end	foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16