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author | Alexandre Oliva <aoliva@redhat.com> | 2000-06-22 20:42:34 +0000 |
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committer | Alexandre Oliva <aoliva@redhat.com> | 2000-06-22 20:42:34 +0000 |
commit | f9c22bc3a4d6ae79f94ff339404fc0037b065589 (patch) | |
tree | 6bbf648b2a6eb81a68350ae9c3f59c5f3bde5432 | |
parent | ee9a777240baf90e8c9714963fb791884162048c (diff) | |
download | gdb-f9c22bc3a4d6ae79f94ff339404fc0037b065589.zip gdb-f9c22bc3a4d6ae79f94ff339404fc0037b065589.tar.gz gdb-f9c22bc3a4d6ae79f94ff339404fc0037b065589.tar.bz2 |
* armemu.c (Multiply64): Fix computation of flag N.
-rw-r--r-- | sim/arm/ChangeLog | 2 | ||||
-rw-r--r-- | sim/arm/armemu.c | 7 |
2 files changed, 5 insertions, 4 deletions
diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index 4780f0a..c0990c7 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,5 +1,7 @@ 2000-06-22 Alexandre Oliva <aoliva@cygnus.com> + * armemu.c (Multiply64): Fix computation of flag N. + * armemu.c (MultiplyAdd64): Fix computation of flag N. 2000-06-20 Alexandre Oliva <aoliva@cygnus.com> diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c index 426617d..e4e963b 100644 --- a/sim/arm/armemu.c +++ b/sim/arm/armemu.c @@ -3819,10 +3819,9 @@ Multiply64 (ARMul_State * state, ARMword instr, int msigned, int scc) if (scc) { - if ((RdHi == 0) && (RdLo == 0)) - ARMul_NegZero (state, RdHi); /* zero value */ - else - ARMul_NegZero (state, scc); /* non-zero value */ + /* Ensure that both RdHi and RdLo are used to compute Z, but + don't let RdLo's sign bit make it to N. */ + ARMul_NegZero (state, RdHi | (RdLo >> 16) | (RdLo & 0xFFFF)); } /* The cycle count depends on whether the instruction is a signed or |