Fix spurious check-ld failures on aarch64-elf

ld/
	* testsuite/ld-aarch64/ifunc-1-local.d: Adjust regexps to match
	the offsets emitted by aarch64-elf configurations.
	* testsuite/ld-aarch64/ifunc-1.d: Likewise.
	* testsuite/ld-aarch64/ifunc-2-local.d: Likewise.
	* testsuite/ld-aarch64/ifunc-2.d: Likewise.
	* testsuite/ld-aarch64/ifunc-21.d: Likewise.
	* testsuite/ld-aarch64/ifunc-3a.d: Likewise.

(cherry picked from commit c198a1ecf835c5896ef810ebe1ded06729039dcd)

7 files changed, 24 insertions, 14 deletions

diff --git a/ld/ChangeLog b/ld/ChangeLog
index cfadbd4..b110e6b 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,13 @@
+2018-08-01  Roland McGrath  <mcgrathr@google.com>
+
+	* testsuite/ld-aarch64/ifunc-1-local.d: Adjust regexps to match
+	the offsets emitted by aarch64-elf configurations.
+	* testsuite/ld-aarch64/ifunc-1.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-2-local.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-2.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-21.d: Likewise.
+	* testsuite/ld-aarch64/ifunc-3a.d: Likewise.
+
 2018-07-23  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR ld/23428
diff --git a/ld/testsuite/ld-aarch64/ifunc-1-local.d b/ld/testsuite/ld-aarch64/ifunc-1-local.d
index bcba0aa..1783637 100644
--- a/ld/testsuite/ld-aarch64/ifunc-1-local.d
+++ b/ld/testsuite/ld-aarch64/ifunc-1-local.d
@@ -3,7 +3,7 @@
 #target: aarch64*-*-*
 
 #...
-0+(110|180) <__GI_foo>:
+0+(110|180|1a0) <(__GI_)?foo>:
 #...
-[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+(0x110|0x180)@plt>
+[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+(0x110|0x180|0x1a0)@plt>
 #pass
diff --git a/ld/testsuite/ld-aarch64/ifunc-1.d b/ld/testsuite/ld-aarch64/ifunc-1.d
index f408bff..0274ac0 100644
--- a/ld/testsuite/ld-aarch64/ifunc-1.d
+++ b/ld/testsuite/ld-aarch64/ifunc-1.d
@@ -3,7 +3,7 @@
 #target: aarch64*-*-*
 
 #...
-0+(130|1a0) <foo>:
+0+(130|1a0|1c8) <foo>:
 #...
-[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(130|1a0)@plt>
+[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(130|1a0|1c8)@plt>
 #pass
diff --git a/ld/testsuite/ld-aarch64/ifunc-2-local.d b/ld/testsuite/ld-aarch64/ifunc-2-local.d
index fb1bb40..a3d9e15 100644
--- a/ld/testsuite/ld-aarch64/ifunc-2-local.d
+++ b/ld/testsuite/ld-aarch64/ifunc-2-local.d
@@ -3,9 +3,9 @@
 #target: aarch64*-*-*
 
 #...
-0+(110|180) <__GI_foo>:
+0+(110|180|1a0) <__GI_foo>:
 #...
-[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(110|180)@plt>
+[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(110|180|1a0)@plt>
 [ \t0-9a-f]+:[ \t0-9a-f]+adrp[ \t]+x0, 0 <.*>
-[ \t0-9a-f]+:[ \t0-9a-f]+add[ \t]+x0, x0, #0x(100|170)
+[ \t0-9a-f]+:[ \t0-9a-f]+add[ \t]+x0, x0, #0x(100|170|190)
 #pass
diff --git a/ld/testsuite/ld-aarch64/ifunc-2.d b/ld/testsuite/ld-aarch64/ifunc-2.d
index 16c75ea..eb6fa0c 100644
--- a/ld/testsuite/ld-aarch64/ifunc-2.d
+++ b/ld/testsuite/ld-aarch64/ifunc-2.d
@@ -3,9 +3,9 @@
 #target: aarch64*-*-*
 
 #...
-0+(130|1a0) <foo>:
+0+(130|1a0|1c8) <foo>:
 #...
-[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(130|1a0)@plt>
+[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(130|1a0|1c8)@plt>
 [ \t0-9a-f]+:[ \t0-9a-f]+adrp[ \t]+x0, 0 <.*>
-[ \t0-9a-f]+:[ \t0-9a-f]+add[ \t]+x0, x0, #0x(120|190)
+[ \t0-9a-f]+:[ \t0-9a-f]+add[ \t]+x0, x0, #0x(120|190|1b8)
 #pass
diff --git a/ld/testsuite/ld-aarch64/ifunc-21.d b/ld/testsuite/ld-aarch64/ifunc-21.d
index b501bd6..a16186b 100644
--- a/ld/testsuite/ld-aarch64/ifunc-21.d
+++ b/ld/testsuite/ld-aarch64/ifunc-21.d
@@ -11,7 +11,7 @@ Contents of section .text:
  [0-9a-f]+ .*
 Contents of section .got.plt:
  [0-9a-f]+ 0+ 0+ 0+ 0+  .*
- 10298 0+ 0+ [0-9a-f]+ [0-9a-f]+  .*
+ (10298|102b8) 0+ 0+ [0-9a-f]+ [0-9a-f]+  .*
 
 Disassembly of section .text:
 
@@ -20,7 +20,7 @@ Disassembly of section .text:
 
 .* <bar>:
  .*:	90000080 	adrp	x0, 10000 <.*>
- .*:	.* 	ldr	x0, \[x0, #672\]
+ .*:	.* 	ldr	x0, \[x0, #(672|704)\]
  .*:	d65f03c0 	ret
 
 #pass
diff --git a/ld/testsuite/ld-aarch64/ifunc-3a.d b/ld/testsuite/ld-aarch64/ifunc-3a.d
index a01a75c..4919d96 100644
--- a/ld/testsuite/ld-aarch64/ifunc-3a.d
+++ b/ld/testsuite/ld-aarch64/ifunc-3a.d
@@ -4,7 +4,7 @@
 #target: aarch64*-*-*
 
 #...
-0+(150|1d0) <__GI_foo>:
+0+(150|1d0|1e8) <__GI_foo>:
 #...
-[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(150|1d0)@plt>
+[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(150|1d0|1e8)@plt>
 #pass