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author | Nelson Chu <nelson.chu@sifive.com> | 2020-04-21 14:42:20 +0800 |
---|---|---|
committer | Nelson Chu <nelson.chu@sifive.com> | 2021-10-28 08:50:29 +0800 |
commit | 41675fa0dfbb7cc7f1503bc3946bab085b8e5072 (patch) | |
tree | 035eb9d29ac37606cc5068368ef4c71edf74b879 | |
parent | b0643c17a2f89eacb65f5789f757a4fe6c61adbe (diff) | |
download | gdb-41675fa0dfbb7cc7f1503bc3946bab085b8e5072.zip gdb-41675fa0dfbb7cc7f1503bc3946bab085b8e5072.tar.gz gdb-41675fa0dfbb7cc7f1503bc3946bab085b8e5072.tar.bz2 |
RISC-V/zfh: Support .float16 directive for assembler.
This probably need to be sent to mainline rather than here.
gas/
* config/tc-riscv.c (FLT_CHARS): Added h and H.
(riscv_pseudo_table): Added .float16.
* read.c (hex_float): Handle case 'h' and 'H'.
* testsuite/gas/riscv/extended/extended.exp: Updated.
* testsuite/gas/riscv/extended/float16.d: New testcase.
* testsuite/gas/riscv/extended/float16.s: Likewise.
-rw-r--r-- | gas/config/tc-riscv.c | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/extended/extended.exp | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/extended/float16.d | 10 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/extended/float16.s | 21 |
4 files changed, 34 insertions, 1 deletions
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index ad50eda..e29c00d 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -462,7 +462,7 @@ const char EXP_CHARS[] = "eE"; /* Chars that mean this number is a floating point constant. As in 0f12.456 or 0d1.2345e12. */ -const char FLT_CHARS[] = "rRsSfFdDxXpP"; +const char FLT_CHARS[] = "rRsSfFdDxXpPhH"; /* Indicate we are already assemble any instructions or not. */ static bool start_assemble = false; @@ -4677,6 +4677,7 @@ static const pseudo_typeS riscv_pseudo_table[] = {"sleb128", s_riscv_leb128, 1}, {"insn", s_riscv_insn, 0}, {"attribute", s_riscv_attribute, 0}, + {"float16", float_cons, 'h'}, { NULL, NULL, 0 }, }; diff --git a/gas/testsuite/gas/riscv/extended/extended.exp b/gas/testsuite/gas/riscv/extended/extended.exp index 3ad8833..2b36cc5 100644 --- a/gas/testsuite/gas/riscv/extended/extended.exp +++ b/gas/testsuite/gas/riscv/extended/extended.exp @@ -32,6 +32,7 @@ if [istarget riscv*-*-*] { run_dump_tests "vector-insns-fail-permutation" run_dump_tests "vector-insns-fail-zvamo" run_dump_tests "fp-zfh-insns" + run_dump_tests "float16" run_dump_tests "extended-csr" } diff --git a/gas/testsuite/gas/riscv/extended/float16.d b/gas/testsuite/gas/riscv/extended/float16.d new file mode 100644 index 0000000..e75971d --- /dev/null +++ b/gas/testsuite/gas/riscv/extended/float16.d @@ -0,0 +1,10 @@ +# source: float16.s +# objdump: -sj .data +# as: + +.*:[ ]+file format .* + +Contents of section \.data: + 0000 004adf2f 191cff7b 0100ff03 0004003c.* + 0010 013cff7f 007c00fc 00000080 00bce7bb.* + 0020 fffb0042 004a3e60 007e017e.* diff --git a/gas/testsuite/gas/riscv/extended/float16.s b/gas/testsuite/gas/riscv/extended/float16.s new file mode 100644 index 0000000..709ea0a --- /dev/null +++ b/gas/testsuite/gas/riscv/extended/float16.s @@ -0,0 +1,21 @@ +.data + .float16 12.0 + .float16 0.123 + .float16 0.004 + .float16 65504 + .float16 5.9605e-8 + .float16 6.0976e-5 + .float16 6.1035e-5 + .float16 1 + .float16 1.001 + .float16 NaN + .float16 +Inf + .float16 -Inf + .float16 +0 + .float16 -0 + .float16 -1 + .float16 -0.98765 + .float16 -65504 + .float16 3.0, 12.0, 543.123 + .float16 0h:7e00 # qNaNh + .float16 0h:7e01 # sNaNh |