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author | H.J. Lu <hjl.tools@gmail.com> | 2012-11-20 14:21:33 +0000 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2012-11-20 14:21:33 +0000 |
commit | 9b30cccca992d4014903b186428f5a7250a2fdda (patch) | |
tree | 1b60aca48d3a3f103da95b85b5a84d05cdba6be3 | |
parent | 0b7fe784ac28f5add04161a99e0eac73db7cbdf3 (diff) | |
download | gdb-9b30cccca992d4014903b186428f5a7250a2fdda.zip gdb-9b30cccca992d4014903b186428f5a7250a2fdda.tar.gz gdb-9b30cccca992d4014903b186428f5a7250a2fdda.tar.bz2 |
Fix opcode for 64-bit jecxz
gas/testsuite/
PR gas/14859
* gas/i386/x86-64-opcode.s: Add jecxz.
* gas/i386/x86-64-opcode.d: Updated.
opcodes/
PR gas/14859
* i386-opc.tbl: Fix opcode for 64-bit jecxz.
* i386-tbl.h: Regenerated.
-rw-r--r-- | gas/ChangeLog | 6 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-opcode.d | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-opcode.s | 2 | ||||
-rw-r--r-- | opcodes/ChangeLog | 7 | ||||
-rw-r--r-- | opcodes/i386-opc.tbl | 2 | ||||
-rw-r--r-- | opcodes/i386-tbl.h | 2 |
6 files changed, 18 insertions, 2 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 33cb949..bcf76b8 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2012-11-20 H.J. Lu <hongjiu.lu@intel.com> + + PR gas/14859 + * gas/i386/x86-64-opcode.s: Add jecxz. + * gas/i386/x86-64-opcode.d: Updated. + 2012-11-20 Yufeng Zhang <yufeng.zhang@arm.com> * config/tc-aarch64.c (first_error_fmt): Add ATTRIBUTE_UNUSED to the diff --git a/gas/testsuite/gas/i386/x86-64-opcode.d b/gas/testsuite/gas/i386/x86-64-opcode.d index 7c6dd03..4b3003a 100644 --- a/gas/testsuite/gas/i386/x86-64-opcode.d +++ b/gas/testsuite/gas/i386/x86-64-opcode.d @@ -296,4 +296,5 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f 07 sysret [ ]*[a-f0-9]+: 0f 01 f8 swapgs [ ]*[a-f0-9]+: 66 68 22 22 pushw \$0x2222 +[ ]*[a-f0-9]+: 67 e3 ff jecxz 0x49d #pass diff --git a/gas/testsuite/gas/i386/x86-64-opcode.s b/gas/testsuite/gas/i386/x86-64-opcode.s index cb9bbc1..96f624d 100644 --- a/gas/testsuite/gas/i386/x86-64-opcode.s +++ b/gas/testsuite/gas/i386/x86-64-opcode.s @@ -424,3 +424,5 @@ swapgs # -- -- -- -- 0F 01 f8 pushw $0x2222 + + jecxz .+2 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 4849206..2540f4d 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2012-11-20 Kirill Yukhin <kirill.yukhin@intel.com> + H.J. Lu <hongjiu.lu@intel.com> + + PR gas/14859 + * i386-opc.tbl: Fix opcode for 64-bit jecxz. + * i386-tbl.h: Regenerated. + 2012-11-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * s390-opc.txt: Fix srstu and strag opcodes. diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 6d2834e..3e871fb 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -390,7 +390,7 @@ jg, 1, 0x7f, None, 1, 0, Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, // jcxz vs. jecxz is chosen on the basis of the address size prefix. jcxz, 1, 0xe3, None, 1, CpuNo64, JumpByte|Size16|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp16|Disp32 } jecxz, 1, 0xe3, None, 1, CpuNo64, JumpByte|Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp16|Disp32 } -jecxz, 1, 0x67e3, None, 2, Cpu64, JumpByte|Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp32|Disp32S } +jecxz, 1, 0xe3, None, 1, Cpu64, JumpByte|Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp32|Disp32S } jrcxz, 1, 0xe3, None, 1, Cpu64, JumpByte|Size64|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Disp8|Disp32|Disp32S } // The loop instructions also use the address size prefix to select diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index e151afa..257f8b1 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -3417,7 +3417,7 @@ const insn_template i386_optab[] = { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "jecxz", 1, 0x67e3, None, 2, + { "jecxz", 1, 0xe3, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |