aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorYufeng Zhang <yufeng.zhang@arm.com>2012-10-15 14:57:31 +0000
committerYufeng Zhang <yufeng.zhang@arm.com>2012-10-15 14:57:31 +0000
commit9b61754a3febc596d5fbe4b7b6ac073aa28dae9b (patch)
tree4ee3c02c3f61e7955d6fadb104e0ce21da947ec5
parent9de794e14842cdc778c4ee490e613c7163c5a976 (diff)
downloadgdb-9b61754a3febc596d5fbe4b7b6ac073aa28dae9b.zip
gdb-9b61754a3febc596d5fbe4b7b6ac073aa28dae9b.tar.gz
gdb-9b61754a3febc596d5fbe4b7b6ac073aa28dae9b.tar.bz2
Added the changelog for the previous commit.
-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--opcodes/ChangeLog6
2 files changed, 11 insertions, 0 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 2fa6b8d..ab713ed 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2012-10-15 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * gas/aarch64/illegal-2.s: Add test case.
+ * gas/aarch64/illegal-2.l: Update.
+
2012-10-14 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
* gas/hppa/basic/fmemLRbug.s: Remove double load and store instructions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index db6746a..ad5a070 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2012-10-15 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * aarch64-opc.c (operand_general_constraint_met_p): Change to check
+ the alignment of addr.offset.imm instead of that of shifter.amount for
+ operand type AARCH64_OPND_ADDR_UIMM12.
+
2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* arm-dis.c: Use preferred form of vrint instruction variants