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| author | H.J. Lu <hjl.tools@gmail.com> | 2020-06-26 10:24:59 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2020-06-26 10:25:12 -0700 |
| commit | b6cd5d100a3ecc80f35d667063f94c98bdfbf20a (patch) | |
| tree | d556549a1e8cfe16034d7bb600193b5d409459f8 | |
| parent | e978ad62496d42e20f1b06d5f6a78c67e55b21f9 (diff) | |
| download | gdb-b6cd5d100a3ecc80f35d667063f94c98bdfbf20a.zip gdb-b6cd5d100a3ecc80f35d667063f94c98bdfbf20a.tar.gz gdb-b6cd5d100a3ecc80f35d667063f94c98bdfbf20a.tar.bz2 | |
x86: Process ImmExt without operands
To support Intel AMX instructions with 8-bit immediate opcode extension,
but without operands:
tilerelease, 0, 0x49, 0xc0, 1, CpuAMX_TILE|Cpu64, Vex|VexOpcode=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 }
process ImmExt without operands.
* config/tc-i386.c (md_assemble): Process ImmExt without
operands.
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/config/tc-i386.c | 6 |
2 files changed, 10 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index a5ffe08..af34ad8 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,10 @@ 2020-06-26 H.J. Lu <hongjiu.lu@intel.com> + * config/tc-i386.c (md_assemble): Process ImmExt without + operands. + +2020-06-26 H.J. Lu <hongjiu.lu@intel.com> + * config/tc-i386.c (check_VecOperands): Replace vecsib with sib. Replace VecSIB128, VecSIB256 and VecSIB512 with VECSIB128, VECSIB256 and VECSIB512, respectively. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index bae9680..ae2a2c1 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -4873,8 +4873,12 @@ md_assemble (char *line) if (!process_operands ()) return; } - else if (!quiet_warnings && i.tm.opcode_modifier.ugh) + else { + if (i.tm.opcode_modifier.immext) + process_immext (); + + if (!quiet_warnings && i.tm.opcode_modifier.ugh) /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc. */ as_warn (_("translating to `%sp'"), i.tm.name); } |