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author | Jan Beulich <jbeulich@suse.com> | 2020-06-26 16:42:55 +0200 |
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committer | Jan Beulich <jbeulich@suse.com> | 2020-06-26 16:42:55 +0200 |
commit | 2a1bb84c67d974b10f2ea76f8ed43244f19ed21e (patch) | |
tree | 2325a9a4109ea5199526833165a56fb365ad81dc | |
parent | f53b3eeb677aace413d45b4b3c9d23d57d7167fc (diff) | |
download | gdb-2a1bb84c67d974b10f2ea76f8ed43244f19ed21e.zip gdb-2a1bb84c67d974b10f2ea76f8ed43244f19ed21e.tar.gz gdb-2a1bb84c67d974b10f2ea76f8ed43244f19ed21e.tar.bz2 |
x86: fix processing of -M disassembler option
Multiple -M options can be specified in any order. Therefore stright
assignment to fields affected needs to be avoided, such that earlier
options' effects won't be discarded. This was in particular a problem
for -Msuffix followed by certain of the other sub-options.
While updating documentation, take the liberty and also drop the
redundant mentioning of being able to comma-separate multiple options.
-rw-r--r-- | binutils/ChangeLog | 5 | ||||
-rw-r--r-- | binutils/doc/binutils.texi | 9 | ||||
-rw-r--r-- | gas/ChangeLog | 5 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/i386.exp | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/nop-1-suffix.d | 60 | ||||
-rw-r--r-- | opcodes/ChangeLog | 5 | ||||
-rw-r--r-- | opcodes/i386-dis.c | 6 |
7 files changed, 84 insertions, 7 deletions
diff --git a/binutils/ChangeLog b/binutils/ChangeLog index 2009fc1..6db2be3 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,3 +1,8 @@ +2020-06-26 Jan Beulich <jbeulich@suse.com> + + * doc/binutils.texi: Adjust description of x86's -Msuffix. Drop + redundant text from x86 specific part of -M section. + 2020-06-26 Pat Bernardi <bernardi@adacore.com> * readelf.c (display_m68k_gnu_attribute): New function. diff --git a/binutils/doc/binutils.texi b/binutils/doc/binutils.texi index 2cf8187..b93cde0 100644 --- a/binutils/doc/binutils.texi +++ b/binutils/doc/binutils.texi @@ -2471,8 +2471,7 @@ option or whether instruction notes should be generated as comments in the disasssembly using @option{-M notes}. For the x86, some of the options duplicate functions of the @option{-m} -switch, but allow finer grained control. Multiple selections from the -following may be specified as a comma separated string. +switch, but allow finer grained control. @table @code @item x86-64 @itemx i386 @@ -2503,8 +2502,10 @@ will be overridden if @code{x86-64}, @code{i386} or @code{i8086} appear later in the option string. @item suffix -When in AT&T mode, instructs the disassembler to print a mnemonic -suffix even when the suffix could be inferred by the operands. +When in AT&T mode and also for a limited set of instructions when in Intel +mode, instructs the disassembler to print a mnemonic suffix even when the +suffix could be inferred by the operands or, for certain instructions, the +execution mode's defaults. @end table For PowerPC, the @option{-M} argument @option{raw} selects diff --git a/gas/ChangeLog b/gas/ChangeLog index f60fde6..3ad1394 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2020-06-26 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/i386/nop-1-suffix.d: New. + * testsuite/gas/i386/i386.exp: Run new test. + 2020-06-26 Pat Bernardi <bernardi@adacore.com> * config/tc-m68k.c (m68k_elf_gnu_attribute): New function. diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index e567633..6bee5fc 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -502,6 +502,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "align-1b" run_list_test "inval-pseudo" "-al" run_dump_test "nop-1" + run_dump_test "nop-1-suffix" run_dump_test "nop-2" run_dump_test "optimize-1" run_dump_test "optimize-1a" diff --git a/gas/testsuite/gas/i386/nop-1-suffix.d b/gas/testsuite/gas/i386/nop-1-suffix.d new file mode 100644 index 0000000..f9f09fe --- /dev/null +++ b/gas/testsuite/gas/i386/nop-1-suffix.d @@ -0,0 +1,60 @@ +#objdump: -dwMsuffix,i386 +#name: i386 .nops 1 w/ suffix and forced arch +#source: nop-1.s + +.*: +file format .* + + +Disassembly of section .text: + +0+ <single>: + +[a-f0-9]+: 90 nop + +0+1 <pseudo_1>: + +[a-f0-9]+: 90 nop + +0+2 <pseudo_8>: + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 90 nop + +0+a <pseudo_8_4>: + +[a-f0-9]+: 8d 74 26 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d 74 26 00 leal 0x0\(%esi,%eiz,1\),%esi + +0+12 <pseudo_20>: + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b6 00 00 00 00 leal 0x0\(%esi\),%esi + +0+26 <pseudo_30>: + +[a-f0-9]+: eb 1c jmp 44 <pseudo_129> + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +0+44 <pseudo_129>: + +[a-f0-9]+: eb 7f jmp c5 <end> + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi + +[a-f0-9]+: 90 nop + +0+c5 <end>: + +[a-f0-9]+: 31 c0 xorl %eax,%eax +#pass diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index f36ee55..dfc94fb 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2020-06-26 Jan Beulich <jbeulich@suse.com> + + * i386-dis.c: (print_insn): Avoid straight assignment to + priv.orig_sizeflag when processing -M sub-options. + 2020-06-25 Jan Beulich <jbeulich@suse.com> * i386-dis.c: Adjust description of J macro. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 8964832..f57409d 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -11851,17 +11851,17 @@ print_insn (bfd_vma pc, disassemble_info *info) else if (CONST_STRNEQ (p, "x86-64")) { address_mode = mode_64bit; - priv.orig_sizeflag = AFLAG | DFLAG; + priv.orig_sizeflag |= AFLAG | DFLAG; } else if (CONST_STRNEQ (p, "i386")) { address_mode = mode_32bit; - priv.orig_sizeflag = AFLAG | DFLAG; + priv.orig_sizeflag |= AFLAG | DFLAG; } else if (CONST_STRNEQ (p, "i8086")) { address_mode = mode_16bit; - priv.orig_sizeflag = 0; + priv.orig_sizeflag &= ~(AFLAG | DFLAG); } else if (CONST_STRNEQ (p, "intel")) { |