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authorJason Molenda <jmolenda@apple.com>1999-09-13 21:40:00 +0000
committerJason Molenda <jmolenda@apple.com>1999-09-13 21:40:00 +0000
commitcff3e48be70e018476521d0f62705c29f4112771 (patch)
tree09899684e1ac06491418cb186525498ba0a60544
parent59f2c4e703f7c5f894322210c24e0ffc4c1c56eb (diff)
downloadgdb-cff3e48be70e018476521d0f62705c29f4112771.zip
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import gdb-1999-09-13 snapshot
-rw-r--r--gdb/ChangeLog46
-rw-r--r--gdb/Makefile.in4
-rw-r--r--gdb/config/pa/tm-hppa64.h2
-rw-r--r--gdb/d10v-tdep.c14
-rw-r--r--gdb/event-loop.c37
-rw-r--r--gdb/event-loop.h7
-rwxr-xr-xgdb/gdbarch.sh123
-rw-r--r--gdb/i387-tdep.c2
-rw-r--r--gdb/m32r-tdep.c4
-rw-r--r--gdb/remote.c4
-rw-r--r--gdb/testsuite/ChangeLog5
-rw-r--r--gdb/testsuite/gdb.base/long_long.exp66
-rw-r--r--sim/d10v/ChangeLog22
-rw-r--r--sim/d10v/interp.c95
-rw-r--r--sim/d10v/simops.c175
-rw-r--r--sim/mips/ChangeLog4
-rw-r--r--sim/mips/mips.igen4
-rw-r--r--sim/testsuite/ChangeLog18
-rw-r--r--sim/testsuite/d10v-elf/ChangeLog7
-rw-r--r--sim/testsuite/d10v-elf/Makefile.in4
-rw-r--r--sim/testsuite/d10v-elf/t-ld-st.s32
-rw-r--r--sim/testsuite/d10v-elf/t-sac.s23
-rw-r--r--sim/testsuite/d10v-elf/t-sachi.s22
-rw-r--r--sim/testsuite/d10v-elf/t-slae.s39
24 files changed, 657 insertions, 102 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index e3b0c40..4e5e353 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,45 @@
+Mon Sep 13 18:54:05 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * gdbarch.sh: Describe each of the fields.
+
+Mon Sep 13 17:51:28 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ From 1999-09-12 Jim Blandy <jimb@cris.red-bean.com>:
+ * gdbarch.sh (generating setters): Use sed to generate the proper
+ indentation, not tr; tr's behavior is notoriously unportable.
+
+1999-09-10 Jim Blandy <jimb@zwingli.cygnus.com>
+
+ * i387-tdep.c (print_387_control_bits): Don't print newline; the
+ callers take care of that. (Thanks to H.J. Lu.)
+
+1999-09-09 Stan Shebs <shebs@andros.cygnus.com>
+
+ * d10v-tdep.c (DMEM_START): Set to 0x2000000.
+ (itrace, iuntrace, info itrace, itdisassemble, itracedisplay,
+ itracesource): Add 'i' prefix to commands, so as not to conflict
+ with generic trace commands.
+
+1999-09-09 Fernando Nasser <fnasser@totem.to.cygnus.com>
+
+ * remote.c (_initialize_remote): Fix the specification of the
+ "remote" prefix to set and show commands.
+
+1999-09-09 Elena Zannoni <ezannoni@kwikemart.cygnus.com>
+
+ * event-loop.c (create_file_event): New function. Creates a gdb
+ event for a given fd.
+ (gdb_wait_for_event): Use create_file_event().
+ * event-loop.h: export create_file_event().
+
+ * event-loop.c (delete_file_handler): Move the clearing of the
+ mask to later on in the function, because we need it in order to
+ deactivate the correct fd when using select().
+
+ * m32r-tdep.c (decode_prologue): Fix typo. Instructions starting
+ with 0xf are branch instructions.
+ (m32r_scan_prologue): Initialize framesize to 0.
+
1999-09-07 J.T. Conklin <jtc@redback.com>
* i386-stub.c (exceptionHook, oldExceptionHook): Removed.
@@ -61,7 +103,7 @@ Fri Sep 3 22:29:39 1999 Kevin Buettner <kevinb@cygnus.com>
Fri Sep 3 00:47:44 1999 Kevin Buettner <kevinb@cygnus.com>
[Merged linux/x86 floating point code from Bill Metzenthen,
- Jim Blandy, Anthony Green, H. J. Liu, and possibly others. The
+ Jim Blandy, Anthony Green, H. J. Lu, and possibly others. The
following remarks are Jim Blandy's.]
* findvar.c (extract_floating): Call TARGET_EXTRACT_FLOATING, if
@@ -368,7 +410,7 @@ Wed Sep 1 09:22:50 1999 Andrew Cagney <cagney@b1.cygnus.com>
1999-08-13 Jim Kingdon <kingdon@redhat.com>
Threads code from gdb 4.18-codefusion-990706
- [Thanks to Eric Paire, H. J. Liu, Jim Blandy and others]
+ [Thanks to Eric Paire, H. J. Lu, Jim Blandy and others]
* infrun.c (signal_stop_update, signal_print_update,
signal_pass_update): new functions.
* inferior.h: new prototypes for above functions.
diff --git a/gdb/Makefile.in b/gdb/Makefile.in
index 22edeb9..b1cd01e 100644
--- a/gdb/Makefile.in
+++ b/gdb/Makefile.in
@@ -229,7 +229,7 @@ CDEPS = $(XM_CDEPS) $(TM_CDEPS) $(NAT_CDEPS) $(SIM) $(BFD) $(READLINE) \
ADD_FILES = $(REGEX) $(XM_ADD_FILES) $(TM_ADD_FILES) $(NAT_ADD_FILES)
ADD_DEPS = $(REGEX1) $(XM_ADD_FILES) $(TM_ADD_FILES) $(NAT_ADD_FILES)
-VERSION = 19990908
+VERSION = 19990913
DIST=gdb
LINT=/usr/5bin/lint
@@ -1197,7 +1197,7 @@ i386v-nat.o: i386v-nat.c $(floatformat_h) $(defs_h) $(gdbcore_h) \
$(inferior_h) language.h target.h
i386-linux-nat.o: i386-linux-nat.c $(defs_h) $(inferior_h) $(gdbcore_h) \
- $(symtab_h) $(frame_h) $(symfile_h) $(objfiles_h)
+ $(symtab_h) $(frame_h) symfile.h objfiles.h
i386v4-nat.o: i386v4-nat.c $(defs_h)
diff --git a/gdb/config/pa/tm-hppa64.h b/gdb/config/pa/tm-hppa64.h
index 3b1ab44..99049fe 100644
--- a/gdb/config/pa/tm-hppa64.h
+++ b/gdb/config/pa/tm-hppa64.h
@@ -28,11 +28,11 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
gotten working yet. */
#define GDB_TARGET_IS_HPPA_20W
-/* The low two bits of the IA are the privilege level of the instruction. */
#include "pa/tm-hppah.h"
#define HPUX_1100 1
+/* The low two bits of the IA are the privilege level of the instruction. */
#define ADDR_BITS_REMOVE(addr) ((CORE_ADDR)addr & (CORE_ADDR)~3)
/* Say how long (ordinary) registers are. This is used in
diff --git a/gdb/d10v-tdep.c b/gdb/d10v-tdep.c
index e545f21..3c93ea9 100644
--- a/gdb/d10v-tdep.c
+++ b/gdb/d10v-tdep.c
@@ -45,7 +45,7 @@ struct frame_extra_info
/* these are the addresses the D10V-EVA board maps data */
/* and instruction memory to. */
-#define DMEM_START 0x0000000
+#define DMEM_START 0x2000000
#define IMEM_START 0x1000000
#define STACK_START 0x0007ffe
@@ -1454,25 +1454,25 @@ _initialize_d10v_tdep ()
add_com ("regs", class_vars, show_regs, "Print all registers");
- add_com ("trace", class_support, trace_command,
+ add_com ("itrace", class_support, trace_command,
"Enable tracing of instruction execution.");
- add_com ("untrace", class_support, untrace_command,
+ add_com ("iuntrace", class_support, untrace_command,
"Disable tracing of instruction execution.");
- add_com ("tdisassemble", class_vars, tdisassemble_command,
+ add_com ("itdisassemble", class_vars, tdisassemble_command,
"Disassemble the trace buffer.\n\
Two optional arguments specify a range of trace buffer entries\n\
as reported by info trace (NOT addresses!).");
- add_info ("trace", trace_info,
+ add_info ("itrace", trace_info,
"Display info about the trace data buffer.");
- add_show_from_set (add_set_cmd ("tracedisplay", no_class,
+ add_show_from_set (add_set_cmd ("itracedisplay", no_class,
var_integer, (char *) &trace_display,
"Set automatic display of trace.\n", &setlist),
&showlist);
- add_show_from_set (add_set_cmd ("tracesource", no_class,
+ add_show_from_set (add_set_cmd ("itracesource", no_class,
var_integer, (char *) &default_trace_show_source,
"Set display of source code with trace.\n", &setlist),
&showlist);
diff --git a/gdb/event-loop.c b/gdb/event-loop.c
index 78ecb63..261c838 100644
--- a/gdb/event-loop.c
+++ b/gdb/event-loop.c
@@ -122,6 +122,7 @@ static int async_handler_ready = 0;
static void create_file_handler PARAMS ((int, int, handler_func *, gdb_client_data));
static void invoke_async_signal_handler PARAMS ((void));
+static void handle_file_event PARAMS ((int));
static int gdb_wait_for_event PARAMS ((void));
static int gdb_do_one_event PARAMS ((void));
static int check_async_ready PARAMS ((void));
@@ -164,6 +165,22 @@ async_queue_event (event_ptr, position)
}
}
+/* Create a file event, to be enqueued in the event queue for
+ processing. The procedure associated to this event is always
+ handle_file_event, which will in turn invoke the one that was
+ associated to FD when it was registered with the event loop. */
+gdb_event *
+create_file_event (fd)
+ int fd;
+{
+ gdb_event *file_event_ptr;
+
+ file_event_ptr = (gdb_event *) xmalloc (sizeof (gdb_event));
+ file_event_ptr->proc = handle_file_event;
+ file_event_ptr->fd = fd;
+ return (file_event_ptr);
+}
+
/* Process one event.
The event can be the next one to be serviced in the event queue,
or an asynchronous event handler can be invoked in response to
@@ -439,11 +456,6 @@ delete_file_handler (fd)
if (file_ptr == NULL)
return;
- /* Deactivate the file descriptor, by clearing its mask,
- so that it will not fire again. */
-
- file_ptr->mask = 0;
-
#ifdef HAVE_POLL
/* Create a new poll_fds array by copying every fd's information but the
one we want to get rid of. */
@@ -500,6 +512,11 @@ delete_file_handler (fd)
}
#endif /* HAVE_POLL */
+ /* Deactivate the file descriptor, by clearing its mask,
+ so that it will not fire again. */
+
+ file_ptr->mask = 0;
+
/* Get rid of the file handler in the file handler list. */
if (file_ptr == gdb_notifier.first_file_handler)
gdb_notifier.first_file_handler = file_ptr->next_file;
@@ -634,10 +651,7 @@ gdb_wait_for_event ()
this fd. */
if (file_ptr->ready_mask == 0)
{
- file_event_ptr =
- (gdb_event *) xmalloc (sizeof (gdb_event));
- file_event_ptr->proc = handle_file_event;
- file_event_ptr->fd = file_ptr->fd;
+ file_event_ptr = create_file_event (file_ptr->fd);
async_queue_event (file_event_ptr, TAIL);
}
}
@@ -671,10 +685,7 @@ gdb_wait_for_event ()
if (file_ptr->ready_mask == 0)
{
- file_event_ptr =
- (gdb_event *) xmalloc (sizeof (gdb_event));
- file_event_ptr->proc = handle_file_event;
- file_event_ptr->fd = file_ptr->fd;
+ file_event_ptr = create_file_event (file_ptr->fd);
async_queue_event (file_event_ptr, TAIL);
}
file_ptr->ready_mask = mask;
diff --git a/gdb/event-loop.h b/gdb/event-loop.h
index 9e046e0..baebccd 100644
--- a/gdb/event-loop.h
+++ b/gdb/event-loop.h
@@ -231,6 +231,7 @@ extern void mark_async_signal_handler PARAMS ((async_signal_handler *));
extern async_signal_handler *
create_async_signal_handler PARAMS ((handler_func *, gdb_client_data));
extern void delete_async_signal_handler PARAMS ((async_signal_handler ** async_handler_ptr));
+extern gdb_event *create_file_event PARAMS ((int));
/* Exported functions from event-top.c.
FIXME: these should really go into top.h. */
@@ -245,8 +246,10 @@ extern void handle_sigint PARAMS ((int));
extern void pop_prompt PARAMS ((void));
extern void push_prompt PARAMS ((char *, char *, char *));
extern void gdb_readline2 PARAMS ((void));
+extern void mark_async_signal_handler_wrapper (void *);
+extern void async_request_quit (gdb_client_data);
-/* Exported variables and functions from event-top.c.
+/* Exported variables from event-top.c.
FIXME: these should really go into top.h. */
extern int async_command_editing_p;
@@ -257,5 +260,3 @@ extern struct prompts the_prompts;
extern void (*call_readline) PARAMS ((void));
extern void (*input_handler) PARAMS ((char *));
extern int input_fd;
-void mark_async_signal_handler_wrapper (void *);
-void async_request_quit (gdb_client_data);
diff --git a/gdb/gdbarch.sh b/gdb/gdbarch.sh
index 5ad6b65..cf9650f 100755
--- a/gdb/gdbarch.sh
+++ b/gdb/gdbarch.sh
@@ -19,28 +19,111 @@
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-IFS=:
-
read="class level macro returntype function formal actual attrib default init init_p fmt print print_p description"
+# dump out/verify the doco
+for field in ${read}
+do
+ case ${field} in
+
+ class ) : ;;
+ # # -> line disable
+ # f -> function
+ # hiding a function
+ # v -> variable
+ # hiding a variable
+ # i -> set from info
+ # hiding something from the ``struct info'' object
+
+ level ) : ;;
+
+ # See GDB_MULTI_ARCH description. Having GDB_MULTI_ARCH >=
+ # LEVEL is a predicate on checking that a given method is
+ # initialized (using INIT_P).
+
+ macro ) : ;;
+
+ # The name of the MACRO that this method is to be accessed by.
+
+ returntype ) : ;;
+
+ # For functions, the return type; for variables, the data type
+
+ function ) : ;;
+
+ # For functions, the member function name; for variables, the
+ # variable name. Member function names are always prefixed with
+ # ``gdbarch_'' for name-space purity.
+
+ formal ) : ;;
+
+ # The formal argument list. It is assumed that the formal
+ # argument list includes the actual name of each list element.
+ # A function with no arguments shall have ``void'' as the formal
+ # argument list.
+
+ actual ) : ;;
+
+ # The list of actual arguments. The arguments specified shall
+ # match the FORMAL list given above. Functions with out
+ # arguments leave this blank.
+
+ attrib ) : ;;
+
+ # Any GCC attributes that should be attached to the function
+ # declaration. At present this field is unused.
+
+ default ) : ;;
+
+ # To help with the GDB startup a default static gdbarch object
+ # is created. DEFAULT is the value to insert into that
+ # array. It defaults to ZERO.
+
+ init ) : ;;
+
+ # Any initial value to assign to the member after it is been
+ # MALLOCed. Defaults to zero.
+
+ init_p ) : ;;
+
+ # A predicate equation that tests to see if the code creating
+ # the new architecture has correctly updated this
+ # MEMBER. Default is to check that the value is no longer equal
+ # to INIT.
+
+ fmt ) : ;;
+
+ # printf style format string that can be used to print out the
+ # MEMBER. The default is to assume "%ld" is safe. Sometimes
+ # "%s" is useful. For functions, this is ignored and the
+ # function address is printed.
+
+ print ) : ;;
+
+ # An optional equation that converts the MEMBER into a value
+ # suitable for that FMT. By default it is assumed that the
+ # member's MACRO cast to long is safe.
+
+ print_p ) : ;;
+
+ # An optional indicator for any predicte to wrap around the
+ # print member code.
+ # # -> Wrap print up in ``#ifdef MACRO''
+ # exp -> Wrap print up in ``if (${print_p}) ...
+
+ description ) : ;;
+
+ # Currently unused.
+
+ *) exit 1;;
+ esac
+done
+
+IFS=:
+
function_list ()
{
- # category:
- # # -> disable
- # f -> function
- # v -> variable
- # i -> set from info
- # macro-name
- # return-type
- # name
- # formal argument list
- # actual argument list
- # attrib
- # default exp
- # init exp
- # init_p exp
- # print
- # description
+ # See below (DOCO) for description of each field
cat <<EOF |
i:2:TARGET_ARCHITECTURE:const struct bfd_arch_info *:bfd_arch_info::::&bfd_default_arch_struct:::%s:TARGET_ARCHITECTURE->printable_name:TARGET_ARCHITECTURE != NULL
#
@@ -983,7 +1066,7 @@ do
echo ""
echo "void"
echo "set_gdbarch_${function} (struct gdbarch *gdbarch,"
- echo " `echo ${function} | tr '[0-9a-z_]' ' '` gdbarch_${function}_ftype ${function})"
+ echo " `echo ${function} | sed -e 's/./ /g'` gdbarch_${function}_ftype ${function})"
echo "{"
echo " gdbarch->${function} = ${function};"
echo "}"
@@ -1010,7 +1093,7 @@ do
echo ""
echo "void"
echo "set_gdbarch_${function} (struct gdbarch *gdbarch,"
- echo " `echo ${function} | tr '[0-9a-z_]' ' '` ${returntype} ${function})"
+ echo " `echo ${function} | sed -e 's/./ /g'` ${returntype} ${function})"
echo "{"
echo " gdbarch->${function} = ${function};"
echo "}"
diff --git a/gdb/i387-tdep.c b/gdb/i387-tdep.c
index 0621bdf..a8fdba7 100644
--- a/gdb/i387-tdep.c
+++ b/gdb/i387-tdep.c
@@ -102,7 +102,7 @@ print_387_control_bits (control)
puts_unfiltered (" LOS");
puts_unfiltered (";");
}
- printf_unfiltered ("\n");
+
if (control & 0xe080)
warning ("\nreserved bits on: %s",
local_hex_string (control & 0xe080));
diff --git a/gdb/m32r-tdep.c b/gdb/m32r-tdep.c
index a4a791b..cb5d9c3 100644
--- a/gdb/m32r-tdep.c
+++ b/gdb/m32r-tdep.c
@@ -250,7 +250,7 @@ decode_prologue (start_pc, scan_limit,
/* End of prolog if any of these are branch instructions */
if ((op1 == 0x7000)
|| (op1 == 0xb000)
- || (op1 == 0x7000))
+ || (op1 == 0xf000))
{
after_prologue = current_pc;
insn_debug (("Done: branch\n"));
@@ -350,7 +350,7 @@ m32r_scan_prologue (fi, fsr)
{
struct symtab_and_line sal;
CORE_ADDR prologue_start, prologue_end, current_pc;
- unsigned long framesize;
+ unsigned long framesize = 0;
/* this code essentially duplicates skip_prologue,
but we need the start address below. */
diff --git a/gdb/remote.c b/gdb/remote.c
index 1275e51..56ce779 100644
--- a/gdb/remote.c
+++ b/gdb/remote.c
@@ -5149,13 +5149,13 @@ _initialize_remote ()
Remote protocol specific variables\n\
Configure various remote-protocol specific variables such as\n\
the packets being used",
- &remote_set_cmdlist, "remote ",
+ &remote_set_cmdlist, "set remote ",
0/*allow-unknown*/, &setlist);
add_prefix_cmd ("remote", class_maintenance, set_remote_cmd, "\
Remote protocol specific variables\n\
Configure various remote-protocol specific variables such as\n\
the packets being used",
- &remote_show_cmdlist, "remote ",
+ &remote_show_cmdlist, "show remote ",
0/*allow-unknown*/, &showlist);
add_cmd ("compare-sections", class_obscure, compare_sections_command,
diff --git a/gdb/testsuite/ChangeLog b/gdb/testsuite/ChangeLog
index 15dd281..7198d6e 100644
--- a/gdb/testsuite/ChangeLog
+++ b/gdb/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+1999-09-09 Stan Shebs <shebs@andros.cygnus.com>
+
+ * long_long.exp: Add variations of test cases that work for
+ targets with 16-bit ints and 32-bit doubles.
+
1999-09-08 Stan Shebs <shebs@andros.cygnus.com>
* break.c (main): Compare a possibly-uninitialized argc with an
diff --git a/gdb/testsuite/gdb.base/long_long.exp b/gdb/testsuite/gdb.base/long_long.exp
index b779434..651daff 100644
--- a/gdb/testsuite/gdb.base/long_long.exp
+++ b/gdb/testsuite/gdb.base/long_long.exp
@@ -69,6 +69,28 @@ gdb_expect {
default { fail "(timeout) getting target endian" }
}
+# Detect targets with 2-byte integers. Yes, it's not general to assume
+# that all others have 4-byte ints, but don't worry about it until one
+# actually exists.
+
+set sizeof_int 4
+send_gdb "print sizeof(int)\n"
+gdb_expect {
+ -re ".* = 2.*$gdb_prompt $" { set sizeof_int 2 }
+ -re ".*$gdb_prompt $" { }
+ default { }
+}
+
+# Detect targets with 4-byte doubles.
+
+set sizeof_double 8
+send_gdb "print sizeof(double)\n"
+gdb_expect {
+ -re ".* = 4.*$gdb_prompt $" { set sizeof_double 4 }
+ -re ".*$gdb_prompt $" { }
+ default { }
+}
+
gdb_test "n 4" ".*38.*" "get to known place"
# Check the hack for long long prints.
@@ -96,17 +118,39 @@ gdb_test "p/o oct" ".*.*"
gdb_test "p/t oct" ".*1010011100101110111001010011100101110111000001010011100101110111.*"
gdb_test "p/a oct" ".*0x.*77053977.*"
gdb_test "p/c oct" ".*'w'.*"
-gdb_test "p/f oct" ".*-5.9822653797615723e-120.*"
+
+if { $sizeof_double == 8 } {
+
+ gdb_test "p/f oct" ".*-5.9822653797615723e-120.*"
+
+} else {
+
+ gdb_test "p/f oct" ".*-2.42716126e-15.*"
+}
if { $target_bigendian_p } {
- gdb_test "p/d *(int *)&oct" ".*-1490098887.*"
- gdb_test "p/u *(int *)&oct" ".*2804868409.*"
- gdb_test "p/o *(int *)&oct" ".*024713562471.*"
- gdb_test "p/t *(int *)&oct" ".*10100111001011101110010100111001.*"
- gdb_test "p/a *(int *)&oct" ".*0xf*a72ee539.*"
- gdb_test "p/c *(int *)&oct" ".*57 '9'.*"
- gdb_test "p/f *(int *)&oct" ".*-2.42716126e-15.*"
+ if { $sizeof_int == 4 } {
+
+ gdb_test "p/d *(int *)&oct" ".*-1490098887.*"
+ gdb_test "p/u *(int *)&oct" ".*2804868409.*"
+ gdb_test "p/o *(int *)&oct" ".*024713562471.*"
+ gdb_test "p/t *(int *)&oct" ".*10100111001011101110010100111001.*"
+ gdb_test "p/a *(int *)&oct" ".*0xf*a72ee539.*"
+ gdb_test "p/c *(int *)&oct" ".*57 '9'.*"
+ gdb_test "p/f *(int *)&oct" ".*-2.42716126e-15.*"
+
+ } else {
+
+ gdb_test "p/d *(int *)&oct" ".*-22738.*"
+ gdb_test "p/u *(int *)&oct" ".*42798.*"
+ gdb_test "p/o *(int *)&oct" ".*0123456.*"
+ gdb_test "p/t *(int *)&oct" ".*1010011100101110.*"
+ gdb_test "p/a *(int *)&oct" ".*0xffffa72e.*"
+ gdb_test "p/c *(int *)&oct" ".*46 '.'.*"
+ gdb_test "p/f *(int *)&oct" ".*-22738.*"
+
+ }
gdb_test "p/d *(short *)&oct" ".*-22738.*"
gdb_test "p/u *(short *)&oct" ".*42798.*"
@@ -126,7 +170,11 @@ if { $target_bigendian_p } {
gdb_test "x/c &oct" ".*-89 .*"
# FIXME GDB's output is correct, but this longer match fails.
# gdb_test "x/c &oct" ".*-89 '\\\\247'.*"
- gdb_test "x/f &oct" ".*-5.9822653797615723e-120.*"
+ if { $sizeof_double == 8 } {
+ gdb_test "x/f &oct" ".*-5.9822653797615723e-120.*"
+ } else {
+ gdb_test "x/f &oct" ".*-2.42716126e-15.*"
+ }
# FIXME Fill in the results for all the following tests. (But be careful
# about looking at locations with unspecified contents!)
diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog
index 410aedf..0695db2 100644
--- a/sim/d10v/ChangeLog
+++ b/sim/d10v/ChangeLog
@@ -1,3 +1,25 @@
+Wed Sep 8 19:34:55 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
+
+ * simops.c (op_types): Added new memory indirect type OP_MEMREF3.
+ (trace_input_func): Added support for OP_MEMREF3.
+ (OP_32010000): New instruction ld.
+ (OP_33010000): New instruction ld2w.
+ (OP_5209): New instruction sac.
+ (OP_4209): New instruction sachi.
+ (OP_3220): New instruction slae.
+ (OP_36010000): New instruction st.
+ (OP_37010000): New instruction st2w.
+
+1999-09-09 Stan Shebs <shebs@andros.cygnus.com>
+
+ * interp.c (old_segment_mapping): New global.
+ (xfer_mem): Change the default segment mapping to be the way
+ that Mitsubishi prefers, but use the previous mapping if
+ old_segment_mapping is true.
+ (sim_open): Add an option -oldseg to get the old mapping.
+ (sim_create_inferior): Init mapping registers based on the
+ value of old_segment_mapping.
+
1999-09-07 Nick Clifton <nickc@cygnus.com>
* simops.c (OP_6601): Do not write back decremented address if
diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c
index 4602ed2..bd16391 100644
--- a/sim/d10v/interp.c
+++ b/sim/d10v/interp.c
@@ -16,6 +16,11 @@ enum _leftright { LEFT_FIRST, RIGHT_FIRST };
static char *myname;
static SIM_OPEN_KIND sim_kind;
int d10v_debug;
+
+/* Set this to true to get the previous segment layout. */
+
+int old_segment_mapping;
+
host_callback *d10v_callback;
unsigned long ins_type_counters[ (int)INS_MAX ];
@@ -375,17 +380,53 @@ xfer_mem (SIM_ADDR addr,
}
#endif
- /* to access data, we use the following mapping
- 0x00xxxxxx: Logical data address segment (DMAP translated memory)
- 0x01xxxxxx: Logical instruction address segment (IMAP translated memory)
- 0x10xxxxxx: Physical data memory segment (On-chip data memory)
- 0x11xxxxxx: Physical instruction memory segment (On-chip insn memory)
- 0x12xxxxxx: Phisical unified memory segment (Unified memory)
+ /* To access data, we use the following mappings:
+
+ 0x00xxxxxx: Physical unified memory segment (Unified memory)
+ 0x01xxxxxx: Physical instruction memory segment (On-chip insn memory)
+ 0x02xxxxxx: Physical data memory segment (On-chip data memory)
+ 0x10xxxxxx: Logical data address segment (DMAP translated memory)
+ 0x11xxxxxx: Logical instruction address segment (IMAP translated memory)
+
+ Alternatively, the "old segment mapping" is still available by setting
+ old_segment_mapping to 1. It looks like this:
+
+ 0x00xxxxxx: Logical data address segment (DMAP translated memory)
+ 0x01xxxxxx: Logical instruction address segment (IMAP translated memory)
+ 0x10xxxxxx: Physical data memory segment (On-chip data memory)
+ 0x11xxxxxx: Physical instruction memory segment (On-chip insn memory)
+ 0x12xxxxxx: Physical unified memory segment (Unified memory)
+
*/
+ /* However, if we've asked to use the previous generation of segment
+ mapping, rearrange the segments as follows. */
+
+ if (old_segment_mapping)
+ {
+ switch (segment)
+ {
+ case 0x00: /* DMAP translated memory */
+ segment = 0x10;
+ break;
+ case 0x01: /* IMAP translated memory */
+ segment = 0x11;
+ break;
+ case 0x10: /* On-chip data memory */
+ segment = 0x02;
+ break;
+ case 0x11: /* On-chip insn memory */
+ segment = 0x01;
+ break;
+ case 0x12: /* Unified memory */
+ segment = 0x00;
+ break;
+ }
+ }
+
switch (segment)
{
- case 0x00: /* DMAP translated memory */
+ case 0x10: /* DMAP translated memory */
{
int byte;
for (byte = 0; byte < size; byte++)
@@ -401,7 +442,7 @@ xfer_mem (SIM_ADDR addr,
return byte;
}
- case 0x01: /* IMAP translated memory */
+ case 0x11: /* IMAP translated memory */
{
int byte;
for (byte = 0; byte < size; byte++)
@@ -417,7 +458,7 @@ xfer_mem (SIM_ADDR addr,
return byte;
}
- case 0x10: /* On-chip data memory */
+ case 0x02: /* On-chip data memory */
{
addr &= ((1 << DMEM_SIZE) - 1);
if ((addr + size) > (1 << DMEM_SIZE))
@@ -430,7 +471,7 @@ xfer_mem (SIM_ADDR addr,
break;
}
- case 0x11: /* On-chip insn memory */
+ case 0x01: /* On-chip insn memory */
{
addr &= ((1 << IMEM_SIZE) - 1);
if ((addr + size) > (1 << IMEM_SIZE))
@@ -443,7 +484,7 @@ xfer_mem (SIM_ADDR addr,
break;
}
- case 0x12: /* Unified memory */
+ case 0x00: /* Unified memory */
{
int startsegment, startoffset; /* Segment and offset within segment where xfer starts */
int endsegment, endoffset; /* Segment and offset within segment where xfer ends */
@@ -484,12 +525,23 @@ xfer_mem (SIM_ADDR addr,
default:
{
(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: address 0x%lx is not in valid range\n", (long) addr);
- (*d10v_callback->printf_filtered) (d10v_callback, "0x00xxxxxx: Logical data address segment (DMAP translated memory)\n");
- (*d10v_callback->printf_filtered) (d10v_callback, "0x01xxxxxx: Logical instruction address segment (IMAP translated memory)\n");
- (*d10v_callback->printf_filtered) (d10v_callback, "0x10xxxxxx: Physical data memory segment (On-chip data memory)\n");
- (*d10v_callback->printf_filtered) (d10v_callback, "0x11xxxxxx: Physical instruction memory segment (On-chip insn memory)\n");
- (*d10v_callback->printf_filtered) (d10v_callback, "0x12xxxxxx: Phisical unified memory segment (Unified memory)\n");
- return (0);
+ if (old_segment_mapping)
+ {
+ (*d10v_callback->printf_filtered) (d10v_callback, "0x00xxxxxx: Logical data address segment (DMAP translated memory)\n");
+ (*d10v_callback->printf_filtered) (d10v_callback, "0x01xxxxxx: Logical instruction address segment (IMAP translated memory)\n");
+ (*d10v_callback->printf_filtered) (d10v_callback, "0x10xxxxxx: Physical data memory segment (On-chip data memory)\n");
+ (*d10v_callback->printf_filtered) (d10v_callback, "0x11xxxxxx: Physical instruction memory segment (On-chip insn memory)\n");
+ (*d10v_callback->printf_filtered) (d10v_callback, "0x12xxxxxx: Phisical unified memory segment (Unified memory)\n");
+ }
+ else
+ {
+ (*d10v_callback->printf_filtered) (d10v_callback, "0x00xxxxxx: Physical unified memory segment (Unified memory)\n");
+ (*d10v_callback->printf_filtered) (d10v_callback, "0x01xxxxxx: Physical instruction memory segment (On-chip insn memory)\n");
+ (*d10v_callback->printf_filtered) (d10v_callback, "0x02xxxxxx: Physical data memory segment (On-chip data memory)\n");
+ (*d10v_callback->printf_filtered) (d10v_callback, "0x10xxxxxx: Logical data address segment (DMAP translated memory)\n");
+ (*d10v_callback->printf_filtered) (d10v_callback, "0x11xxxxxx: Logical instruction address segment (IMAP translated memory)\n");
+ }
+ return (0);
}
}
@@ -544,14 +596,17 @@ sim_open (kind, callback, abfd, argv)
sim_kind = kind;
d10v_callback = callback;
myname = argv[0];
+ old_segment_mapping = 0;
for (p = argv + 1; *p; ++p)
{
+ if (strcmp (*p, "-oldseg") == 0)
+ old_segment_mapping = 1;
#ifdef DEBUG
- if (strcmp (*p, "-t") == 0)
+ else if (strcmp (*p, "-t") == 0)
d10v_debug = DEBUG;
- else
#endif
+ else
(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: unsupported option(s): %s\n",*p);
}
@@ -969,7 +1024,7 @@ sim_create_inferior (sd, abfd, argv, env)
/* cpu resets imap0 to 0 and imap1 to 0x7f, but D10V-EVA board */
/* resets imap0 and imap1 to 0x1000. */
- if (1)
+ if (old_segment_mapping)
{
SET_IMAP0 (0x0000);
SET_IMAP1 (0x007f);
diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c
index 54cc6fe..22bdd91 100644
--- a/sim/d10v/simops.c
+++ b/sim/d10v/simops.c
@@ -34,6 +34,7 @@ enum op_types {
OP_CONSTANT4,
OP_MEMREF,
OP_MEMREF2,
+ OP_MEMREF3,
OP_POSTDEC,
OP_POSTINC,
OP_PREDEC,
@@ -307,6 +308,12 @@ trace_input_func (name, in1, in2, in3)
comma = ",";
break;
+ case OP_MEMREF3:
+ sprintf (p, "%s@%d", comma, OP[i]);
+ p += strlen (p);
+ comma = ",";
+ break;
+
case OP_POSTINC:
sprintf (p, "%s@r%d+", comma, OP[i]);
p += strlen (p);
@@ -380,6 +387,10 @@ trace_input_func (name, in1, in2, in3)
(uint16) GPR (OP[i]));
break;
+ case OP_MEMREF3:
+ (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "", (uint16) OP[i]);
+ break;
+
case OP_DREG:
tmp = (long)((((uint32) GPR (OP[i])) << 16) | ((uint32) GPR (OP[i] + 1)));
(*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.8lx", SIZE_VALUES-10, "", tmp);
@@ -1312,6 +1323,18 @@ OP_6000 ()
trace_output_16 (tmp);
}
+/* ld */
+void
+OP_32010000 ()
+{
+ uint16 tmp;
+
+ trace_input ("ld", OP_REG_OUTPUT, OP_MEMREF3, OP_VOID);
+ tmp = RW (OP[1]);
+ SET_GPR (OP[0], tmp);
+ trace_output_16 (tmp);
+}
+
/* ld2w */
void
OP_31000000 ()
@@ -1364,6 +1387,18 @@ OP_6200 ()
trace_output_32 (tmp);
}
+/* ld2w */
+void
+OP_33010000 ()
+{
+ int32 tmp;
+
+ trace_input ("ld2w", OP_REG_OUTPUT, OP_MEMREF3, OP_VOID);
+ tmp = RLW (OP[1]);
+ SET_GPR32 (OP[0], tmp);
+ trace_output_32 (tmp);
+}
+
/* ldb */
void
OP_38000000 ()
@@ -2207,6 +2242,74 @@ OP_5F40 ()
trace_output_void ();
}
+
+/* sac */
+void OP_5209 ()
+{
+ int64 tmp;
+
+ trace_input ("sac", OP_REG_OUTPUT, OP_ACCUM, OP_VOID);
+
+ tmp = SEXT40(ACC (OP[1]));
+
+ SET_PSW_F1 (PSW_F0);
+
+ if (tmp > SEXT40(MAX32))
+ {
+ tmp = (MAX32);
+ SET_PSW_F0 (1);
+ }
+ else if (tmp < SEXT40(MIN32))
+ {
+ tmp = 0x80000000;
+ SET_PSW_F0 (1);
+ }
+ else
+ {
+ tmp = (tmp & MASK32);
+ SET_PSW_F0 (0);
+ }
+
+ SET_GPR32 (OP[0], tmp);
+
+ trace_output_40 (tmp);
+}
+
+
+/* sachi */
+void
+OP_4209 ()
+{
+ int64 tmp;
+
+ trace_input ("sachi", OP_REG_OUTPUT, OP_ACCUM, OP_VOID);
+
+ tmp = SEXT40(ACC (OP[1]));
+
+ SET_PSW_F1 (PSW_F0);
+
+ if (tmp > SEXT40(MAX32))
+ {
+ tmp = 0x7fff;
+ SET_PSW_F0 (1);
+ }
+ else if (tmp < SEXT40(MIN32))
+ {
+ tmp = 0x8000;
+ SET_PSW_F0 (1);
+ }
+ else
+ {
+ tmp >>= 16;
+ SET_PSW_F0 (0);
+ }
+
+ SET_GPR (OP[0], tmp);
+
+ trace_output_16 (OP[0]);
+}
+
+
/* sadd */
void
OP_1223 ()
@@ -2252,6 +2355,59 @@ OP_4613 ()
trace_output_16 (tmp);
}
+/* slae */
+void
+OP_3220 ()
+{
+ int64 tmp;
+ int16 reg;
+
+ trace_input ("slae", OP_ACCUM, OP_REG, OP_VOID);
+
+ reg = SEXT16( GPR (OP[1]));
+
+ if (reg >= 17 || reg <= -17)
+ {
+ (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: shift value %d too large.\n", reg);
+ State.exception = SIGILL;
+ return;
+ }
+
+ tmp = SEXT40 (ACC (OP[0]));
+
+ if (PSW_ST && (tmp < SEXT40 (MIN32) || tmp > SEXT40 (MAX32)))
+ {
+ (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: value to shift 0x%x out of range.\n", tmp);
+ State.exception = SIGILL;
+ return;
+ }
+
+ if (reg >= 0 && reg <= 16)
+ {
+ tmp = SEXT56 ((SEXT56 (tmp)) << (GPR (OP[1])));
+ if (PSW_ST)
+ {
+ if (tmp > SEXT40(MAX32))
+ tmp = (MAX32);
+ else if (tmp < SEXT40(MIN32))
+ tmp = (MIN32);
+ else
+ tmp = (tmp & MASK40);
+ }
+ else
+ tmp = (tmp & MASK40);
+ }
+ else
+ {
+ tmp = (SEXT40 (ACC (OP[0]))) >> (-GPR (OP[1]));
+ }
+
+ SET_ACC(OP[0], tmp);
+
+ trace_output_40(tmp);
+}
+
+
/* sleep */
void
OP_5FC0 ()
@@ -2535,6 +2691,15 @@ OP_6C01 ()
trace_output_void ();
}
+/* st */
+void
+OP_36010000 ()
+{
+ trace_input ("st", OP_REG, OP_MEMREF3, OP_VOID);
+ SW (OP[1], GPR (OP[0]));
+ trace_output_void ();
+}
+
/* st2w */
void
OP_35000000 ()
@@ -2601,6 +2766,16 @@ OP_6E01 ()
trace_output_void ();
}
+/* st2w */
+void
+OP_37010000 ()
+{
+ trace_input ("st2w", OP_DREG, OP_MEMREF3, OP_VOID);
+ SW (OP [1] + 0, GPR (OP[0] + 0));
+ SW (OP [1] + 2, GPR (OP[0] + 1));
+ trace_output_void ();
+}
+
/* stb */
void
OP_3C000000 ()
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 52a2d86..c12ec65 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,7 @@
+Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
+
+ * mips.igen (MULT): Correct previous mis-applied patch.
+
Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
* mips.igen (delayslot32): Handle sequence like
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 17748fe..6d92d4a 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -1749,7 +1749,7 @@
*mipsI,mipsII,mipsIII,mipsIV:
*vr4100:
{
- do_multu (SD_, RS, RT, RD);
+ do_multu (SD_, RS, RT, 0);
}
000000,5.RS,5.RT,5.RD,00000011001:SPECIAL:32::MULTU
@@ -1758,7 +1758,7 @@
*vr5000:
*r3900:
{
- do_multu (SD_, RS, RT, 0);
+ do_multu (SD_, RS, RT, RD);
}
diff --git a/sim/testsuite/ChangeLog b/sim/testsuite/ChangeLog
index ca3bde2..e876e1f 100644
--- a/sim/testsuite/ChangeLog
+++ b/sim/testsuite/ChangeLog
@@ -1,32 +1,14 @@
-1999-09-06 Doug Evans <devans@casey.cygnus.com>
-
- * sim/arm/testutils.inc: Testsuite utilities.
- * sim/arm/adc.cgs: New testcase.
-
Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
1999-08-30 Doug Evans <devans@casey.cygnus.com>
- * sim/arm/thumb/allthumb.exp: New driver for thumb testcases.
- * sim/arm/allinsn.exp: New driver for arm testcases.
-
* lib/sim-defs.exp (run_sim_test): Rename all_machs arg to
requested_machs, now is list of machs to run tests for.
Delete locals AS,ASFLAGS,LD,LDFLAGS. Use target_assemble
and target_link instead.
-1999-07-16 Ben Elliston <bje@cygnus.com>
-
- * sim/arm/misaligned1.ms: New test case.
- * sim/arm/misaligned2.ms: Likewise.
- * sim/arm/misaligned3.ms: Likewise.
-
-1999-07-16 Ben Elliston <bje@cygnus.com>
-
- * sim/arm/misc.exp: Enable basic tests.
-
1999-04-21 Doug Evans <devans@casey.cygnus.com>
* sim/m32r/nop.cgs: Add missing nop insn.
diff --git a/sim/testsuite/d10v-elf/ChangeLog b/sim/testsuite/d10v-elf/ChangeLog
index b3b7f8c..723f88a 100644
--- a/sim/testsuite/d10v-elf/ChangeLog
+++ b/sim/testsuite/d10v-elf/ChangeLog
@@ -1,3 +1,10 @@
+Wed Sep 8 19:34:55 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
+
+ * t-ld-st.s: New file.
+ * t-sac.s: New file.
+ * t-sachi.s: New file.
+ * t-slae.s: New file.
+
1999-01-13 Jason Molenda (jsm@bugshack.cygnus.com)
* t-sadd.s: New file.
diff --git a/sim/testsuite/d10v-elf/Makefile.in b/sim/testsuite/d10v-elf/Makefile.in
index 09d59ac..b170f37 100644
--- a/sim/testsuite/d10v-elf/Makefile.in
+++ b/sim/testsuite/d10v-elf/Makefile.in
@@ -41,6 +41,7 @@ TESTS = \
exit47.ko \
hello.hi \
t-dbt.ok \
+ t-ld-st.ok \
t-mac.ok \
t-mvtac.ok \
t-mvtc.ok \
@@ -51,7 +52,10 @@ TESTS = \
t-rdt.ok \
t-rep.ok \
t-rte.ok \
+ t-sac.ok \
+ t-sachi.ok \
t-sadd.ok \
+ t-slae.ok \
t-sp.ok \
t-sub2w.ok \
t-sub.ok \
diff --git a/sim/testsuite/d10v-elf/t-ld-st.s b/sim/testsuite/d10v-elf/t-ld-st.s
new file mode 100644
index 0000000..ec9f202
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ld-st.s
@@ -0,0 +1,32 @@
+.include "t-macros.i"
+
+ start
+
+ ; Test ld and st
+ ld r4, @foo
+ check 1 r4 0xdead
+
+ ldi r4, #0x2152
+ st r4, @foo
+ ld r4, @foo
+ check 2 r4 0x2152
+
+ ; Test ld2w and st2w
+ ldi r4, #0xdead
+ st r4, @foo
+ ld2w r4, @foo
+ check2w2 3 r4 0xdead 0xf000
+
+ ldi r4, #0x2112
+ ldi r5, #0x1984
+ st2w r4, @foo
+ ld2w r4, @foo
+ check2w2 4 r4 0x2112 0x1984
+
+ .data
+ .align 2
+foo: .short 0xdead
+bar: .short 0xf000
+ .text
+
+ exit0
diff --git a/sim/testsuite/d10v-elf/t-sac.s b/sim/testsuite/d10v-elf/t-sac.s
new file mode 100644
index 0000000..7042be0
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-sac.s
@@ -0,0 +1,23 @@
+.include "t-macros.i"
+
+ start
+
+test_sac_1:
+ loadacc2 a0 0x00 0xAFFF 0x0000
+ sac r4, a0
+ check 1 r4 0x7FFF
+ check 2 r5 0xFFFF
+
+test_sac_2:
+ loadacc2 a0 0xFF 0x7000 0x0000
+ sac r4, a0
+ check 3 r4 0x8000
+ check 4 r5 0x0000
+
+test_sac_3:
+ loadacc2 a0 0x00 0x1000 0xA000
+ sac r4, a0
+ check 5 r4 0x1000
+ check 6 r5 0xA000
+
+ exit0
diff --git a/sim/testsuite/d10v-elf/t-sachi.s b/sim/testsuite/d10v-elf/t-sachi.s
new file mode 100644
index 0000000..7774ee0
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-sachi.s
@@ -0,0 +1,22 @@
+.include "t-macros.i"
+
+ start
+
+test_sachi_1:
+ loadacc2 a0 0x00 0xAFFF 0x0000
+ sachi r4, a0
+ check 1 r4 0x7FFF
+
+
+test_sachi_2:
+ loadacc2 a0 0xFF 0x8000 0x1000
+ sachi r4, a0
+ check 2 r4 0x8000
+
+
+test_sachi_3:
+ loadacc2 a0 0x00 0x1000 0xA000
+ sachi r4, a0
+ check 3 r4 0x1000
+
+ exit0
diff --git a/sim/testsuite/d10v-elf/t-slae.s b/sim/testsuite/d10v-elf/t-slae.s
new file mode 100644
index 0000000..6d8422d
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-slae.s
@@ -0,0 +1,39 @@
+.include "t-macros.i"
+
+ start
+
+test_slae_1:
+ loadpsw2 PSW_ST|PSW_FX
+ loadacc2 a0 0x00 0x0AFF 0xF000
+ ldi r0, 4
+ slae a0, r0
+ checkacc2 1 a0 0x00 0x7FFF 0xFFFF
+
+test_slae_2:
+ loadpsw2 PSW_ST|PSW_FX
+ loadacc2 a0 0xFF 0xF700 0x1000
+ ldi r0, 4
+ slae a0, r0
+ checkacc2 2 a0 0xFF 0x8000 0x0000
+
+test_slae_3:
+ loadpsw2 PSW_ST|PSW_FX
+ loadacc2 a0 0x00 0x0010 0xA000
+ ldi r0, 4
+ slae a0, r0
+ checkacc2 3 a0 0x00 0x010A 0x0000
+
+test_slae_4:
+ loadpsw2 0
+ loadacc2 a0 0x00 0x0010 0xA000
+ ldi r0, 4
+ slae a0, r0
+ checkacc2 4 a0 0x00 0x010A 0x0000
+
+test_slae_5:
+ loadacc2 a0 0x00 0x0010 0xA000
+ ldi r0, -4
+ slae a0, r0
+ checkacc2 4 a0 0x00 0x0001 0x0A00
+
+ exit0