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author | Jan Beulich <jbeulich@suse.com> | 2020-07-21 14:20:11 +0200 |
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committer | Jan Beulich <jbeulich@suse.com> | 2020-07-21 14:20:11 +0200 |
commit | bf4ba07ca61793a1faf81c0447ba97fdc6639b50 (patch) | |
tree | feaeb55588e260ba937d85653caaa2bb30ef759a | |
parent | 2b42b0415aee13f1939b395c3693e679d16d0a70 (diff) | |
download | gdb-bf4ba07ca61793a1faf81c0447ba97fdc6639b50.zip gdb-bf4ba07ca61793a1faf81c0447ba97fdc6639b50.tar.gz gdb-bf4ba07ca61793a1faf81c0447ba97fdc6639b50.tar.bz2 |
Revert "x86: Don't display eiz with no scale"
This reverts commit 04c662e2b66bedd050f97adec19afe0fcfce9ea7.
In my underlying suggestion I neglected the fact that in those
cases (,%eiz,1) is the only visible indication that 32-bit
addressing is in effect.
-rw-r--r-- | gas/ChangeLog | 7 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/evex-no-scale-64.d | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-addr32-intel.d | 12 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-addr32.d | 12 | ||||
-rw-r--r-- | opcodes/ChangeLog | 4 | ||||
-rw-r--r-- | opcodes/i386-dis.c | 2 |
6 files changed, 25 insertions, 14 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index fdbba0e..4ac6ea2 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2020-07-21 Jan Beulich <jbeulich@suse.com> + + * testsuite/gas/i386/evex-no-scale-64.d, + testsuite/gas/i386/addr32.d, + testsuite/gas/i386/x86-64-addr32-intel.d, + testsuite/gas/i386/x86-64-addr32.d: Adjust expectations. + 2020-07-21 Cooper Qu <cooper.qu@linux.alibaba.com> * config/tc-csky.c (md_begin): Fix tests of arch and mach flags. diff --git a/gas/testsuite/gas/i386/evex-no-scale-64.d b/gas/testsuite/gas/i386/evex-no-scale-64.d index d9f5afa..578eb8d 100644 --- a/gas/testsuite/gas/i386/evex-no-scale-64.d +++ b/gas/testsuite/gas/i386/evex-no-scale-64.d @@ -11,6 +11,6 @@ Disassembly of section .text: +[a-f0-9]+: 62 f1 7c 48 28 04 05 40 00 00 00 vmovaps 0x40\(,%rax,1\),%zmm0 +[a-f0-9]+: 62 f1 7c 48 28 04 25 40 00 00 00 vmovaps 0x40,%zmm0 +[a-f0-9]+: 67 62 f1 7c 48 28 04 05 40 00 00 00 vmovaps 0x40\(,%eax,1\),%zmm0 - +[a-f0-9]+: 67 62 f1 7c 48 28 04 25 40 00 00 00 vmovaps 0x40,%zmm0 + +[a-f0-9]+: 67 62 f1 7c 48 28 04 25 40 00 00 00 vmovaps 0x40\(,%eiz,1\),%zmm0 +[a-f0-9]+: 62 f1 7c 48 28 04 25 40 00 00 00 vmovaps 0x40,%zmm0 #pass diff --git a/gas/testsuite/gas/i386/x86-64-addr32-intel.d b/gas/testsuite/gas/i386/x86-64-addr32-intel.d index 7a25d40..0988457 100644 --- a/gas/testsuite/gas/i386/x86-64-addr32-intel.d +++ b/gas/testsuite/gas/i386/x86-64-addr32-intel.d @@ -11,15 +11,15 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00[ ]+lea[ ]+rax,\[eax\+0x0\].* [ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00[ ]+lea[ ]+rax,\[r8d\+0x0\].* [ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00[ ]+lea[ ]+rax,\[eip\+0x0\].* -[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00 lea[ ]+rax,ds:0x0 .* +[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00 lea[ ]+rax,\[eiz\*1\+0x0\].* [ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov al,ds:0x600898 [ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov ax,ds:0x600898 [ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov eax,ds:0x600898 [ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov rax,ds:0x600898 [ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov rax,ds:0x800898 -[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 mov[ ]+rbx,QWORD PTR ds:0x800898 +[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 mov[ ]+rbx,QWORD PTR \[eiz\*1\+0x800898\] [ ]*[a-f0-9]+: 67 48 a1 ef cd ab 89 addr32 mov rax,ds:0x89abcdef -[ ]*[a-f0-9]+: 67 48 8b 1c 25 ef cd ab 89 mov[ ]+rbx,QWORD PTR ds:0x89abcdef +[ ]*[a-f0-9]+: 67 48 8b 1c 25 ef cd ab 89 mov[ ]+rbx,QWORD PTR \[eiz\*1\+0x89abcdef\] [ ]*[a-f0-9]+: 67 48 b8 ef cd ab 89 00 00 00 00 addr32 movabs rax,0x89abcdef [ ]*[a-f0-9]+: 67 48 bb ef cd ab 89 00 00 00 00 addr32 movabs rbx,0x89abcdef [ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov ds:0x600898,al @@ -27,9 +27,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov ds:0x600898,eax [ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov ds:0x600898,rax [ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov ds:0x800898,rax -[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 mov[ ]+QWORD PTR ds:0x800898,rbx +[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 mov[ ]+QWORD PTR \[eiz\*1\+0x800898\],rbx [ ]*[a-f0-9]+: 67 48 a3 ef cd ab 89 addr32 mov ds:0x89abcdef,rax -[ ]*[a-f0-9]+: 67 48 89 1c 25 ef cd ab 89 mov[ ]+QWORD PTR ds:0x89abcdef,rbx -[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+DWORD PTR ds:0xff332211,eax +[ ]*[a-f0-9]+: 67 48 89 1c 25 ef cd ab 89 mov[ ]+QWORD PTR \[eiz\*1\+0x89abcdef\],rbx +[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+DWORD PTR \[eiz\*1\+0xff332211\],eax [ ]*[a-f0-9]+: 67 89 04 65 11 22 33 ff mov[ ]+DWORD PTR \[eiz\*2\+0xff332211\],eax #pass diff --git a/gas/testsuite/gas/i386/x86-64-addr32.d b/gas/testsuite/gas/i386/x86-64-addr32.d index c513f0d..d9481a7 100644 --- a/gas/testsuite/gas/i386/x86-64-addr32.d +++ b/gas/testsuite/gas/i386/x86-64-addr32.d @@ -10,15 +10,15 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00[ ]+lea[ ]+0x0\(%eax\),%rax.* [ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00[ ]+lea[ ]+0x0\(%r8d\),%rax.* [ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00[ ]+lea[ ]+0x0\(%eip\),%rax.* -[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00[ ]+lea[ ]+0x0,%rax.* +[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00[ ]+lea[ ]+0x0\(,%eiz,1\),%rax.* [ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov 0x600898,%al [ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov 0x600898,%ax [ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov 0x600898,%eax [ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov 0x600898,%rax [ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov 0x800898,%rax -[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 mov[ ]+0x800898,%rbx +[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 mov[ ]+0x800898\(,%eiz,1\),%rbx [ ]*[a-f0-9]+: 67 48 a1 ef cd ab 89 addr32 mov 0x89abcdef,%rax -[ ]*[a-f0-9]+: 67 48 8b 1c 25 ef cd ab 89 mov[ ]+0x89abcdef,%rbx +[ ]*[a-f0-9]+: 67 48 8b 1c 25 ef cd ab 89 mov[ ]+0x89abcdef\(,%eiz,1\),%rbx [ ]*[a-f0-9]+: 67 48 b8 ef cd ab 89 00 00 00 00 addr32 movabs \$0x89abcdef,%rax [ ]*[a-f0-9]+: 67 48 bb ef cd ab 89 00 00 00 00 addr32 movabs \$0x89abcdef,%rbx [ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov %al,0x600898 @@ -26,9 +26,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov %eax,0x600898 [ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov %rax,0x600898 [ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov %rax,0x800898 -[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 mov[ ]+%rbx,0x800898 +[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 mov[ ]+%rbx,0x800898\(,%eiz,1\) [ ]*[a-f0-9]+: 67 48 a3 ef cd ab 89 addr32 mov %rax,0x89abcdef -[ ]*[a-f0-9]+: 67 48 89 1c 25 ef cd ab 89 mov[ ]+%rbx,0x89abcdef -[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+%eax,0xff332211 +[ ]*[a-f0-9]+: 67 48 89 1c 25 ef cd ab 89 mov[ ]+%rbx,0x89abcdef\(,%eiz,1\) +[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+%eax,0xff332211\(,%eiz,1\) [ ]*[a-f0-9]+: 67 89 04 65 11 22 33 ff mov[ ]+%eax,0xff332211\(,%eiz,2\) #pass diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 91d7f5b..94e92b0 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2020-07-21 Jan Beulich <jbeulich@suse.com> + + * i386-dis.c (OP_E_memory): Revert previous change. + 2020-07-15 H.J. Lu <hongjiu.lu@intel.com> PR gas/26237 diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index d1d7a7d..cd8a9a8 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -11818,7 +11818,7 @@ OP_E_memory (int bytemode, int sizeflag) /* Without base nor index registers, zero-extend the lower 32-bit displacement to 64 bits. */ disp = (unsigned int) disp; - needindex = scale; + needindex = 1; } needaddr32 = 1; } |