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| author | Maciej W. Rozycki <macro@linux-mips.org> | 2012-06-11 10:11:14 +0000 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@linux-mips.org> | 2012-06-11 10:11:14 +0000 |
| commit | 2e81047f911b9181987439ec157dc3ed1e567393 (patch) | |
| tree | 051151454be91e45c0a35d05b2f0b08b7a6c0234 | |
| parent | c7a8dbf91f37df83dd9153f0a540a34d710d5f73 (diff) | |
| download | gdb-2e81047f911b9181987439ec157dc3ed1e567393.zip gdb-2e81047f911b9181987439ec157dc3ed1e567393.tar.gz gdb-2e81047f911b9181987439ec157dc3ed1e567393.tar.bz2 | |
* mips-tdep.c (mips_push_dummy_code): Handle microMIPS code.
| -rw-r--r-- | gdb/ChangeLog | 4 | ||||
| -rw-r--r-- | gdb/mips-tdep.c | 13 |
2 files changed, 14 insertions, 3 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 15b457c..8480c78 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,7 @@ +2012-06-11 Maciej W. Rozycki <macro@codesourcery.com> + + * mips-tdep.c (mips_push_dummy_code): Handle microMIPS code. + 2012-06-09 Siva Chandra Reddy <sivachandra@google.com> * valarith.c (binop_types_user_defined_p): Fix a typo. diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index 4c000e7..0439989 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -4197,11 +4197,18 @@ mips_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp, CORE_ADDR *real_pc, CORE_ADDR *bp_addr, struct regcache *regcache) { - CORE_ADDR nop_addr; static gdb_byte nop_insn[] = { 0, 0, 0, 0 }; + CORE_ADDR nop_addr; + CORE_ADDR bp_slot; /* Reserve enough room on the stack for our breakpoint instruction. */ - *bp_addr = sp - sizeof (nop_insn); + bp_slot = sp - sizeof (nop_insn); + + /* Return to microMIPS mode if calling microMIPS code to avoid + triggering an address error exception on processors that only + support microMIPS execution. */ + *bp_addr = (mips_pc_is_micromips (gdbarch, funaddr) + ? make_compact_addr (bp_slot) : bp_slot); /* The breakpoint layer automatically adjusts the address of breakpoints inserted in a branch delay slot. With enough @@ -4210,7 +4217,7 @@ mips_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp, trigger the adjustement, and break the function call entirely. So, we reserve those 4 bytes and write a nop instruction to prevent that from happening. */ - nop_addr = *bp_addr - sizeof (nop_insn); + nop_addr = bp_slot - sizeof (nop_insn); write_memory (nop_addr, nop_insn, sizeof (nop_insn)); sp = mips_frame_align (gdbarch, nop_addr); |