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| author | Peter Bergner <bergner@linux.ibm.com> | 2020-08-18 12:42:31 -0500 |
|---|---|---|
| committer | Peter Bergner <bergner@linux.ibm.com> | 2020-08-18 12:43:46 -0500 |
| commit | f5fc30d05c7e2aaba4fe892ab52fbf0930342dac (patch) | |
| tree | dad058733f697c43e23545a6a090afb8f7ace30e | |
| parent | d2bb907b8b46e1a06cab44aa783f377b3c0d07b0 (diff) | |
| download | gdb-f5fc30d05c7e2aaba4fe892ab52fbf0930342dac.zip gdb-f5fc30d05c7e2aaba4fe892ab52fbf0930342dac.tar.gz gdb-f5fc30d05c7e2aaba4fe892ab52fbf0930342dac.tar.bz2 | |
PowerPC: Rename xvcvbf16sp to xvcvbf16spn
The xvcvbf16sp mnemonic has been renamed to xvcvbf16spn, to be consistent
with the other non-signaling conversion instructions which all end with "n".
opcodes/
* ppc-opc.c (powerpc_opcodes) <xvcvbf16sp>: Rename from this...
<xvcvbf16spn>: ...to this.
gas/
* testsuite/gas/ppc/vsx4.s: Update test to use new mnemonic.
* testsuite/gas/ppc/vsx4.d: Likewise.
| -rw-r--r-- | gas/testsuite/gas/ppc/vsx4.d | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/ppc/vsx4.s | 2 | ||||
| -rw-r--r-- | opcodes/ppc-opc.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/gas/testsuite/gas/ppc/vsx4.d b/gas/testsuite/gas/ppc/vsx4.d index 657a8ae..e21540e 100644 --- a/gas/testsuite/gas/ppc/vsx4.d +++ b/gas/testsuite/gas/ppc/vsx4.d @@ -7,6 +7,6 @@ Disassembly of section \.text: 0+0 <vsx4>: -.*: (f0 50 6f 6f|6f 6f 50 f0) xvcvbf16sp vs34,vs45 +.*: (f0 50 6f 6f|6f 6f 50 f0) xvcvbf16spn vs34,vs45 .*: (f1 f1 27 6f|6f 27 f1 f1) xvcvspbf16 vs47,vs36 #pass diff --git a/gas/testsuite/gas/ppc/vsx4.s b/gas/testsuite/gas/ppc/vsx4.s index 290f595..3d7534e 100644 --- a/gas/testsuite/gas/ppc/vsx4.s +++ b/gas/testsuite/gas/ppc/vsx4.s @@ -1,4 +1,4 @@ .text vsx4: - xvcvbf16sp 34,45 + xvcvbf16spn 34,45 xvcvspbf16 47,36 diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index 75944e2..cdaffdf 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -8463,7 +8463,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"xvxexpsp", XX2VA(60,475,8),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}}, {"xvxsigsp", XX2VA(60,475,9),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}}, {"xxbrw", XX2VA(60,475,15),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}}, -{"xvcvbf16sp", XX2VA(60,475,16),XX2_MASK, PPCVSX4, PPCVLE, {XT6, XB6}}, +{"xvcvbf16spn", XX2VA(60,475,16),XX2_MASK, PPCVSX4, PPCVLE, {XT6, XB6}}, {"xvcvspbf16", XX2VA(60,475,17),XX2_MASK, PPCVSX4, PPCVLE, {XT6, XB6}}, {"xxbrd", XX2VA(60,475,23),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}}, {"xvcvhpsp", XX2VA(60,475,24),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}}, |