diff options
| author | Mike Frysinger <vapier@gentoo.org> | 2021-01-05 03:27:19 -0500 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2021-01-05 19:29:46 -0500 |
| commit | 865288236d881acecdcf0aaa636fd28fd811d862 (patch) | |
| tree | 6c55c9f4a83bc6ce1d5cbaeab8d8c9b6acb6c913 | |
| parent | c004e77f7dba0d80c5ee9a67bfb8457b9eb424a4 (diff) | |
| download | gdb-865288236d881acecdcf0aaa636fd28fd811d862.zip gdb-865288236d881acecdcf0aaa636fd28fd811d862.tar.gz gdb-865288236d881acecdcf0aaa636fd28fd811d862.tar.bz2 | |
sim: fr30: delete unused testsuite
Looking through the history, it doesn't seem like the fr30 port was
ever merged. There used to be a testsuite/fr30-elf/ dir, but that
was punted back in 2005 as being dead too. Since there's no refs
and the dir hasn't been touched since 1999, lets assume no one will
ever notice or care.
108 files changed, 4 insertions, 7226 deletions
diff --git a/sim/testsuite/ChangeLog b/sim/testsuite/ChangeLog index e1b52a8..4363bb5 100644 --- a/sim/testsuite/ChangeLog +++ b/sim/testsuite/ChangeLog @@ -1,5 +1,9 @@ 2021-01-05 Mike Frysinger <vapier@gentoo.org> + * sim/fr30/: Delete. + +2021-01-05 Mike Frysinger <vapier@gentoo.org> + * common/Make-common.in: Delete. 2021-01-04 Mike Frysinger <vapier@gentoo.org> diff --git a/sim/testsuite/sim/fr30/ChangeLog b/sim/testsuite/sim/fr30/ChangeLog deleted file mode 100644 index f09850d..0000000 --- a/sim/testsuite/sim/fr30/ChangeLog +++ /dev/null @@ -1,112 +0,0 @@ -Mon Mar 22 13:28:56 1999 Dave Brolley <brolley@cygnus.com> - - * stb.cgs: Correct for unaligned access. - * sth.cgs: Correct for unaligned access. - * ldub.cgs: Fix typo: lduh->ldub. Correct - for unaligned access. - * and.cgs: Test unaligned access. - -1999-01-05 Doug Evans <devans@casey.cygnus.com> - - * allinsn.exp: Set all_machs. - * misc.exp: Likewise. - -Fri Dec 18 17:19:34 1998 Dave Brolley <brolley@cygnus.com> - - * ldres.cgs: New testcase. - * copld.cgs: New testcase. - * copst.cgs: New testcase. - * copsv.cgs: New testcase. - * nop.cgs: New testcase. - * andccr.cgs: New testcase. - * orccr.cgs: New testcase. - * addsp.cgs: New testcase. - * stilm.cgs: New testcase. - * extsb.cgs: New testcase. - * extub.cgs: New testcase. - * extsh.cgs: New testcase. - * extuh.cgs: New testcase. - * enter.cgs: New testcase. - * leave.cgs: New testcase. - * xchb.cgs: New testcase. - * dmovb.cgs: New testcase. - * dmov.cgs: New testcase. - * dmovh.cgs: New testcase. - -Thu Dec 17 17:18:43 1998 Dave Brolley <brolley@cygnus.com> - - * testutils.inc (take_branch{_d},no_branch{_d}): New macros. - * ret.cgs: Add tests fir ret:d. - * inte.cgs: New testcase. - * reti.cgs: New testcase. - * bra.cgs: New testcase. - * bno.cgs: New testcase. - * beq.cgs: New testcase. - * bne.cgs: New testcase. - * bc.cgs: New testcase. - * bnc.cgs: New testcase. - * bn.cgs: New testcase. - * bp.cgs: New testcase. - * bv.cgs: New testcase. - * bnv.cgs: New testcase. - * blt.cgs: New testcase. - * bge.cgs: New testcase. - * ble.cgs: New testcase. - * bgt.cgs: New testcase. - * bls.cgs: New testcase. - * bhi.cgs: New testcase. - -Tue Dec 15 17:47:13 1998 Dave Brolley <brolley@cygnus.com> - - * div.cgs (int): Add signed division scenario. - * int.cgs (int): Complete testcase. - * testutils.inc (_start): Initialize tbr. - (test_s_user,test_s_system,set_i,test_i): New macros. - -1998-12-14 Doug Evans <devans@casey.cygnus.com> - - * hello.ms: Add trailing \n to expected output. - -1998-12-14 Dave Brolley <brolley@cygnus.com> - - * call.cgs: Test ret here as well. - * ld.cgs: Remove bogus comment. - * testutils.inc (save_rp,restore_rp): New macros. - * div.ms: New testcase. - * st.cgs: New testcase. - * sth.cgs: New testcase. - * stb.cgs: New testcase. - * mov.cgs: New testcase. - * jmp.cgs: New testcase. - * ret.cgs: New testcase. - * int.cgs: New testcase. - -Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com> - - * div0s.cgs: New testcase. - * div0u.cgs: New testcase. - * div1.cgs: New testcase. - * div2.cgs: New testcase. - * div3.cgs: New testcase. - * div4s.cgs: New testcase. - * testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros. - -Tue Dec 8 13:16:53 1998 Dave Brolley <brolley@cygnus.com> - - * testutils.inc (set_s_user): Correct Mask. - (set_s_system): Correct Mask. - * ld.cgs (ld): Move previously failing test back - into place. - * ldm0.cgs: New testcase. - * ldm1.cgs: New testcase. - * stm0.cgs: New testcase. - * stm1.cgs: New testcase. - -Thu Dec 3 14:20:03 1998 Dave Brolley <brolley@cygnus.com> - - * ld.cgs: Implement more loads. - * call.cgs: New testcase. - * testutils.inc (testr_h_dr): New macro. - (set_s_user,set_s_system): New macros. - - * .: New Directory. diff --git a/sim/testsuite/sim/fr30/add.cgs b/sim/testsuite/sim/fr30/add.cgs deleted file mode 100644 index 1409df1..0000000 --- a/sim/testsuite/sim/fr30/add.cgs +++ /dev/null @@ -1,55 +0,0 @@ -# fr30 testcase for add $Rj,$Ri, add $u4,$Rj -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global add -add: - ; Test add $Rj,$Ri - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - add r7,r8 - test_cc 0 0 0 0 - test_h_gr 3,r8 - - mvi_h_gr 0x7fffffff,r7 - mvi_h_gr 1,r8 - set_cc 0x05 ; Set mask opposite of expected - add r7,r8 - test_cc 1 0 1 0 - test_h_gr 0x80000000,r8 - - set_cc 0x08 ; Set mask opposite of expected - add r8,r8 - test_cc 0 1 1 1 - test_h_gr 0,r8 - - ; Test add $u4Ri - mvi_h_gr 4,r8 - set_cc 0x0f ; Set mask opposite of expected - add 0,r8 - test_cc 0 0 0 0 - test_h_gr 4,r8 - set_cc 0x0f ; Set mask opposite of expected - add 1,r8 - test_cc 0 0 0 0 - test_h_gr 5,r8 - set_cc 0x0f ; Set mask opposite of expected - add 15,r8 - test_cc 0 0 0 0 - test_h_gr 20,r8 - mvi_h_gr 0x7fffffff,r8 ; test neg and overflow bits - set_cc 0x05 ; Set mask opposite of expected - add 1,r8 - test_cc 1 0 1 0 - test_h_gr 0x80000000,r8 - set_cc 0x08 ; Set mask opposite of expected - add r8,r8 ; test zero, carry and overflow bits - test_cc 0 1 1 1; - test_h_gr 0,r8 - - pass diff --git a/sim/testsuite/sim/fr30/add.ms b/sim/testsuite/sim/fr30/add.ms deleted file mode 100644 index 9da6868..0000000 --- a/sim/testsuite/sim/fr30/add.ms +++ /dev/null @@ -1,13 +0,0 @@ -# fr30 testcase for add $Rj,$Ri -# cpu {} - - .include "testutils.inc" - - START - - .text - .global add -add: - add ac,ac - fail - EXIT 0 diff --git a/sim/testsuite/sim/fr30/add2.cgs b/sim/testsuite/sim/fr30/add2.cgs deleted file mode 100644 index 856acde..0000000 --- a/sim/testsuite/sim/fr30/add2.cgs +++ /dev/null @@ -1,43 +0,0 @@ -# fr30 testcase for add2 $m4,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global add -add: - mvi_h_gr 30,r8 - set_cc 0x0e ; Set mask opposite of expected - add2 -16,r8 ; Max value of immediate field - test_cc 0 0 0 1 - test_h_gr 14,r8 - - set_cc 0x0e ; Set mask opposite of expected - add2 -3,r8 ; Mid value of immediate field - test_cc 0 0 0 1 - test_h_gr 11,r8 - - set_cc 0x0e ; Set mask opposite of expected - add2 -1,r8 ; Min value of immediate field - test_cc 0 0 0 1 - test_h_gr 10,r8 - - set_cc 0x0a ; Set mask opposite of expected - add2 -10,r8 ; Test zero and carry bits - test_cc 0 1 0 1 - test_h_gr 0,r8 - - set_cc 0x07 ; Set mask opposite of expected - add2 -16,r8 ; Test negative bit - test_cc 1 0 0 0 - test_h_gr -16,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x0c ; Set mask opposite of expected - add2 -1,r8 ; Test overflow bit - test_cc 0 0 1 1 - test_h_gr 0x7fffffff,r8 - - pass diff --git a/sim/testsuite/sim/fr30/addc.cgs b/sim/testsuite/sim/fr30/addc.cgs deleted file mode 100644 index e135478..0000000 --- a/sim/testsuite/sim/fr30/addc.cgs +++ /dev/null @@ -1,50 +0,0 @@ -# fr30 testcase for addc $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global add -add: - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0e ; Make sure carry bit is off - addc r7,r8 - test_cc 0 0 0 0 - test_h_gr 3,r8 - - mvi_h_gr 0x7fffffff,r7 - mvi_h_gr 1,r8 - set_cc 0x04 ; Make sure carry bit is off - addc r7,r8 - test_cc 1 0 1 0 - test_h_gr 0x80000000,r8 - - set_cc 0x08 ; Make sure carry bit is off - addc r8,r8 - test_cc 0 1 1 1 - test_h_gr 0,r8 - - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0f ; Make sure carry bit is on - addc r7,r8 - test_cc 0 0 0 0 - test_h_gr 4,r8 - - mvi_h_gr 0x7fffffff,r7 - mvi_h_gr 0,r8 - set_cc 0x05 ; Make sure carry bit is on - addc r7,r8 - test_cc 1 0 1 0 - test_h_gr 0x80000000,r8 - - mvi_h_gr 0x7fffffff,r7 - set_cc 0x0b ; Make sure carry bit is on - addc r7,r8 - test_cc 0 1 0 1; - test_h_gr 0,r8 - - pass diff --git a/sim/testsuite/sim/fr30/addn.cgs b/sim/testsuite/sim/fr30/addn.cgs deleted file mode 100644 index b7638d6..0000000 --- a/sim/testsuite/sim/fr30/addn.cgs +++ /dev/null @@ -1,55 +0,0 @@ -# fr30 testcase for addn $Rj,$Ri, addn $u4,$Rj -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global addn -addn: - ; Test addn $Rj,$Ri - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of normal result - addn r7,r8 - test_cc 1 1 1 1 - test_h_gr 3,r8 - - mvi_h_gr 0x7fffffff,r7 - mvi_h_gr 1,r8 - set_cc 0x05 ; Set mask opposite of normal result - addn r7,r8 - test_cc 0 1 0 1 - test_h_gr 0x80000000,r8 - - set_cc 0x08 ; Set mask opposite of normal result - addn r8,r8 - test_cc 1 0 0 0 - test_h_gr 0,r8 - - ; Test addn $u4Ri - mvi_h_gr 4,r8 - set_cc 0x0f ; Set mask opposite of normal result - addn 0,r8 - test_cc 1 1 1 1 - test_h_gr 4,r8 - set_cc 0x0f ; Set mask opposite of normal result - addn 1,r8 - test_cc 1 1 1 1 - test_h_gr 5,r8 - set_cc 0x0f ; Set mask opposite of normal result - addn 15,r8 - test_cc 1 1 1 1 - test_h_gr 20,r8 - mvi_h_gr 0x7fffffff,r8 ; test neg and overflow bits - set_cc 0x05 ; Set mask opposite of normal result - addn 1,r8 - test_cc 0 1 0 1 - test_h_gr 0x80000000,r8 - set_cc 0x08 ; Set mask opposite of normal result - addn r8,r8 ; test zero, carry and overflow bits - test_cc 1 0 0 0; - test_h_gr 0,r8 - - pass diff --git a/sim/testsuite/sim/fr30/addn2.cgs b/sim/testsuite/sim/fr30/addn2.cgs deleted file mode 100644 index 9525baf..0000000 --- a/sim/testsuite/sim/fr30/addn2.cgs +++ /dev/null @@ -1,43 +0,0 @@ -# fr30 testcase for addn2 $m4,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global add -add: - mvi_h_gr 30,r8 - set_cc 0x0e ; Set mask opposite of normal result - addn2 -16,r8 ; Max value of immediate field - test_cc 1 1 1 0 - test_h_gr 14,r8 - - set_cc 0x0e ; Set mask opposite of normal result - addn2 -3,r8 ; Mid value of immediate field - test_cc 1 1 1 0 - test_h_gr 11,r8 - - set_cc 0x0e ; Set mask opposite of normal result - addn2 -1,r8 ; Min value of immediate field - test_cc 1 1 1 0 - test_h_gr 10,r8 - - set_cc 0x0a ; Set mask opposite of normal result - addn2 -10,r8 ; Test zero and carry bits - test_cc 1 0 1 0 - test_h_gr 0,r8 - - set_cc 0x07 ; Set mask opposite of normal result - addn2 -16,r8 ; Test negative bit - test_cc 0 1 1 1 - test_h_gr -16,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x0c ; Set mask opposite of normal result - addn2 -1,r8 ; Test overflow bit - test_cc 1 1 0 0 - test_h_gr 0x7fffffff,r8 - - pass diff --git a/sim/testsuite/sim/fr30/addsp.cgs b/sim/testsuite/sim/fr30/addsp.cgs deleted file mode 100644 index da5bc36..0000000 --- a/sim/testsuite/sim/fr30/addsp.cgs +++ /dev/null @@ -1,31 +0,0 @@ -# fr30 testcase for addsp $s10 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global addsp -addsp: - ; Test addsp $s10 - mvr_h_gr sp,r7 ; save stack pointer permanently - mvr_h_gr sp,r8 ; Shadow updated sp - set_cc 0x0f ; Condition codes are irrelevent - addsp 508 - test_cc 1 1 1 1 - inci_h_gr 508,r8 - testr_h_gr r8,sp - - set_cc 0x0e ; Condition codes are irrelevent - addsp 0 - test_cc 1 1 1 0 - testr_h_gr r8,sp - - set_cc 0x0d ; Condition codes are irrelevent - addsp -512 - test_cc 1 1 0 1 - inci_h_gr -512,r8 - testr_h_gr r8,sp - - pass diff --git a/sim/testsuite/sim/fr30/allinsn.exp b/sim/testsuite/sim/fr30/allinsn.exp deleted file mode 100644 index 8c3d512..0000000 --- a/sim/testsuite/sim/fr30/allinsn.exp +++ /dev/null @@ -1,19 +0,0 @@ -# FR30 simulator testsuite. - -if [istarget fr30*-*-*] { - # load support procs - # load_lib cgen.exp - - # all machines - set all_machs "fr30" - - foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.cgs]] { - # If we're only testing specific files and this isn't one of them, - # skip it. - if ![runtest_file_p $runtests $src] { - continue - } - - run_sim_test $src $all_machs - } -} diff --git a/sim/testsuite/sim/fr30/and.cgs b/sim/testsuite/sim/fr30/and.cgs deleted file mode 100644 index 3148a31..0000000 --- a/sim/testsuite/sim/fr30/and.cgs +++ /dev/null @@ -1,57 +0,0 @@ -# fr30 testcase for and $Rj,$Ri, and $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global and -and: - ; Test and $Rj,$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_gr 0x55555555,r8 - set_cc 0x0b ; Set mask opposite of expected - and r7,r8 - test_cc 0 1 1 1 - test_h_gr 0,r8 - - mvi_h_gr 0xffff0000,r8 - set_cc 0x04 ; Set mask opposite of expected - and r7,r8 - test_cc 1 0 0 0 - test_h_gr 0xaaaa0000,r8 - - mvi_h_gr 0xffff,r8 - set_cc 0x0d ; Set mask opposite of expected - and r7,r8 - test_cc 0 0 0 1 - test_h_gr 0xaaaa,r8 - - ; Test and $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x0b ; Set mask opposite of expected - and r7,@sp - test_cc 0 1 1 1 - test_h_mem 0,sp - - mvi_h_mem 0xffff0000,sp - set_cc 0x04 ; Set mask opposite of expected - and r7,@sp - test_cc 1 0 0 0 - test_h_mem 0xaaaa0000,sp - - mvr_h_gr sp,r9 - inci_h_gr 4,r9 - mvi_h_mem 0xffffffff,sp - mvi_h_mem 0xffff0000,r9 - inci_h_gr 1,sp ; test unaligned access - set_cc 0x05 ; Set mask opposite of expected - and r7,@sp - test_cc 1 0 0 1 - inci_h_gr -1,sp - test_h_mem 0xaaaaaaaa,sp - test_h_mem 0xffff0000,r9 - - pass diff --git a/sim/testsuite/sim/fr30/andb.cgs b/sim/testsuite/sim/fr30/andb.cgs deleted file mode 100644 index c01d49d..0000000 --- a/sim/testsuite/sim/fr30/andb.cgs +++ /dev/null @@ -1,31 +0,0 @@ -# fr30 testcase for andb $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global andb -andb: - ; Test andb $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x0b ; Set mask opposite of expected - andb r7,@sp - test_cc 0 1 1 1 - test_h_mem 0x00555555,sp - - mvi_h_mem 0xffffffff,sp - set_cc 0x04 ; Set mask opposite of expected - andb r7,@sp - test_cc 1 0 0 0 - test_h_mem 0xaaffffff,sp - - mvi_h_mem 0x0fffffff,sp - set_cc 0x0d ; Set mask opposite of expected - andb r7,@sp - test_cc 0 0 0 1 - test_h_mem 0x0affffff,sp - - pass diff --git a/sim/testsuite/sim/fr30/andccr.cgs b/sim/testsuite/sim/fr30/andccr.cgs deleted file mode 100644 index 7f8f99e..0000000 --- a/sim/testsuite/sim/fr30/andccr.cgs +++ /dev/null @@ -1,51 +0,0 @@ -# fr30 testcase for andccr $u8 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global andccr -andccr: - set_cc 0x00 - set_i 0 - set_s_system - andccr 0xff - test_cc 0 0 0 0 - test_i 0 - test_s_system - - set_cc 0x0f - set_i 1 - set_s_user - andccr 0xff - test_cc 1 1 1 1 - test_i 1 - test_s_user - - set_cc 0x0f - set_i 1 - set_s_user - andccr 0xaa - test_cc 1 0 1 0 - test_i 0 - test_s_user - - set_cc 0x0f - set_i 1 - set_s_user - andccr 0xc0 - test_cc 0 0 0 0 - test_i 0 - test_s_system - - set_cc 0x0f - set_i 1 - set_s_user - andccr 0x3f ; no effect - test_cc 1 1 1 1 - test_i 1 - test_s_user - - pass diff --git a/sim/testsuite/sim/fr30/andh.cgs b/sim/testsuite/sim/fr30/andh.cgs deleted file mode 100644 index a172fc7..0000000 --- a/sim/testsuite/sim/fr30/andh.cgs +++ /dev/null @@ -1,31 +0,0 @@ -# fr30 testcase for andh $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global andh -andh: - ; Test andh $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x0b ; Set mask opposite of expected - andh r7,@sp - test_cc 0 1 1 1 - test_h_mem 0x00005555,sp - - mvi_h_mem 0xffffffff,sp - set_cc 0x04 ; Set mask opposite of expected - andh r7,@sp - test_cc 1 0 0 0 - test_h_mem 0xaaaaffff,sp - - mvi_h_mem 0x00ffffff,sp - set_cc 0x0d ; Set mask opposite of expected - andh r7,@sp - test_cc 0 0 0 1 - test_h_mem 0x00aaffff,sp - - pass diff --git a/sim/testsuite/sim/fr30/asr.cgs b/sim/testsuite/sim/fr30/asr.cgs deleted file mode 100644 index f783d41..0000000 --- a/sim/testsuite/sim/fr30/asr.cgs +++ /dev/null @@ -1,65 +0,0 @@ -# fr30 testcase for asr $Rj,$Ri, asr $u4,$Rj -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global asr -asr: - ; Test asr $Rj,$Ri - mvi_h_gr 0xdeadbee0,r7 ; Shift by 0 - mvi_h_gr 0x80000000,r8 - set_cc 0x05 ; Set mask opposite of expected - asr r7,r8 - test_cc 1 0 0 0 - test_h_gr 0x80000000,r8 - - mvi_h_gr 0xdeadbee1,r7 ; Shift by 1 - mvi_h_gr 0x80000000,r8 - set_cc 0x07 ; Set mask opposite of expected - asr r7,r8 - test_cc 1 0 1 0 - test_h_gr 0xc0000000,r8 - - mvi_h_gr 0xdeadbeff,r7 ; Shift by 31 - mvi_h_gr 0x80000000,r8 - set_cc 0x07 ; Set mask opposite of expected - asr r7,r8 - test_cc 1 0 1 0 - test_h_gr -1,r8 - - mvi_h_gr 0xdeadbeff,r7 ; clear register - mvi_h_gr 0x40000000,r8 - set_cc 0x0a ; Set mask opposite of expected - asr r7,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - ; Test asr $u4Ri - mvi_h_gr 0x80000000,r8 - set_cc 0x05 ; Set mask opposite of expected - asr 0,r8 - test_cc 1 0 0 0 - test_h_gr 0x80000000,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x07 ; Set mask opposite of expected - asr 1,r8 - test_cc 1 0 1 0 - test_h_gr 0xc0000000,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x07 ; Set mask opposite of expected - asr 15,r8 - test_cc 1 0 1 0 - test_h_gr 0xffff0000,r8 - - mvi_h_gr 0x00004000,r8 - set_cc 0x0a ; Set mask opposite of expected - asr 15,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - pass diff --git a/sim/testsuite/sim/fr30/asr2.cgs b/sim/testsuite/sim/fr30/asr2.cgs deleted file mode 100644 index 884e40d..0000000 --- a/sim/testsuite/sim/fr30/asr2.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for asr2 $u4,$Rj -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global asr2 -asr2: - ; Test asr2 $u4Ri - mvi_h_gr 0x80000000,r8 - set_cc 0x05 ; Set mask opposite of expected - asr2 0,r8 - test_cc 1 0 0 0 - test_h_gr 0xffff8000,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x07 ; Set mask opposite of expected - asr2 1,r8 - test_cc 1 0 1 0 - test_h_gr 0xffffc000,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x07 ; Set mask opposite of expected - asr2 15,r8 - test_cc 1 0 1 0 - test_h_gr -1,r8 - - mvi_h_gr 0x40000000,r8 - set_cc 0x0a ; Set mask opposite of expected - asr2 15,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - pass diff --git a/sim/testsuite/sim/fr30/bandh.cgs b/sim/testsuite/sim/fr30/bandh.cgs deleted file mode 100644 index 45ab5e5..0000000 --- a/sim/testsuite/sim/fr30/bandh.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# fr30 testcase for bandh $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bandh -bandh: - ; Test bandh $Rj,@$Ri - mvi_h_mem 0x55555555,sp - set_cc 0x0f ; Condition codes should not change - bandh 0x0a,@sp - test_cc 1 1 1 1 - test_h_mem 0x05555555,sp - - mvi_h_mem 0xffffffff,sp - set_cc 0x04 ; Condition codes should not change - bandh 0x0a,@sp - test_cc 0 1 0 0 - test_h_mem 0xafffffff,sp - - mvi_h_mem 0xe5ffffff,sp - set_cc 0x0a ; Condition codes should not change - bandh 0x07,@sp - test_cc 1 0 1 0 - test_h_mem 0x65ffffff,sp - - pass diff --git a/sim/testsuite/sim/fr30/bandl.cgs b/sim/testsuite/sim/fr30/bandl.cgs deleted file mode 100644 index 9cd4825..0000000 --- a/sim/testsuite/sim/fr30/bandl.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# fr30 testcase for bandl $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bandl -bandl: - ; Test bandl $Rj,@$Ri - mvi_h_mem 0x55555555,sp - set_cc 0x0f ; Condition codes should not change - bandl 0x0a,@sp - test_cc 1 1 1 1 - test_h_mem 0x50555555,sp - - mvi_h_mem 0xffffffff,sp - set_cc 0x04 ; Condition codes should not change - bandl 0x0a,@sp - test_cc 0 1 0 0 - test_h_mem 0xfaffffff,sp - - mvi_h_mem 0x5effffff,sp - set_cc 0x0a ; Condition codes should not change - bandl 0x07,@sp - test_cc 1 0 1 0 - test_h_mem 0x56ffffff,sp - - pass diff --git a/sim/testsuite/sim/fr30/bc.cgs b/sim/testsuite/sim/fr30/bc.cgs deleted file mode 100644 index 0502625..0000000 --- a/sim/testsuite/sim/fr30/bc.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bc $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bc -bc: - ; Test bc $label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch bc - - set_cc 0x0e ; condition codes are irrelevent - no_branch bc - - set_cc 0x0d ; condition codes are irrelevent - take_branch bc - - set_cc 0x0c ; condition codes are irrelevent - no_branch bc - - set_cc 0x0b ; condition codes are irrelevent - take_branch bc - - set_cc 0x0a ; condition codes are irrelevent - no_branch bc - - set_cc 0x09 ; condition codes are irrelevent - take_branch bc - - set_cc 0x08 ; condition codes are irrelevent - no_branch bc - - set_cc 0x07 ; condition codes are irrelevent - take_branch bc - - set_cc 0x06 ; condition codes are irrelevent - no_branch bc - - set_cc 0x05 ; condition codes are irrelevent - take_branch bc - - set_cc 0x04 ; condition codes are irrelevent - no_branch bc - - set_cc 0x03 ; condition codes are irrelevent - take_branch bc - - set_cc 0x02 ; condition codes are irrelevent - no_branch bc - - set_cc 0x01 ; condition codes are irrelevent - take_branch bc - - set_cc 0x00 ; condition codes are irrelevent - no_branch bc - - ; Test bc:d label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch_d bc:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - no_branch_d bc:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - take_branch_d bc:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - no_branch_d bc:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - take_branch_d bc:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - no_branch_d bc:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - take_branch_d bc:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - no_branch_d bc:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - take_branch_d bc:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - no_branch_d bc:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - take_branch_d bc:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - no_branch_d bc:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - take_branch_d bc:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - no_branch_d bc:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - take_branch_d bc:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - no_branch_d bc:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/beorh.cgs b/sim/testsuite/sim/fr30/beorh.cgs deleted file mode 100644 index 6d07f1a..0000000 --- a/sim/testsuite/sim/fr30/beorh.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for beorh $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global beorh -beorh: - ; Test beorh $Rj,@$Ri - mvi_h_mem 0x55555555,sp - set_cc 0x0f ; Condition codes should not change - beorh 0x0a,@sp - test_cc 1 1 1 1 - test_h_mem 0xf5555555,sp - - mvi_h_mem 0x0fffffff,sp - set_cc 0x04 ; Condition codes should not change - beorh 0x00,@sp - test_cc 0 1 0 0 - test_h_mem 0x0fffffff,sp - - mvi_h_mem 0xffffffff,sp - set_cc 0x0a ; Condition codes should not change - beorh 0x0f,@sp - test_cc 1 0 1 0 - test_h_mem 0x0fffffff,sp - - mvi_h_mem 0x9eadbeef,sp - set_cc 0x09 ; Condition codes should not change - beorh 0x04,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/beorl.cgs b/sim/testsuite/sim/fr30/beorl.cgs deleted file mode 100644 index f7ea053..0000000 --- a/sim/testsuite/sim/fr30/beorl.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for beorl $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global beorl -beorl: - ; Test beorl $Rj,@$Ri - mvi_h_mem 0x55555555,sp - set_cc 0x0f ; Condition codes should not change - beorl 0x0a,@sp - test_cc 1 1 1 1 - test_h_mem 0x5f555555,sp - - mvi_h_mem 0xf0ffffff,sp - set_cc 0x04 ; Condition codes should not change - beorl 0x00,@sp - test_cc 0 1 0 0 - test_h_mem 0xf0ffffff,sp - - mvi_h_mem 0xffffffff,sp - set_cc 0x0a ; Condition codes should not change - beorl 0x0f,@sp - test_cc 1 0 1 0 - test_h_mem 0xf0ffffff,sp - - mvi_h_mem 0xddadbeef,sp - set_cc 0x09 ; Condition codes should not change - beorl 0x03,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/beq.cgs b/sim/testsuite/sim/fr30/beq.cgs deleted file mode 100644 index edd797e..0000000 --- a/sim/testsuite/sim/fr30/beq.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for beq $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global beq -beq: - ; Test beq $label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch beq - - set_cc 0x0e ; condition codes are irrelevent - take_branch beq - - set_cc 0x0d ; condition codes are irrelevent - take_branch beq - - set_cc 0x0c ; condition codes are irrelevent - take_branch beq - - set_cc 0x0b ; condition codes are irrelevent - no_branch beq - - set_cc 0x0a ; condition codes are irrelevent - no_branch beq - - set_cc 0x09 ; condition codes are irrelevent - no_branch beq - - set_cc 0x08 ; condition codes are irrelevent - no_branch beq - - set_cc 0x07 ; condition codes are irrelevent - take_branch beq - - set_cc 0x06 ; condition codes are irrelevent - take_branch beq - - set_cc 0x05 ; condition codes are irrelevent - take_branch beq - - set_cc 0x04 ; condition codes are irrelevent - take_branch beq - - set_cc 0x03 ; condition codes are irrelevent - no_branch beq - - set_cc 0x02 ; condition codes are irrelevent - no_branch beq - - set_cc 0x01 ; condition codes are irrelevent - no_branch beq - - set_cc 0x00 ; condition codes are irrelevent - no_branch beq - - ; Test beq:d label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch_d beq:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - take_branch_d beq:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - take_branch_d beq:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - take_branch_d beq:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - no_branch_d beq:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - no_branch_d beq:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - no_branch_d beq:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - no_branch_d beq:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - take_branch_d beq:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - take_branch_d beq:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - take_branch_d beq:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - take_branch_d beq:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - no_branch_d beq:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - no_branch_d beq:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - no_branch_d beq:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - no_branch_d beq:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bge.cgs b/sim/testsuite/sim/fr30/bge.cgs deleted file mode 100644 index dd7796c..0000000 --- a/sim/testsuite/sim/fr30/bge.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bge $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bge -bge: - ; Test bge $label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch bge - - set_cc 0x0e ; condition codes are irrelevent - take_branch bge - - set_cc 0x0d ; condition codes are irrelevent - no_branch bge - - set_cc 0x0c ; condition codes are irrelevent - no_branch bge - - set_cc 0x0b ; condition codes are irrelevent - take_branch bge - - set_cc 0x0a ; condition codes are irrelevent - take_branch bge - - set_cc 0x09 ; condition codes are irrelevent - no_branch bge - - set_cc 0x08 ; condition codes are irrelevent - no_branch bge - - set_cc 0x07 ; condition codes are irrelevent - no_branch bge - - set_cc 0x06 ; condition codes are irrelevent - no_branch bge - - set_cc 0x05 ; condition codes are irrelevent - take_branch bge - - set_cc 0x04 ; condition codes are irrelevent - take_branch bge - - set_cc 0x03 ; condition codes are irrelevent - no_branch bge - - set_cc 0x02 ; condition codes are irrelevent - no_branch bge - - set_cc 0x01 ; condition codes are irrelevent - take_branch bge - - set_cc 0x00 ; condition codes are irrelevent - take_branch bge - - ; Test bge:d label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch_d bge:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - take_branch_d bge:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - no_branch_d bge:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - no_branch_d bge:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - take_branch_d bge:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - take_branch_d bge:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - no_branch_d bge:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - no_branch_d bge:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - no_branch_d bge:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - no_branch_d bge:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - take_branch_d bge:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - take_branch_d bge:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - no_branch_d bge:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - no_branch_d bge:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - take_branch_d bge:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - take_branch_d bge:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bgt.cgs b/sim/testsuite/sim/fr30/bgt.cgs deleted file mode 100644 index 525ac2e..0000000 --- a/sim/testsuite/sim/fr30/bgt.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bgt $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bgt -bgt: - ; Test bgt $label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch bgt - - set_cc 0x0e ; condition codes are irrelevent - no_branch bgt - - set_cc 0x0d ; condition codes are irrelevent - no_branch bgt - - set_cc 0x0c ; condition codes are irrelevent - no_branch bgt - - set_cc 0x0b ; condition codes are irrelevent - take_branch bgt - - set_cc 0x0a ; condition codes are irrelevent - take_branch bgt - - set_cc 0x09 ; condition codes are irrelevent - no_branch bgt - - set_cc 0x08 ; condition codes are irrelevent - no_branch bgt - - set_cc 0x07 ; condition codes are irrelevent - no_branch bgt - - set_cc 0x06 ; condition codes are irrelevent - no_branch bgt - - set_cc 0x05 ; condition codes are irrelevent - no_branch bgt - - set_cc 0x04 ; condition codes are irrelevent - no_branch bgt - - set_cc 0x03 ; condition codes are irrelevent - no_branch bgt - - set_cc 0x02 ; condition codes are irrelevent - no_branch bgt - - set_cc 0x01 ; condition codes are irrelevent - take_branch bgt - - set_cc 0x00 ; condition codes are irrelevent - take_branch bgt - - ; Test bgt:d label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch_d bgt:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - no_branch_d bgt:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - no_branch_d bgt:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - no_branch_d bgt:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - take_branch_d bgt:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - take_branch_d bgt:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - no_branch_d bgt:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - no_branch_d bgt:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - no_branch_d bgt:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - no_branch_d bgt:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - no_branch_d bgt:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - no_branch_d bgt:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - no_branch_d bgt:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - no_branch_d bgt:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - take_branch_d bgt:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - take_branch_d bgt:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bhi.cgs b/sim/testsuite/sim/fr30/bhi.cgs deleted file mode 100644 index f5a1549..0000000 --- a/sim/testsuite/sim/fr30/bhi.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bhi $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bhi -bhi: - ; Test bhi $label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch bhi - - set_cc 0x0e ; condition codes are irrelevent - no_branch bhi - - set_cc 0x0d ; condition codes are irrelevent - no_branch bhi - - set_cc 0x0c ; condition codes are irrelevent - no_branch bhi - - set_cc 0x0b ; condition codes are irrelevent - no_branch bhi - - set_cc 0x0a ; condition codes are irrelevent - take_branch bhi - - set_cc 0x09 ; condition codes are irrelevent - no_branch bhi - - set_cc 0x08 ; condition codes are irrelevent - take_branch bhi - - set_cc 0x07 ; condition codes are irrelevent - no_branch bhi - - set_cc 0x06 ; condition codes are irrelevent - no_branch bhi - - set_cc 0x05 ; condition codes are irrelevent - no_branch bhi - - set_cc 0x04 ; condition codes are irrelevent - no_branch bhi - - set_cc 0x03 ; condition codes are irrelevent - no_branch bhi - - set_cc 0x02 ; condition codes are irrelevent - take_branch bhi - - set_cc 0x01 ; condition codes are irrelevent - no_branch bhi - - set_cc 0x00 ; condition codes are irrelevent - take_branch bhi - - ; Test bhi:d label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch_d bhi:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - no_branch_d bhi:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - no_branch_d bhi:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - no_branch_d bhi:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - no_branch_d bhi:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - take_branch_d bhi:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - no_branch_d bhi:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - take_branch_d bhi:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - no_branch_d bhi:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - no_branch_d bhi:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - no_branch_d bhi:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - no_branch_d bhi:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - no_branch_d bhi:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - take_branch_d bhi:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - no_branch_d bhi:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - take_branch_d bhi:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/ble.cgs b/sim/testsuite/sim/fr30/ble.cgs deleted file mode 100644 index 1a33f78..0000000 --- a/sim/testsuite/sim/fr30/ble.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for ble $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global ble -ble: - ; Test ble $label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch ble - - set_cc 0x0e ; condition codes are irrelevent - take_branch ble - - set_cc 0x0d ; condition codes are irrelevent - take_branch ble - - set_cc 0x0c ; condition codes are irrelevent - take_branch ble - - set_cc 0x0b ; condition codes are irrelevent - no_branch ble - - set_cc 0x0a ; condition codes are irrelevent - no_branch ble - - set_cc 0x09 ; condition codes are irrelevent - take_branch ble - - set_cc 0x08 ; condition codes are irrelevent - take_branch ble - - set_cc 0x07 ; condition codes are irrelevent - take_branch ble - - set_cc 0x06 ; condition codes are irrelevent - take_branch ble - - set_cc 0x05 ; condition codes are irrelevent - take_branch ble - - set_cc 0x04 ; condition codes are irrelevent - take_branch ble - - set_cc 0x03 ; condition codes are irrelevent - take_branch ble - - set_cc 0x02 ; condition codes are irrelevent - take_branch ble - - set_cc 0x01 ; condition codes are irrelevent - no_branch ble - - set_cc 0x00 ; condition codes are irrelevent - no_branch ble - - ; Test ble:d label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch_d ble:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - take_branch_d ble:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - take_branch_d ble:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - take_branch_d ble:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - no_branch_d ble:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - no_branch_d ble:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - take_branch_d ble:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - take_branch_d ble:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - take_branch_d ble:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - take_branch_d ble:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - take_branch_d ble:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - take_branch_d ble:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - take_branch_d ble:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - take_branch_d ble:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - no_branch_d ble:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - no_branch_d ble:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bls.cgs b/sim/testsuite/sim/fr30/bls.cgs deleted file mode 100644 index c0148b7..0000000 --- a/sim/testsuite/sim/fr30/bls.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bls $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bls -bls: - ; Test bls $label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch bls - - set_cc 0x0e ; condition codes are irrelevent - take_branch bls - - set_cc 0x0d ; condition codes are irrelevent - take_branch bls - - set_cc 0x0c ; condition codes are irrelevent - take_branch bls - - set_cc 0x0b ; condition codes are irrelevent - take_branch bls - - set_cc 0x0a ; condition codes are irrelevent - no_branch bls - - set_cc 0x09 ; condition codes are irrelevent - take_branch bls - - set_cc 0x08 ; condition codes are irrelevent - no_branch bls - - set_cc 0x07 ; condition codes are irrelevent - take_branch bls - - set_cc 0x06 ; condition codes are irrelevent - take_branch bls - - set_cc 0x05 ; condition codes are irrelevent - take_branch bls - - set_cc 0x04 ; condition codes are irrelevent - take_branch bls - - set_cc 0x03 ; condition codes are irrelevent - take_branch bls - - set_cc 0x02 ; condition codes are irrelevent - no_branch bls - - set_cc 0x01 ; condition codes are irrelevent - take_branch bls - - set_cc 0x00 ; condition codes are irrelevent - no_branch bls - - ; Test bls:d label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch_d bls:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - take_branch_d bls:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - take_branch_d bls:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - take_branch_d bls:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - take_branch_d bls:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - no_branch_d bls:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - take_branch_d bls:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - no_branch_d bls:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - take_branch_d bls:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - take_branch_d bls:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - take_branch_d bls:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - take_branch_d bls:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - take_branch_d bls:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - no_branch_d bls:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - take_branch_d bls:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - no_branch_d bls:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/blt.cgs b/sim/testsuite/sim/fr30/blt.cgs deleted file mode 100644 index f7b6ff1..0000000 --- a/sim/testsuite/sim/fr30/blt.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for blt $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global blt -blt: - ; Test blt $label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch blt - - set_cc 0x0e ; condition codes are irrelevent - no_branch blt - - set_cc 0x0d ; condition codes are irrelevent - take_branch blt - - set_cc 0x0c ; condition codes are irrelevent - take_branch blt - - set_cc 0x0b ; condition codes are irrelevent - no_branch blt - - set_cc 0x0a ; condition codes are irrelevent - no_branch blt - - set_cc 0x09 ; condition codes are irrelevent - take_branch blt - - set_cc 0x08 ; condition codes are irrelevent - take_branch blt - - set_cc 0x07 ; condition codes are irrelevent - take_branch blt - - set_cc 0x06 ; condition codes are irrelevent - take_branch blt - - set_cc 0x05 ; condition codes are irrelevent - no_branch blt - - set_cc 0x04 ; condition codes are irrelevent - no_branch blt - - set_cc 0x03 ; condition codes are irrelevent - take_branch blt - - set_cc 0x02 ; condition codes are irrelevent - take_branch blt - - set_cc 0x01 ; condition codes are irrelevent - no_branch blt - - set_cc 0x00 ; condition codes are irrelevent - no_branch blt - - ; Test blt:d label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch_d blt:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - no_branch_d blt:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - take_branch_d blt:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - take_branch_d blt:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - no_branch_d blt:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - no_branch_d blt:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - take_branch_d blt:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - take_branch_d blt:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - take_branch_d blt:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - take_branch_d blt:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - no_branch_d blt:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - no_branch_d blt:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - take_branch_d blt:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - take_branch_d blt:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - no_branch_d blt:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - no_branch_d blt:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bn.cgs b/sim/testsuite/sim/fr30/bn.cgs deleted file mode 100644 index 45858fc..0000000 --- a/sim/testsuite/sim/fr30/bn.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bn $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bn -bn: - ; Test bn $label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch bn - - set_cc 0x0e ; condition codes are irrelevent - take_branch bn - - set_cc 0x0d ; condition codes are irrelevent - take_branch bn - - set_cc 0x0c ; condition codes are irrelevent - take_branch bn - - set_cc 0x0b ; condition codes are irrelevent - take_branch bn - - set_cc 0x0a ; condition codes are irrelevent - take_branch bn - - set_cc 0x09 ; condition codes are irrelevent - take_branch bn - - set_cc 0x08 ; condition codes are irrelevent - take_branch bn - - set_cc 0x07 ; condition codes are irrelevent - no_branch bn - - set_cc 0x06 ; condition codes are irrelevent - no_branch bn - - set_cc 0x05 ; condition codes are irrelevent - no_branch bn - - set_cc 0x04 ; condition codes are irrelevent - no_branch bn - - set_cc 0x03 ; condition codes are irrelevent - no_branch bn - - set_cc 0x02 ; condition codes are irrelevent - no_branch bn - - set_cc 0x01 ; condition codes are irrelevent - no_branch bn - - set_cc 0x00 ; condition codes are irrelevent - no_branch bn - - ; Test bn:d label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch_d bn:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - take_branch_d bn:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - take_branch_d bn:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - take_branch_d bn:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - take_branch_d bn:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - take_branch_d bn:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - take_branch_d bn:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - take_branch_d bn:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - no_branch_d bn:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - no_branch_d bn:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - no_branch_d bn:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - no_branch_d bn:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - no_branch_d bn:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - no_branch_d bn:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - no_branch_d bn:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - no_branch_d bn:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bnc.cgs b/sim/testsuite/sim/fr30/bnc.cgs deleted file mode 100644 index 9968c43..0000000 --- a/sim/testsuite/sim/fr30/bnc.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bnc $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bnc -bc: - ; Test bnc $label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch bnc - - set_cc 0x0e ; condition codes are irrelevent - take_branch bnc - - set_cc 0x0d ; condition codes are irrelevent - no_branch bnc - - set_cc 0x0c ; condition codes are irrelevent - take_branch bnc - - set_cc 0x0b ; condition codes are irrelevent - no_branch bnc - - set_cc 0x0a ; condition codes are irrelevent - take_branch bnc - - set_cc 0x09 ; condition codes are irrelevent - no_branch bnc - - set_cc 0x08 ; condition codes are irrelevent - take_branch bnc - - set_cc 0x07 ; condition codes are irrelevent - no_branch bnc - - set_cc 0x06 ; condition codes are irrelevent - take_branch bnc - - set_cc 0x05 ; condition codes are irrelevent - no_branch bnc - - set_cc 0x04 ; condition codes are irrelevent - take_branch bnc - - set_cc 0x03 ; condition codes are irrelevent - no_branch bnc - - set_cc 0x02 ; condition codes are irrelevent - take_branch bnc - - set_cc 0x01 ; condition codes are irrelevent - no_branch bnc - - set_cc 0x00 ; condition codes are irrelevent - take_branch bnc - - ; Test bnc:d label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch_d bnc:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - take_branch_d bnc:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - no_branch_d bnc:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - take_branch_d bnc:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - no_branch_d bnc:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - take_branch_d bnc:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - no_branch_d bnc:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - take_branch_d bnc:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - no_branch_d bnc:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - take_branch_d bnc:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - no_branch_d bnc:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - take_branch_d bnc:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - no_branch_d bnc:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - take_branch_d bnc:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - no_branch_d bnc:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - take_branch_d bnc:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bne.cgs b/sim/testsuite/sim/fr30/bne.cgs deleted file mode 100644 index 58971de..0000000 --- a/sim/testsuite/sim/fr30/bne.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bne $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bne -bne: - ; Test bne $label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch bne - - set_cc 0x0e ; condition codes are irrelevent - no_branch bne - - set_cc 0x0d ; condition codes are irrelevent - no_branch bne - - set_cc 0x0c ; condition codes are irrelevent - no_branch bne - - set_cc 0x0b ; condition codes are irrelevent - take_branch bne - - set_cc 0x0a ; condition codes are irrelevent - take_branch bne - - set_cc 0x09 ; condition codes are irrelevent - take_branch bne - - set_cc 0x08 ; condition codes are irrelevent - take_branch bne - - set_cc 0x07 ; condition codes are irrelevent - no_branch bne - - set_cc 0x06 ; condition codes are irrelevent - no_branch bne - - set_cc 0x05 ; condition codes are irrelevent - no_branch bne - - set_cc 0x04 ; condition codes are irrelevent - no_branch bne - - set_cc 0x03 ; condition codes are irrelevent - take_branch bne - - set_cc 0x02 ; condition codes are irrelevent - take_branch bne - - set_cc 0x01 ; condition codes are irrelevent - take_branch bne - - set_cc 0x00 ; condition codes are irrelevent - take_branch bne - - ; Test bne:d label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch_d bne:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - no_branch_d bne:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - no_branch_d bne:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - no_branch_d bne:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - take_branch_d bne:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - take_branch_d bne:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - take_branch_d bne:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - take_branch_d bne:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - no_branch_d bne:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - no_branch_d bne:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - no_branch_d bne:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - no_branch_d bne:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - take_branch_d bne:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - take_branch_d bne:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - take_branch_d bne:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - take_branch_d bne:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bno.cgs b/sim/testsuite/sim/fr30/bno.cgs deleted file mode 100644 index faef9ba..0000000 --- a/sim/testsuite/sim/fr30/bno.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bno $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bno -bno: - ; Test bno $label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch bno - - set_cc 0x0e ; condition codes are irrelevent - no_branch bno - - set_cc 0x0d ; condition codes are irrelevent - no_branch bno - - set_cc 0x0c ; condition codes are irrelevent - no_branch bno - - set_cc 0x0b ; condition codes are irrelevent - no_branch bno - - set_cc 0x0a ; condition codes are irrelevent - no_branch bno - - set_cc 0x09 ; condition codes are irrelevent - no_branch bno - - set_cc 0x08 ; condition codes are irrelevent - no_branch bno - - set_cc 0x07 ; condition codes are irrelevent - no_branch bno - - set_cc 0x06 ; condition codes are irrelevent - no_branch bno - - set_cc 0x05 ; condition codes are irrelevent - no_branch bno - - set_cc 0x04 ; condition codes are irrelevent - no_branch bno - - set_cc 0x03 ; condition codes are irrelevent - no_branch bno - - set_cc 0x02 ; condition codes are irrelevent - no_branch bno - - set_cc 0x01 ; condition codes are irrelevent - no_branch bno - - set_cc 0x00 ; condition codes are irrelevent - no_branch bno - - ; Test bno:d label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch_d bno:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - no_branch_d bno:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - no_branch_d bno:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - no_branch_d bno:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - no_branch_d bno:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - no_branch_d bno:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - no_branch_d bno:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - no_branch_d bno:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - no_branch_d bno:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - no_branch_d bno:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - no_branch_d bno:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - no_branch_d bno:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - no_branch_d bno:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - no_branch_d bno:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - no_branch_d bno:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - no_branch_d bno:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bnv.cgs b/sim/testsuite/sim/fr30/bnv.cgs deleted file mode 100644 index 7615abd..0000000 --- a/sim/testsuite/sim/fr30/bnv.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bnv $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bnv -bnv: - ; Test bnv $label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch bnv - - set_cc 0x0e ; condition codes are irrelevent - no_branch bnv - - set_cc 0x0d ; condition codes are irrelevent - take_branch bnv - - set_cc 0x0c ; condition codes are irrelevent - take_branch bnv - - set_cc 0x0b ; condition codes are irrelevent - no_branch bnv - - set_cc 0x0a ; condition codes are irrelevent - no_branch bnv - - set_cc 0x09 ; condition codes are irrelevent - take_branch bnv - - set_cc 0x08 ; condition codes are irrelevent - take_branch bnv - - set_cc 0x07 ; condition codes are irrelevent - no_branch bnv - - set_cc 0x06 ; condition codes are irrelevent - no_branch bnv - - set_cc 0x05 ; condition codes are irrelevent - take_branch bnv - - set_cc 0x04 ; condition codes are irrelevent - take_branch bnv - - set_cc 0x03 ; condition codes are irrelevent - no_branch bnv - - set_cc 0x02 ; condition codes are irrelevent - no_branch bnv - - set_cc 0x01 ; condition codes are irrelevent - take_branch bnv - - set_cc 0x00 ; condition codes are irrelevent - take_branch bnv - - ; Test bnv:d label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch_d bnv:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - no_branch_d bnv:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - take_branch_d bnv:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - take_branch_d bnv:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - no_branch_d bnv:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - no_branch_d bnv:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - take_branch_d bnv:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - take_branch_d bnv:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - no_branch_d bnv:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - no_branch_d bnv:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - take_branch_d bnv:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - take_branch_d bnv:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - no_branch_d bnv:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - no_branch_d bnv:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - take_branch_d bnv:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - take_branch_d bnv:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/borh.cgs b/sim/testsuite/sim/fr30/borh.cgs deleted file mode 100644 index 039f18a..0000000 --- a/sim/testsuite/sim/fr30/borh.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# fr30 testcase for borh $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global borh -borh: - ; Test borh $Rj,@$Ri - mvi_h_mem 0x55555555,sp - set_cc 0x0f ; Condition codes should not change - borh 0x0a,@sp - test_cc 1 1 1 1 - test_h_mem 0xf5555555,sp - - mvi_h_mem 0x0fffffff,sp - set_cc 0x04 ; Condition codes should not change - borh 0x00,@sp - test_cc 0 1 0 0 - test_h_mem 0x0fffffff,sp - - mvi_h_mem 0xceadbeef,sp - set_cc 0x09 ; Condition codes should not change - borh 0x01,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/borl.cgs b/sim/testsuite/sim/fr30/borl.cgs deleted file mode 100644 index beb2bbb..0000000 --- a/sim/testsuite/sim/fr30/borl.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# fr30 testcase for borl $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global borl -borl: - ; Test borl $Rj,@$Ri - mvi_h_mem 0x55555555,sp - set_cc 0x0f ; Condition codes should not change - borl 0x0a,@sp - test_cc 1 1 1 1 - test_h_mem 0x5f555555,sp - - mvi_h_mem 0xf0ffffff,sp - set_cc 0x04 ; Condition codes should not change - borl 0x00,@sp - test_cc 0 1 0 0 - test_h_mem 0xf0ffffff,sp - - mvi_h_mem 0xdcadbeef,sp - set_cc 0x09 ; Condition codes should not change - borl 0x02,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/bp.cgs b/sim/testsuite/sim/fr30/bp.cgs deleted file mode 100644 index 3753283..0000000 --- a/sim/testsuite/sim/fr30/bp.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bp $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bp -bp: - ; Test bp $label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch bp - - set_cc 0x0e ; condition codes are irrelevent - no_branch bp - - set_cc 0x0d ; condition codes are irrelevent - no_branch bp - - set_cc 0x0c ; condition codes are irrelevent - no_branch bp - - set_cc 0x0b ; condition codes are irrelevent - no_branch bp - - set_cc 0x0a ; condition codes are irrelevent - no_branch bp - - set_cc 0x09 ; condition codes are irrelevent - no_branch bp - - set_cc 0x08 ; condition codes are irrelevent - no_branch bp - - set_cc 0x07 ; condition codes are irrelevent - take_branch bp - - set_cc 0x06 ; condition codes are irrelevent - take_branch bp - - set_cc 0x05 ; condition codes are irrelevent - take_branch bp - - set_cc 0x04 ; condition codes are irrelevent - take_branch bp - - set_cc 0x03 ; condition codes are irrelevent - take_branch bp - - set_cc 0x02 ; condition codes are irrelevent - take_branch bp - - set_cc 0x01 ; condition codes are irrelevent - take_branch bp - - set_cc 0x00 ; condition codes are irrelevent - take_branch bp - - ; Test bp:d label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch_d bp:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - no_branch_d bp:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - no_branch_d bp:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - no_branch_d bp:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - no_branch_d bp:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - no_branch_d bp:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - no_branch_d bp:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - no_branch_d bp:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - take_branch_d bp:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - take_branch_d bp:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - take_branch_d bp:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - take_branch_d bp:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - take_branch_d bp:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - take_branch_d bp:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - take_branch_d bp:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - take_branch_d bp:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bra.cgs b/sim/testsuite/sim/fr30/bra.cgs deleted file mode 100644 index 3732f74..0000000 --- a/sim/testsuite/sim/fr30/bra.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bra $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bra -bra: - ; Test bra $label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch bra - - set_cc 0x0e ; condition codes are irrelevent - take_branch bra - - set_cc 0x0d ; condition codes are irrelevent - take_branch bra - - set_cc 0x0c ; condition codes are irrelevent - take_branch bra - - set_cc 0x0b ; condition codes are irrelevent - take_branch bra - - set_cc 0x0a ; condition codes are irrelevent - take_branch bra - - set_cc 0x09 ; condition codes are irrelevent - take_branch bra - - set_cc 0x08 ; condition codes are irrelevent - take_branch bra - - set_cc 0x07 ; condition codes are irrelevent - take_branch bra - - set_cc 0x06 ; condition codes are irrelevent - take_branch bra - - set_cc 0x05 ; condition codes are irrelevent - take_branch bra - - set_cc 0x04 ; condition codes are irrelevent - take_branch bra - - set_cc 0x03 ; condition codes are irrelevent - take_branch bra - - set_cc 0x02 ; condition codes are irrelevent - take_branch bra - - set_cc 0x01 ; condition codes are irrelevent - take_branch bra - - set_cc 0x00 ; condition codes are irrelevent - take_branch bra - - ; Test bra:d label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch_d bra:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - take_branch_d bra:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - take_branch_d bra:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - take_branch_d bra:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - take_branch_d bra:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - take_branch_d bra:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - take_branch_d bra:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - take_branch_d bra:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - take_branch_d bra:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - take_branch_d bra:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - take_branch_d bra:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - take_branch_d bra:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - take_branch_d bra:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - take_branch_d bra:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - take_branch_d bra:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - take_branch_d bra:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/btsth.cgs b/sim/testsuite/sim/fr30/btsth.cgs deleted file mode 100644 index 2897c34..0000000 --- a/sim/testsuite/sim/fr30/btsth.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# fr30 testcase for btsth $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global btsth -btsth: - ; Test btsth $Rj,@$Ri - mvi_h_mem 0x55555555,sp - set_cc 0x0b ; Set mask opposite of expected - btsth 0x0a,@sp - test_cc 0 1 1 1 - test_h_mem 0x55555555,sp - - mvi_h_mem 0xffffffff,sp - set_cc 0x04 ; Set mask opposite of expected - btsth 0x0a,@sp - test_cc 1 0 0 0 - test_h_mem 0xffffffff,sp - - mvi_h_mem 0xe5ffffff,sp - set_cc 0x0e ; Set mask opposite of expected - btsth 0x07,@sp - test_cc 0 0 1 0 - test_h_mem 0xe5ffffff,sp - - pass diff --git a/sim/testsuite/sim/fr30/btstl.cgs b/sim/testsuite/sim/fr30/btstl.cgs deleted file mode 100644 index cef5a92..0000000 --- a/sim/testsuite/sim/fr30/btstl.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# fr30 testcase for btstl $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global btstl -btstl: - ; Test btstl $Rj,@$Ri - mvi_h_mem 0x55555555,sp - set_cc 0x0b ; Set mask opposite of expected - btstl 0x0a,@sp - test_cc 0 1 1 1 - test_h_mem 0x55555555,sp - - mvi_h_mem 0xffffffff,sp - set_cc 0x0c ; Set mask opposite of expected - btstl 0x0a,@sp - test_cc 0 0 0 0 - test_h_mem 0xffffffff,sp - - mvi_h_mem 0x5effffff,sp - set_cc 0x0e ; Set mask opposite of expected - btstl 0x07,@sp - test_cc 0 0 1 0 - test_h_mem 0x5effffff,sp - - pass diff --git a/sim/testsuite/sim/fr30/bv.cgs b/sim/testsuite/sim/fr30/bv.cgs deleted file mode 100644 index 68cb9acf..0000000 --- a/sim/testsuite/sim/fr30/bv.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bv $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bv -bv: - ; Test bv $label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch bv - - set_cc 0x0e ; condition codes are irrelevent - take_branch bv - - set_cc 0x0d ; condition codes are irrelevent - no_branch bv - - set_cc 0x0c ; condition codes are irrelevent - no_branch bv - - set_cc 0x0b ; condition codes are irrelevent - take_branch bv - - set_cc 0x0a ; condition codes are irrelevent - take_branch bv - - set_cc 0x09 ; condition codes are irrelevent - no_branch bv - - set_cc 0x08 ; condition codes are irrelevent - no_branch bv - - set_cc 0x07 ; condition codes are irrelevent - take_branch bv - - set_cc 0x06 ; condition codes are irrelevent - take_branch bv - - set_cc 0x05 ; condition codes are irrelevent - no_branch bv - - set_cc 0x04 ; condition codes are irrelevent - no_branch bv - - set_cc 0x03 ; condition codes are irrelevent - take_branch bv - - set_cc 0x02 ; condition codes are irrelevent - take_branch bv - - set_cc 0x01 ; condition codes are irrelevent - no_branch bv - - set_cc 0x00 ; condition codes are irrelevent - no_branch bv - - ; Test bv:d label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch_d bv:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - take_branch_d bv:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - no_branch_d bv:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - no_branch_d bv:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - take_branch_d bv:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - take_branch_d bv:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - no_branch_d bv:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - no_branch_d bv:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - take_branch_d bv:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - take_branch_d bv:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - no_branch_d bv:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - no_branch_d bv:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - take_branch_d bv:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - take_branch_d bv:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - no_branch_d bv:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - no_branch_d bv:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/call.cgs b/sim/testsuite/sim/fr30/call.cgs deleted file mode 100644 index 413840e..0000000 --- a/sim/testsuite/sim/fr30/call.cgs +++ /dev/null @@ -1,69 +0,0 @@ -# fr30 testcase for call @$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global call - - ; Test call $Ri - mvi_h_gr 0xdeadbeef,r9 - mvi_h_gr #func1,r0 - set_cc 0x0f ; condition codes shouldn't change -call1: - call @r0 - test_h_gr 0xbeefdead,r9 - pass - -func1: - test_cc 1 1 1 1 - mvi_h_gr #call1,r7 - inci_h_gr 2,r7 - testr_h_dr r7,rp - save_rp - - mvi_h_gr #func2,r0 - set_cc 0x0f ; condition codes shouldn't change -call2: - call:d @r0 - ldi:8 1,r0 ; Must assume this works - restore_rp - ret -func2: - test_cc 1 1 1 1 - mvi_h_gr #call2,r7 - inci_h_gr 4,r7 - testr_h_dr r7,rp - testr_h_gr 1,r0 - save_rp - - set_cc 0x0f ; condition codes shouldn't change -call3: - call func3 - restore_rp - ret -func3: - test_cc 1 1 1 1 - mvi_h_gr #call3,r7 - inci_h_gr 2,r7 - testr_h_dr r7,rp - save_rp - - set_cc 0x0f ; condition codes shouldn't change -call4: - call:d func4 - ldi:8 1,r0 ; Must assume this works - restore_rp - ret -func4: - test_cc 1 1 1 1 - mvi_h_gr #call4,r7 - inci_h_gr 4,r7 - testr_h_dr r7,rp - testr_h_gr 1,r0 - mvi_h_gr 0xbeefdead,r9 - ret - - fail diff --git a/sim/testsuite/sim/fr30/cmp.cgs b/sim/testsuite/sim/fr30/cmp.cgs deleted file mode 100644 index 7bfbbf8..0000000 --- a/sim/testsuite/sim/fr30/cmp.cgs +++ /dev/null @@ -1,53 +0,0 @@ -# fr30 testcase for cmp $Rj,$Ri, cmp $u4,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global cmp -cmp: - ; Test cmp $Rj,$Ri - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - cmp r7,r8 - test_cc 0 0 0 0 - - mvi_h_gr 1,r7 - mvi_h_gr 0x80000000,r8 - set_cc 0x0d ; Set mask opposite of expected - cmp r7,r8 - test_cc 0 0 1 0 - - set_cc 0x0b ; Set mask opposite of expected - cmp r8,r8 - test_cc 0 1 0 0 - - mvi_h_gr 0,r8 - set_cc 0x06 ; Set mask opposite of expected - cmp r7,r8 - test_cc 1 0 0 1 - - ; Test cmp $u4,$Ri - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - cmp 1,r8 - test_cc 0 0 0 0 - - mvi_h_gr 0x80000000,r8 - set_cc 0x0d ; Set mask opposite of expected - cmp 1,r8 - test_cc 0 0 1 0 - - mvi_h_gr 0,r8 - set_cc 0x0b ; Set mask opposite of expected - cmp 0,r8 - test_cc 0 1 0 0 - - set_cc 0x06 ; Set mask opposite of expected - cmp 15,r8 - test_cc 1 0 0 1 - - pass diff --git a/sim/testsuite/sim/fr30/cmp2.cgs b/sim/testsuite/sim/fr30/cmp2.cgs deleted file mode 100644 index 7ba6201..0000000 --- a/sim/testsuite/sim/fr30/cmp2.cgs +++ /dev/null @@ -1,27 +0,0 @@ -# fr30 testcase for cmp2 $u4,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global cmp2 -cmp2: - ; Test cmp2 $u4,$Ri - mvi_h_gr 2,r8 - set_cc 0x0e ; Set mask opposite of expected - cmp2 -1,r8 - test_cc 0 0 0 1 - - mvi_h_gr 0x7ffffffe,r8 - set_cc 0x04 ; Set mask opposite of expected - cmp2 -2,r8 - test_cc 1 0 1 1 - - mvi_h_gr -16,r8 - set_cc 0x0b ; Set mask opposite of expected - cmp2 -16,r8 - test_cc 0 1 0 0 - - pass diff --git a/sim/testsuite/sim/fr30/copld.cgs b/sim/testsuite/sim/fr30/copld.cgs deleted file mode 100644 index e0ababb..0000000 --- a/sim/testsuite/sim/fr30/copld.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# fr30 testcase for copld $u4,$cc,$Rj,CRi -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global copld -copld: - ; Test copld copld $u4,$cc,$Rj,CRi - ; The current implementation is a noop - set_cc 0x0f ; Condition codes are irrelevent - copld 0,0,r0,cr15 - test_cc 1 1 1 1 - - set_cc 0x0e ; Condition codes are irrelevent - copld 15,255,r15,cr0 - test_cc 1 1 1 0 - - pass diff --git a/sim/testsuite/sim/fr30/copop.cgs b/sim/testsuite/sim/fr30/copop.cgs deleted file mode 100644 index b0afd77..0000000 --- a/sim/testsuite/sim/fr30/copop.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# fr30 testcase for copop $u4,$cc,$CRj,CRi -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global copop -copop: - ; Test copop copop $u4,$cc,$CRj,CRi - ; The current implementation is a noop - set_cc 0x0f ; Condition codes are irrelevent - copop 0,0,cr0,cr15 - test_cc 1 1 1 1 - - set_cc 0x0e ; Condition codes are irrelevent - copop 15,255,cr0,cr15 - test_cc 1 1 1 0 - - pass diff --git a/sim/testsuite/sim/fr30/copst.cgs b/sim/testsuite/sim/fr30/copst.cgs deleted file mode 100644 index 00120b2..0000000 --- a/sim/testsuite/sim/fr30/copst.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# fr30 testcase for copst $u4,$cc,$CRj,Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global copst -copst: - ; Test copst copst $u4,$cc,$CRj,Ri - ; The current implementation is a noop - set_cc 0x0f ; Condition codes are irrelevent - copst 0,0,cr0,r15 - test_cc 1 1 1 1 - - set_cc 0x0e ; Condition codes are irrelevent - copst 15,255,cr15,r0 - test_cc 1 1 1 0 - - pass diff --git a/sim/testsuite/sim/fr30/copsv.cgs b/sim/testsuite/sim/fr30/copsv.cgs deleted file mode 100644 index e00a4f5..0000000 --- a/sim/testsuite/sim/fr30/copsv.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# fr30 testcase for copsv $u4,$cc,$CRj,Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global copsv -copsv: - ; Test copsv copsv $u4,$cc,$CRj,Ri - ; The current implementation is a noop - set_cc 0x0f ; Condition codes are irrelevent - copsv 0,0,cr0,r15 - test_cc 1 1 1 1 - - set_cc 0x0e ; Condition codes are irrelevent - copsv 15,255,cr15,r0 - test_cc 1 1 1 0 - - pass diff --git a/sim/testsuite/sim/fr30/div.ms b/sim/testsuite/sim/fr30/div.ms deleted file mode 100644 index 7e3aaf2..0000000 --- a/sim/testsuite/sim/fr30/div.ms +++ /dev/null @@ -1,176 +0,0 @@ -# fr30 testcase for division -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global div -div: - ; simple division 12 / 3 - mvi_h_gr 0x00000003,r2 - mvi_h_dr 0xdeadbeef,mdh - mvi_h_dr 0x0000000c,mdl - div0s r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div2 r2 - div3 - div4s - test_h_gr 0x00000003,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x00000004,mdl - test_dbits 0x0 - - ; example 1 from div0s the manual - mvi_h_gr 0x01234567,r2 - mvi_h_dr 0xdeadbeef,mdh - mvi_h_dr 0xfedcba98,mdl - div0s r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div2 r2 - div3 - div4s - test_h_gr 0x01234567,r2 - test_h_dr 0xffffffff,mdh - test_h_dr 0xffffffff,mdl - test_dbits 0x3 - - ; example 2 from div0s the manual - mvi_h_dr 0xdeadbeef,mdh - mvi_h_dr 0xfedcba98,mdl - mvi_h_gr 0x1234567,r2 - mvi_h_gr 1,r0 - mvi_h_gr 32,r1 - div0s r2 -loop1: sub r0,r1 - bne:d loop1 - div1 r2 - div2 r2 - div3 - div4s - test_h_gr 0x01234567,r2 - test_h_dr 0xffffffff,mdh - test_h_dr 0xffffffff,mdl - test_dbits 0x3 - - ; example 1 from div0u in the manual - mvi_h_gr 0x01234567,r2 - mvi_h_dr 0xdeadbeef,mdh - mvi_h_dr 0xfedcba98,mdl - div0u r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - test_h_gr 0x01234567,r2 - test_h_dr 0x00000078,mdh - test_h_dr 0x000000e0,mdl - test_dbits 0x0 - - ; example 2 from div0u in the manual - mvi_h_dr 0xdeadbeef,mdh - mvi_h_dr 0xfedcba98,mdl - mvi_h_gr 0x1234567,r2 - mvi_h_gr 1,r0 - mvi_h_gr 32,r1 - div0u r2 -loop2: sub r0,r1 - bne:d loop2 - div1 r2 - test_h_gr 0x01234567,r2 - test_h_dr 0x00000078,mdh - test_h_dr 0x000000e0,mdl - test_dbits 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/div0s.cgs b/sim/testsuite/sim/fr30/div0s.cgs deleted file mode 100644 index 84d76c4..0000000 --- a/sim/testsuite/sim/fr30/div0s.cgs +++ /dev/null @@ -1,64 +0,0 @@ -# fr30 testcase for div0s $Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global div0s -div0s: - ; Test div0s $Rj,$Ri - ; example from the manual - negative dividend - mvi_h_gr 0x0fffffff,r2 - mvi_h_dr 0x00000000,mdh - mvi_h_dr 0xfffffff0,mdl - set_dbits 0x0 ; Set opposite of expected - set_cc 0x0f ; Condition codes should not change - div0s r2 - test_cc 1 1 1 1 - test_h_gr 0x0fffffff,r2 - test_h_dr 0xffffffff,mdh - test_h_dr 0xfffffff0,mdl - test_dbits 0x3 - - ; negative divisor - mvi_h_gr 0xffffffff,r2 - mvi_h_dr 0xffffffff,mdh - mvi_h_dr 0x7fffffff,mdl - set_dbits 0x1 ; Set opposite of expected - set_cc 0x0f ; Condition codes should not change - div0s r2 - test_cc 1 1 1 1 - test_h_gr 0xffffffff,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x7fffffff,mdl - test_dbits 0x2 - - ; Both sign bits 0 - mvi_h_gr 0x0fffffff,r2 - mvi_h_dr 0xffffffff,mdh - mvi_h_dr 0x7ffffff0,mdl - set_dbits 0x3 ; Set opposite of expected - set_cc 0x0f ; Condition codes should not change - div0s r2 - test_cc 1 1 1 1 - test_h_gr 0x0fffffff,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x7ffffff0,mdl - test_dbits 0x0 - - ; Both sign bits 1 - mvi_h_gr 0xffffffff,r2 - mvi_h_dr 0x00000000,mdh - mvi_h_dr 0xffffffff,mdl - set_dbits 0x2 ; Set opposite of expected - set_cc 0x0f ; Condition codes should not change - div0s r2 - test_cc 1 1 1 1 - test_h_gr 0xffffffff,r2 - test_h_dr 0xffffffff,mdh - test_h_dr 0xffffffff,mdl - test_dbits 0x1 - - pass diff --git a/sim/testsuite/sim/fr30/div0u.cgs b/sim/testsuite/sim/fr30/div0u.cgs deleted file mode 100644 index 8fd84a6..0000000 --- a/sim/testsuite/sim/fr30/div0u.cgs +++ /dev/null @@ -1,25 +0,0 @@ -# fr30 testcase for div0u $Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global div0u -div0u: - ; Test div0u $Rj,$Ri - ; operand register has no effect - mvi_h_gr 0xdeadbeef,r2 - mvi_h_dr 0xdeadbeef,mdh - mvi_h_dr 0x0ffffff0,mdl - set_dbits 0x3 ; Set opposite of expected - set_cc 0x0f ; Condition codes should not change - div0u r2 - test_cc 1 1 1 1 - test_h_gr 0xdeadbeef,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x0ffffff0,mdl - test_dbits 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/div1.cgs b/sim/testsuite/sim/fr30/div1.cgs deleted file mode 100644 index dac35fe..0000000 --- a/sim/testsuite/sim/fr30/div1.cgs +++ /dev/null @@ -1,113 +0,0 @@ -# fr30 testcase for div1 $Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global div1 -div1: - ; Test div1 $Ri - ; example from the manual -- all status bits 0 - mvi_h_gr 0x00ffffff,r2 - mvi_h_dr 0x00ffffff,mdh - mvi_h_dr 0x00000000,mdl - set_dbits 0x0 - set_cc 0x00 - div1 r2 - test_cc 0 0 0 0 - test_dbits 0x0 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00ffffff,mdh ; misprinted in manual? - test_h_dr 0x00000001,mdl - - ; D0 == 1 - set_dbits 0x1 - set_cc 0x00 - div1 r2 - test_cc 0 0 0 0 - test_dbits 0x1 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x01fffffe,mdh - test_h_dr 0x00000002,mdl - - ; D1 == 1 - set_dbits 0x2 - set_cc 0x00 - div1 r2 - test_cc 0 0 0 0 - test_dbits 0x2 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x03fffffc,mdh - test_h_dr 0x00000004,mdl - - ; D0 == 1, D1 == 1 - set_dbits 0x3 - set_cc 0x00 - div1 r2 - test_cc 0 0 0 0 - test_dbits 0x3 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x08fffff7,mdh - test_h_dr 0x00000009,mdl - - ; C == 1 - mvi_h_gr 0x11ffffef,r2 - set_dbits 0x0 - set_cc 0x00 - div1 r2 - test_cc 0 0 0 1 - test_dbits 0x0 - test_h_gr 0x11ffffef,r2 - test_h_dr 0x11ffffee,mdh - test_h_dr 0x00000012,mdl - - ; D0 == 1, C == 1 - mvi_h_gr 0x23ffffdd,r2 - set_dbits 0x1 - set_cc 0x00 - div1 r2 - test_cc 0 0 0 1 - test_dbits 0x1 - test_h_gr 0x23ffffdd,r2 - test_h_dr 0xffffffff,mdh - test_h_dr 0x00000025,mdl - - ; D1 == 1, C == 1 - mvi_h_gr 0x00000003,r2 - set_dbits 0x2 - set_cc 0x00 - div1 r2 - test_cc 0 0 0 1 - test_dbits 0x2 - test_h_gr 0x00000003,r2 - test_h_dr 0x00000001,mdh - test_h_dr 0x0000004b,mdl - - ; D0 == 1, D1 == 1, C == 1 - mvi_h_gr 0xfffffffe,r2 - set_dbits 0x3 - set_cc 0x00 - div1 r2 - test_cc 0 0 0 1 - test_dbits 0x3 - test_h_gr 0xfffffffe,r2 - test_h_dr 0x00000002,mdh - test_h_dr 0x00000096,mdl - - ; remainder is zero - mvi_h_gr 0x00000004,r2 - set_dbits 0x0 - set_cc 0x00 - div1 r2 - test_cc 0 1 0 0 - test_dbits 0x0 - test_h_gr 0x00000004,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x0000012d,mdl - - pass - - - diff --git a/sim/testsuite/sim/fr30/div2.cgs b/sim/testsuite/sim/fr30/div2.cgs deleted file mode 100644 index 03000a2..0000000 --- a/sim/testsuite/sim/fr30/div2.cgs +++ /dev/null @@ -1,120 +0,0 @@ -# fr30 testcase for div2 $Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global div2 -div2: - ; Test div2 $Ri - ; example from the manual -- all status bits 0 - mvi_h_gr 0x00ffffff,r2 - mvi_h_dr 0x00ffffff,mdh - mvi_h_dr 0x0000000f,mdl - set_dbits 0x0 - set_cc 0x00 - div2 r2 - test_cc 0 1 0 0 - test_dbits 0x0 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x0000000f,mdl - - ; D0 == 1 - mvi_h_dr 0x00ffffff,mdh - set_dbits 0x1 - set_cc 0x00 - div2 r2 - test_cc 0 1 0 0 - test_dbits 0x1 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x0000000f,mdl - - ; D1 == 1 - mvi_h_dr 0x00ffffff,mdh - set_dbits 0x2 - set_cc 0x00 - div2 r2 - test_cc 0 0 0 0 - test_dbits 0x2 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00ffffff,mdh - test_h_dr 0x0000000f,mdl - - ; D0 == 1, D1 == 1 - set_dbits 0x3 - set_cc 0x00 - div2 r2 - test_cc 0 0 0 0 - test_dbits 0x3 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00ffffff,mdh - test_h_dr 0x0000000f,mdl - - ; C == 1 - mvi_h_dr 0x11ffffee,mdh - mvi_h_gr 0x11ffffef,r2 - set_dbits 0x0 - set_cc 0x00 - div2 r2 - test_cc 0 0 0 1 - test_dbits 0x0 - test_h_gr 0x11ffffef,r2 - test_h_dr 0x11ffffee,mdh - test_h_dr 0x0000000f,mdl - - ; D0 == 1, C == 1 - mvi_h_dr 0x23ffffdc,mdh - mvi_h_gr 0x23ffffdd,r2 - set_dbits 0x1 - set_cc 0x00 - div2 r2 - test_cc 0 0 0 1 - test_dbits 0x1 - test_h_gr 0x23ffffdd,r2 - test_h_dr 0x23ffffdc,mdh - test_h_dr 0x0000000f,mdl - - ; D1 == 1, C == 1 - mvi_h_dr 0xfffffffd,mdh - mvi_h_gr 0x00000004,r2 - set_dbits 0x2 - set_cc 0x00 - div2 r2 - test_cc 0 0 0 1 - test_dbits 0x2 - test_h_gr 0x00000004,r2 - test_h_dr 0xfffffffd,mdh - test_h_dr 0x0000000f,mdl - - ; D0 == 1, D1 == 1, C == 1 - mvi_h_dr 0x00000002,mdh - mvi_h_gr 0xffffffff,r2 - set_dbits 0x3 - set_cc 0x00 - div2 r2 - test_cc 0 0 0 1 - test_dbits 0x3 - test_h_gr 0xffffffff,r2 - test_h_dr 0x00000002,mdh - test_h_dr 0x0000000f,mdl - - ; remainder is zero - mvi_h_dr 0x00000004,mdh - mvi_h_gr 0x00000004,r2 - set_dbits 0x0 - set_cc 0x00 - div2 r2 - test_cc 0 1 0 0 - test_dbits 0x0 - test_h_gr 0x00000004,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x0000000f,mdl - - pass - - - diff --git a/sim/testsuite/sim/fr30/div3.cgs b/sim/testsuite/sim/fr30/div3.cgs deleted file mode 100644 index ee7da1a..0000000 --- a/sim/testsuite/sim/fr30/div3.cgs +++ /dev/null @@ -1,34 +0,0 @@ -# fr30 testcase for div3 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global div3 -div3: - ; Test div3 - ; example from the manual - mvi_h_gr 0x00ffffff,r2 - mvi_h_dr 0x00000000,mdh - mvi_h_dr 0x0000000f,mdl - set_dbits 0x0 - set_cc 0x04 - div3 - test_cc 0 1 0 0 - test_dbits 0x0 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x00000010,mdl - - set_dbits 0x0 - set_cc 0x00 - div3 - test_cc 0 0 0 0 - test_dbits 0x0 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x00000010,mdl - - pass diff --git a/sim/testsuite/sim/fr30/div4s.cgs b/sim/testsuite/sim/fr30/div4s.cgs deleted file mode 100644 index 3b98eca..0000000 --- a/sim/testsuite/sim/fr30/div4s.cgs +++ /dev/null @@ -1,34 +0,0 @@ -# fr30 testcase for div4s -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global div4s -div4s: - ; Test div4s - ; example from the manual - mvi_h_gr 0x00ffffff,r2 - mvi_h_dr 0x00000000,mdh - mvi_h_dr 0x0000000f,mdl - set_dbits 0x3 - set_cc 0x0f - div4s - test_cc 1 1 1 1 - test_dbits 0x3 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0xfffffff1,mdl - - set_dbits 0x0 - set_cc 0x00 - div4s - test_cc 0 0 0 0 - test_dbits 0x0 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0xfffffff1,mdl - - pass diff --git a/sim/testsuite/sim/fr30/dmov.cgs b/sim/testsuite/sim/fr30/dmov.cgs deleted file mode 100644 index bd2e5cc..0000000 --- a/sim/testsuite/sim/fr30/dmov.cgs +++ /dev/null @@ -1,73 +0,0 @@ -# fr30 testcase for dmov -# mach(): fr30 - - .include "testutils.inc" - START - - .text - .global dmov -dmov: - ; Test dmov @$dir10,$R13 - mvi_h_gr 0xdeadbeef,r1 - mvi_h_gr 0x200,r2 - mvr_h_mem r1,r2 - set_cc 0x0f ; Condition codes shouldn't change - dmov @0x200,r13 - test_cc 1 1 1 1 - test_h_gr 0xdeadbeef,r13 - - ; Test dmov $R13,@$dir10 - mvi_h_gr 0xbeefdead,r13 - set_cc 0x0e ; Condition codes shouldn't change - dmov r13,@0x200 - test_cc 1 1 1 0 - test_h_mem 0xbeefdead,r2 - - ; Test dmov @$dir10,@R13+ - mvi_h_gr 0x1fc,r13 - set_cc 0x0d ; Condition codes shouldn't change - dmov @0x200,@r13+ - test_cc 1 1 0 1 - mvi_h_gr 0x1fc,r2 - test_h_mem 0xbeefdead,r2 - inci_h_gr 4,r2 - test_h_mem 0xbeefdead,r2 - test_h_gr 0x200,r13 - - ; Test dmov @$R13+,@$dir10 - mvi_h_gr 0x1fc,r13 - mvi_h_mem 0xdeadbeef,r13 - set_cc 0x0c ; Condition codes shouldn't change - dmov @r13+,@0x200 - test_cc 1 1 0 0 - mvi_h_gr 0x1fc,r2 - test_h_mem 0xdeadbeef,r2 - inci_h_gr 4,r2 - test_h_mem 0xdeadbeef,r2 - test_h_gr 0x200,r13 - - ; Test dmov @$dir10,@-R15 - mvi_h_gr 0x200,r15 - mvi_h_mem 0xdeadbeef,r15 - set_cc 0x0b ; Condition codes shouldn't change - dmov @0x200,@-r15 - test_cc 1 0 1 1 - mvi_h_gr 0x1fc,r2 - test_h_mem 0xdeadbeef,r2 - inci_h_gr 4,r2 - test_h_mem 0xdeadbeef,r2 - test_h_gr 0x1fc,r15 - - ; Test dmov @$R15+,@$dir10 - mvi_h_gr 0x1fc,r15 - mvi_h_mem 0xbeefdead,r15 - set_cc 0x0a ; Condition codes shouldn't change - dmov @r15+,@0x200 - test_cc 1 0 1 0 - mvi_h_gr 0x1fc,r2 - test_h_mem 0xbeefdead,r2 - inci_h_gr 4,r2 - test_h_mem 0xbeefdead,r2 - test_h_gr 0x200,r15 - - pass diff --git a/sim/testsuite/sim/fr30/dmovb.cgs b/sim/testsuite/sim/fr30/dmovb.cgs deleted file mode 100644 index 96cfb9d..0000000 --- a/sim/testsuite/sim/fr30/dmovb.cgs +++ /dev/null @@ -1,46 +0,0 @@ -# fr30 testcase for dmovb -# mach(): fr30 - - .include "testutils.inc" - START - - .text - .global dmovb -dmovb: - ; Test dmovb @$dir8,$R13 - mvi_h_gr 0xdeadbeef,r1 - mvi_h_gr 0x80,r2 - mvr_h_mem r1,r2 - set_cc 0x0f ; Condition codes shouldn't change - dmovb @0x80,r13 - test_cc 1 1 1 1 - test_h_gr 0xffffffde,r13 - - ; Test dmovb $R13,@$dir8 - mvi_h_gr 0xbeefdead,r13 - set_cc 0x0e ; Condition codes shouldn't change - dmovb r13,@0x80 - test_cc 1 1 1 0 - test_h_mem 0xadadbeef,r2 - - ; Test dmovb @$dir8,@R13+ - mvi_h_gr 0x7c,r13 - mvi_h_mem 0xdeadbeef,r13 - set_cc 0x0d ; Condition codes shouldn't change - dmovb @0x7f,@r13+ - test_cc 1 1 0 1 - mvi_h_gr 0x7c,r2 - test_h_mem 0xefadbeef,r2 - test_h_gr 0x7d,r13 - - ; Test dmovb @$R13+,@$dir8 - mvi_h_gr 0x7c,r13 - mvi_h_mem 0xbeefdead,r13 - set_cc 0x0c ; Condition codes shouldn't change - dmovb @r13+,@0x7f - test_cc 1 1 0 0 - mvi_h_gr 0x7c,r2 - test_h_mem 0xbeefdebe,r2 - test_h_gr 0x7d,r13 - - pass diff --git a/sim/testsuite/sim/fr30/dmovh.cgs b/sim/testsuite/sim/fr30/dmovh.cgs deleted file mode 100644 index 86afb44..0000000 --- a/sim/testsuite/sim/fr30/dmovh.cgs +++ /dev/null @@ -1,46 +0,0 @@ -# fr30 testcase for dmovh -# mach(): fr30 - - .include "testutils.inc" - START - - .text - .global dmovh -dmovh: - ; Test dmovh @$dir9,$R13 - mvi_h_gr 0xdeadbeef,r1 - mvi_h_gr 0x100,r2 - mvr_h_mem r1,r2 - set_cc 0x0f ; Condition codes shouldn't change - dmovh @0x100,r13 - test_cc 1 1 1 1 - test_h_gr 0xffffdead,r13 - - ; Test dmovh $R13,@$dir9 - mvi_h_gr 0xdeadbeef,r13 - set_cc 0x0e ; Condition codes shouldn't change - dmovh r13,@0x100 - test_cc 1 1 1 0 - test_h_mem 0xbeefbeef,r2 - - ; Test dmovh @$dir9,@R13+ - mvi_h_gr 0x1fc,r13 - mvi_h_mem 0xdeadbeef,r13 - set_cc 0x0d ; Condition codes shouldn't change - dmovh @0x1fe,@r13+ - test_cc 1 1 0 1 - mvi_h_gr 0x1fc,r2 - test_h_mem 0xbeefbeef,r2 - test_h_gr 0x1fe,r13 - - ; Test dmovh @$R13+,@$dir9 - mvi_h_gr 0x1fc,r13 - mvi_h_mem 0xbeefdead,r13 - set_cc 0x0c ; Condition codes shouldn't change - dmovh @r13+,@0x1fe - test_cc 1 1 0 0 - mvi_h_gr 0x1fc,r2 - test_h_mem 0xbeefbeef,r2 - test_h_gr 0x1fe,r13 - - pass diff --git a/sim/testsuite/sim/fr30/enter.cgs b/sim/testsuite/sim/fr30/enter.cgs deleted file mode 100644 index ae75e16..0000000 --- a/sim/testsuite/sim/fr30/enter.cgs +++ /dev/null @@ -1,34 +0,0 @@ -# fr30 testcase for enter $u10 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global enter -enter: - ; Test enter $u10 - mvr_h_gr sp,r7 ; save stack pointer - mvr_h_gr sp,r8 ; shadow stack pointer - mvr_h_gr sp,r14 ; Initialize - set_cc 0x0f ; Condition codes are irrelevent - enter 0 - test_cc 1 1 1 1 - testr_h_gr r8,sp - inci_h_gr -4,r8 - testr_h_gr r14,r8 - testr_h_mem r7,r14 - - mvr_h_gr sp,r8 ; shadow stack pointer - mvr_h_gr r14,r9 ; save - set_cc 0x0e ; Condition codes are irrelevent - enter 0x3fc - test_cc 1 1 1 0 - inci_h_gr -4,r8 - testr_h_gr r14,r8 - testr_h_mem r9,r14 - inci_h_gr -0x3f8,r8 - testr_h_gr r8,sp - - pass diff --git a/sim/testsuite/sim/fr30/eor.cgs b/sim/testsuite/sim/fr30/eor.cgs deleted file mode 100644 index a870761..0000000 --- a/sim/testsuite/sim/fr30/eor.cgs +++ /dev/null @@ -1,69 +0,0 @@ -# fr30 testcase for eor $Rj,$Ri, eor $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global eor -eor: - ; Test eor $Rj,$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_gr 0x55555555,r8 - set_cc 0x07 ; Set mask opposite of expected - eor r7,r8 - test_cc 1 0 1 1 - test_h_gr 0xffffffff,r8 - - mvi_h_gr 0x00000000,r7 - mvi_h_gr 0x00000000,r8 - set_cc 0x08 ; Set mask opposite of expected - eor r7,r8 - test_cc 0 1 0 0 - test_h_gr 0x00000000,r8 - - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_gr 0xaaaaaaaa,r8 - set_cc 0x0b ; Set mask opposite of expected - eor r7,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - mvi_h_gr 0xdead0000,r7 - mvi_h_gr 0x0000beef,r8 - set_cc 0x05 ; Set mask opposite of expected - eor r7,r8 - test_cc 1 0 0 1 - test_h_gr 0xdeadbeef,r8 - - ; Test eor $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x07 ; Set mask opposite of expected - eor r7,@sp - test_cc 1 0 1 1 - test_h_mem 0xffffffff,sp - - mvi_h_gr 0x00000000,r7 - mvi_h_mem 0x00000000,sp - set_cc 0x08 ; Set mask opposite of expected - eor r7,@sp - test_cc 0 1 0 0 - test_h_mem 0x00000000,sp - - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0xaaaaaaaa,sp - set_cc 0x0b ; Set mask opposite of expected - eor r7,@sp - test_cc 0 1 1 1 - test_h_mem 0x00000000,sp - - mvi_h_gr 0xdead0000,r7 - mvi_h_mem 0x0000beef,sp - set_cc 0x05 ; Set mask opposite of expected - eor r7,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/eorb.cgs b/sim/testsuite/sim/fr30/eorb.cgs deleted file mode 100644 index 540f3f7..0000000 --- a/sim/testsuite/sim/fr30/eorb.cgs +++ /dev/null @@ -1,40 +0,0 @@ -# fr30 testcase for eorb $Rj,$Ri, eorb $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global eorb -eorb: - ; Test eorb $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x07 ; Set mask opposite of expected - eorb r7,@sp - test_cc 1 0 1 1 - test_h_mem 0xff555555,sp - - mvi_h_gr 0xaaaaaa00,r7 - mvi_h_mem 0x00555555,sp - set_cc 0x08 ; Set mask opposite of expected - eorb r7,@sp - test_cc 0 1 0 0 - test_h_mem 0x00555555,sp - - mvi_h_gr 0xaaaaaa55,r7 - mvi_h_mem 0x55aaaaaa,sp - set_cc 0x0b ; Set mask opposite of expected - eorb r7,@sp - test_cc 0 1 1 1 - test_h_mem 0x00aaaaaa,sp - - mvi_h_gr 0x000000d0,r7 - mvi_h_mem 0x0eadbeef,sp - set_cc 0x05 ; Set mask opposite of expected - eorb r7,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/eorh.cgs b/sim/testsuite/sim/fr30/eorh.cgs deleted file mode 100644 index 7cf8473..0000000 --- a/sim/testsuite/sim/fr30/eorh.cgs +++ /dev/null @@ -1,40 +0,0 @@ -# fr30 testcase for eorh $Rj,$Ri, eorh $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global eorh -eorh: - ; Test eorh $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x07 ; Set mask opposite of expected - eorh r7,@sp - test_cc 1 0 1 1 - test_h_mem 0xffff5555,sp - - mvi_h_gr 0xaaaa0000,r7 - mvi_h_mem 0x00005555,sp - set_cc 0x08 ; Set mask opposite of expected - eorh r7,@sp - test_cc 0 1 0 0 - test_h_mem 0x00005555,sp - - mvi_h_gr 0xaaaa5555,r7 - mvi_h_mem 0x5555aaaa,sp - set_cc 0x0b ; Set mask opposite of expected - eorh r7,@sp - test_cc 0 1 1 1 - test_h_mem 0x0000aaaa,sp - - mvi_h_gr 0x0000de00,r7 - mvi_h_mem 0x00adbeef,sp - set_cc 0x05 ; Set mask opposite of expected - eorh r7,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/extsb.cgs b/sim/testsuite/sim/fr30/extsb.cgs deleted file mode 100644 index 6a18d7e..0000000 --- a/sim/testsuite/sim/fr30/extsb.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for extsb $Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global extsb -extsb: - ; Test extsb $Ri - mvi_h_gr 0,r7 - set_cc 0x0f ; Condition codes are irrelevent - extsb r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_gr 0x7f,r7 - set_cc 0x0e ; Condition codes are irrelevent - extsb r7 - test_cc 1 1 1 0 - test_h_gr 0x7f,r7 - - mvi_h_gr 0x80,r7 - set_cc 0x0d ; Condition codes are irrelevent - extsb r7 - test_cc 1 1 0 1 - test_h_gr 0xffffff80,r7 - - mvi_h_gr 0xffffff7f,r7 - set_cc 0x0c ; Condition codes are irrelevent - extsb r7 - test_cc 1 1 0 0 - test_h_gr 0x7f,r7 - - pass diff --git a/sim/testsuite/sim/fr30/extsh.cgs b/sim/testsuite/sim/fr30/extsh.cgs deleted file mode 100644 index eb12fd0..0000000 --- a/sim/testsuite/sim/fr30/extsh.cgs +++ /dev/null @@ -1,48 +0,0 @@ -# fr30 testcase for extsh $Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global extsh -extsh: - ; Test extsh $Ri - mvi_h_gr 0,r7 - set_cc 0x0f ; Condition codes are irrelevent - extsh r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_gr 0x7f,r7 - set_cc 0x0e ; Condition codes are irrelevent - extsh r7 - test_cc 1 1 1 0 - test_h_gr 0x7f,r7 - - mvi_h_gr 0x80,r7 - set_cc 0x0d ; Condition codes are irrelevent - extsh r7 - test_cc 1 1 0 1 - test_h_gr 0x80,r7 - - mvi_h_gr 0x7fff,r7 - set_cc 0x0c ; Condition codes are irrelevent - extsh r7 - test_cc 1 1 0 0 - test_h_gr 0x7fff,r7 - - mvi_h_gr 0x8000,r7 - set_cc 0x0b ; Condition codes are irrelevent - extsh r7 - test_cc 1 0 1 1 - test_h_gr 0xffff8000,r7 - - mvi_h_gr 0xffff7fff,r7 - set_cc 0x0a ; Condition codes are irrelevent - extsh r7 - test_cc 1 0 1 0 - test_h_gr 0x7fff,r7 - - pass diff --git a/sim/testsuite/sim/fr30/extub.cgs b/sim/testsuite/sim/fr30/extub.cgs deleted file mode 100644 index ddcc683..0000000 --- a/sim/testsuite/sim/fr30/extub.cgs +++ /dev/null @@ -1,42 +0,0 @@ -# fr30 testcase for extub $Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global extub -extub: - ; Test extub $Ri - mvi_h_gr 0,r7 - set_cc 0x0f ; Condition codes are irrelevent - extub r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_gr 0x7f,r7 - set_cc 0x0e ; Condition codes are irrelevent - extub r7 - test_cc 1 1 1 0 - test_h_gr 0x7f,r7 - - mvi_h_gr 0x80,r7 - set_cc 0x0d ; Condition codes are irrelevent - extub r7 - test_cc 1 1 0 1 - test_h_gr 0x80,r7 - - mvi_h_gr 0xffffff7f,r7 - set_cc 0x0c ; Condition codes are irrelevent - extub r7 - test_cc 1 1 0 0 - test_h_gr 0x7f,r7 - - mvi_h_gr 0xffffff80,r7 - set_cc 0x0b ; Condition codes are irrelevent - extub r7 - test_cc 1 0 1 1 - test_h_gr 0x80,r7 - - pass diff --git a/sim/testsuite/sim/fr30/extuh.cgs b/sim/testsuite/sim/fr30/extuh.cgs deleted file mode 100644 index fa2579e..0000000 --- a/sim/testsuite/sim/fr30/extuh.cgs +++ /dev/null @@ -1,54 +0,0 @@ -# fr30 testcase for extuh $Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global extuh -extuh: - ; Test extuh $Ri - mvi_h_gr 0,r7 - set_cc 0x0f ; Condition codes are irrelevent - extuh r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_gr 0x7f,r7 - set_cc 0x0e ; Condition codes are irrelevent - extuh r7 - test_cc 1 1 1 0 - test_h_gr 0x7f,r7 - - mvi_h_gr 0x80,r7 - set_cc 0x0d ; Condition codes are irrelevent - extuh r7 - test_cc 1 1 0 1 - test_h_gr 0x80,r7 - - mvi_h_gr 0x7fff,r7 - set_cc 0x0e ; Condition codes are irrelevent - extuh r7 - test_cc 1 1 1 0 - test_h_gr 0x7fff,r7 - - mvi_h_gr 0x8000,r7 - set_cc 0x0d ; Condition codes are irrelevent - extuh r7 - test_cc 1 1 0 1 - test_h_gr 0x8000,r7 - - mvi_h_gr 0xffff7fff,r7 - set_cc 0x0c ; Condition codes are irrelevent - extuh r7 - test_cc 1 1 0 0 - test_h_gr 0x7fff,r7 - - mvi_h_gr 0xffff8000,r7 - set_cc 0x0b ; Condition codes are irrelevent - extuh r7 - test_cc 1 0 1 1 - test_h_gr 0x8000,r7 - - pass diff --git a/sim/testsuite/sim/fr30/hello.ms b/sim/testsuite/sim/fr30/hello.ms deleted file mode 100644 index 0f208df..0000000 --- a/sim/testsuite/sim/fr30/hello.ms +++ /dev/null @@ -1,19 +0,0 @@ -# mach: fr30 -# output: Hello world!\n - - .global _start -_start: - -; write (hello world) - ldi32 #14,r6 - ldi32 #hello,r5 - ldi32 #1,r4 - ldi32 #5,r0 - int #10 -; exit (0) - ldi32 #0,r4 - ldi32 #1,r0 - int #10 - -length: .long 14 -hello: .ascii "Hello world!\r\n" diff --git a/sim/testsuite/sim/fr30/int.cgs b/sim/testsuite/sim/fr30/int.cgs deleted file mode 100644 index 7cdca7b..0000000 --- a/sim/testsuite/sim/fr30/int.cgs +++ /dev/null @@ -1,35 +0,0 @@ -# fr30 testcase for int $u8 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global int -int: - ; Test int $u8 - setup and test an interrupt #0xfd (randomly chosen) - mvr_h_gr tbr,r7 - inci_h_gr 8,r7 - mvi_h_mem pass,r7 - mvi_h_gr doint,r9 - inci_h_gr 2,r9 - mvr_h_gr ssp,r10 - set_cc 0x0f ; Condition codes should not change - set_s_user ; Set opposite of expected - set_i 1 ; Set opposite of expected - mvr_h_gr ps,r8 -doint: int 0xfd - fail - -pass: - test_cc 1 1 1 1 - test_s_system - test_i 0 - inci_h_gr -4,r10 - testr_h_mem r8,r10 - inci_h_gr -4,r10 - testr_h_mem r9,r10 - testr_h_dr r10,ssp - - pass diff --git a/sim/testsuite/sim/fr30/inte.cgs b/sim/testsuite/sim/fr30/inte.cgs deleted file mode 100644 index a15bfd9..0000000 --- a/sim/testsuite/sim/fr30/inte.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for inte -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global inte -inte: - ; Test inte which is essentially int #9 - mvr_h_gr tbr,r7 - inci_h_gr 0x3d8,r7 - mvi_h_mem pass,r7 - mvi_h_gr doint,r9 - inci_h_gr 2,r9 - mvr_h_gr ssp,r10 - set_cc 0x0f ; Condition codes should not change - set_s_user ; Set opposite of expected - set_i 1 ; Should not change - mvr_h_gr ps,r8 -doint: inte - fail - -pass: - test_cc 1 1 1 1 - test_ilm 4 - test_s_system - test_i 1 - inci_h_gr -4,r10 - testr_h_mem r8,r10 - inci_h_gr -4,r10 - testr_h_mem r9,r10 - testr_h_dr r10,ssp - - pass diff --git a/sim/testsuite/sim/fr30/jmp.cgs b/sim/testsuite/sim/fr30/jmp.cgs deleted file mode 100644 index db4af22..0000000 --- a/sim/testsuite/sim/fr30/jmp.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# fr30 testcase for jmp @$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global jmp - - ; Test jmp $Ri - mvi_h_gr #func1,r0 - set_cc 0x0f ; condition codes shouldn't change -jmp1: - jmp @r0 - fail -func1: - test_cc 1 1 1 1 - mvi_h_gr #func2,r0 - set_cc 0x0f ; condition codes shouldn't change -jmp2: - jmp:d @r0 - ldi:8 1,r0 ; Must assume this works - fail -func2: - test_cc 1 1 1 1 - testr_h_gr 1,r0 - - pass diff --git a/sim/testsuite/sim/fr30/ld.cgs b/sim/testsuite/sim/fr30/ld.cgs deleted file mode 100644 index 3f2d30b..0000000 --- a/sim/testsuite/sim/fr30/ld.cgs +++ /dev/null @@ -1,219 +0,0 @@ -# fr30 testcase for -# mach(): fr30 -# ld $Rj,$Ri -# ld @($R13,$Rj),$Ri -# ld @($R14,$disp10),$Ri -# ld @($R15,$udisp6),$Ri -# ld @$R15+,$Ri -# ld @$R15+,$Rs - - .include "testutils.inc" - - START - - .text - .global ld -ld: - ; Test ld $Rj,$Ri - mvi_h_mem #0x00000000,sp - set_cc 0x0f ; condition codes should not change - ld @sp,r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_mem #0x00000001,sp - set_cc 0x07 ; condition codes should not change - ld @sp,r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - mvi_h_mem #0x7fffffff,sp - set_cc 0x0b ; condition codes should not change - ld @sp,r7 - test_cc 1 0 1 1 - test_h_gr 0x7fffffff,r7 - - mvi_h_mem #0x80000000,sp - set_cc 0x0d ; condition codes should not change - ld @sp,r7 - test_cc 1 1 0 1 - test_h_gr 0x80000000,r7 - - mvi_h_mem #0xffffffff,sp - set_cc 0x0e ; condition codes should not change - ld @sp,r7 - test_cc 1 1 1 0 - test_h_gr -1,r7 - - ; Test ld @($R13,$Rj),$Ri - mvr_h_gr sp,r13 - inci_h_gr -8,r13 - mvi_h_gr 8,r8 - - mvi_h_mem #0x00000000,sp - set_cc 0x0f ; condition codes should not change - ld @(r13,r8),r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_mem #0x00000001,sp - set_cc 0x07 ; condition codes should not change - ld @(r13,r8),r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - mvi_h_mem #0x7fffffff,sp - set_cc 0x0b ; condition codes should not change - ld @(r13,r8),r7 - test_cc 1 0 1 1 - test_h_gr 0x7fffffff,r7 - - mvi_h_mem #0x80000000,sp - set_cc 0x0d ; condition codes should not change - ld @(r13,r8),r7 - test_cc 1 1 0 1 - test_h_gr 0x80000000,r7 - - mvi_h_mem #0xffffffff,sp - set_cc 0x0e ; condition codes should not change - ld @(r13,r8),r7 - test_cc 1 1 1 0 - test_h_gr -1,r7 - - ; Test ld @($R14,$disp10),$Ri - mvi_h_mem #0xdeadbeef,sp - mvr_h_gr sp,r14 - mvi_h_gr -0x1fc,r8 - add_h_gr r8,r14 - - set_cc 0x0f ; condition codes should not change - ld @(r14,0x1fc),r7 - test_cc 1 1 1 1 - test_h_gr 0xdeadbeef,r7 - - inci_h_gr 0xfc,r14 - set_cc 0x07 ; condition codes should not change - ld @(r14,0x100),r7 - test_cc 0 1 1 1 - test_h_gr 0xdeadbeef,r7 - - inci_h_gr 0x100,r14 - set_cc 0x0b ; condition codes should not change - ld @(r14,0x0),r7 - test_cc 1 0 1 1 - test_h_gr 0xdeadbeef,r7 - - inci_h_gr 0x100,r14 - set_cc 0x0d ; condition codes should not change - ld @(r14,-0x100),r7 - test_cc 1 1 0 1 - test_h_gr 0xdeadbeef,r7 - - inci_h_gr 0x100,r14 - set_cc 0x0e ; condition codes should not change - ld @(r14,-0x200),r7 - test_cc 1 1 1 0 - test_h_gr 0xdeadbeef,r7 - - ; Test ld @($R15,$udisp6),$Ri - mvi_h_mem #0xdeadbeef,sp - mvr_h_gr sp,r14 - mvi_h_gr -0x3c,r8 - add_h_gr r8,r14 - - set_cc 0x0f ; condition codes should not change - ld @(r14,0x3c),r7 - test_cc 1 1 1 1 - test_h_gr 0xdeadbeef,r7 - - inci_h_gr 0x1c,r14 - set_cc 0x07 ; condition codes should not change - ld @(r14,0x20),r7 - test_cc 0 1 1 1 - test_h_gr 0xdeadbeef,r7 - - inci_h_gr 0x20,r14 - set_cc 0x0b ; condition codes should not change - ld @(r14,0x0),r7 - test_cc 1 0 1 1 - test_h_gr 0xdeadbeef,r7 - - ; Test ld @$R15+,$Ri - mvr_h_gr sp,r8 ; save original stack pointer - mvr_h_gr r8,r9 - inci_h_gr 4,r9 ; original stack pointer + 4 - mvi_h_mem #0xdeadbeef,sp ; prime memory - - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,r7 - test_cc 1 1 1 1 - test_h_gr 0xdeadbeef,r7 - testr_h_gr sp,r9 ; should have been incremented - - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,sp - test_cc 1 1 1 1 - test_h_gr 0xdeadbeef,sp ; should not have been incremented - - ; Test ld @$R15+,$Rs - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,tbr - test_cc 1 1 1 1 - test_h_dr 0xdeadbeef,tbr - testr_h_gr sp,r9 ; should have been incremented - - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,rp - test_cc 1 1 1 1 - test_h_dr 0xdeadbeef,rp - testr_h_gr sp,r9 ; should have been incremented - - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,mdh - test_cc 1 1 1 1 - test_h_dr 0xdeadbeef,mdh - testr_h_gr sp,r9 ; should have been incremented - - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,mdl - test_cc 1 1 1 1 - test_h_dr 0xdeadbeef,mdl - testr_h_gr sp,r9 ; should have been incremented - - set_s_user - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,ssp - test_cc 1 1 1 1 - test_h_dr 0xdeadbeef,ssp - testr_h_gr sp,r9 ; should have been incremented - - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,usp - test_cc 1 1 1 1 - test_h_dr 0xdeadbeef,usp - test_h_gr 0xdeadbeef,sp ; should not have been incremented - - set_s_system - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,usp - test_cc 1 1 1 1 - test_h_dr 0xdeadbeef,usp - testr_h_gr sp,r9 ; should have been incremented - - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,ssp - test_cc 1 1 1 1 - test_h_dr 0xdeadbeef,ssp - test_h_gr 0xdeadbeef,sp ; should not have been incremented - - pass diff --git a/sim/testsuite/sim/fr30/ldi20.cgs b/sim/testsuite/sim/fr30/ldi20.cgs deleted file mode 100644 index c7a4ef4..0000000 --- a/sim/testsuite/sim/fr30/ldi20.cgs +++ /dev/null @@ -1,37 +0,0 @@ -# fr30 testcase for ldi20 $i20,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global ldi20 -ldi20: - ; Test ldi20 $i20,$Ri - set_cc 0x0f ; condition codes should not change - ldi20 #0x00000000,r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - set_cc 0x07 ; condition codes should not change - ldi:20 1,r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - set_cc 0x0b ; condition codes should not change - ldi20 0x7ffff,r7 - test_cc 1 0 1 1 - test_h_gr 0x0007ffff,r7 - - set_cc 0x0d ; condition codes should not change - ldi:20 0x80000,r7 - test_cc 1 1 0 1 - test_h_gr 0x00080000,r7 - - set_cc 0x0e ; condition codes should not change - ldi20 0xfffff,r7 - test_cc 1 1 1 0 - test_h_gr 0x000fffff,r7 - - pass diff --git a/sim/testsuite/sim/fr30/ldi32.cgs b/sim/testsuite/sim/fr30/ldi32.cgs deleted file mode 100644 index 3e56db7..0000000 --- a/sim/testsuite/sim/fr30/ldi32.cgs +++ /dev/null @@ -1,37 +0,0 @@ -# fr30 testcase for ldi32 $i32,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global ldi32 -ldi32: - ; Test ldi32 $i32,$Ri - set_cc 0x0f ; condition codes should not change - ldi32 #0x00000000,r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - set_cc 0x07 ; condition codes should not change - ldi:32 1,r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - set_cc 0x0b ; condition codes should not change - ldi32 0x7fffffff,r7 - test_cc 1 0 1 1 - test_h_gr 0x7fffffff,r7 - - set_cc 0x0d ; condition codes should not change - ldi:32 0x80000000,r7 - test_cc 1 1 0 1 - test_h_gr 0x80000000,r7 - - set_cc 0x0e ; condition codes should not change - ldi32 0xffffffff,r7 - test_cc 1 1 1 0 - test_h_gr -1,r7 - - pass diff --git a/sim/testsuite/sim/fr30/ldi8.cgs b/sim/testsuite/sim/fr30/ldi8.cgs deleted file mode 100644 index 9b15ede..0000000 --- a/sim/testsuite/sim/fr30/ldi8.cgs +++ /dev/null @@ -1,37 +0,0 @@ -# fr30 testcase for ldi8 $i8,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global ldi8 -ldi8: - ; Test ldi8 $i8,$Ri - set_cc 0x0f ; condition codes should not change - ldi8 #0x00000000,r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - set_cc 0x07 ; condition codes should not change - ldi:20 1,r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - set_cc 0x0b ; condition codes should not change - ldi8 0x7f,r7 - test_cc 1 0 1 1 - test_h_gr 0x0000007f,r7 - - set_cc 0x0d ; condition codes should not change - ldi:20 0x80,r7 - test_cc 1 1 0 1 - test_h_gr 0x00000080,r7 - - set_cc 0x0e ; condition codes should not change - ldi8 0xff,r7 - test_cc 1 1 1 0 - test_h_gr 0x000000ff,r7 - - pass diff --git a/sim/testsuite/sim/fr30/ldm0.cgs b/sim/testsuite/sim/fr30/ldm0.cgs deleted file mode 100644 index 9deb564..0000000 --- a/sim/testsuite/sim/fr30/ldm0.cgs +++ /dev/null @@ -1,60 +0,0 @@ -# fr30 testcase for ldm0 ($reglist_low) -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global ldm0 -ldm0: - ; Test ldm0 ($reglist_low) - mvr_h_gr sp,r9 ; save stack pointer permanently - inci_h_gr -4,sp - mvi_h_mem 3,sp - inci_h_gr -4,sp - mvi_h_mem 2,sp - inci_h_gr -4,sp - mvi_h_mem 1,sp - inci_h_gr -4,sp - mvi_h_mem 0,sp - - set_cc 0x0f ; Condition codes should not change - ldm0 (r0,r2,r4,r6) - test_cc 1 1 1 1 - testr_h_gr sp,r9 - test_h_gr 0,r0 - test_h_gr 1,r2 - test_h_gr 2,r4 - test_h_gr 3,r6 - - inci_h_gr -16,sp - set_cc 0x0f ; Condition codes should not change - ldm0 (r1,r3,r5,r7) - test_cc 1 1 1 1 - testr_h_gr sp,r9 - test_h_gr 0,r1 - test_h_gr 1,r3 - test_h_gr 2,r5 - test_h_gr 3,r7 - - inci_h_gr -16,sp - set_cc 0x0f ; Condition codes should not change - ldm0 (r1,r5,r7,r3) ; Order speficied should not matter - test_cc 1 1 1 1 - testr_h_gr sp,r9 - test_h_gr 0,r1 - test_h_gr 1,r3 - test_h_gr 2,r5 - test_h_gr 3,r7 - - set_cc 0x0f ; Condition codes should not change - ldm0 () ; Nothing should happen - test_cc 1 1 1 1 - testr_h_gr sp,r9 - test_h_gr 0,r1 - test_h_gr 1,r3 - test_h_gr 2,r5 - test_h_gr 3,r7 - - pass diff --git a/sim/testsuite/sim/fr30/ldm1.cgs b/sim/testsuite/sim/fr30/ldm1.cgs deleted file mode 100644 index 33cfcdb..0000000 --- a/sim/testsuite/sim/fr30/ldm1.cgs +++ /dev/null @@ -1,59 +0,0 @@ -# fr30 testcase for ldm1 ($reglist_low) -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global ldm1 -ldm1: - ; Test ldm1 ($reglist_low) - mvr_h_gr sp,r1 ; save stack pointer permanently - inci_h_gr -4,sp - mvi_h_mem 3,sp - inci_h_gr -4,sp - mvi_h_mem 2,sp - inci_h_gr -4,sp - mvi_h_mem 1,sp - inci_h_gr -4,sp - mvi_h_mem 0,sp - - set_cc 0x0f ; Condition codes should not change - ldm1 (r8,r10,r12,r14) - test_cc 1 1 1 1 - testr_h_gr sp,r1 - test_h_gr 0,r8 - test_h_gr 1,r10 - test_h_gr 2,r12 - test_h_gr 3,r14 - - inci_h_gr -16,sp - set_cc 0x0f ; Condition codes should not change - ldm1 (r9,r11,r13,r15) - test_cc 1 1 1 1 - test_h_gr 0,r9 - test_h_gr 1,r11 - test_h_gr 2,r13 - test_h_gr 3,r15 - - mvr_h_gr r1,sp ; restore stack pointer - inci_h_gr -16,sp - set_cc 0x0f ; Condition codes should not change - ldm1 (r9,r13,r15,r11); Order speficied should not matter - test_cc 1 1 1 1 - test_h_gr 0,r9 - test_h_gr 1,r11 - test_h_gr 2,r13 - test_h_gr 3,r15 - - mvr_h_gr r1,sp ; restore stack pointer - set_cc 0x0f ; Condition codes should not change - ldm1 () ; Nothing should happen - test_cc 1 1 1 1 - testr_h_gr sp,r1 - test_h_gr 0,r9 - test_h_gr 1,r11 - test_h_gr 2,r13 - - pass diff --git a/sim/testsuite/sim/fr30/ldres.cgs b/sim/testsuite/sim/fr30/ldres.cgs deleted file mode 100644 index 0083489..0000000 --- a/sim/testsuite/sim/fr30/ldres.cgs +++ /dev/null @@ -1,25 +0,0 @@ -# fr30 testcase for ldres $@Ri+,$u4 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global ldres -ldres: - ; Test ldres $@Ri+,$u4 - ; The current implementation simply increments Ri - mvi_h_gr 0x1000,r7 - set_cc 0x0f ; Condition codes are irrelevent - ldres @r7+,0 - test_cc 1 1 1 1 - test_h_gr 0x1004,r7 - - mvi_h_gr 0x1000,r7 - set_cc 0x0f ; Condition codes are irrelevent - ldres @r7+,0xf - test_cc 1 1 1 1 - test_h_gr 0x1004,r7 - - pass diff --git a/sim/testsuite/sim/fr30/ldub.cgs b/sim/testsuite/sim/fr30/ldub.cgs deleted file mode 100644 index 8d42cfa..0000000 --- a/sim/testsuite/sim/fr30/ldub.cgs +++ /dev/null @@ -1,115 +0,0 @@ -# fr30 testcase for -# mach(): fr30 -# ldub $Rj,$Ri -# ldub @($R13,$Rj),$Ri -# ldub @($R14,$disp8),$Ri - - .include "testutils.inc" - - START - - .text - .global ldub -ldub: - ; Test ldub $Rj,$Ri - mvi_h_mem #0x00adbeef,sp - set_cc 0x0f ; condition codes should not change - ldub @sp,r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_mem #0x01adbeef,sp - set_cc 0x07 ; condition codes should not change - ldub @sp,r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - mvi_h_mem #0x7fadbeef,sp - set_cc 0x0b ; condition codes should not change - ldub @sp,r7 - test_cc 1 0 1 1 - test_h_gr 0x7f,r7 - - mvi_h_mem #0x80adbeef,sp - set_cc 0x0d ; condition codes should not change - ldub @sp,r7 - test_cc 1 1 0 1 - test_h_gr 0x80,r7 - - mvi_h_mem #0xffadbeef,sp - set_cc 0x0e ; condition codes should not change - ldub @sp,r7 - test_cc 1 1 1 0 - test_h_gr 0xff,r7 - - ; Test ldub @($R13,$Rj),$Ri - mvr_h_gr sp,r13 - inci_h_gr -8,r13 - mvi_h_gr 8,r8 - - mvi_h_mem #0x00adbeef,sp - set_cc 0x0f ; condition codes should not change - ldub @(r13,r8),r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_mem #0x01adbeef,sp - set_cc 0x07 ; condition codes should not change - ldub @(r13,r8),r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - mvi_h_mem #0x7fadbeef,sp - set_cc 0x0b ; condition codes should not change - ldub @(r13,r8),r7 - test_cc 1 0 1 1 - test_h_gr 0x7f,r7 - - mvi_h_mem #0x80adbeef,sp - set_cc 0x0d ; condition codes should not change - ldub @(r13,r8),r7 - test_cc 1 1 0 1 - test_h_gr 0x80,r7 - - mvi_h_mem #0xffadbeef,sp - set_cc 0x0e ; condition codes should not change - ldub @(r13,r8),r7 - test_cc 1 1 1 0 - test_h_gr 0xff,r7 - - ; Test ldub @($R14,$disp8),$Ri - mvi_h_mem #0xdeadbeef,sp - mvr_h_gr sp,r14 - mvi_h_gr -0x7f,r8 - add_h_gr r8,r14 - - set_cc 0x0f ; condition codes should not change - ldub @(r14,0x7f),r7 - test_cc 1 1 1 1 - test_h_gr 0xde,r7 - - inci_h_gr 0x3f,r14 - set_cc 0x07 ; condition codes should not change - ldub @(r14,0x40),r7 - test_cc 0 1 1 1 - test_h_gr 0xde,r7 - - inci_h_gr 0x40,r14 - set_cc 0x0b ; condition codes should not change - ldub @(r14,0x0),r7 - test_cc 1 0 1 1 - test_h_gr 0xde,r7 - - inci_h_gr 0x40,r14 - set_cc 0x0d ; condition codes should not change - ldub @(r14,-0x40),r7 - test_cc 1 1 0 1 - test_h_gr 0xde,r7 - - inci_h_gr 0x40,r14 - set_cc 0x0e ; condition codes should not change - ldub @(r14,-0x80),r7 - test_cc 1 1 1 0 - test_h_gr 0xde,r7 - - pass diff --git a/sim/testsuite/sim/fr30/lduh.cgs b/sim/testsuite/sim/fr30/lduh.cgs deleted file mode 100644 index 7d36b75..0000000 --- a/sim/testsuite/sim/fr30/lduh.cgs +++ /dev/null @@ -1,115 +0,0 @@ -# fr30 testcase for -# mach(): fr30 -# lduh $Rj,$Ri -# lduh @($R13,$Rj),$Ri -# lduh @($R14,$disp9),$Ri - - .include "testutils.inc" - - START - - .text - .global lduh -lduh: - ; Test lduh $Rj,$Ri - mvi_h_mem #0x0000beef,sp - set_cc 0x0f ; condition codes should not change - lduh @sp,r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_mem #0x0001beef,sp - set_cc 0x07 ; condition codes should not change - lduh @sp,r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - mvi_h_mem #0x7fffbeef,sp - set_cc 0x0b ; condition codes should not change - lduh @sp,r7 - test_cc 1 0 1 1 - test_h_gr 0x7fff,r7 - - mvi_h_mem #0x8000beef,sp - set_cc 0x0d ; condition codes should not change - lduh @sp,r7 - test_cc 1 1 0 1 - test_h_gr 0x8000,r7 - - mvi_h_mem #0xffffbeef,sp - set_cc 0x0e ; condition codes should not change - lduh @sp,r7 - test_cc 1 1 1 0 - test_h_gr 0xffff,r7 - - ; Test lduh @($R13,$Rj),$Ri - mvr_h_gr sp,r13 - inci_h_gr -8,r13 - mvi_h_gr 8,r8 - - mvi_h_mem #0x0000beef,sp - set_cc 0x0f ; condition codes should not change - lduh @(r13,r8),r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_mem #0x0001beef,sp - set_cc 0x07 ; condition codes should not change - lduh @(r13,r8),r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - mvi_h_mem #0x7fffbeef,sp - set_cc 0x0b ; condition codes should not change - lduh @(r13,r8),r7 - test_cc 1 0 1 1 - test_h_gr 0x7fff,r7 - - mvi_h_mem #0x8000beef,sp - set_cc 0x0d ; condition codes should not change - lduh @(r13,r8),r7 - test_cc 1 1 0 1 - test_h_gr 0x8000,r7 - - mvi_h_mem #0xffffbeef,sp - set_cc 0x0e ; condition codes should not change - lduh @(r13,r8),r7 - test_cc 1 1 1 0 - test_h_gr 0xffff,r7 - - ; Test lduh @($R14,$disp9),$Ri - mvi_h_mem #0xdeadbeef,sp - mvr_h_gr sp,r14 - mvi_h_gr -0xfe,r8 - add_h_gr r8,r14 - - set_cc 0x0f ; condition codes should not change - lduh @(r14,0xfe),r7 - test_cc 1 1 1 1 - test_h_gr 0xdead,r7 - - inci_h_gr 0x7e,r14 - set_cc 0x07 ; condition codes should not change - lduh @(r14,0x80),r7 - test_cc 0 1 1 1 - test_h_gr 0xdead,r7 - - inci_h_gr 0x80,r14 - set_cc 0x0b ; condition codes should not change - lduh @(r14,0x0),r7 - test_cc 1 0 1 1 - test_h_gr 0xdead,r7 - - inci_h_gr 0x80,r14 - set_cc 0x0d ; condition codes should not change - lduh @(r14,-0x80),r7 - test_cc 1 1 0 1 - test_h_gr 0xdead,r7 - - inci_h_gr 0x80,r14 - set_cc 0x0e ; condition codes should not change - lduh @(r14,-0x100),r7 - test_cc 1 1 1 0 - test_h_gr 0xdead,r7 - - pass diff --git a/sim/testsuite/sim/fr30/leave.cgs b/sim/testsuite/sim/fr30/leave.cgs deleted file mode 100644 index 4d3dd70..0000000 --- a/sim/testsuite/sim/fr30/leave.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# fr30 testcase for leave -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global leave -leave: - ; Test leave $u10 - mvr_h_gr sp,r7 ; save Stack pointer - mvr_h_gr sp,r14 - inci_h_gr -4,r14 - mvi_h_mem 0xdeadbeef,r14 - mvi_h_gr 0xbeefdead,r15 - set_cc 0x0f ; Condition codes are irrelevent - leave - test_cc 1 1 1 1 - testr_h_gr sp,r7 - test_h_gr 0xdeadbeef,r14 - - pass diff --git a/sim/testsuite/sim/fr30/lsl.cgs b/sim/testsuite/sim/fr30/lsl.cgs deleted file mode 100644 index ead749f..0000000 --- a/sim/testsuite/sim/fr30/lsl.cgs +++ /dev/null @@ -1,65 +0,0 @@ -# fr30 testcase for lsl $Rj,$Ri, lsl $u4,$Rj -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global lsl -lsl: - ; Test lsl $Rj,$Ri - mvi_h_gr 0xdeadbee0,r7 ; Shift by 0 - mvi_h_gr 2,r8 - set_cc 0x0d ; Set mask opposite of expected - lsl r7,r8 - test_cc 0 0 0 0 - test_h_gr 2,r8 - - mvi_h_gr 0xdeadbee1,r7 ; Shift by 1 - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - lsl r7,r8 - test_cc 0 0 1 0 - test_h_gr 4,r8 - - mvi_h_gr 0xdeadbeff,r7 ; Shift by 31 - mvi_h_gr 1,r8 - set_cc 0x07 ; Set mask opposite of expected - lsl r7,r8 - test_cc 1 0 1 0 - test_h_gr 0x80000000,r8 - - mvi_h_gr 0xdeadbeff,r7 ; clear register - mvi_h_gr 2,r8 - set_cc 0x0a ; Set mask opposite of expected - lsl r7,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - ; Test lsl $u4Ri - mvi_h_gr 2,r8 - set_cc 0x0d ; Set mask opposite of expected - lsl 0,r8 - test_cc 0 0 0 0 - test_h_gr 2,r8 - - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - lsl 1,r8 - test_cc 0 0 1 0 - test_h_gr 4,r8 - - mvi_h_gr 1,r8 - set_cc 0x0e ; Set mask opposite of expected - lsl 15,r8 - test_cc 0 0 1 0 - test_h_gr 0x00008000,r8 - - mvi_h_gr 0x00020000,r8 - set_cc 0x0a ; Set mask opposite of expected - lsl 15,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - pass diff --git a/sim/testsuite/sim/fr30/lsl2.cgs b/sim/testsuite/sim/fr30/lsl2.cgs deleted file mode 100644 index 58acf84..0000000 --- a/sim/testsuite/sim/fr30/lsl2.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for lsl2 $Rj,$Ri, lsl2 $u4,$Rj -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global lsl2 -lsl2: - ; Test lsl2 $u4Ri - mvi_h_gr 2,r8 - set_cc 0x0d ; Set mask opposite of expected - lsl2 0,r8 - test_cc 0 0 0 0 - test_h_gr 0x20000,r8 - - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - lsl2 1,r8 - test_cc 0 0 1 0 - test_h_gr 0x40000,r8 - - mvi_h_gr 1,r8 - set_cc 0x07 ; Set mask opposite of expected - lsl2 15,r8 - test_cc 1 0 1 0 - test_h_gr 0x80000000,r8 - - mvi_h_gr 2,r8 - set_cc 0x0a ; Set mask opposite of expected - lsl2 15,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - pass diff --git a/sim/testsuite/sim/fr30/lsr.cgs b/sim/testsuite/sim/fr30/lsr.cgs deleted file mode 100644 index 5b9587f..0000000 --- a/sim/testsuite/sim/fr30/lsr.cgs +++ /dev/null @@ -1,65 +0,0 @@ -# fr30 testcase for lsr $Rj,$Ri, lsr $u4,$Rj -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global lsr -lsr: - ; Test lsr $Rj,$Ri - mvi_h_gr 0xdeadbee0,r7 ; Shift by 0 - mvi_h_gr 0x80000000,r8 - set_cc 0x05 ; Set mask opposite of expected - lsr r7,r8 - test_cc 1 0 0 0 - test_h_gr 0x80000000,r8 - - mvi_h_gr 0xdeadbee1,r7 ; Shift by 1 - mvi_h_gr 0x80000000,r8 - set_cc 0x0f ; Set mask opposite of expected - lsr r7,r8 - test_cc 0 0 1 0 - test_h_gr 0x40000000,r8 - - mvi_h_gr 0xdeadbeff,r7 ; Shift by 31 - mvi_h_gr 0x80000000,r8 - set_cc 0x0f ; Set mask opposite of expected - lsr r7,r8 - test_cc 0 0 1 0 - test_h_gr 1,r8 - - mvi_h_gr 0xdeadbeff,r7 ; clear register - mvi_h_gr 0x40000000,r8 - set_cc 0x0a ; Set mask opposite of expected - lsr r7,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - ; Test lsr $u4Ri - mvi_h_gr 0x80000000,r8 - set_cc 0x05 ; Set mask opposite of expected - lsr 0,r8 - test_cc 1 0 0 0 - test_h_gr 0x80000000,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x0f ; Set mask opposite of expected - lsr 1,r8 - test_cc 0 0 1 0 - test_h_gr 0x40000000,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x0e ; Set mask opposite of expected - lsr 15,r8 - test_cc 0 0 1 0 - test_h_gr 0x00010000,r8 - - mvi_h_gr 0x00004000,r8 - set_cc 0x0a ; Set mask opposite of expected - lsr 15,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - pass diff --git a/sim/testsuite/sim/fr30/lsr2.cgs b/sim/testsuite/sim/fr30/lsr2.cgs deleted file mode 100644 index fd6ceaa..0000000 --- a/sim/testsuite/sim/fr30/lsr2.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for lsr2 $u4,$Rj -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global lsr2 -lsr2: - ; Test lsr2 $u4Ri - mvi_h_gr 0x80000000,r8 - set_cc 0x0d ; Set mask opposite of expected - lsr2 0,r8 - test_cc 0 0 0 0 - test_h_gr 0x00008000,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x0f ; Set mask opposite of expected - lsr2 1,r8 - test_cc 0 0 1 0 - test_h_gr 0x00004000,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x0e ; Set mask opposite of expected - lsr2 15,r8 - test_cc 0 0 1 0 - test_h_gr 1,r8 - - mvi_h_gr 0x40000000,r8 - set_cc 0x0a ; Set mask opposite of expected - lsr2 15,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - pass diff --git a/sim/testsuite/sim/fr30/misc.exp b/sim/testsuite/sim/fr30/misc.exp deleted file mode 100644 index da1490d..0000000 --- a/sim/testsuite/sim/fr30/misc.exp +++ /dev/null @@ -1,20 +0,0 @@ -# Miscellaneous FR30 simulator testcases - -if [istarget fr30*-*-*] { - # load support procs - # load_lib cgen.exp - - # all machines - set all_machs "fr30" - - # The .ms suffix is for "miscellaneous .s". - foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.ms]] { - # If we're only testing specific files and this isn't one of them, - # skip it. - if ![runtest_file_p $runtests $src] { - continue - } - - run_sim_test $src $all_machs - } -} diff --git a/sim/testsuite/sim/fr30/mov.cgs b/sim/testsuite/sim/fr30/mov.cgs deleted file mode 100644 index bf99252..0000000 --- a/sim/testsuite/sim/fr30/mov.cgs +++ /dev/null @@ -1,108 +0,0 @@ -# fr30 testcase for mov $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global mov -mov: - ; Test mov $Rj,$Ri - mvi_h_gr 1,r7 - mvi_h_dr 0xa,tbr - mvi_h_dr 0xb,rp - mvi_h_dr 0xc,mdh - mvi_h_dr 0xd,mdl - mvr_h_gr sp,ssp - mvr_h_gr sp,usp - - mov r7,r7 - set_cc 0x0f ; Condition codes should not change - test_cc 1 1 1 1 - test_h_gr 1,r7 - - mov r7,r8 - set_cc 0x0e ; Condition codes should not change - test_cc 1 1 1 0 - test_h_gr 1,r7 - test_h_gr 1,r8 - - ; Test mov $Rs,$Ri - set_cc 0x0d ; Condition codes should not change - mov tbr,r7 - test_cc 1 1 0 1 - test_h_gr 0xa,r7 - - set_cc 0x0c ; Condition codes should not change - mov rp,r7 - test_cc 1 1 0 0 - test_h_gr 0xb,r7 - - set_cc 0x0b ; Condition codes should not change - mov mdh,r7 - test_cc 1 0 1 1 - test_h_gr 0xc,r7 - - set_cc 0x0a ; Condition codes should not change - mov mdl,r7 - test_cc 1 0 1 0 - test_h_gr 0xd,r7 - - set_cc 0x09 ; Condition codes should not change - mov usp,r7 - test_cc 1 0 0 1 - testr_h_gr sp,r7 - - set_cc 0x08 ; Condition codes should not change - mov ssp,r7 - test_cc 1 0 0 0 - testr_h_gr sp,r7 - - ; Test mov $Ri,$Rs - set_cc 0x07 ; Condition codes should not change - mov r8,tbr - test_cc 0 1 1 1 - test_h_dr 0x1,tbr - - set_cc 0x06 ; Condition codes should not change - mov r8,rp - test_cc 0 1 1 0 - test_h_dr 0x1,rp - - set_cc 0x05 ; Condition codes should not change - mov r8,mdh - test_cc 0 1 0 1 - test_h_dr 0x1,mdh - - set_cc 0x04 ; Condition codes should not change - mov r8,mdl - test_cc 0 1 0 0 - test_h_dr 0x1,mdl - - set_cc 0x03 ; Condition codes should not change - mov r8,ssp - test_cc 0 0 1 1 - test_h_dr 0x1,ssp - - set_cc 0x02 ; Condition codes should not change - mov r8,usp - test_cc 0 0 1 0 - test_h_dr 0x1,usp - - ; Test mov $PS,$Ri - set_cc 0x01 ; Condition codes affect result - set_dbits 0x3 - mov ps,r7 - test_cc 0 0 0 1 - test_h_gr 0x00000601,r7 - - ; Test mov $Ri,PS - set_cc 0x01 ; Set opposite of expected - set_dbits 0x1 ; Set opposite of expected - mvi_h_gr 0x0000040e,r7 - mov r7,PS - test_cc 1 1 1 0 - test_dbits 0x2 - - pass diff --git a/sim/testsuite/sim/fr30/mul.cgs b/sim/testsuite/sim/fr30/mul.cgs deleted file mode 100644 index f7cbf58..0000000 --- a/sim/testsuite/sim/fr30/mul.cgs +++ /dev/null @@ -1,240 +0,0 @@ -# fr30 testcase for mul $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global mul -mul: - ; Test mul $Rj,$Ri - ; Positive operands - mvi_h_gr 3,r7 ; multiply small numbers - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 6,mdl - - mvi_h_gr 1,r7 ; multiply by 1 - mvi_h_gr 2,r8 - set_cc 0x0e ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 0 0 - test_h_dr 0,mdh - test_h_dr 2,mdl - - mvi_h_gr 2,r7 ; multiply by 1 - mvi_h_gr 1,r8 - set_cc 0x0f ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 2,mdl - - mvi_h_gr 0,r7 ; multiply by 0 - mvi_h_gr 2,r8 - set_cc 0x0b ; Set mask opposite of expected - mul r7,r8 - test_cc 0 1 0 1 - test_h_dr 0,mdh - test_h_dr 0,mdl - - mvi_h_gr 2,r7 ; multiply by 0 - mvi_h_gr 0,r8 - set_cc 0x0a ; Set mask opposite of expected - mul r7,r8 - test_cc 0 1 0 0 - test_h_dr 0,mdh - test_h_dr 0,mdl - - mvi_h_gr 0x3fffffff,r7 ; 31 bit result - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 0x7ffffffe,mdl - - mvi_h_gr 0x40000000,r7 ; 32 bit result - mvi_h_gr 2,r8 - set_cc 0x04 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 1 0 - test_h_dr 0,mdh - test_h_dr 0x80000000,mdl - - mvi_h_gr 0x40000000,r7 ; 33 bit result - mvi_h_gr 4,r8 - set_cc 0x0d ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 1 1 - test_h_dr 1,mdh - test_h_dr 0x00000000,mdl - - mvi_h_gr 0x7fffffff,r7 ; max positive result - mvi_h_gr 0x7fffffff,r8 - set_cc 0x0d ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 1 1 - test_h_dr 0x3fffffff,mdh - test_h_dr 0x00000001,mdl - - ; Mixed operands - mvi_h_gr -3,r7 ; multiply small numbers - mvi_h_gr 2,r8 - set_cc 0x07 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 0 1 - test_h_dr -1,mdh - test_h_dr -6,mdl - - mvi_h_gr 3,r7 ; multiply small numbers - mvi_h_gr -2,r8 - set_cc 0x07 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 0 1 - test_h_dr -1,mdh - test_h_dr -6,mdl - - mvi_h_gr 1,r7 ; multiply by 1 - mvi_h_gr -2,r8 - set_cc 0x06 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 0 0 - test_h_dr -1,mdh - test_h_dr -2,mdl - - mvi_h_gr -2,r7 ; multiply by 1 - mvi_h_gr 1,r8 - set_cc 0x07 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 0 1 - test_h_dr -1,mdh - test_h_dr -2,mdl - - mvi_h_gr 0,r7 ; multiply by 0 - mvi_h_gr -2,r8 - set_cc 0x0b ; Set mask opposite of expected - mul r7,r8 - test_cc 0 1 0 1 - test_h_dr 0,mdh - test_h_dr 0,mdl - - mvi_h_gr -2,r7 ; multiply by 0 - mvi_h_gr 0,r8 - set_cc 0x0a ; Set mask opposite of expected - mul r7,r8 - test_cc 0 1 0 0 - test_h_dr 0,mdh - test_h_dr 0,mdl - - mvi_h_gr 0x20000001,r7 ; 31 bit result - mvi_h_gr -2,r8 - set_cc 0x07 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 0 1 - test_h_dr 0xffffffff,mdh - test_h_dr 0xbffffffe,mdl - - mvi_h_gr 0x40000000,r7 ; 32 bit result - mvi_h_gr -2,r8 - set_cc 0x06 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 0 0 - test_h_dr 0xffffffff,mdh - test_h_dr 0x80000000,mdl - - mvi_h_gr 0x40000001,r7 ; 32 bit result - mvi_h_gr -2,r8 - set_cc 0x0c ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 1 0 - test_h_dr 0xffffffff,mdh - test_h_dr 0x7ffffffe,mdl - - mvi_h_gr 0x40000000,r7 ; 33 bit result - mvi_h_gr -4,r8 - set_cc 0x0d ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 1 1 - test_h_dr 0xffffffff,mdh - test_h_dr 0x00000000,mdl - - mvi_h_gr 0x7fffffff,r7 ; max negative result - mvi_h_gr 0x80000000,r8 - set_cc 0x05 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 1 1 - test_h_dr 0xc0000000,mdh - test_h_dr 0x80000000,mdl - - ; Negative operands - mvi_h_gr -3,r7 ; multiply small numbers - mvi_h_gr -2,r8 - set_cc 0x0f ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 6,mdl - - mvi_h_gr -1,r7 ; multiply by 1 - mvi_h_gr -2,r8 - set_cc 0x0e ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 0 0 - test_h_dr 0,mdh - test_h_dr 2,mdl - - mvi_h_gr -2,r7 ; multiply by 1 - mvi_h_gr -1,r8 - set_cc 0x0f ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 2,mdl - - mvi_h_gr 0xc0000001,r7 ; 31 bit result - mvi_h_gr -2,r8 - set_cc 0x0f ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 0x7ffffffe,mdl - - mvi_h_gr 0xc0000000,r7 ; 32 bit result - mvi_h_gr -2,r8 - set_cc 0x04 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 1 0 - test_h_dr 0,mdh - test_h_dr 0x80000000,mdl - - mvi_h_gr 0xc0000000,r7 ; 33 bit result - mvi_h_gr -4,r8 - set_cc 0x0d ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 1 1 - test_h_dr 1,mdh - test_h_dr 0x00000000,mdl - - mvi_h_gr 0x80000001,r7 ; almost max positive result - mvi_h_gr 0x80000001,r8 - set_cc 0x0d ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 1 1 - test_h_dr 0x3fffffff,mdh - test_h_dr 0x00000001,mdl - - - mvi_h_gr 0x80000000,r7 ; max positive result - mvi_h_gr 0x80000000,r8 - set_cc 0x0d ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 1 1 - test_h_dr 0x40000000,mdh - test_h_dr 0x00000000,mdl - - pass diff --git a/sim/testsuite/sim/fr30/mulh.cgs b/sim/testsuite/sim/fr30/mulh.cgs deleted file mode 100644 index 1421f07..0000000 --- a/sim/testsuite/sim/fr30/mulh.cgs +++ /dev/null @@ -1,211 +0,0 @@ -# fr30 testcase for mulh $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global mulh -mulh: - ; Test mulh $Rj,$Ri - ; Positive operands - mvi_h_gr 0xdead0003,r7 ; multiply small numbers - mvi_h_gr 0xbeef0002,r8 - set_cc 0x09 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 1 - test_h_dr 6,mdl - - mvi_h_gr 0xdead0001,r7 ; multiply by 1 - mvi_h_gr 0xbeef0002,r8 - set_cc 0x08 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 0 - test_h_dr 2,mdl - - mvi_h_gr 0xdead0002,r7 ; multiply by 1 - mvi_h_gr 0xbeef0001,r8 - set_cc 0x09 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 1 - test_h_dr 2,mdl - - mvi_h_gr 0xdead0000,r7 ; multiply by 0 - mvi_h_gr 0xbeef0002,r8 - set_cc 0x09 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 1 - test_h_dr 0,mdl - - mvi_h_gr 0xdead0002,r7 ; multiply by 0 - mvi_h_gr 0xbeef0000,r8 - set_cc 0x08 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 0 - test_h_dr 0,mdl - - mvi_h_gr 0xdead3fff,r7 ; 15 bit result - mvi_h_gr 0xbeef0002,r8 - set_cc 0x09 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 1 - test_h_dr 0x00007ffe,mdl - - mvi_h_gr 0xdead4000,r7 ; 16 bit result - mvi_h_gr 0xbeef0002,r8 - set_cc 0x0a ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 1 0 - test_h_dr 0x00008000,mdl - - mvi_h_gr 0xdead4000,r7 ; 17 bit result - mvi_h_gr 0xbeef0004,r8 - set_cc 0x0b ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x00010000,mdl - - mvi_h_gr 0xdead7fff,r7 ; max positive result - mvi_h_gr 0xbeef7fff,r8 - set_cc 0x0b ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x3fff0001,mdl - - ; Mixed operands - mvi_h_gr -3,r7 ; multiply small numbers - mvi_h_gr 2,r8 - set_cc 0x05 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 0 1 - test_h_dr -6,mdl - - mvi_h_gr 3,r7 ; multiply small numbers - mvi_h_gr -2,r8 - set_cc 0x05 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 0 1 - test_h_dr -6,mdl - - mvi_h_gr 1,r7 ; multiply by 1 - mvi_h_gr -2,r8 - set_cc 0x04 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 0 0 - test_h_dr -2,mdl - - mvi_h_gr -2,r7 ; multiply by 1 - mvi_h_gr 1,r8 - set_cc 0x05 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 0 1 - test_h_dr -2,mdl - - mvi_h_gr 0,r7 ; multiply by 0 - mvi_h_gr -2,r8 - set_cc 0x09 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 1 - test_h_dr 0,mdl - - mvi_h_gr -2,r7 ; multiply by 0 - mvi_h_gr 0,r8 - set_cc 0x08 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 0 - test_h_dr 0,mdl - - mvi_h_gr 0xdead2001,r7 ; 15 bit result - mvi_h_gr -2,r8 - set_cc 0x05 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 0 1 - test_h_dr 0xffffbffe,mdl - - mvi_h_gr 0xdead4000,r7 ; 16 bit result - mvi_h_gr -2,r8 - set_cc 0x04 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 0 0 - test_h_dr 0xffff8000,mdl - - mvi_h_gr 0xdead4001,r7 ; 16 bit result - mvi_h_gr -2,r8 - set_cc 0x06 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 1 0 - test_h_dr 0xffff7ffe,mdl - - mvi_h_gr 0xdead4000,r7 ; 17 bit result - mvi_h_gr -4,r8 - set_cc 0x07 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 1 1 - test_h_dr 0xffff0000,mdl - - mvi_h_gr 0xdead7fff,r7 ; max negative result - mvi_h_gr 0xbeef8000,r8 - set_cc 0x07 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 1 1 - test_h_dr 0xc0008000,mdl - - ; Negative operands - mvi_h_gr -3,r7 ; multiply small numbers - mvi_h_gr -2,r8 - set_cc 0x09 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 1 - test_h_dr 6,mdl - - mvi_h_gr -1,r7 ; multiply by 1 - mvi_h_gr -2,r8 - set_cc 0x08 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 0 - test_h_dr 2,mdl - - mvi_h_gr -2,r7 ; multiply by 1 - mvi_h_gr -1,r8 - set_cc 0x09 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 1 - test_h_dr 2,mdl - - mvi_h_gr 0xdeadc001,r7 ; 15 bit result - mvi_h_gr -2,r8 - set_cc 0x09 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 1 - test_h_dr 0x00007ffe,mdl - - mvi_h_gr 0xdeadc000,r7 ; 16 bit result - mvi_h_gr -2,r8 - set_cc 0x0a ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 1 0 - test_h_dr 0x00008000,mdl - - mvi_h_gr 0xdeadc000,r7 ; 17 bit result - mvi_h_gr -4,r8 - set_cc 0x0b ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x00010000,mdl - - mvi_h_gr 0xdead8001,r7 ; almost max positive result - mvi_h_gr 0xbeef8001,r8 - set_cc 0x0b ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x3fff0001,mdl - - mvi_h_gr 0xdead8000,r7 ; max positive result - mvi_h_gr 0xbeef8000,r8 - set_cc 0x0b ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x40000000,mdl - - pass diff --git a/sim/testsuite/sim/fr30/mulu.cgs b/sim/testsuite/sim/fr30/mulu.cgs deleted file mode 100644 index 477583b..0000000 --- a/sim/testsuite/sim/fr30/mulu.cgs +++ /dev/null @@ -1,101 +0,0 @@ -# fr30 testcase for mulu $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global mulu -mulu: - ; Test mulu $Rj,$Ri - ; Positive operands - mvi_h_gr 3,r7 ; multiply small numbers - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 6,mdl - - mvi_h_gr 1,r7 ; multiply by 1 - mvi_h_gr 2,r8 - set_cc 0x0e ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 0 0 0 - test_h_dr 0,mdh - test_h_dr 2,mdl - - mvi_h_gr 2,r7 ; multiply by 1 - mvi_h_gr 1,r8 - set_cc 0x0f ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 2,mdl - - mvi_h_gr 0,r7 ; multiply by 0 - mvi_h_gr 2,r8 - set_cc 0x0b ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 1 0 1 - test_h_dr 0,mdh - test_h_dr 0,mdl - - mvi_h_gr 2,r7 ; multiply by 0 - mvi_h_gr 0,r8 - set_cc 0x0a ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 1 0 0 - test_h_dr 0,mdh - test_h_dr 0,mdl - - mvi_h_gr 0x3fffffff,r7 ; 31 bit result - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 0x7ffffffe,mdl - - mvi_h_gr 0x40000000,r7 ; 32 bit result - mvi_h_gr 2,r8 - set_cc 0x0e ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 0 0 0 - test_h_dr 0,mdh - test_h_dr 0x80000000,mdl - - mvi_h_gr 0x80000000,r7 ; 33 bit result - mvi_h_gr 2,r8 - set_cc 0x09 ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 1 1 1 - test_h_dr 1,mdh - test_h_dr 0x00000000,mdl - - mvi_h_gr 0x7fffffff,r7 ; max positive result - mvi_h_gr 0x7fffffff,r8 - set_cc 0x0d ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 0 1 1 - test_h_dr 0x3fffffff,mdh - test_h_dr 0x00000001,mdl - - mvi_h_gr 0x80000000,r7 ; max positive result - mvi_h_gr 0x80000000,r8 - set_cc 0x09 ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x40000000,mdh - test_h_dr 0x00000000,mdl - - mvi_h_gr 0xffffffff,r7 ; max positive result - mvi_h_gr 0xffffffff,r8 - set_cc 0x05 ; Set mask opposite of expected - mulu r7,r8 - test_cc 1 0 1 1 - test_h_dr 0xfffffffe,mdh - test_h_dr 0x00000001,mdl - - pass diff --git a/sim/testsuite/sim/fr30/muluh.cgs b/sim/testsuite/sim/fr30/muluh.cgs deleted file mode 100644 index b0c847e..0000000 --- a/sim/testsuite/sim/fr30/muluh.cgs +++ /dev/null @@ -1,90 +0,0 @@ -# fr30 testcase for muluh $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global muluh -muluh: - ; Test muluh $Rj,$Ri - ; Positive operands - mvi_h_gr 0xdead0003,r7 ; multiply small numbers - mvi_h_gr 0xbeef0002,r8 - set_cc 0x09 ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 0 1 - test_h_dr 6,mdl - - mvi_h_gr 0xdead0001,r7 ; multiply by 1 - mvi_h_gr 0xbeef0002,r8 - set_cc 0x08 ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 0 0 - test_h_dr 2,mdl - - mvi_h_gr 0xdead0002,r7 ; multiply by 1 - mvi_h_gr 0xbeef0001,r8 - set_cc 0x09 ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 0 1 - test_h_dr 2,mdl - - mvi_h_gr 0xdead0000,r7 ; multiply by 0 - mvi_h_gr 0xbeef0002,r8 - set_cc 0x09 ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 0 1 - test_h_dr 0,mdl - - mvi_h_gr 0xdead0002,r7 ; multiply by 0 - mvi_h_gr 0xbeef0000,r8 - set_cc 0x08 ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 0 0 - test_h_dr 0,mdl - - mvi_h_gr 0xdead3fff,r7 ; 15 bit result - mvi_h_gr 0xbeef0002,r8 - set_cc 0x09 ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 0 1 - test_h_dr 0x00007ffe,mdl - - mvi_h_gr 0xdead4000,r7 ; 16 bit result - mvi_h_gr 0xbeef0002,r8 - set_cc 0x08 ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 0 0 - test_h_dr 0x00008000,mdl - - mvi_h_gr 0xdead8000,r7 ; 17 bit result - mvi_h_gr 0xbeef0002,r8 - set_cc 0x0b ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x00010000,mdl - - mvi_h_gr 0xdead7fff,r7 ; max positive result - mvi_h_gr 0xbeef7fff,r8 - set_cc 0x0b ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x3fff0001,mdl - - mvi_h_gr 0xdead8000,r7 ; max positive result - mvi_h_gr 0xbeef8000,r8 - set_cc 0x0b ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x40000000,mdl - - mvi_h_gr 0xdeadffff,r7 ; max positive result - mvi_h_gr 0xbeefffff,r8 - set_cc 0x07 ; Set mask opposite of expected - muluh r7,r8 - test_cc 1 0 1 1 - test_h_dr 0xfffe0001,mdl - - pass diff --git a/sim/testsuite/sim/fr30/nop.cgs b/sim/testsuite/sim/fr30/nop.cgs deleted file mode 100644 index 885c55c..0000000 --- a/sim/testsuite/sim/fr30/nop.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# fr30 testcase for nop -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global nop -nop: - ; Test nop - set_cc 0x0f ; Condition codes are irrelevent - nop - test_cc 1 1 1 1 - - pass diff --git a/sim/testsuite/sim/fr30/or.cgs b/sim/testsuite/sim/fr30/or.cgs deleted file mode 100644 index 8acb970..0000000 --- a/sim/testsuite/sim/fr30/or.cgs +++ /dev/null @@ -1,55 +0,0 @@ -# fr30 testcase for or $Rj,$Ri, or $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global or -or: - ; Test or $Rj,$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_gr 0x55555555,r8 - set_cc 0x07 ; Set mask opposite of expected - or r7,r8 - test_cc 1 0 1 1 - test_h_gr 0xffffffff,r8 - - mvi_h_gr 0x00000000,r7 - mvi_h_gr 0x00000000,r8 - set_cc 0x08 ; Set mask opposite of expected - or r7,r8 - test_cc 0 1 0 0 - test_h_gr 0x00000000,r8 - - mvi_h_gr 0xdead0000,r7 - mvi_h_gr 0x0000beef,r8 - set_cc 0x05 ; Set mask opposite of expected - or r7,r8 - test_cc 1 0 0 1 - test_h_gr 0xdeadbeef,r8 - - ; Test or $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x07 ; Set mask opposite of expected - or r7,@sp - test_cc 1 0 1 1 - test_h_mem 0xffffffff,sp - - mvi_h_gr 0x00000000,r7 - mvi_h_mem 0x00000000,sp - set_cc 0x08 ; Set mask opposite of expected - or r7,@sp - test_cc 0 1 0 0 - test_h_mem 0x00000000,sp - - mvi_h_gr 0xdead0000,r7 - mvi_h_mem 0x0000beef,sp - set_cc 0x05 ; Set mask opposite of expected - or r7,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/orb.cgs b/sim/testsuite/sim/fr30/orb.cgs deleted file mode 100644 index a7b36bf..0000000 --- a/sim/testsuite/sim/fr30/orb.cgs +++ /dev/null @@ -1,33 +0,0 @@ -# fr30 testcase for orb $Rj,$Ri, orb $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global orb -orb: - ; Test orb $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x07 ; Set mask opposite of expected - orb r7,@sp - test_cc 1 0 1 1 - test_h_mem 0xff555555,sp - - mvi_h_gr 0xffffff00,r7 - mvi_h_mem 0x00ffffff,sp - set_cc 0x08 ; Set mask opposite of expected - orb r7,@sp - test_cc 0 1 0 0 - test_h_mem 0x00ffffff,sp - - mvi_h_gr 0x000000d0,r7 - mvi_h_mem 0x0eadbeef,sp - set_cc 0x05 ; Set mask opposite of expected - orb r7,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/orccr.cgs b/sim/testsuite/sim/fr30/orccr.cgs deleted file mode 100644 index 3bc55a8..0000000 --- a/sim/testsuite/sim/fr30/orccr.cgs +++ /dev/null @@ -1,38 +0,0 @@ -# fr30 testcase for orccr $u8 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global orccr -orccr: - orccr 0xff - test_cc 1 1 1 1 - test_i 1 - test_s_user - - set_cc 0x0f - orccr 0x00 - test_cc 1 1 1 1 - test_i 1 - test_s_user - - set_cc 0x00 - set_i 0 - set_s_system - orccr 0xaa - test_cc 1 0 1 0 - test_i 0 - test_s_user - - set_cc 0x00 - set_i 0 - set_s_system - orccr 0xc0 - test_cc 0 0 0 0 - test_i 0 - test_s_system - - pass diff --git a/sim/testsuite/sim/fr30/orh.cgs b/sim/testsuite/sim/fr30/orh.cgs deleted file mode 100644 index b30b402..0000000 --- a/sim/testsuite/sim/fr30/orh.cgs +++ /dev/null @@ -1,33 +0,0 @@ -# fr30 testcase for orh $Rj,$Ri, orh $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global orh -orh: - ; Test orh $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x07 ; Set mask opposite of expected - orh r7,@sp - test_cc 1 0 1 1 - test_h_mem 0xffff5555,sp - - mvi_h_gr 0xffff0000,r7 - mvi_h_mem 0x0000ffff,sp - set_cc 0x08 ; Set mask opposite of expected - orh r7,@sp - test_cc 0 1 0 0 - test_h_mem 0x0000ffff,sp - - mvi_h_gr 0x0000de00,r7 - mvi_h_mem 0x00adbeef,sp - set_cc 0x05 ; Set mask opposite of expected - orh r7,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/ret.cgs b/sim/testsuite/sim/fr30/ret.cgs deleted file mode 100644 index 7bfa0b2..0000000 --- a/sim/testsuite/sim/fr30/ret.cgs +++ /dev/null @@ -1,75 +0,0 @@ -# fr30 testcase for ret -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global ret - - ; Test ret - mvi_h_gr 0xdeadbeef,r9 - mvi_h_gr #func1,r0 - set_cc 0x0f ; condition codes shouldn't change -call1: - call @r0 - testr_h_gr 2,r0 - test_h_gr 0xbeefdead,r9 - pass - -func1: - test_cc 1 1 1 1 - mvi_h_gr #call1,r7 - inci_h_gr 2,r7 - testr_h_dr r7,rp - save_rp - - mvi_h_gr #func2,r0 - set_cc 0x0f ; condition codes shouldn't change -call2: - call:d @r0 - ldi:8 1,r0 ; Must assume this works - testr_h_gr 2,r0 - restore_rp - ret -func2: - test_cc 1 1 1 1 - mvi_h_gr #call2,r7 - inci_h_gr 4,r7 - testr_h_dr r7,rp - testr_h_gr 1,r0 - save_rp - - set_cc 0x0f ; condition codes shouldn't change -call3: - call func3 - testr_h_gr 2,r0 - restore_rp - ret -func3: - test_cc 1 1 1 1 - mvi_h_gr #call3,r7 - inci_h_gr 2,r7 - testr_h_dr r7,rp - save_rp - - set_cc 0x0f ; condition codes shouldn't change -call4: - call:d func4 - ldi:8 1,r0 ; Must assume this works - testr_h_gr 3,r0 - restore_rp - ret:d - ldi:8 2,r0 ; Must assume this works -func4: - test_cc 1 1 1 1 - mvi_h_gr #call4,r7 - inci_h_gr 4,r7 - testr_h_dr r7,rp - testr_h_gr 1,r0 - mvi_h_gr 0xbeefdead,r9 - ret:d - ldi:8 3,r0 ; Must assume this works - - fail diff --git a/sim/testsuite/sim/fr30/reti.cgs b/sim/testsuite/sim/fr30/reti.cgs deleted file mode 100644 index 76a1af0..0000000 --- a/sim/testsuite/sim/fr30/reti.cgs +++ /dev/null @@ -1,57 +0,0 @@ -# fr30 testcase for reti -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global reti -reti: - ; Test reti with low reset of ilm allowed - mvr_h_gr sp,r8 ; Save stack pointer - set_s_system - set_i 1 - set_ilm 15 ; attempt reset of low range - set_cc 0x0f ; Condition codes should not change - save_ps - inci_h_gr -4,sp - mvi_h_mem ret1,sp - set_i 0 ; Set opposite of expected - set_ilm 0 ; attempt reset of low range - set_cc 0x00 ; Set opposite of expected - - reti - fail - -ret1: - test_cc 1 1 1 1 - test_s_system - test_i 1 - test_ilm 15 - testr_h_gr r8,sp - - ; Test reti with low reset of ilm not allowed - mvr_h_gr sp,r8 ; Save stack pointer - set_s_system - set_i 0 - set_ilm 15 ; attempt reset of low range - set_cc 0x0f ; Condition codes should not change - save_ps - inci_h_gr -4,sp - mvi_h_mem ret2,sp - set_i 0 ; Set opposite of expected - set_ilm 16 ; disallow reset of low range - set_cc 0x00 ; Set opposite of expected - - reti - fail - -ret2: - test_cc 1 1 1 1 - test_s_system - test_i 0 - test_ilm 31 - testr_h_gr r8,sp - - pass diff --git a/sim/testsuite/sim/fr30/st.cgs b/sim/testsuite/sim/fr30/st.cgs deleted file mode 100644 index e458d14..0000000 --- a/sim/testsuite/sim/fr30/st.cgs +++ /dev/null @@ -1,194 +0,0 @@ -# fr30 testcase for -# mach(): fr30 -# st $Ri,@$Rj - - .include "testutils.inc" - - START - - .text - .global st -st: - mvr_h_gr sp,r9 ; Save stack pointer - ; Test st $Ri,@Rj - mvi_h_gr 0xdeadbeef,r8 - set_cc 0x0f ; Condition codes should not change - st r8,@sp - test_cc 1 1 1 1 - test_h_mem 0xdeadbeef,sp - test_h_gr 0xdeadbeef,r8 - - ; Test st $Ri,@(R13,Rj) - mvi_h_gr 0xbeefdead,r8 - mvr_h_gr sp,r1 - inci_h_gr -8,sp - mvr_h_gr sp,r2 - inci_h_gr 4,sp - - mvi_h_gr 4,r13 - set_cc 0x0e ; Condition codes should not change - st r8,@(r13,sp) - test_cc 1 1 1 0 - test_h_mem 0xbeefdead,r1 - test_h_gr 0xbeefdead,r8 - - mvi_h_gr 0,r13 - set_cc 0x0d ; Condition codes should not change - st r8,@(r13,sp) - test_cc 1 1 0 1 - test_h_mem 0xbeefdead,sp - test_h_gr 0xbeefdead,r8 - - mvi_h_gr -4,r13 - set_cc 0x0c ; Condition codes should not change - st r8,@(r13,sp) - test_cc 1 1 0 0 - test_h_mem 0xbeefdead,r2 - test_h_gr 0xbeefdead,r8 - - ; Test st $Ri,@(R14,$disp10) - mvi_h_gr 0xdeadbeef,r8 - mvr_h_gr r9,sp ; Restore stack pointer - mvr_h_gr sp,r14 - inci_h_gr -508,r14 - mvr_h_gr r14,r2 - inci_h_gr -512,r14 - mvr_h_gr r14,r3 - inci_h_gr 512,r14 - - set_cc 0x0b ; Condition codes should not change - st r8,@(r14,508) - test_cc 1 0 1 1 - test_h_mem 0xdeadbeef,r1 - test_h_gr 0xdeadbeef,r8 - - set_cc 0x0a ; Condition codes should not change - st r8,@(r14,0) - test_cc 1 0 1 0 - test_h_mem 0xdeadbeef,r2 - test_h_gr 0xdeadbeef,r8 - - set_cc 0x09 ; Condition codes should not change - st r8,@(r14,-512) - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,r3 - test_h_gr 0xdeadbeef,r8 - - ; Test st $Ri,@(R15,$udisp6) - mvi_h_gr 0xbeefdead,r8 - mvr_h_gr r9,sp ; Restore stack pointer - inci_h_gr -60,sp - - set_cc 0x08 ; Condition codes should not change - st r8,@(r15,60) - test_cc 1 0 0 0 - test_h_mem 0xbeefdead,r9 - test_h_gr 0xbeefdead,r8 - - set_cc 0x07 ; Condition codes should not change - st r8,@(r15,0) - test_cc 0 1 1 1 - test_h_mem 0xbeefdead,r9 - test_h_gr 0xbeefdead,r8 - - ; Test st $Ri,@-R15 - mvr_h_gr r9,sp ; Restore stack pointer - mvr_h_gr r9,r10 - - set_cc 0x06 ; Condition codes should not change - st r15,@-r15 - test_cc 0 1 1 0 - testr_h_mem r9,sp ; original value stored - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - mvi_h_gr 0xdeadbeef,r8 - set_cc 0x05 ; Condition codes should not change - st r8,@-r15 - test_cc 0 1 0 1 - test_h_mem 0xdeadbeef,sp - test_h_gr 0xdeadbeef,r8 - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - ; Test st $Rs,@-R15 - mvr_h_gr r9,sp ; Restore stack pointer - mvr_h_gr r9,r10 - mvi_h_dr 0xbeefdead,tbr - mvi_h_dr 0xdeadbeef,rp - mvi_h_dr 0x0000dead,mdh - mvi_h_dr 0xbeef0000,mdl - - set_cc 0x04 ; Condition codes should not change - st tbr,@-r15 - test_cc 0 1 0 0 - test_h_mem 0xbeefdead,sp - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - set_cc 0x03 ; Condition codes should not change - st rp,@-r15 - test_cc 0 0 1 1 - test_h_mem 0xdeadbeef,sp - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - set_cc 0x02 ; Condition codes should not change - st mdh,@-r15 - test_cc 0 0 1 0 - test_h_mem 0x0000dead,sp - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - set_cc 0x01 ; Condition codes should not change - st mdl,@-r15 - test_cc 0 0 0 1 - test_h_mem 0xbeef0000,sp - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - mvr_h_gr sp,usp - set_s_user - set_cc 0x00 ; Condition codes should not change - st ssp,@-r15 - test_cc 0 0 0 0 - testr_h_mem r10,sp - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - set_cc 0x00 ; Condition codes should not change - st usp,@-r15 - test_cc 0 0 0 0 - testr_h_mem r10,sp ; original value stored - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - mvr_h_gr sp,ssp - set_s_system - set_cc 0x00 ; Condition codes should not change - st usp,@-r15 - test_cc 0 0 0 0 - testr_h_mem r10,sp - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - set_cc 0x00 ; Condition codes should not change - st ssp,@-r15 - test_cc 0 0 0 0 - testr_h_mem r10,sp ; original value stored - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - ; Test st $PS,@-R15 - mvr_h_gr r9,sp ; Restore stack pointer - mvr_h_gr r9,r10 - - set_cc 0x0f ; Condition codes affect result - set_dbits 3 ; Division bits affect result - st ps,@-r15 - test_cc 1 1 1 1 - test_h_mem 0x0000060f,sp - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - pass diff --git a/sim/testsuite/sim/fr30/stb.cgs b/sim/testsuite/sim/fr30/stb.cgs deleted file mode 100644 index edbf4f2..0000000 --- a/sim/testsuite/sim/fr30/stb.cgs +++ /dev/null @@ -1,84 +0,0 @@ -# fr30 testcase for -# mach(): fr30 -# stb $Ri,@$Rj - - .include "testutils.inc" - - START - - .text - .global stb -stb: - mvr_h_gr sp,r9 ; Save stack pointer - ; Test stb $Ri,@Rj - mvi_h_mem 0xdeadbeef,sp - mvi_h_gr 0xaaaaaafe,r8 - set_cc 0x0f ; Condition codes should not change - stb r8,@sp - test_cc 1 1 1 1 - test_h_mem 0xfeadbeef,sp - test_h_gr 0xaaaaaafe,r8 - - ; Test stb $Ri,@(R13,Rj) - mvi_h_mem 0xbeefdead,sp - mvi_h_gr 0xaaaaaade,r8 - mvr_h_gr sp,r1 - inci_h_gr -8,sp - mvr_h_gr sp,r2 - mvi_h_mem 0xbeefdead,sp - inci_h_gr 4,sp - mvi_h_mem 0xbeefdead,sp - - mvi_h_gr 4,r13 - set_cc 0x0e ; Condition codes should not change - stb r8,@(r13,sp) - test_cc 1 1 1 0 - test_h_mem 0xdeefdead,r1 - test_h_gr 0xaaaaaade,r8 - - mvi_h_gr 0,r13 - set_cc 0x0d ; Condition codes should not change - stb r8,@(r13,sp) - test_cc 1 1 0 1 - test_h_mem 0xdeefdead,sp - test_h_gr 0xaaaaaade,r8 - - mvi_h_gr -4,r13 - set_cc 0x0c ; Condition codes should not change - stb r8,@(r13,sp) - test_cc 1 1 0 0 - test_h_mem 0xdeefdead,r2 - test_h_gr 0xaaaaaade,r8 - - ; Test stb $Ri,@(R14,$disp8 - mvr_h_gr r9,sp ; Restore stack pointer - mvi_h_gr 0xaaaaaafe,r8 - mvi_h_mem 0xdeadbeef,sp - mvr_h_gr sp,r14 - inci_h_gr -128,r14 ; must be aligned - mvi_h_mem 0xdeadbeef,r14 - mvr_h_gr r14,r2 - inci_h_gr -128,r14 ; must be aligned - mvi_h_mem 0xdeadbeef,r14 - mvr_h_gr r14,r3 - inci_h_gr 129,r14 - - set_cc 0x0b ; Condition codes should not change - stb r8,@(r14,127) - test_cc 1 0 1 1 - test_h_mem 0xfeadbeef,r1 - test_h_gr 0xaaaaaafe,r8 - - set_cc 0x0a ; Condition codes should not change - stb r8,@(r14,0) - test_cc 1 0 1 0 - test_h_mem 0xdefebeef,r2 - test_h_gr 0xaaaaaafe,r8 - - set_cc 0x09 ; Condition codes should not change - stb r8,@(r14,-128) - test_cc 1 0 0 1 - test_h_mem 0xdefebeef,r3 - test_h_gr 0xaaaaaafe,r8 - - pass diff --git a/sim/testsuite/sim/fr30/sth.cgs b/sim/testsuite/sim/fr30/sth.cgs deleted file mode 100644 index 8c4a115..0000000 --- a/sim/testsuite/sim/fr30/sth.cgs +++ /dev/null @@ -1,84 +0,0 @@ -# fr30 testcase for -# mach(): fr30 -# sth $Ri,@$Rj - - .include "testutils.inc" - - START - - .text - .global sth -sth: - mvr_h_gr sp,r9 ; Save stack pointer - ; Test sth $Ri,@Rj - mvi_h_mem 0xdeadbeef,sp - mvi_h_gr 0xaaaabeef,r8 - set_cc 0x0f ; Condition codes should not change - sth r8,@sp - test_cc 1 1 1 1 - test_h_mem 0xbeefbeef,sp - test_h_gr 0xaaaabeef,r8 - - ; Test sth $Ri,@(R13,Rj) - mvi_h_mem 0xbeefdead,sp - mvi_h_gr 0xaaaadead,r8 - mvr_h_gr sp,r1 - inci_h_gr -8,sp - mvr_h_gr sp,r2 - mvi_h_mem 0xbeefdead,sp - inci_h_gr 4,sp - mvi_h_mem 0xbeefdead,sp - - mvi_h_gr 4,r13 - set_cc 0x0e ; Condition codes should not change - sth r8,@(r13,sp) - test_cc 1 1 1 0 - test_h_mem 0xdeaddead,r1 - test_h_gr 0xaaaadead,r8 - - mvi_h_gr 0,r13 - set_cc 0x0d ; Condition codes should not change - sth r8,@(r13,sp) - test_cc 1 1 0 1 - test_h_mem 0xdeaddead,sp - test_h_gr 0xaaaadead,r8 - - mvi_h_gr -4,r13 - set_cc 0x0c ; Condition codes should not change - sth r8,@(r13,sp) - test_cc 1 1 0 0 - test_h_mem 0xdeaddead,r2 - test_h_gr 0xaaaadead,r8 - - ; Test sth $Ri,@(R14,$disp9) - mvr_h_gr r9,sp ; Restore stack pointer - mvi_h_gr 0xaaaaabcd,r8 - mvi_h_mem 0xdeadbeef,sp - mvr_h_gr sp,r14 - inci_h_gr -256,r14 ; must be aligned - mvr_h_gr r14,r2 - mvi_h_mem 0xdeadbeef,r14 - inci_h_gr -256,r14 - mvr_h_gr r14,r3 - mvi_h_mem 0xdeadbeef,r14 - inci_h_gr 258,r14 - - set_cc 0x0b ; Condition codes should not change - sth r8,@(r14,254) - test_cc 1 0 1 1 - test_h_mem 0xabcdbeef,r1 - test_h_gr 0xaaaaabcd,r8 - - set_cc 0x0a ; Condition codes should not change - sth r8,@(r14,0) - test_cc 1 0 1 0 - test_h_mem 0xdeadabcd,r2 - test_h_gr 0xaaaaabcd,r8 - - set_cc 0x09 ; Condition codes should not change - sth r8,@(r14,-256) - test_cc 1 0 0 1 - test_h_mem 0xdeadabcd,r3 - test_h_gr 0xaaaaabcd,r8 - - pass diff --git a/sim/testsuite/sim/fr30/stilm.cgs b/sim/testsuite/sim/fr30/stilm.cgs deleted file mode 100644 index 197940b..0000000 --- a/sim/testsuite/sim/fr30/stilm.cgs +++ /dev/null @@ -1,41 +0,0 @@ -# fr30 testcase for stilm $i8 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global stilm -stilm: - stilm 0 - test_ilm 0 - - stilm 0xe0 - test_ilm 0 - - stilm 1 - test_ilm 1 - - stilm 15 - test_ilm 15 - - stilm 16 - test_ilm 16 - - stilm 0 - test_ilm 16 - - stilm 1 - test_ilm 17 - - stilm 18 - test_ilm 18 - - stilm 31 - test_ilm 31 - - stilm 0xff - test_ilm 31 - - pass diff --git a/sim/testsuite/sim/fr30/stm0.cgs b/sim/testsuite/sim/fr30/stm0.cgs deleted file mode 100644 index 5cc162c..0000000 --- a/sim/testsuite/sim/fr30/stm0.cgs +++ /dev/null @@ -1,101 +0,0 @@ -# fr30 testcase for stm0 ($reglist_low) -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global stm0 -stm0: - ; Test stm0 ($reglist_low) - mvr_h_gr sp,r8 ; save stack pointer temporarily - mvr_h_gr sp,r9 ; save stack pointer permanently - mvi_h_gr 0,r0 - mvi_h_gr 1,r1 - mvi_h_gr 2,r2 - mvi_h_gr 3,r3 - mvi_h_gr 4,r4 - mvi_h_gr 5,r5 - mvi_h_gr 6,r6 - mvi_h_gr 7,r7 - set_cc 0x0f ; Condition codes should not change - stm0 (r0,r2,r4,r6) - test_cc 1 1 1 1 - inci_h_gr -4,r8 - test_h_mem 6,r8 - inci_h_gr -4,r8 - test_h_mem 4,r8 - inci_h_gr -4,r8 - test_h_mem 2,r8 - inci_h_gr -4,r8 - test_h_mem 0,r8 - - mvr_h_gr r9,sp ; restore stack pointer - mvr_h_gr r9,r8 ; save stack pointer temporarily - mvi_h_gr 0,r0 - mvi_h_gr 1,r1 - mvi_h_gr 2,r2 - mvi_h_gr 3,r3 - mvi_h_gr 4,r4 - mvi_h_gr 5,r5 - mvi_h_gr 6,r6 - mvi_h_gr 7,r7 - set_cc 0x0f ; Condition codes should not change - stm0 (r1,r3,r5,r7) - test_cc 1 1 1 1 - inci_h_gr -4,r8 - test_h_mem 7,r8 - inci_h_gr -4,r8 - test_h_mem 5,r8 - inci_h_gr -4,r8 - test_h_mem 3,r8 - inci_h_gr -4,r8 - test_h_mem 1,r8 - - mvr_h_gr r9,sp ; restore stack pointer - mvr_h_gr r9,r8 ; save stack pointer temporarily - mvi_h_gr 0,r0 - mvi_h_gr 1,r1 - mvi_h_gr 2,r2 - mvi_h_gr 3,r3 - mvi_h_gr 4,r4 - mvi_h_gr 5,r5 - mvi_h_gr 6,r6 - mvi_h_gr 7,r7 - set_cc 0x0f ; Condition codes should not change - stm0 (r1,r5,r7,r3) ; Order specified should not matter - test_cc 1 1 1 1 - inci_h_gr -4,r8 - test_h_mem 7,r8 - inci_h_gr -4,r8 - test_h_mem 5,r8 - inci_h_gr -4,r8 - test_h_mem 3,r8 - inci_h_gr -4,r8 - test_h_mem 1,r8 - - mvr_h_gr r9,sp ; restore stack pointer - mvr_h_gr r9,r8 ; save stack pointer temporarily - mvi_h_gr 9,r0 - mvi_h_gr 9,r1 - mvi_h_gr 9,r2 - mvi_h_gr 9,r3 - mvi_h_gr 9,r4 - mvi_h_gr 9,r5 - mvi_h_gr 9,r6 - mvi_h_gr 9,r7 - set_cc 0x0f ; Condition codes should not change - stm0 () ; should do nothing - test_cc 1 1 1 1 - testr_h_gr r9,sp - inci_h_gr -4,r8 - test_h_mem 7,r8 - inci_h_gr -4,r8 - test_h_mem 5,r8 - inci_h_gr -4,r8 - test_h_mem 3,r8 - inci_h_gr -4,r8 - test_h_mem 1,r8 - - pass diff --git a/sim/testsuite/sim/fr30/stm1.cgs b/sim/testsuite/sim/fr30/stm1.cgs deleted file mode 100644 index 2ac373d..0000000 --- a/sim/testsuite/sim/fr30/stm1.cgs +++ /dev/null @@ -1,97 +0,0 @@ -# fr30 testcase for stm1 ($reglist_low) -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global stm1 -stm1: - ; Test stm1 ($reglist_low) - mvr_h_gr sp,r1 ; save stack pointer temporarily - mvr_h_gr sp,r2 ; save stack pointer permanently - mvi_h_gr 8,r8 - mvi_h_gr 9,r9 - mvi_h_gr 10,r10 - mvi_h_gr 11,r11 - mvi_h_gr 12,r12 - mvi_h_gr 13,r13 - mvi_h_gr 14,r14 - set_cc 0x0f ; Condition codes should not change - stm1 (r8,r10,r12,r14) - test_cc 1 1 1 1 - inci_h_gr -4,r1 - test_h_mem 14,r1 - inci_h_gr -4,r1 - test_h_mem 12,r1 - inci_h_gr -4,r1 - test_h_mem 10,r1 - inci_h_gr -4,r1 - testr_h_mem 8,r1 - - mvr_h_gr r2,sp ; restore stack pointer - mvr_h_gr r2,r1 ; save stack pointer temporarily - mvi_h_gr 8,r8 - mvi_h_gr 9,r9 - mvi_h_gr 10,r10 - mvi_h_gr 11,r11 - mvi_h_gr 12,r12 - mvi_h_gr 13,r13 - mvi_h_gr 14,r14 - set_cc 0x0f ; Condition codes should not change - stm1 (r9,r11,r13,r15) - test_cc 1 1 1 1 - inci_h_gr -4,r1 - testr_h_mem r2,r1 - inci_h_gr -4,r1 - test_h_mem 13,r1 - inci_h_gr -4,r1 - test_h_mem 11,r1 - inci_h_gr -4,r1 - test_h_mem 9,r1 ; saved r15 is from before stm1 - - mvr_h_gr r2,sp ; restore stack pointer - mvr_h_gr r2,r1 ; save stack pointer temporarily - mvi_h_gr 8,r8 - mvi_h_gr 9,r9 - mvi_h_gr 10,r10 - mvi_h_gr 11,r11 - mvi_h_gr 12,r12 - mvi_h_gr 13,r13 - mvi_h_gr 14,r14 - set_cc 0x0f ; Condition codes should not change - stm1 (r9,r13,r15,r11); Order specified should not matter - test_cc 1 1 1 1 - inci_h_gr -4,r1 - testr_h_mem r2,r1 - inci_h_gr -4,r1 - test_h_mem 13,r1 - inci_h_gr -4,r1 - test_h_mem 11,r1 - inci_h_gr -4,r1 - test_h_mem 9,r1 ; saved r15 is from before stm1 - - mvr_h_gr r2,sp ; restore stack pointer - mvr_h_gr r2,r1 ; save stack pointer temporarily - mvi_h_gr 9,r8 - mvi_h_gr 9,r9 - mvi_h_gr 9,r10 - mvi_h_gr 9,r11 - mvi_h_gr 9,r12 - mvi_h_gr 9,r13 - mvi_h_gr 9,r14 - set_cc 0x0f ; Condition codes should not change - stm1 () ; should do nothing - test_cc 1 1 1 1 - testr_h_gr r2,sp - inci_h_gr -4,r1 - testr_h_mem r2,r1 - inci_h_gr -4,r1 - test_h_mem 13,r1 - inci_h_gr -4,r1 - test_h_mem 11,r1 - inci_h_gr -4,r1 - test_h_mem 9,r1 - - pass diff --git a/sim/testsuite/sim/fr30/stres.cgs b/sim/testsuite/sim/fr30/stres.cgs deleted file mode 100644 index a85fdf3..0000000 --- a/sim/testsuite/sim/fr30/stres.cgs +++ /dev/null @@ -1,25 +0,0 @@ -# fr30 testcase for stres $@Ri+,$u4 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global stres -stres: - ; Test stres $@Ri+,$u4 - ; The current implementation simply increments Ri - mvi_h_gr 0x1000,r7 - set_cc 0x0f ; Condition codes are irrelevent - stres 0,@r7+ - test_cc 1 1 1 1 - test_h_gr 0x1004,r7 - - mvi_h_gr 0x1000,r7 - set_cc 0x0f ; Condition codes are irrelevent - stres 0xf,@r7+ - test_cc 1 1 1 1 - test_h_gr 0x1004,r7 - - pass diff --git a/sim/testsuite/sim/fr30/sub.cgs b/sim/testsuite/sim/fr30/sub.cgs deleted file mode 100644 index eceaa79..0000000 --- a/sim/testsuite/sim/fr30/sub.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for sub $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global sub -sub: - ; Test sub $Rj,$Ri - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - sub r7,r8 - test_cc 0 0 0 0 - test_h_gr 1,r8 - - mvi_h_gr 1,r7 - mvi_h_gr 0x80000000,r8 - set_cc 0x0d ; Set mask opposite of expected - sub r7,r8 - test_cc 0 0 1 0 - test_h_gr 0x7fffffff,r8 - - set_cc 0x0b ; Set mask opposite of expected - sub r8,r8 - test_cc 0 1 0 0 - test_h_gr 0,r8 - - set_cc 0x06 ; Set mask opposite of expected - sub r7,r8 - test_cc 1 0 0 1 - test_h_gr 0xffffffff,r8 - - pass diff --git a/sim/testsuite/sim/fr30/subc.cgs b/sim/testsuite/sim/fr30/subc.cgs deleted file mode 100644 index 2978e40..0000000 --- a/sim/testsuite/sim/fr30/subc.cgs +++ /dev/null @@ -1,62 +0,0 @@ -# fr30 testcase for subc $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global subc -subc: - ; Test subc $Rj,$Ri - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0e ; Make sure carry is off - subc r7,r8 - test_cc 0 0 0 0 - test_h_gr 1,r8 - - mvi_h_gr 1,r7 - mvi_h_gr 0x80000000,r8 - set_cc 0x0c ; Make sure carry is off - subc r7,r8 - test_cc 0 0 1 0 - test_h_gr 0x7fffffff,r8 - - set_cc 0x0a ; Make sure carry is off - subc r8,r8 - test_cc 0 1 0 0 - test_h_gr 0,r8 - - set_cc 0x06 ; Make sure carry is off - subc r7,r8 - test_cc 1 0 0 1 - test_h_gr 0xffffffff,r8 - - mvi_h_gr 1,r7 - mvi_h_gr 3,r8 - set_cc 0x0f ; Make sure carry is on - subc r7,r8 - test_cc 0 0 0 0 - test_h_gr 1,r8 - - mvi_h_gr 0,r7 - mvi_h_gr 0x80000000,r8 - set_cc 0x0d ; Make sure carry is on - subc r7,r8 - test_cc 0 0 1 0 - test_h_gr 0x7fffffff,r8 - - mvi_h_gr 0x7ffffffe,r7 - set_cc 0x0b ; Make sure carry is on - subc r7,r8 - test_cc 0 1 0 0 - test_h_gr 0,r8 - - mvi_h_gr 0,r7 - set_cc 0x07 ; Make sure carry is on - subc r7,r8 - test_cc 1 0 0 1 - test_h_gr 0xffffffff,r8 - - pass diff --git a/sim/testsuite/sim/fr30/subn.cgs b/sim/testsuite/sim/fr30/subn.cgs deleted file mode 100644 index c483046..0000000 --- a/sim/testsuite/sim/fr30/subn.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for subn $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global subn -subn: - ; Test subn $Rj,$Ri - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of usual result - subn r7,r8 - test_cc 1 1 1 1 - test_h_gr 1,r8 - - mvi_h_gr 1,r7 - mvi_h_gr 0x80000000,r8 - set_cc 0x0d ; Set mask opposite of usual result - subn r7,r8 - test_cc 1 1 0 1 - test_h_gr 0x7fffffff,r8 - - set_cc 0x0b ; Set mask opposite of usual result - subn r8,r8 - test_cc 1 0 1 1 - test_h_gr 0,r8 - - set_cc 0x06 ; Set mask opposite of usual result - subn r7,r8 - test_cc 0 1 1 0 - test_h_gr 0xffffffff,r8 - - pass diff --git a/sim/testsuite/sim/fr30/testutils.inc b/sim/testsuite/sim/fr30/testutils.inc deleted file mode 100644 index 7523d6f..0000000 --- a/sim/testsuite/sim/fr30/testutils.inc +++ /dev/null @@ -1,306 +0,0 @@ -# r0, r4-r6 are used as tmps, consider them call clobbered by these macros. - - .macro start - .data -failmsg: - .ascii "fail\n" -passmsg: - .ascii "pass\n" - .text - .global _start -_start: - ldi32 0x7fffc,sp ; TODO -- what's a good value for this? - ldi32 0xffc00,r0 - mov r0,tbr ; defined in manual - mov sp,usp - mov sp,ssp - .endm - -; Exit with return code - .macro exit rc - ldi32 \rc,r4 - ldi32 #1,r0 - int #10 - .endm - -; Pass the test case - .macro pass - ldi32 #5,r6 - ldi32 #passmsg,r5 - ldi32 #1,r4 - ldi32 #5,r0 - int #10 - exit #0 - .endm - -; Fail the testcase - .macro fail - ldi32 #5,r6 - ldi32 #failmsg,r5 - ldi32 #1,r4 - ldi32 #5,r0 - int #10 - exit #1 - .endm - -; Load an immediate value into a general register -; TODO: use minimal sized insn - .macro mvi_h_gr val reg - ldi32 \val,\reg - .endm - -; Load an immediate value into a dedicated register - .macro mvi_h_dr val reg - ldi32 \val,r0 - mov r0,\reg - .endm - -; Load a general register into another general register - .macro mvr_h_gr src targ - mov \src,\targ - .endm - -; Store an immediate into a word in memory - .macro mvi_h_mem val addr - mvi_h_gr \val r4 - mvr_h_mem r4,\addr - .endm - -; Store a register into a word in memory - .macro mvr_h_mem reg addr - st \reg,@\addr - .endm - -; Store the current ps on the stack - .macro save_ps - st ps,@-r15 - .endm - -; Load a word value from memory - .macro ldmem_h_gr addr reg - ld @\addr,\reg - .endm - -; Add 2 general registers - .macro add_h_gr reg1 reg2 - add \reg1,\reg2 - .endm - -; Increment a register by and immediate - .macro inci_h_gr inc reg - mvi_h_gr \inc,r4 - add r4,\reg - .endm - -; Test the value of an immediate against a general register - .macro test_h_gr val reg - .if (\val >= 0) && (\val <= 15) - cmp \val,\reg - .else - .if (\val < 0) && (\val >= -16) - cmp2 \val,\reg - .else - ldi32 \val,r4 - cmp r4,\reg - .endif - .endif - beq test_gr\@ - fail -test_gr\@: - .endm - -; compare two general registers - .macro testr_h_gr reg1 reg2 - cmp \reg1,\reg2 - beq testr_gr\@ - fail -testr_gr\@: - .endm - -; Test the value of an immediate against a dedicated register - .macro test_h_dr val reg - mov \reg,r5 - test_h_gr \val r5 - .endm - -; Test the value of an general register against a dedicated register - .macro testr_h_dr gr dr - mov \dr,r5 - testr_h_gr \gr r5 - .endm - -; Compare an immediate with word in memory - .macro test_h_mem val addr - ldmem_h_gr \addr r5 - test_h_gr \val r5 - .endm - -; Compare a general register with word in memory - .macro testr_h_mem reg addr - ldmem_h_gr \addr r5 - testr_h_gr \reg r5 - .endm - -; Set the condition codes - .macro set_cc mask - andccr 0xf0 - orccr \mask - .endm - -; Set the stack mode - .macro set_s_user - orccr 0x20 - .endm - - .macro set_s_system - andccr 0x1f - .endm - -; Test the stack mode - .macro test_s_user - mvr_h_gr ps,r0 - mvi_h_gr 0x20,r4 - and r4,r0 - test_h_gr 0x20,r0 - .endm - - .macro test_s_system - mvr_h_gr ps,r0 - mvi_h_gr 0x20,r4 - and r4,r0 - test_h_gr 0x0,r0 - .endm - -; Set the interrupt bit - .macro set_i val - .if (\val == 1) - orccr 0x10 - .else - andccr 0x2f - .endif - .endm - -; Test the stack mode - .macro test_i val - mvr_h_gr ps,r0 - mvi_h_gr 0x10,r4 - and r4,r0 - .if (\val == 1) - test_h_gr 0x10,r0 - .else - test_h_gr 0x0,r0 - .endif - .endm - -; Set the ilm - .macro set_ilm val - stilm \val - .endm - -; Test the ilm - .macro test_ilm val - mvr_h_gr ps,r0 - mvi_h_gr 0x1f0000,r4 - and r4,r0 - mvi_h_gr \val,r5 - mvi_h_gr 0x1f,r4 - and r4,r5 - lsl 15,r5 - lsl 1,r5 - testr_h_gr r0,r5 - .endm - -; Test the condition codes - .macro test_cc N Z V C - .if (\N == 1) - bp fail\@ - .else - bn fail\@ - .endif - .if (\Z == 1) - bne fail\@ - .else - beq fail\@ - .endif - .if (\V == 1) - bnv fail\@ - .else - bv fail\@ - .endif - .if (\C == 1) - bnc fail\@ - .else - bc fail\@ - .endif - bra test_cc\@ -fail\@: - fail -test_cc\@: - .endm - -; Set the division bits - .macro set_dbits val - mvr_h_gr ps,r5 - mvi_h_gr 0xfffff8ff,r4 - and r4,r5 - mvi_h_gr \val,r0 - mvi_h_gr 3,r4 - and r4,r0 - lsl 9,r0 - or r0,r5 - mvr_h_gr r5,ps - .endm - -; Test the division bits - .macro test_dbits val - mvr_h_gr ps,r0 - lsr 9,r0 - mvi_h_gr 3,r4 - and r4,r0 - test_h_gr \val,r0 - .endm - -; Save the return pointer - .macro save_rp - st rp,@-R15 - .ENDM - -; restore the return pointer - .macro restore_rp - ld @R15+,rp - .endm - -; Ensure branch taken - .macro take_branch opcode - \opcode take_br\@ - fail -take_br\@: - .endm - - .macro take_branch_d opcode val - \opcode take_brd\@ - ldi:8 \val,r0 - fail -take_brd\@: - test_h_gr \val,r0 - .endm - -; Ensure branch not taken - .macro no_branch opcode - \opcode no_brf\@ - bra no_brs\@ -no_brf\@: - fail -no_brs\@: - .endm - - .macro no_branch_d opcode val - \opcode no_brdf\@ - ldi:8 \val,r0 - bra no_brds\@ -no_brdf\@: - fail -no_brds\@: - test_h_gr \val,r0 - .endm - diff --git a/sim/testsuite/sim/fr30/xchb.cgs b/sim/testsuite/sim/fr30/xchb.cgs deleted file mode 100644 index 3450a2e..0000000 --- a/sim/testsuite/sim/fr30/xchb.cgs +++ /dev/null @@ -1,20 +0,0 @@ -# fr30 testcase for xchb @$Rj,Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global xchb -xchb: - ; Test xchb @$Rj,Ri - mvi_h_mem 0xdeadbeef,sp - mvi_h_gr 0xbeefdead,r0 - set_cc 0x0f ; Condition codes are irrelevent - xchb @sp,r0 - test_cc 1 1 1 1 - test_h_gr 0xde,r0 - test_h_mem 0xadadbeef,sp - - pass |