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| author | Richard Earnshaw <Richard.Earnshaw@arm.com> | 2014-11-20 17:02:47 +0000 |
|---|---|---|
| committer | Richard Earnshaw <Richard.Earnshaw@arm.com> | 2014-11-20 17:02:47 +0000 |
| commit | d840c081f8082e8b9e63fead5306643975a97bb3 (patch) | |
| tree | f2fc4d574252eaed4b212ec4d3118bb5e9ee5900 | |
| parent | c22ee0ad9de7efff74942263c71b1878003e3eda (diff) | |
| download | gdb-d840c081f8082e8b9e63fead5306643975a97bb3.zip gdb-d840c081f8082e8b9e63fead5306643975a97bb3.tar.gz gdb-d840c081f8082e8b9e63fead5306643975a97bb3.tar.bz2 | |
* config/tc-arm.c (rotate_left): Avoid undefined behaviour when N = 0.
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/config/tc-arm.c | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 97e5a9e..a9481f5 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,10 @@ 2014-11-20 Richard Earnshaw <rearnsha@arm.com> + * config/tc-arm.c (rotate_left): Avoid undefined behaviour when + N = 0. + +2014-11-20 Richard Earnshaw <rearnsha@arm.com> + * config/tc-aarch64.c (warn_unpredictable_ldst): Check that transfer registers are in the GP register set. Adjust warnings. Use correct field member for address register. diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 5077f87..9100fb2 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -7251,7 +7251,7 @@ parse_operands (char *str, const unsigned int *pattern, bfd_boolean thumb) /* Functions for operand encoding. ARM, then Thumb. */ -#define rotate_left(v, n) (v << n | v >> (32 - n)) +#define rotate_left(v, n) (v << (n & 31) | v >> ((32 - n) & 31)) /* If VAL can be encoded in the immediate field of an ARM instruction, return the encoded form. Otherwise, return FAIL. */ |