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| author | Jan Beulich <jbeulich@suse.com> | 2020-06-25 09:30:09 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2020-06-25 09:30:09 +0200 |
| commit | c423d21a43727fb4d27c10d43e6bbedced0f55d5 (patch) | |
| tree | cb5acf9a89f908feef6b4dd15f215b3abf6a8ff8 | |
| parent | 8bbb3ad806d19ab3f85052220440af46fbd2b81f (diff) | |
| download | gdb-c423d21a43727fb4d27c10d43e6bbedced0f55d5.zip gdb-c423d21a43727fb4d27c10d43e6bbedced0f55d5.tar.gz gdb-c423d21a43727fb4d27c10d43e6bbedced0f55d5.tar.bz2 | |
x86: move ImmExt processing
With abuses of ImmExt gone, all templates using it have operands. Move
its main invocation into process_operands(), matching its secondary one
for the SSE2AVX case.
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/config/tc-i386.c | 8 |
2 files changed, 9 insertions, 5 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 12a593b..8fc1d84 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,11 @@ 2020-06-25 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (md_assemble): Move call to process_immext() + ... + (process_operands): ... here. + +2020-06-25 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (process_suffix): Skip ambiguous operand size diagnostic when there is a sizing prefix. Switch to word/dword/ qword encoding when there is a sizing prefix and no (explicit or diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 66da719..5bbc74c 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -4867,11 +4867,6 @@ md_assemble (char *line) && !i.types[j].bitfield.xmmword) i.reg_operands--; - /* ImmExt should be processed after SSE2AVX. */ - if (!i.tm.opcode_modifier.sse2avx - && i.tm.opcode_modifier.immext) - process_immext (); - /* For insns with operands there are more diddles to do to the opcode. */ if (i.operands) { @@ -7450,6 +7445,9 @@ process_operands (void) i.prefix[REX_PREFIX] = 0; i.rex_encoding = 0; } + /* ImmExt should be processed after SSE2AVX. */ + else if (i.tm.opcode_modifier.immext) + process_immext (); if (i.tm.opcode_modifier.sse2avx && i.tm.opcode_modifier.vexvvvv) { |