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authorNick Clifton <nickc@redhat.com>2004-04-15 08:55:27 +0000
committerNick Clifton <nickc@redhat.com>2004-04-15 08:55:27 +0000
commit91809fda2a1d641969e4c2eb17063656da645d69 (patch)
tree6593b4e3189293a5cefdc94f591a57d855db1e4b
parent3d1bca9dfbd506fabf2258a5f0a42a03cfcdbb45 (diff)
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Treat adds and subs as a special case
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/h8300-dis.c11
2 files changed, 16 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 65b0898..3c085ea 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
+
+ * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
+ separately.
+
2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
* m32r-asm.c: Regenerate.
diff --git a/opcodes/h8300-dis.c b/opcodes/h8300-dis.c
index 895a9ef..2587919 100644
--- a/opcodes/h8300-dis.c
+++ b/opcodes/h8300-dis.c
@@ -716,6 +716,17 @@ bfd_h8_disassemble (addr, info, mach)
int hadone = 0;
int nargs;
+ /* Special case handling for the adds and subs instructions
+ since in H8 mode thay can only take the r0-r7 registers but
+ in other (higher) modes they can take the er0-er7 registers
+ as well. */
+ if (strcmp (qi->opcode->name, "adds") == 0
+ || strcmp (qi->opcode->name, "subs") == 0)
+ {
+ outfn (stream, "#%d,%s", cst[0], pregnames[regno[1] & 0x7]);
+ return qi->length;
+ }
+
for (nargs = 0;
nargs < 3 && args[nargs] != (op_type) E;
nargs++)