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| author | Martin Hunt <hunt@redhat.com> | 1996-07-22 18:57:20 +0000 |
|---|---|---|
| committer | Martin Hunt <hunt@redhat.com> | 1996-07-22 18:57:20 +0000 |
| commit | 95e3e73328660ee56bba0e109f491014af337dfb (patch) | |
| tree | ea4dbcee26e151f00f37e8ad673dbf771eef8e21 | |
| parent | c38655b90f0beed92b9387ac9d8b7c02901dfdd8 (diff) | |
| download | gdb-95e3e73328660ee56bba0e109f491014af337dfb.zip gdb-95e3e73328660ee56bba0e109f491014af337dfb.tar.gz gdb-95e3e73328660ee56bba0e109f491014af337dfb.tar.bz2 | |
start-sanitize-d10v
Mon Jul 22 11:25:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* d10v-opc.c (pre_defined_registers): Declare.
* d10v-dis.c (print_operand): Now uses pre_defined_registers
to pick a better name for the registers.
end-sanitize-d10v
| -rw-r--r-- | opcodes/ChangeLog | 7 | ||||
| -rw-r--r-- | opcodes/d10v-dis.c | 39 | ||||
| -rw-r--r-- | opcodes/d10v-opc.c | 45 |
3 files changed, 81 insertions, 10 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index c6916a3..fc02710 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +start-sanitize-d10v +Mon Jul 22 11:25:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com> + * d10v-opc.c (pre_defined_registers): Declare. + * d10v-dis.c (print_operand): Now uses pre_defined_registers + to pick a better name for the registers. + +end-sanitize-d10v Mon Jul 22 13:47:23 1996 Ian Lance Taylor <ian@cygnus.com> * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix diff --git a/opcodes/d10v-dis.c b/opcodes/d10v-dis.c index a4d5438..0176d10 100644 --- a/opcodes/d10v-dis.c +++ b/opcodes/d10v-dis.c @@ -106,18 +106,37 @@ print_operand (buf, oper, insn, op) num = (insn >> shift) & (0x7FFFFFFF >> (31 - oper->bits)); - if (oper->flags & OPERAND_ACC) - *buf++ = 'a'; - else if (oper->flags & OPERAND_CONTROL) + if (oper->flags & OPERAND_REG) { - *buf++ ='c'; - *buf++ ='r'; + int i; + int match=0; + num += oper->flags & (OPERAND_ACC|OPERAND_FLAG|OPERAND_CONTROL); + for (i=0;i<reg_name_cnt();i++) + { + if (num == pre_defined_registers[i].value) + { + if (pre_defined_registers[i].pname) + strcpy(buf,pre_defined_registers[i].pname); + else + strcpy(buf,pre_defined_registers[i].name); + match=1; + break; + } + } + if (match==0) + { + if (oper->flags & OPERAND_ACC) + *buf++ = 'a'; + else if (oper->flags & OPERAND_CONTROL) + { + *buf++ ='c'; + *buf++ ='r'; + } + else if(oper->flags & OPERAND_REG) + *buf++ = 'r'; + sprintf (buf, "%d", num); + } } - else if(oper->flags & OPERAND_REG) - *buf++ = 'r'; - - if (oper->flags & OPERAND_REG) - sprintf (buf, "%d", num); else sprintf (buf, "0x%x", num); } diff --git a/opcodes/d10v-opc.c b/opcodes/d10v-opc.c index 86abde8..80e7180 100644 --- a/opcodes/d10v-opc.c +++ b/opcodes/d10v-opc.c @@ -22,6 +22,51 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * #include "ansidecl.h" #include "opcode/d10v.h" + +/* The table is sorted. Suitable for searching by a binary search. */ +const struct pd_reg pre_defined_registers[] = +{ + { "a0", NULL, OPERAND_ACC+0 }, + { "a1", NULL, OPERAND_ACC+1 }, + { "bpc", NULL, OPERAND_CONTROL+3 }, + { "bpsw", NULL, OPERAND_CONTROL+1 }, + { "c", NULL, OPERAND_FLAG+3 }, + { "f0", NULL, OPERAND_FLAG+0 }, + { "f1", NULL, OPERAND_FLAG+1 }, + { "iba", NULL, OPERAND_CONTROL+14 }, + { "mod_e", NULL, OPERAND_CONTROL+11 }, + { "mod_s", NULL, OPERAND_CONTROL+10 }, + { "pc", NULL, OPERAND_CONTROL+2 }, + { "psw", NULL, OPERAND_CONTROL+0 }, + { "r0", NULL, 0 }, + { "r1", NULL, 1 }, + { "r10", NULL, 10 }, + { "r11", NULL, 11 }, + { "r12", NULL, 12 }, + { "r13", NULL, 13 }, + { "r14", NULL, 14 }, + { "r15", "sp", 15 }, + { "r2", NULL, 2 }, + { "r3", NULL, 3 }, + { "r4", NULL, 4 }, + { "r5", NULL, 5 }, + { "r6", NULL, 6 }, + { "r7", NULL, 7 }, + { "r8", NULL, 8 }, + { "r9", NULL, 9 }, + { "rpt_c", NULL, OPERAND_CONTROL+7 }, + { "rpt_e", NULL, OPERAND_CONTROL+9 }, + { "rpt_s", NULL, OPERAND_CONTROL+8 }, + { "sp", NULL, 15 }, +}; + +int +reg_name_cnt() +{ + return (sizeof(pre_defined_registers) / sizeof(struct pd_reg)); +} + + const struct d10v_operand d10v_operands[] = { #define UNUSED (0) |