diff options
author | Sergey Belyashov <sergey.belyashov@gmail.com> | 2020-01-09 11:47:44 +0000 |
---|---|---|
committer | Nick Clifton <nickc@redhat.com> | 2020-01-09 11:49:18 +0000 |
commit | 40c75bc8b07abc5d5774ea1c439b69c96e7fd485 (patch) | |
tree | bb0efc3b78e0eb8a7ddbed1d2af4979f18ab8719 | |
parent | 72aea32839b5f4a2c8fa67e60451169b841941c0 (diff) | |
download | gdb-40c75bc8b07abc5d5774ea1c439b69c96e7fd485.zip gdb-40c75bc8b07abc5d5774ea1c439b69c96e7fd485.tar.gz gdb-40c75bc8b07abc5d5774ea1c439b69c96e7fd485.tar.bz2 |
Fix compile time warnings about comparisons always being false.
PR 25224
gas * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
opcode byte values.
(emit_ld_r_r): Likewise.
(emit_ld_rr_m): Likewise.
(emit_ld_rr_nn): Likewise.
opcodes * z80-dis.c (ld_ii_ii): Use character constant when checking
opcode byte value.
-rw-r--r-- | gas/ChangeLog | 9 | ||||
-rw-r--r-- | gas/config/tc-z80.c | 181 | ||||
-rw-r--r-- | opcodes/ChangeLog | 6 | ||||
-rw-r--r-- | opcodes/z80-dis.c | 14 |
4 files changed, 114 insertions, 96 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 660b9a2..ee1f8e6 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,12 @@ +2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com> + + PR 25224 + * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking + opcode byte values. + (emit_ld_r_r): Likewise. + (emit_ld_rr_m): Likewise. + (emit_ld_rr_nn): Likewise. + 2020-01-09 Jan Beulich <jbeulich@suse.com> * config/tc-i386.c (optimize_encoding): Add diff --git a/gas/config/tc-z80.c b/gas/config/tc-z80.c index a93b579..28b0f2b 100644 --- a/gas/config/tc-z80.c +++ b/gas/config/tc-z80.c @@ -168,13 +168,13 @@ str_to_float48 (char *litP, int *sizeP); static str_to_float_t get_str_to_float (const char *arg) { - if (strcasecmp(arg, "zeda32") == 0) + if (strcasecmp (arg, "zeda32") == 0) return str_to_zeda32; - if (strcasecmp(arg, "math48") == 0) + if (strcasecmp (arg, "math48") == 0) return str_to_float48; - if (strcasecmp(arg, "ieee754") != 0) + if (strcasecmp (arg, "ieee754") != 0) as_fatal (_("invalid floating point numbers type `%s'"), arg); return NULL; } @@ -256,11 +256,11 @@ md_parse_option (int c, const char* arg) break; case OPTION_MACH_INST: if ((ins_ok & INS_GBZ80) == 0) - return setup_instruction_list(arg, & ins_ok, & ins_err); + return setup_instruction_list (arg, & ins_ok, & ins_err); break; case OPTION_MACH_NO_INST: if ((ins_ok & INS_GBZ80) == 0) - return setup_instruction_list(arg, & ins_err, & ins_ok); + return setup_instruction_list (arg, & ins_err, & ins_ok); break; case OPTION_MACH_WUD: case OPTION_MACH_IUD: @@ -443,11 +443,11 @@ md_begin (void) { for ( k = 0 ; regtable[i].name[k] ; ++k ) { - buf[k] = ( j & ( 1<<k ) ) ? TOUPPER ( regtable[i].name[k] ) : regtable[i].name[k]; + buf[k] = ( j & ( 1<<k ) ) ? TOUPPER (regtable[i].name[k]) : regtable[i].name[k]; } - symbolS * psym = symbol_find_or_make(buf); - S_SET_SEGMENT(psym, reg_section); - symbol_set_value_expression(psym, ®); + symbolS * psym = symbol_find_or_make (buf); + S_SET_SEGMENT (psym, reg_section); + symbol_set_value_expression (psym, ®); } } } @@ -586,7 +586,7 @@ z80_start_line_hook (void) c = get_symbol_name (&name); rest = input_line_pointer + 1; - if (ISSPACE(c) && colonless_labels) + if (ISSPACE (c) && colonless_labels) { if (c == '\n') { @@ -613,7 +613,7 @@ z80_start_line_hook (void) len = 4; else len = 0; - if (len && (!ISALPHA(rest[len]) ) ) + if (len && (!ISALPHA (rest[len]))) { /* Handle assignment here. */ if (line_start[-1] == '\n') @@ -722,7 +722,7 @@ static void wrong_mach (int ins_type) { if (ins_type & ins_err) - ill_op(); + ill_op (); else as_warn (_("undocumented instruction")); } @@ -781,17 +781,18 @@ is_indir (const char *s) /* Check whether a symbol involves a register. */ static int -contains_register(symbolS *sym) +contains_register (symbolS *sym) { if (sym) - { - expressionS * ex = symbol_get_value_expression(sym); - return (O_register == ex->X_op) - || (ex->X_add_symbol && contains_register(ex->X_add_symbol)) - || (ex->X_op_symbol && contains_register(ex->X_op_symbol)); - } - else - return 0; + { + expressionS * ex = symbol_get_value_expression(sym); + + return (O_register == ex->X_op) + || (ex->X_add_symbol && contains_register(ex->X_add_symbol)) + || (ex->X_op_symbol && contains_register(ex->X_op_symbol)); + } + + return 0; } /* Parse general expression, not looking for indexed addressing. */ @@ -851,17 +852,17 @@ parse_exp_not_indexed (const char *s, expressionS *op) static int unify_indexed (expressionS *op) { - if (O_register != symbol_get_value_expression(op->X_add_symbol)->X_op) + if (O_register != symbol_get_value_expression (op->X_add_symbol)->X_op) return 0; - int rnum = symbol_get_value_expression(op->X_add_symbol)->X_add_number; - if ( ((REG_IX != rnum) && (REG_IY != rnum)) || contains_register(op->X_op_symbol) ) + int rnum = symbol_get_value_expression (op->X_add_symbol)->X_add_number; + if ( ((REG_IX != rnum) && (REG_IY != rnum)) || contains_register (op->X_op_symbol)) { - ill_op(); + ill_op (); return 0; } - /* convert subtraction to addition of negative value */ + /* Convert subtraction to addition of negative value. */ if (O_subtract == op->X_op) { expressionS minus; @@ -869,10 +870,11 @@ unify_indexed (expressionS *op) minus.X_add_number = 0; minus.X_add_symbol = op->X_op_symbol; minus.X_op_symbol = 0; - op->X_op_symbol = make_expr_symbol(&minus); + op->X_op_symbol = make_expr_symbol (&minus); op->X_op = O_add; } - /* clear X_add_number of the expression */ + + /* Clear X_add_number of the expression. */ if (op->X_add_number != 0) { expressionS add; @@ -881,7 +883,7 @@ unify_indexed (expressionS *op) add.X_add_number = op->X_add_number; add.X_add_symbol = op->X_op_symbol; add.X_op_symbol = 0; - op->X_add_symbol = make_expr_symbol(&add); + op->X_add_symbol = make_expr_symbol (&add); } else op->X_add_symbol = op->X_op_symbol; @@ -891,7 +893,7 @@ unify_indexed (expressionS *op) return 1; } -/* Parse expression, change operator to O_md1 for indexed addressing*/ +/* Parse expression, change operator to O_md1 for indexed addressing. */ static const char * parse_exp (const char *s, expressionS *op) { @@ -900,11 +902,11 @@ parse_exp (const char *s, expressionS *op) { case O_add: case O_subtract: - if (unify_indexed(op) && op->X_md) + if (unify_indexed (op) && op->X_md) op->X_op = O_md1; break; case O_register: - if ( op->X_md && ((REG_IX == op->X_add_number)||(REG_IY == op->X_add_number)) ) + if (op->X_md && ((REG_IX == op->X_add_number) || (REG_IY == op->X_add_number))) { op->X_add_symbol = zero; op->X_op = O_md1; @@ -1048,14 +1050,14 @@ emit_data_val (expressionS * val, int size) if ( (val->X_op == O_register) || (val->X_op == O_md1) - || contains_register(val->X_add_symbol) - || contains_register(val->X_op_symbol) ) + || contains_register (val->X_add_symbol) + || contains_register (val->X_op_symbol)) ill_op (); if (size <= 2 && val->X_op_symbol) { bfd_boolean simplify = TRUE; - int shift = symbol_get_value_expression(val->X_op_symbol)->X_add_number; + int shift = symbol_get_value_expression (val->X_op_symbol)->X_add_number; if (val->X_op == O_bit_and && shift == (1 << (size*8))-1) shift = 0; else if (val->X_op != O_right_shift) @@ -1106,9 +1108,9 @@ emit_byte (expressionS * val, bfd_reloc_code_real_type r_type) } p = frag_more (1); *p = val->X_add_number; - if ( contains_register(val->X_add_symbol) || contains_register(val->X_op_symbol) ) + if ( contains_register (val->X_add_symbol) || contains_register (val->X_op_symbol) ) { - ill_op(); + ill_op (); } else if ((r_type == BFD_RELOC_8_PCREL) && (val->X_op == O_constant)) { @@ -1306,7 +1308,7 @@ emit_s (char prefix, char opcode, const char *args) if (*p == ',' && arg_s.X_md == 0 && arg_s.X_op == O_register && arg_s.X_add_number == REG_A) { /* possible instruction in generic format op A,x */ if (!(ins_ok & INS_EZ80) && !sdcc_compat) - ill_op(); + ill_op (); ++p; p = parse_exp (p, & arg_s); } @@ -1890,9 +1892,10 @@ emit_rst (char prefix ATTRIBUTE_UNUSED, char opcode, const char * args) return p; } +/* For 8-bit indirect load to memory instructions like: LD (HL),n or LD (ii+d),n. */ static void -emit_ld_m_n(expressionS *dst, expressionS *src) -{ /* for 8-bit indirect load to memory instructions like: LD (HL),n or LD (ii+d),n */ +emit_ld_m_n (expressionS *dst, expressionS *src) +{ char *q; char prefix; expressionS dst_offset; @@ -1921,9 +1924,10 @@ emit_ld_m_n(expressionS *dst, expressionS *src) emit_byte (src, BFD_RELOC_8); } +/* For 8-bit load register to memory instructions: LD (<expression>),r. */ static void -emit_ld_m_r(expressionS *dst, expressionS *src) -{ /* for 8-bit load register to memory instructions: LD (<expression>),r */ +emit_ld_m_r (expressionS *dst, expressionS *src) +{ char *q; char prefix = 0; expressionS dst_offset; @@ -1980,12 +1984,13 @@ emit_ld_m_r(expressionS *dst, expressionS *src) ill_op (); } +/* For 16-bit load register to memory instructions: LD (<expression>),rr. */ static void -emit_ld_m_rr(expressionS *dst, expressionS *src) -{ /* for 16-bit load register to memory instructions: LD (<expression>),rr */ +emit_ld_m_rr (expressionS *dst, expressionS *src) +{ char *q; - char prefix = 0; - char opcode = 0; + int prefix = 0; + int opcode = 0; expressionS dst_offset; switch (dst->X_op) @@ -2007,15 +2012,15 @@ emit_ld_m_rr(expressionS *dst, expressionS *src) case REG_BC: opcode = 0x0F; break; case REG_DE: opcode = 0x1F; break; case REG_HL: opcode = 0x2F; break; - case REG_IX: opcode = (prefix != '\xfd') ? 0x3F : 0x3E; break; - case REG_IY: opcode = (prefix != '\xfd') ? 0x3E : 0x3F; break; + case REG_IX: opcode = (prefix != 0xFD) ? 0x3F : 0x3E; break; + case REG_IY: opcode = (prefix != 0xFD) ? 0x3E : 0x3F; break; default: ill_op (); } q = frag_more (prefix ? 2 : 1); *q++ = prefix; *q = opcode; - if (prefix == '\xfd' || prefix == '\xdd') + if (prefix == 0xFD || prefix == 0xDD) { dst_offset = *dst; dst_offset.X_op = O_symbol; @@ -2165,8 +2170,8 @@ emit_ld_r_r (expressionS *dst, expressionS *src) { /* mostly 8-bit load register from register instructions: LD r,r */ /* there are some exceptions: LD SP,HL/IX/IY; LD I,HL and LD HL,I */ char *q; - char prefix = 0; - char opcode = 0; + int prefix = 0; + int opcode = 0; int ii_halves = 0; switch (dst->X_add_number) @@ -2296,14 +2301,14 @@ emit_ld_r_r (expressionS *dst, expressionS *src) break; case REG_H|R_IX: case REG_L|R_IX: - if (prefix == '\xfd' || dst->X_add_number == REG_H || dst->X_add_number == REG_L) + if (prefix == 0xFD || dst->X_add_number == REG_H || dst->X_add_number == REG_L) ill_op (); /* LD IYL,IXL and LD H,IXH are not permitted */ prefix = 0xDD; ii_halves = 1; break; case REG_H|R_IY: case REG_L|R_IY: - if (prefix == '\xdd' || dst->X_add_number == REG_H || dst->X_add_number == REG_L) + if (prefix == 0xDD || dst->X_add_number == REG_H || dst->X_add_number == REG_L) ill_op (); /* LD IXH,IYH and LD L,IYL are not permitted */ prefix = 0xFD; ii_halves = 1; @@ -2325,7 +2330,7 @@ emit_ld_r_r (expressionS *dst, expressionS *src) case 0x49: /* LIS prefix, in Z80 it is LD C,C */ case 0x52: /* SIL prefix, in Z80 it is LD D,D */ case 0x5B: /* LIL prefix, in Z80 it is LD E,E */ - as_warn(_("unsupported instruction, assembled as NOP")); + as_warn (_("unsupported instruction, assembled as NOP")); opcode = 0x00; break; default:; @@ -2341,8 +2346,8 @@ static void emit_ld_rr_m (expressionS *dst, expressionS *src) { /* for 16-bit indirect load from memory to register: LD rr,(xxx) */ char *q; - char prefix = 0; - char opcode = 0; + int prefix = 0; + int opcode = 0; expressionS src_offset; /* GBZ80 has no support for 16-bit load from memory instructions */ @@ -2364,15 +2369,15 @@ emit_ld_rr_m (expressionS *dst, expressionS *src) case REG_BC: opcode = 0x07; break; case REG_DE: opcode = 0x17; break; case REG_HL: opcode = 0x27; break; - case REG_IX: opcode = (!prefix || prefix == '\xdd') ? 0x37 : 0x31; break; - case REG_IY: opcode = prefix ? ((prefix == '\xdd') ? 0x31 : 0x37) : 0x36; break; + case REG_IX: opcode = (!prefix || prefix == 0xDD) ? 0x37 : 0x31; break; + case REG_IY: opcode = prefix ? ((prefix == 0xDD) ? 0x31 : 0x37) : 0x36; break; default: ill_op (); } q = frag_more (2); *q++ = prefix; *q = opcode; - if (prefix != '\xed') + if (prefix != 0xED) { src_offset = *src; src_offset.X_op = O_symbol; @@ -2405,8 +2410,8 @@ static void emit_ld_rr_nn (expressionS *dst, expressionS *src) { /* mostly load imediate value to multibyte register instructions: LD rr,nn */ char *q; - char prefix = 0x00; - char opcode = 0x21; /* LD HL,nn */ + int prefix = 0x00; + int opcode = 0x21; /* LD HL,nn */ switch (dst->X_add_number) { case REG_IX: @@ -2489,7 +2494,7 @@ emit_lddldi (char prefix, char opcode, const char * args) char *q; if (!(ins_ok & INS_GBZ80)) - return emit_insn(prefix, opcode, args); + return emit_insn (prefix, opcode, args); p = parse_exp (args, & dst); if (*p++ != ',') @@ -2561,7 +2566,7 @@ emit_ldh (char prefix ATTRIBUTE_UNUSED, char opcode ATTRIBUTE_UNUSED, *q = 0xE2; } else - ill_op(); + ill_op (); } else { @@ -2643,10 +2648,10 @@ emit_lea (char prefix, char opcode, const char * args) switch (rnum) { case REG_IX: - opcode = (opcode == 0x33) ? 0x55 : (opcode|0x00); + opcode = (opcode == (char)0x33) ? 0x55 : (opcode|0x00); break; case REG_IY: - opcode = (opcode == 0x32) ? 0x54 : (opcode|0x01); + opcode = (opcode == (char)0x32) ? 0x54 : (opcode|0x01); } q = frag_more (2); @@ -2693,7 +2698,7 @@ emit_pea (char prefix, char opcode, const char * args) /* PEA ii without displacement is mostly typo, because there is PUSH instruction which is shorter and faster */ /*if (arg.X_op == O_register) - as_warn(_("PEA is used without displacement, use PUSH instead"));*/ + as_warn (_("PEA is used without displacement, use PUSH instead"));*/ q = frag_more (2); *q++ = prefix; @@ -2710,9 +2715,9 @@ static const char * emit_reti (char prefix, char opcode, const char * args) { if (ins_ok & INS_GBZ80) - return emit_insn(0x00, 0xD9, args); + return emit_insn (0x00, 0xD9, args); - return emit_insn(prefix, opcode, args); + return emit_insn (prefix, opcode, args); } static const char * @@ -2727,7 +2732,7 @@ emit_tst (char prefix, char opcode, const char *args) if (*p == ',' && arg_s.X_md == 0 && arg_s.X_op == O_register && arg_s.X_add_number == REG_A) { if (!(ins_ok & INS_EZ80)) - ill_op(); + ill_op (); ++p; p = parse_exp (p, & arg_s); } @@ -2776,7 +2781,7 @@ emit_tstio (char prefix, char opcode, const char *args) q = frag_more (2); *q++ = prefix; *q = opcode; - emit_byte(& arg, BFD_RELOC_8); + emit_byte (& arg, BFD_RELOC_8); return p; } @@ -2878,7 +2883,7 @@ assume (int arg ATTRIBUTE_UNUSED) input_line_pointer = (char*)skip_space (input_line_pointer); c = get_symbol_name (& name); - if (strncasecmp(name, "ADL", 4) != 0) + if (strncasecmp (name, "ADL", 4) != 0) { ill_op (); return; @@ -2990,12 +2995,12 @@ assemble_suffix (const char **suffix) for (i = 0; (i < 3) && (ISALPHA (*p)); i++) sbuf[i] = TOLOWER (*p++); - if (*p && !ISSPACE(*p)) + if (*p && !ISSPACE (*p)) return 0; *suffix = p; sbuf[i] = 0; - t = bsearch(sbuf, sf, ARRAY_SIZE (sf), sizeof(sf[0]), (int(*)(const void*, const void*))strcmp); + t = bsearch (sbuf, sf, ARRAY_SIZE (sf), sizeof (sf[0]), (int(*)(const void*, const void*)) strcmp); if (t == NULL) return 0; i = t - sf; @@ -3026,7 +3031,7 @@ assemble_suffix (const char **suffix) i = 0x40; break; } - *frag_more(1) = (char)i; + *frag_more (1) = (char)i; switch (i) { case 0x40: inst_mode = INST_MODE_FORCED | INST_MODE_S | INST_MODE_IS; break; @@ -3252,7 +3257,7 @@ md_assemble (char *str) { if ((*p) && (!ISSPACE (*p))) { - if (*p != '.' || !(ins_ok & INS_EZ80) || !assemble_suffix(&p)) + if (*p != '.' || !(ins_ok & INS_EZ80) || !assemble_suffix (&p)) { as_bad (_("syntax error")); goto end; @@ -3267,7 +3272,7 @@ md_assemble (char *str) if (!insp || (insp->inss && !(insp->inss & ins_ok))) { as_bad (_("Unknown instruction '%s'"), buf); - *frag_more(1) = 0; + *frag_more (1) = 0; } else { @@ -3466,21 +3471,21 @@ str_to_broken_float (bfd_boolean *signP, bfd_uint64_t *mantissaP, int *expP) *signP = sign; if (sign || *p == '+') ++p; - if (strncasecmp(p, "NaN", 3) == 0) + if (strncasecmp (p, "NaN", 3) == 0) { *mantissaP = 0; *expP = 0; input_line_pointer = p + 3; return 1; } - if (strncasecmp(p, "inf", 3) == 0) + if (strncasecmp (p, "inf", 3) == 0) { *mantissaP = 1ull << 63; *expP = EXP_MAX; input_line_pointer = p + 3; return 1; } - for (; ISDIGIT(*p); ++p) + for (; ISDIGIT (*p); ++p) { if (mantissa >> 60) { @@ -3491,15 +3496,15 @@ str_to_broken_float (bfd_boolean *signP, bfd_uint64_t *mantissaP, int *expP) mantissa = mantissa * 10 + (*p - '0'); } /* skip non-significant digits */ - for (; ISDIGIT(*p); ++p) + for (; ISDIGIT (*p); ++p) exponent++; if (*p == '.') { p++; - if (!exponent) /* if no precission overflow */ + if (!exponent) /* If no precission overflow. */ { - for (; ISDIGIT(*p); ++p, --exponent) + for (; ISDIGIT (*p); ++p, --exponent) { if (mantissa >> 60) { @@ -3510,7 +3515,7 @@ str_to_broken_float (bfd_boolean *signP, bfd_uint64_t *mantissaP, int *expP) mantissa = mantissa * 10 + (*p - '0'); } } - for (; ISDIGIT(*p); ++p) + for (; ISDIGIT (*p); ++p) ; } if (*p == 'e' || *p == 'E') @@ -3521,14 +3526,14 @@ str_to_broken_float (bfd_boolean *signP, bfd_uint64_t *mantissaP, int *expP) es = (*p == '-'); if (es || *p == '+') p++; - for (; ISDIGIT(*p); ++p) + for (; ISDIGIT (*p); ++p) { if (t < 100) t = t * 10 + (*p - '0'); } exponent += (es) ? -t : t; } - if (ISALNUM(*p) || *p == '.') + if (ISALNUM (*p) || *p == '.') return 0; input_line_pointer = p; if (mantissa == 0) @@ -3540,10 +3545,8 @@ str_to_broken_float (bfd_boolean *signP, bfd_uint64_t *mantissaP, int *expP) /* normalization */ for (; mantissa <= ~0ull/10; --exponent) mantissa *= 10; - /* - now we have sign, mantissa, and signed decimal exponent - need to recompute to binary exponent - */ + /* Now we have sign, mantissa, and signed decimal exponent + need to recompute to binary exponent. */ for (i = 64; exponent > 0; --exponent) { /* be sure that no integer overflow */ diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 05f3640..396549b 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com> + + PR 25224 + * z80-dis.c (ld_ii_ii): Use character constant when checking + opcode byte value. + 2020-01-09 Jan Beulich <jbeulich@suse.com> * i386-dis.c (SEP_Fixup): New. diff --git a/opcodes/z80-dis.c b/opcodes/z80-dis.c index 581d4f4..8dc7598 100644 --- a/opcodes/z80-dis.c +++ b/opcodes/z80-dis.c @@ -82,7 +82,7 @@ fetch_data (struct buffer *buf, disassemble_info * info, int n) { int r; - if (buf->n_fetch + n > (int)sizeof(buf->data)) + if (buf->n_fetch + n > (int)sizeof (buf->data)) abort (); r = info->read_memory_func (buf->base + buf->n_fetch, @@ -470,9 +470,9 @@ pref_ed (struct buffer *buf, disassemble_info *info, { struct tab_elt *p; - if (fetch_data(buf, info, 1)) + if (fetch_data (buf, info, 1)) { - for (p = opc_ed; p->val != (buf->data[1] & p->mask) || !mach_inst(buf, p); ++p) + for (p = opc_ed; p->val != (buf->data[1] & p->mask) || !mach_inst (buf, p); ++p) ; p->fp (buf, info, p->text); } @@ -585,7 +585,7 @@ ld_r_d (struct buffer *buf, disassemble_info * info, const char *txt) } static int -ld_d_r(struct buffer *buf, disassemble_info * info, const char *txt) +ld_d_r (struct buffer *buf, disassemble_info * info, const char *txt) { char mytxt[TXTSIZ]; signed char c; @@ -596,14 +596,14 @@ ld_d_r(struct buffer *buf, disassemble_info * info, const char *txt) } static int -ld_ii_ii(struct buffer *buf, disassemble_info * info, const char *txt) +ld_ii_ii (struct buffer *buf, disassemble_info * info, const char *txt) { char mytxt[TXTSIZ]; signed char c; int p; static const char *ii[2] = { "ix", "iy" }; - p = (buf->data[buf->n_fetch - 2] == '\xdd') ? 0 : 1; + p = (buf->data[buf->n_fetch - 2] == (char) 0xdd) ? 0 : 1; c = buf->data[buf->n_fetch - 1]; if ((c & 0x07) != 0x07) p = 1 - p; /* 0 -> 1, 1 -> 0 */ @@ -858,7 +858,7 @@ print_insn_z80_buf (struct buffer *buf, disassemble_info *info) if (! fetch_data (buf, info, 1)) return -1; - for (p = opc_main; p->val != (buf->data[0] & p->mask) || !mach_inst(buf, p); ++p) + for (p = opc_main; p->val != (buf->data[0] & p->mask) || !mach_inst (buf, p); ++p) ; p->fp (buf, info, p->text); |