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| author | Simon Cook <simon.cook@embecosm.com> | 2019-05-22 12:59:58 +0100 |
|---|---|---|
| committer | Andrew Burgess <andrew.burgess@embecosm.com> | 2019-05-22 13:02:51 +0100 |
| commit | 0a5954bd5f96dd665cb733b9ab6f2ca67bb4632d (patch) | |
| tree | 33727c7376c4132e4a2623c8fd58f53102d85b96 | |
| parent | 7166f90a7756a3b68cfb93b5ea4a026e9b5f2459 (diff) | |
| download | gdb-0a5954bd5f96dd665cb733b9ab6f2ca67bb4632d.zip gdb-0a5954bd5f96dd665cb733b9ab6f2ca67bb4632d.tar.gz gdb-0a5954bd5f96dd665cb733b9ab6f2ca67bb4632d.tar.bz2 | |
gdb/riscv: Improve flen length determination
This solves an assertion failure when a remote provides a target
description which only refers to floating point registers by their
hardware name (e.g. f0), rather than their ABI name (e.g. ft0). GDB
assumed that should the floating point register feature be presented,
it would contain a register called ft0.
The floating point length is now instead determined by searching for
the same register, but looking for any of its aliases.
gdb/ChangeLog:
* riscv-tdep.c (riscv_gdbarch_init): Support determining flen from
target descriptions using exclusively floating point register name
aliases.
| -rw-r--r-- | gdb/ChangeLog | 6 | ||||
| -rw-r--r-- | gdb/riscv-tdep.c | 16 |
2 files changed, 21 insertions, 1 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index b0b7503..a998c5c 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,9 @@ +2019-05-22 Simon Cook <simon.cook@embecosm.com> + + * riscv-tdep.c (riscv_gdbarch_init): Support determining flen from + target descriptions using exclusively floating point register name + aliases. + 2019-05-21 Andrew Burgess <andrew.burgess@embecosm.com> PR gdb/18644: diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c index 4fe07ef..3fc86ab 100644 --- a/gdb/riscv-tdep.c +++ b/gdb/riscv-tdep.c @@ -3094,7 +3094,21 @@ riscv_gdbarch_init (struct gdbarch_info info, valid_p &= riscv_check_tdesc_feature (tdesc_data, feature_fpu, &riscv_freg_feature); - int bitsize = tdesc_register_bitsize (feature_fpu, "ft0"); + /* Search for the first floating point register (by any alias), to + determine the bitsize. */ + int bitsize = -1; + const auto &fp0 = riscv_freg_feature.registers[0]; + + for (const char *name : fp0.names) + { + if (tdesc_unnumbered_register (feature_fpu, name)) + { + bitsize = tdesc_register_bitsize (feature_fpu, name); + break; + } + } + + gdb_assert (bitsize != -1); features.flen = (bitsize / 8); if (riscv_debug_gdbarch) |