* tc-score.c (do16_rdrs): Handle not! instruction especially.

* score-opc.h (score_opcodes): Delete modifier '0x'.
* gas/score/rD_rA.d: Correct not! and not.c instruction disassembly.
* gas/score/b.d: Correct b! and b instruction disassembly.

7 files changed, 87 insertions, 69 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 1a8148b..9ae2eb2 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2006-11-01  Mei Ligang  <ligang@sunnorth.com.cn>
+
+	* tc-score.c (do16_rdrs): Handle not! instruction especially.
+
 2006-10-31  Paul Brook  <paul@codesourcery.com>
 
 	* config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
diff --git a/gas/config/tc-score.c b/gas/config/tc-score.c
index 66c3031..385e9ce 100644
--- a/gas/config/tc-score.c
+++ b/gas/config/tc-score.c
@@ -1761,6 +1761,11 @@ do16_rdrs (char *str)
           inst.relax_inst |= (((inst.instruction >> 8) & 0xf) << 15)
             | (((inst.instruction >> 4) & 0xf) << 10);
         }
+      else if ((inst.instruction & 0x700f) == 0x2006)   /* not!  */
+	{
+	  inst.relax_inst |= (((inst.instruction >> 8) & 0xf) << 20)
+	    | (((inst.instruction >> 4) & 0xf) << 15);
+	}
       else
         {
           inst.relax_inst |= (((inst.instruction >> 8) & 0xf) << 20)
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 23dc6a9..87cfb1a 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2006-11-01  Mei Ligang  <ligang@sunnorth.com.cn>
+
+	* gas/score/rD_rA.d: Correct not! and not.c instruction disassembly.
+	* gas/score/b.d: Correct b! and b instruction disassembly.
+
 2006-10-29  Randolph Chung  <tausq@debian.org>
 
 	* gas/cfi/cfi.exp [hppa*-linux*]: Run hppa CFI test.
@@ -37,9 +42,9 @@
 
 2006-10-08  Paul Brook  <paul@codesourcery.com>
 
-	* testsuite/gas/arm/neon-cov.s: Test pseudo-instruction forms of
+	* gas/arm/neon-cov.s: Test pseudo-instruction forms of
 	vmov, vmvn and logic immediate instructions.
-	* testsuite/gas/arm/neon-cov.d: ditto.
+	* gas/arm/neon-cov.d: ditto.
 
 2006-09-28  Bridge Wu  <mingqiao.wu@gmail.com>
 
@@ -828,8 +833,8 @@
 
 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 
-	* testsuite/gas/m68k/all.exp: Add arch-cpu-1 test.
-	* testsuite/gas/m68k/arch-cpu-1.[sd]: New.
+	* gas/m68k/all.exp: Add arch-cpu-1 test.
+	* gas/m68k/arch-cpu-1.[sd]: New.
 
 2005-02-02  Paul Brook  <paul@codesourcery.com>
 
@@ -838,8 +843,8 @@
 
 2006-01-31  Paul Brook  <paul@codesourcery.com>
 
-	* gas/testsuite/gas/arm/iwmmxt-bad.s: Add check for bad register name.
-	* gas/testsuite/gas/arm/iwmmxt-bad.l: Ditto.
+	* gas/arm/iwmmxt-bad.s: Add check for bad register name.
+	* gas/arm/iwmmxt-bad.l: Ditto.
 
 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 
diff --git a/gas/testsuite/gas/score/b.d b/gas/testsuite/gas/score/b.d
index ae2b07a..133540e 100644
--- a/gas/testsuite/gas/score/b.d
+++ b/gas/testsuite/gas/score/b.d
@@ -7,12 +7,12 @@
 Disassembly of section \.text:
 
 00000000 <L1>:
-   0:	4f00      	b!		0x0 <L1>
-   2:	4fff      	b!		0x0 <L1>
-   4:	4ffe      	b!		0x0 <L1>
-   6:	4ffd      	b!		0x0 <L1>
-   8:	4ffc      	b!		0x0 <L1>
-   a:	4ffb      	b!		0x0 <L1>
-   c:	93ffbff4 	b		0x0 <L1>
+   0:	4f00      	b!		0 <L1>
+   2:	4fff      	b!		0 <L1>
+   4:	4ffe      	b!		0 <L1>
+   6:	4ffd      	b!		0 <L1>
+   8:	4ffc      	b!		0 <L1>
+   a:	4ffb      	b!		0 <L1>
+   c:	93ffbff4 	b		0 <L1>
   10:	8254e010 	add		r18, r20, r24
 #pass
diff --git a/gas/testsuite/gas/score/rD_rA.d b/gas/testsuite/gas/score/rD_rA.d
index 3a31869..36f29f6 100644
--- a/gas/testsuite/gas/score/rD_rA.d
+++ b/gas/testsuite/gas/score/rD_rA.d
@@ -49,11 +49,11 @@ Disassembly of section \.text:
   58:	807adc19 	cmp.c		r26, r23
   5c:	0000      	nop!
   5e:	0000      	nop!
-  60:	80008825 	not.c		r0, r0
+  60:	80028025 	not.c		r0, r2
   64:	82958025 	not.c		r20, r21
-  68:	81ef9025 	not.c		r15, r15
+  68:	81e48025 	not.c		r15, r4
   6c:	83358025 	not.c		r25, r21
-  70:	81ef8c25 	not.c		r15, r15
+  70:	81e38025 	not.c		r15, r3
   74:	83368025 	not.c		r25, r22
   78:	2836      	not!		r8, r3
   7a:	2836      	not!		r8, r3
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 31b2051..2f7d890 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2006-11-01  Mei Ligang  <ligang@sunnorth.com.cn>
+
+	* score-opc.h (score_opcodes): Delete modifier '0x'.
+
 2006-10-30  Paul Brook  <paul@codesourcery.com>
 
 	* arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
diff --git a/opcodes/score-opc.h b/opcodes/score-opc.h
index e6e672d..20437d7 100644
--- a/opcodes/score-opc.h
+++ b/opcodes/score-opc.h
@@ -53,27 +53,27 @@ static struct score_opcode score_opcodes[] =
   {0x18000000, 0x3e000001, "andri\t\t%20-24r, %15-19r, 0x%1-14x"},
   {0x18000001, 0x3e000001, "andri.c\t\t%20-24r, %15-19r,0x%1-14x"},
   {0x00002004, 0x0000700f, "and!\t\t%8-11r, %4-7r"},
-  {0x08000000, 0x3e007c01, "bcs\t\t0x%b"        		},
-  {0x08000400, 0x3e007c01, "bcc\t\t0x%b"        		},
-  {0x08003800, 0x3e007c01, "bcnz\t\t0x%b"       		},
-  {0x08000001, 0x3e007c01, "bcsl\t\t0x%b"       		},
-  {0x08000401, 0x3e007c01, "bccl\t\t0x%b"       		},
-  {0x08003801, 0x3e007c01, "bcnzl\t\t0x%b"      		},
-  {0x00004000, 0x00007f00, "bcs!\t\t0x%b"       		},
-  {0x00004100, 0x00007f00, "bcc!\t\t0x%b"       		},
-  {0x00004e00, 0x00007f00, "bcnz!\t\t0x%b"      		},
-  {0x08001000, 0x3e007c01, "beq\t\t0x%b"        		},
-  {0x08001001, 0x3e007c01, "beql\t\t0x%b"       		},
-  {0x00004400, 0x00007f00, "beq!\t\t0x%b"       		},
-  {0x08000800, 0x3e007c01, "bgtu\t\t0x%b"       		},
-  {0x08001800, 0x3e007c01, "bgt\t\t0x%b"        		},
-  {0x08002000, 0x3e007c01, "bge\t\t0x%b"        		},
-  {0x08000801, 0x3e007c01, "bgtul\t\t0x%b"      		},
-  {0x08001801, 0x3e007c01, "bgtl\t\t0x%b"       		},
-  {0x08002001, 0x3e007c01, "bgel\t\t0x%b"       		},
-  {0x00004200, 0x00007f00, "bgtu!\t\t0x%b"      		},
-  {0x00004600, 0x00007f00, "bgt!\t\t0x%b"       		},
-  {0x00004800, 0x00007f00, "bge!\t\t0x%b"       		},
+  {0x08000000, 0x3e007c01, "bcs\t\t%b"                 },
+  {0x08000400, 0x3e007c01, "bcc\t\t%b"                 },
+  {0x08003800, 0x3e007c01, "bcnz\t\t%b"                },
+  {0x08000001, 0x3e007c01, "bcsl\t\t%b"                },
+  {0x08000401, 0x3e007c01, "bccl\t\t%b"                },
+  {0x08003801, 0x3e007c01, "bcnzl\t\t%b"               },
+  {0x00004000, 0x00007f00, "bcs!\t\t%b"                },
+  {0x00004100, 0x00007f00, "bcc!\t\t%b"                },
+  {0x00004e00, 0x00007f00, "bcnz!\t\t%b"               },
+  {0x08001000, 0x3e007c01, "beq\t\t%b"                 },
+  {0x08001001, 0x3e007c01, "beql\t\t%b"                },
+  {0x00004400, 0x00007f00, "beq!\t\t%b"                },
+  {0x08000800, 0x3e007c01, "bgtu\t\t%b"                },
+  {0x08001800, 0x3e007c01, "bgt\t\t%b"                 },
+  {0x08002000, 0x3e007c01, "bge\t\t%b"                 },
+  {0x08000801, 0x3e007c01, "bgtul\t\t%b"               },
+  {0x08001801, 0x3e007c01, "bgtl\t\t%b"                },
+  {0x08002001, 0x3e007c01, "bgel\t\t%b"                },
+  {0x00004200, 0x00007f00, "bgtu!\t\t%b"               },
+  {0x00004600, 0x00007f00, "bgt!\t\t%b"                },
+  {0x00004800, 0x00007f00, "bge!\t\t%b"                },
   {0x00000029, 0x3e0003ff, "bitclr.c\t%20-24r, %15-19r, 0x%10-14x"},
   {0x0000002b, 0x3e0003ff, "bitset.c\t%20-24r, %15-19r, 0x%10-14x"},
   {0x0000002d, 0x3e0003ff, "bittst.c\t%15-19r, 0x%10-14x"},
@@ -83,25 +83,25 @@ static struct score_opcode score_opcodes[] =
   {0x00006005, 0x00007007, "bitset!\t\t%8-11r, 0x%3-7x"},
   {0x00006006, 0x00007007, "bittst!\t\t%8-11r, 0x%3-7x"},
   {0x00006007, 0x00007007, "bittgl!\t\t%8-11r, 0x%3-7x"},
-  {0x08000c00, 0x3e007c01, "bleu\t\t0x%b"       		},
-  {0x08001c00, 0x3e007c01, "ble\t\t0x%b"        		},
-  {0x08002400, 0x3e007c01, "blt\t\t0x%b"        		},
-  {0x08000c01, 0x3e007c01, "bleul\t\t0x%b"      		},
-  {0x08001c01, 0x3e007c01, "blel\t\t0x%b"       		},
-  {0x08002401, 0x3e007c01, "bltl\t\t0x%b"       		},
-  {0x08003c01, 0x3e007c01, "bl\t\t0x%b"         		},
-  {0x00004300, 0x00007f00, "bleu!\t\t0x%b"      		},
-  {0x00004700, 0x00007f00, "ble!\t\t0x%b"       		},
-  {0x00004900, 0x00007f00, "blt!\t\t0x%b"       		},
-  {0x08002800, 0x3e007c01, "bmi\t\t0x%b"        		},
-  {0x08002801, 0x3e007c01, "bmil\t\t0x%b"       		},
-  {0x00004a00, 0x00007f00, "bmi!\t\t0x%b"       		},
-  {0x08001400, 0x3e007c01, "bne\t\t0x%b"        		},
-  {0x08001401, 0x3e007c01, "bnel\t\t0x%b"       		},
-  {0x00004500, 0x00007f00, "bne!\t\t0x%b"       		},
-  {0x08002c00, 0x3e007c01, "bpl\t\t0x%b"        		},
-  {0x08002c01, 0x3e007c01, "bpll\t\t0x%b"       		},
-  {0x00004b00, 0x00007f00, "bpl!\t\t0x%b"       		},
+  {0x08000c00, 0x3e007c01, "bleu\t\t%b"                },
+  {0x08001c00, 0x3e007c01, "ble\t\t%b"                 },
+  {0x08002400, 0x3e007c01, "blt\t\t%b"                 },
+  {0x08000c01, 0x3e007c01, "bleul\t\t%b"               },
+  {0x08001c01, 0x3e007c01, "blel\t\t%b"                },
+  {0x08002401, 0x3e007c01, "bltl\t\t%b"                },
+  {0x08003c01, 0x3e007c01, "bl\t\t%b"                  },
+  {0x00004300, 0x00007f00, "bleu!\t\t%b"               },
+  {0x00004700, 0x00007f00, "ble!\t\t%b"                },
+  {0x00004900, 0x00007f00, "blt!\t\t%b"                },
+  {0x08002800, 0x3e007c01, "bmi\t\t%b"                 },
+  {0x08002801, 0x3e007c01, "bmil\t\t%b"                },
+  {0x00004a00, 0x00007f00, "bmi!\t\t%b"                },
+  {0x08001400, 0x3e007c01, "bne\t\t%b"                 },
+  {0x08001401, 0x3e007c01, "bnel\t\t%b"                },
+  {0x00004500, 0x00007f00, "bne!\t\t%b"                },
+  {0x08002c00, 0x3e007c01, "bpl\t\t%b"                 },
+  {0x08002c01, 0x3e007c01, "bpll\t\t%b"                },
+  {0x00004b00, 0x00007f00, "bpl!\t\t%b"                },
   {0x00000008, 0x3e007fff, "brcs\t\t%15-19r"       		},
   {0x00000408, 0x3e007fff, "brcc\t\t%15-19r"       		},
   {0x00000808, 0x3e007fff, "brgtu\t\t%15-19r"      		},
@@ -165,15 +165,15 @@ static struct score_opcode score_opcodes[] =
   {0x00000c0c, 0x00007f0f, "brvsl!\t\t%4-7r"     		},
   {0x00000d0c, 0x00007f0f, "brvcl!\t\t%4-7r"      		},
   {0x00000e0c, 0x00007f0f, "brcnzl!\t\t%4-7r"    		},
-  {0x00000f0c, 0x00007f0f, "brl!\t\t%4-7r"       		},
-  {0x08003000, 0x3e007c01, "bvs\t\t0x%b"        		},
-  {0x08003400, 0x3e007c01, "bvc\t\t0x%b"        		},
-  {0x08003001, 0x3e007c01, "bvsl\t\t0x%b"       		},
-  {0x08003401, 0x3e007c01, "bvcl\t\t0x%b"       		},
-  {0x00004c00, 0x00007f00, "bvs!\t\t0x%b"       		},
-  {0x00004d00, 0x00007f00, "bvc!\t\t0x%b"       		},
-  {0x00004f00, 0x00007f00, "b!\t\t0x%b"         		},
-  {0x08003c00, 0x3e007c01, "b\t\t0x%b"          		},
+  {0x00000f0c, 0x00007f0f, "brl!\t\t%4-7r"                      },
+  {0x08003000, 0x3e007c01, "bvs\t\t%b"                 },
+  {0x08003400, 0x3e007c01, "bvc\t\t%b"                 },
+  {0x08003001, 0x3e007c01, "bvsl\t\t%b"                },
+  {0x08003401, 0x3e007c01, "bvcl\t\t%b"                },
+  {0x00004c00, 0x00007f00, "bvs!\t\t%b"                },
+  {0x00004d00, 0x00007f00, "bvc!\t\t%b"                },
+  {0x00004f00, 0x00007f00, "b!\t\t%b"                  },
+  {0x08003c00, 0x3e007c01, "b\t\t%b"                   },
   {0x30000000, 0x3ff00000, "cache\t\t%20-24d, [%15-19r, %0-14i]"},
   {0x30100000, 0x3ff00000, "cache\t\t%20-24d, [%15-19r, %0-14i]"},
   {0x30200000, 0x3ff00000, "cache\t\t%20-24d, [%15-19r, %0-14i]"},
@@ -245,10 +245,10 @@ static struct score_opcode score_opcodes[] =
   {0x0000005d, 0x3e0003ff, "extzb.c\t\t%20-24r, %15-19r"},
   {0x0000005e, 0x3e0003ff, "extzh\t\t%20-24r, %15-19r"},
   {0x0000005f, 0x3e0003ff, "extzh.c\t\t%20-24r, %15-19r"},
-  {0x04000001, 0x3e000001, "jl\t\t0x%j"},
-  {0x00003001, 0x00007001, "jl!\t\t0x%j"        		},
-  {0x00003000, 0x00007001, "j!\t\t0x%j"         		},
-  {0x04000000, 0x3e000001, "j\t\t0x%j"},
+  {0x04000001, 0x3e000001, "jl\t\t%j"},
+  {0x00003001, 0x00007001, "jl!\t\t%j"                 },
+  {0x00003000, 0x00007001, "j!\t\t%j"                  },
+  {0x04000000, 0x3e000001, "j\t\t%j"},
   {0x26000000, 0x3e000000, "lb\t\t%20-24r, [%15-19r, %0-14i]"},
   {0x2c000000, 0x3e000000, "lbu\t\t%20-24r, [%15-19r, %0-14i]"},
   {0x06000003, 0x3e000007, "lb\t\t%20-24r, [%15-19r, %3-14i]+"},