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authorMatthew Fortune <matthew.fortune@imgtec.com>2019-04-17 04:07:19 +0000
committerFaraz Shahbazker <fshahbazker@wavecomp.com>2019-04-18 09:30:51 -0700
commit85bec12d61ca50669cac5975c88d3a1e377375f9 (patch)
tree6a002b166dd85e85acf9fd0c2b35eacefb3cd998
parentb73715df01e6e9b3de5a49cd7bf4170deef48461 (diff)
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Improve warning message for $0 constraint on MIPSR6 branches
gas/ * config/tc-mips.c (match_non_zero_reg_operand): Update warning message. * testsuite/gas/mips/r6-branch-constraints.l: Likewise.
-rw-r--r--gas/ChangeLog6
-rw-r--r--gas/config/tc-mips.c5
-rw-r--r--gas/testsuite/gas/mips/r6-branch-constraints.l20
3 files changed, 20 insertions, 11 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 922ffeb..5488ef2 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2019-04-18 Matthew Fortune <matthew.fortune@mips.com>
+
+ * config/tc-mips.c (match_non_zero_reg_operand): Update
+ warning message.
+ * testsuite/gas/mips/r6-branch-constraints.l: Likewise.
+
2019-04-18 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* config/tc-msp430.c (msp430_make_init_symbols): Define
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 94141e9..f3e3341 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -6014,7 +6014,10 @@ match_non_zero_reg_operand (struct mips_arg_info *arg,
return FALSE;
if (regno == 0)
- return FALSE;
+ {
+ set_insn_error (arg->argnum, _("the source register must not be $0"));
+ return FALSE;
+ }
arg->last_regno = regno;
insn_insert_operand (arg->insn, operand, regno);
diff --git a/gas/testsuite/gas/mips/r6-branch-constraints.l b/gas/testsuite/gas/mips/r6-branch-constraints.l
index 819a09a..bdeea9f 100644
--- a/gas/testsuite/gas/mips/r6-branch-constraints.l
+++ b/gas/testsuite/gas/mips/r6-branch-constraints.l
@@ -1,25 +1,25 @@
.*: Assembler messages:
-.*:2: Error: invalid operands `blezc \$0,.'
+.*:2: Error: the source register must not be \$0 `blezc \$0,.'
.*:3: Error: the source register must not be \$0 `bgezc \$0,.'
-.*:4: Error: invalid operands `bgtzc \$0,.'
+.*:4: Error: the source register must not be \$0 `bgtzc \$0,.'
.*:5: Error: the source register must not be \$0 `bltzc \$0,.'
-.*:6: Error: invalid operands `beqzc \$0,.'
-.*:7: Error: invalid operands `bnezc \$0,.'
-.*:8: Error: invalid operands `bgec \$0,\$2,.'
+.*:6: Error: the source register must not be \$0 `beqzc \$0,.'
+.*:7: Error: the source register must not be \$0 `bnezc \$0,.'
+.*:8: Error: the source register must not be \$0 `bgec \$0,\$2,.'
.*:9: Error: invalid operands `bgec \$2,\$0,.'
.*:10: Error: invalid operands `bgec \$2,\$2,.'
-.*:11: Error: invalid operands `bgeuc \$0,\$2,.'
+.*:11: Error: the source register must not be \$0 `bgeuc \$0,\$2,.'
.*:12: Error: invalid operands `bgeuc \$2,\$0,.'
.*:13: Error: invalid operands `bgeuc \$2,\$2,.'
-.*:14: Error: invalid operands `bltc \$0,\$2,.'
+.*:14: Error: the source register must not be \$0 `bltc \$0,\$2,.'
.*:15: Error: invalid operands `bltc \$2,\$0,.'
.*:16: Error: invalid operands `bltc \$2,\$2,.'
-.*:17: Error: invalid operands `bltuc \$0,\$2,.'
+.*:17: Error: the source register must not be \$0 `bltuc \$0,\$2,.'
.*:18: Error: invalid operands `bltuc \$2,\$0,.'
.*:19: Error: invalid operands `bltuc \$2,\$2,.'
-.*:20: Error: invalid operands `beqc \$0,\$2,.'
+.*:20: Error: the source register must not be \$0 `beqc \$0,\$2,.'
.*:21: Error: invalid operands `beqc \$2,\$0,.'
.*:22: Error: invalid operands `beqc \$2,\$2,.'
-.*:23: Error: invalid operands `bnec \$0,\$2,.'
+.*:23: Error: the source register must not be \$0 `bnec \$0,\$2,.'
.*:24: Error: invalid operands `bnec \$2,\$0,.'
.*:25: Error: invalid operands `bnec \$2,\$2,.'