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authorAnthony Green <green@moxielogic.com>2014-12-24 08:34:23 -0500
committerAnthony Green <green@moxielogic.com>2014-12-24 08:38:09 -0500
commit0be40ae409724495a434de404bda39c53bb167a0 (patch)
tree729a4e907cae35afa38c9102e4708c3ff4094426
parentca0694adf6d128c2feba16f6374954c191fb5edb (diff)
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Add mul.x and umul.x instructions to moxie port
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/moxie-opc.c18
2 files changed, 14 insertions, 9 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 9fc98c6..8de16f6 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2014-12-24 Anthony Green <green@moxielogic.com>
+
+ * moxie-opc: Define mul.x and umul.x instructions. Remove
+ trailing .l from add, sub, mul, div and udiv instructions.
+
2014-12-16 Matthew Fortune <matthew.fortune@imgtec.com>
* mips-opc.c (mips_builtin_opcodes): Add JALRC alias for
diff --git a/opcodes/moxie-opc.c b/opcodes/moxie-opc.c
index ea3be80..a858088 100644
--- a/opcodes/moxie-opc.c
+++ b/opcodes/moxie-opc.c
@@ -57,7 +57,7 @@ const moxie_opc_info_t moxie_form1_opc_info[128] =
{ 0x02, MOXIE_F1_AB, "mov" },
{ 0x03, MOXIE_F1_M, "jsra" },
{ 0x04, MOXIE_F1_NARG, "ret" },
- { 0x05, MOXIE_F1_AB, "add.l" },
+ { 0x05, MOXIE_F1_AB, "add" },
{ 0x06, MOXIE_F1_AB, "push" },
{ 0x07, MOXIE_F1_AB, "pop" },
{ 0x08, MOXIE_F1_A4, "lda.l" },
@@ -72,8 +72,8 @@ const moxie_opc_info_t moxie_form1_opc_info[128] =
{ 0x11, MOXIE_F1_AB, "sex.s" },
{ 0x12, MOXIE_F1_AB, "zex.b" },
{ 0x13, MOXIE_F1_AB, "zex.s" },
- { 0x14, MOXIE_BAD, "bad" },
- { 0x15, MOXIE_BAD, "bad" },
+ { 0x14, MOXIE_F1_AB, "umul.x" },
+ { 0x15, MOXIE_F1_AB, "mul.x" },
{ 0x16, MOXIE_BAD, "bad" },
{ 0x17, MOXIE_BAD, "bad" },
{ 0x18, MOXIE_BAD, "bad" },
@@ -93,18 +93,18 @@ const moxie_opc_info_t moxie_form1_opc_info[128] =
{ 0x26, MOXIE_F1_AB, "and" },
{ 0x27, MOXIE_F1_AB, "lshr" },
{ 0x28, MOXIE_F1_AB, "ashl" },
- { 0x29, MOXIE_F1_AB, "sub.l" },
+ { 0x29, MOXIE_F1_AB, "sub" },
{ 0x2a, MOXIE_F1_AB, "neg" },
{ 0x2b, MOXIE_F1_AB, "or" },
{ 0x2c, MOXIE_F1_AB, "not" },
{ 0x2d, MOXIE_F1_AB, "ashr" },
{ 0x2e, MOXIE_F1_AB, "xor" },
- { 0x2f, MOXIE_F1_AB, "mul.l" },
+ { 0x2f, MOXIE_F1_AB, "mul" },
{ 0x30, MOXIE_F1_4, "swi" },
- { 0x31, MOXIE_F1_AB, "div.l" },
- { 0x32, MOXIE_F1_AB, "udiv.l" },
- { 0x33, MOXIE_F1_AB, "mod.l" },
- { 0x34, MOXIE_F1_AB, "umod.l" },
+ { 0x31, MOXIE_F1_AB, "div" },
+ { 0x32, MOXIE_F1_AB, "udiv" },
+ { 0x33, MOXIE_F1_AB, "mod" },
+ { 0x34, MOXIE_F1_AB, "umod" },
{ 0x35, MOXIE_F1_NARG, "brk" },
{ 0x36, MOXIE_F1_ABi4, "ldo.b" },
{ 0x37, MOXIE_F1_AiB4, "sto.b" },