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authorDavid Daney <ddaney@avtrex.com>2007-01-03 18:12:52 +0000
committerDavid Daney <ddaney@avtrex.com>2007-01-03 18:12:52 +0000
commitd821e36b0b53e3ce0d3f485aad6f2663b7433406 (patch)
treea90da0eda34fb6c9a348820ce6093e05ec226e1b
parent0d5de0100fd9c669790851af4f9f50704a24b453 (diff)
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* config/tc-mips.c (md_show_usage): Clean up -mno-shared
documentation.
-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-mips.c3
2 files changed, 6 insertions, 2 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index dc933e5..9a64d01 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2007-01-03 David Daney <ddaney@avtrex.com>
+
+ * config/tc-mips.c (md_show_usage): Clean up -mno-shared
+ documentation.
+
2006-12-30 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.h (ShiftCount): Fix a comment typo.
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index d77d6ec..12fe476 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -14832,7 +14832,6 @@ MIPS options:\n\
-mfix-vr4130 work around VR4130 mflo/mfhi errata\n\
-mgp32 use 32-bit GPRs, regardless of the chosen ISA\n\
-mfp32 use 32-bit FPRs, regardless of the chosen ISA\n\
--mno-shared optimize output for executables\n\
-msym32 assume all symbols have 32-bit values\n\
-O0 remove unneeded NOPs, do not swap branches\n\
-O remove unneeded NOPs and swap branches\n\
@@ -14846,7 +14845,7 @@ MIPS options:\n\
-xgot assume a 32 bit GOT\n\
-mpdr, -mno-pdr enable/disable creation of .pdr sections\n\
-mshared, -mno-shared disable/enable .cpload optimization for\n\
- non-shared code\n\
+ position dependent (non shared) code\n\
-mabi=ABI create ABI conformant object file for:\n"));
first = 1;