gas/

2009-10-29  Sebastian Pop  <sebastian.pop@amd.com>

	* config/tc-i386.c (build_modrm_byte): Do not swap REG and
	NDS operands for FMA4.

gas/testsuite/

2009-10-29  Sebastian Pop  <sebastian.pop@amd.com>

	* gas/i386/fma4.d: Updated patterns.
	* gas/i386/x86-64-fma4.d: Same.

opcodes/

2009-10-29  Sebastian Pop  <sebastian.pop@amd.com>

	* i386-dis.c (OP_VEX_FMA): Removed.
	(VexFMA): Removed.
	(Vex128FMA): Removed.
	(prefix_table): First source operand of FMA4 insns is decoded
	with Vex not with VexFMA.
	(OP_EX_VexW): Second source operand is decoded with get_vex_imm8
	when vex.w is set.  Third source operand is decoded with
	get_vex_imm8 when vex.w is cleared.
	(OP_VEX_FMA): Removed.

7 files changed, 183 insertions, 216 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 8c28273..b9269cf 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2009-10-29  Sebastian Pop  <sebastian.pop@amd.com>
+
+	* config/tc-i386.c (build_modrm_byte): Do not swap REG and
+	NDS operands for FMA4.
+
 2009-10-29  Paul Brook  <paul@codesourcery.com>
 
 	* config/tc-arm.c (neon_tab_entry): Fix VNMLA/VNMLS opcodes.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index c01175f..ff6129c 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -4913,14 +4913,6 @@ build_modrm_byte (void)
 	  source = 1;
 	  reg = 0;
 	}
-      /* FMA4 swaps REG and NDS.  */
-      if (i.tm.cpu_flags.bitfield.cpufma4)
-	{
-	  unsigned int tmp;
-	  tmp = reg;
-	  reg = nds;
-	  nds = tmp;
-	}
       gas_assert ((operand_type_equal (&i.tm.operand_types[reg], &regxmm)
 		   || operand_type_equal (&i.tm.operand_types[reg],
 					  &regymm))
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 7c63668..370438f 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2009-10-29  Sebastian Pop  <sebastian.pop@amd.com>
+
+	* gas/i386/fma4.d: Updated patterns.
+	* gas/i386/x86-64-fma4.d: Same.
+
 2009-10-29  Paul Brook  <paul@codesourcery.com>
 
 	* gas/arm/vfp-neon-syntax.d: Update expected results.
diff --git a/gas/testsuite/gas/i386/fma4.d b/gas/testsuite/gas/i386/fma4.d
index 94538e4..8479cf7 100644
--- a/gas/testsuite/gas/i386/fma4.d
+++ b/gas/testsuite/gas/i386/fma4.d
@@ -6,88 +6,88 @@
 Disassembly of section .text:
 
 0+ <_start>:
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 fc 20    	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 39 20    	vfmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 fc 20    	vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 39 20    	vfmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d fc 20    	vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d 39 20    	vfmaddsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c fc 20    	vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c 39 20    	vfmaddsubps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f fc 20    	vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5f 39 20    	vfmsubaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e fc 20    	vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5e 39 20    	vfmsubaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d fc 20    	vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6d 39 20    	vfmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c fc 20    	vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 6c 39 20    	vfmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 fc 20    	vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 39 20    	vfmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 69 39 20    	vfmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 fc 20    	vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 39 20    	vfmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 68 39 20    	vfmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d fc 20    	vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d 39 20    	vfmaddsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5d 39 20    	vfmaddsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c fc 20    	vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c 39 20    	vfmaddsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5c 39 20    	vfmaddsubps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f fc 20    	vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5f 39 20    	vfmsubaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5f 39 20    	vfmsubaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e fc 20    	vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5e 39 20    	vfmsubaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5e 39 20    	vfmsubaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d fc 20    	vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6d 39 20    	vfmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6d 39 20    	vfmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c fc 20    	vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6c 39 20    	vfmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6c 39 20    	vfmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b fc 20    	vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b 39 20    	vfmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6b 39 20    	vfmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f fc 20    	vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6f 39 20    	vfmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6f 39 20    	vfmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a fc 20    	vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a 39 20    	vfmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6a 39 20    	vfmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e fc 20    	vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6e 39 20    	vfmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6e 39 20    	vfmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 fc 20    	vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 39 20    	vfnmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 fc 20    	vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 39 20    	vfnmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d fc 20    	vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d 39 20    	vfnmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c fc 20    	vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c 39 20    	vfnmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 fc 20    	vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 39 20    	vfnmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 79 39 20    	vfnmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 fc 20    	vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 39 20    	vfnmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 78 39 20    	vfnmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d fc 20    	vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d 39 20    	vfnmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7d 39 20    	vfnmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c fc 20    	vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c 39 20    	vfnmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7c 39 20    	vfnmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b fc 20    	vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b 39 20    	vfnmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7b 39 20    	vfnmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f fc 20    	vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f 39 20    	vfnmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7f 39 20    	vfnmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a fc 20    	vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a 39 20    	vfnmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7a 39 20    	vfnmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e fc 20    	vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e 39 20    	vfnmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7e 39 20    	vfnmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 69 fc 60    	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 69 39 60    	vfmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 68 fc 60    	vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 68 39 60    	vfmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 5d fc 60    	vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 5d 39 60    	vfmaddsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 5c fc 60    	vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 5c 39 60    	vfmaddsubps \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 5f fc 60    	vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 5f 39 60    	vfmsubaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 5e fc 60    	vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 5e 39 60    	vfmsubaddps \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 6d fc 60    	vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 6d 39 60    	vfmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 6c fc 60    	vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 6c 39 60    	vfmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 69 fc 60    	vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 69 39 60    	vfmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 69 39 40    	vfmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 68 fc 60    	vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 68 39 60    	vfmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 68 39 40    	vfmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 5d fc 60    	vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 5d 39 60    	vfmaddsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 5d 39 40    	vfmaddsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 5c fc 60    	vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 5c 39 60    	vfmaddsubps \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 5c 39 40    	vfmaddsubps %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 5f fc 60    	vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 5f 39 60    	vfmsubaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 5f 39 40    	vfmsubaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 5e fc 60    	vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 5e 39 60    	vfmsubaddps \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 5e 39 40    	vfmsubaddps %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6d fc 60    	vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6d 39 60    	vfmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 6d 39 40    	vfmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6c fc 60    	vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6c 39 60    	vfmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 6c 39 40    	vfmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6b fc 60    	vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6b 39 60    	vfmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 6b 39 40    	vfmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6f fc 60    	vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6f 39 60    	vfmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 6f 39 40    	vfmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6a fc 60    	vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6a 39 60    	vfmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 6a 39 40    	vfmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6e fc 60    	vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6e 39 60    	vfmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 6e 39 40    	vfmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 79 fc 60    	vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 79 39 60    	vfnmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 78 fc 60    	vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 78 39 60    	vfnmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 7d fc 60    	vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 7d 39 60    	vfnmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 7c fc 60    	vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 7c 39 60    	vfnmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 79 fc 60    	vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 79 39 60    	vfnmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 79 39 40    	vfnmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 78 fc 60    	vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 78 39 60    	vfnmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 78 39 40    	vfnmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7d fc 60    	vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7d 39 60    	vfnmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 7d 39 40    	vfnmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7c fc 60    	vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7c 39 60    	vfnmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 7c 39 40    	vfnmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7b fc 60    	vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7b 39 60    	vfnmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 7b 39 40    	vfnmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7f fc 60    	vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7f 39 60    	vfnmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 7f 39 40    	vfnmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7a fc 60    	vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7a 39 60    	vfnmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 7a 39 40    	vfnmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7e fc 60    	vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7e 39 60    	vfnmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 7e 39 40    	vfnmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-fma4.d b/gas/testsuite/gas/i386/x86-64-fma4.d
index a0942c1..15ff1da 100644
--- a/gas/testsuite/gas/i386/x86-64-fma4.d
+++ b/gas/testsuite/gas/i386/x86-64-fma4.d
@@ -6,62 +6,61 @@
 Disassembly of section .text:
 
 0+ <_start>:
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 fc 20    	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 69 39 20    	vfmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 fc 20    	vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 68 39 20    	vfmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d fc 20    	vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5d 39 20    	vfmaddsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c fc 20    	vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 5c 39 20    	vfmaddsubps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 fc 20    	vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 69 39 20    	vfmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 69 39 20    	vfmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 fc 20    	vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 68 39 20    	vfmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 68 39 20    	vfmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d fc 20    	vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5d 39 20    	vfmaddsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5d 39 20    	vfmaddsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c fc 20    	vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 5c 39 20    	vfmaddsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 5c 39 20    	vfmaddsubps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b fc 20    	vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6b 39 20    	vfmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6b 39 20    	vfmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a fc 20    	vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 6a 39 20    	vfmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 6a 39 20    	vfmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 fc 20    	vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 79 39 20    	vfnmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 fc 20    	vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 78 39 20    	vfnmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d fc 20    	vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7d 39 20    	vfnmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c fc 20    	vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 cd 7c 39 20    	vfnmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 fc 20    	vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 79 39 20    	vfnmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 79 39 20    	vfnmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 fc 20    	vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 78 39 20    	vfnmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 78 39 20    	vfnmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d fc 20    	vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7d 39 20    	vfnmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7d 39 20    	vfnmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c fc 20    	vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7c 39 20    	vfnmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7c 39 20    	vfnmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b fc 20    	vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7b 39 20    	vfnmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7b 39 20    	vfnmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f fc 20    	vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7f 39 20    	vfnmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7f 39 20    	vfnmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a fc 20    	vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7a 39 20    	vfnmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 59 7a 39 20    	vfnmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e fc 20    	vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[ 	]*[a-f0-9]+:	c4 e3 c9 7e 39 20    	vfnmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
-
+[ 	]*[a-f0-9]+:	c4 e3 ed 69 fc 60    	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 69 39 60    	vfmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 68 fc 60    	vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 68 39 60    	vfmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 5d fc 60    	vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 5d 39 60    	vfmaddsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 5c fc 60    	vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 5c 39 60    	vfmaddsubps \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 69 fc 60    	vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 69 39 60    	vfmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 69 39 40    	vfmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 68 fc 60    	vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 68 39 60    	vfmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 68 39 40    	vfmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 5d fc 60    	vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 5d 39 60    	vfmaddsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 5d 39 40    	vfmaddsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 5c fc 60    	vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 5c 39 60    	vfmaddsubps \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 5c 39 40    	vfmaddsubps %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6b fc 60    	vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6b 39 60    	vfmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 6b 39 40    	vfmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6a fc 60    	vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 6a 39 60    	vfmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 6a 39 40    	vfmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 79 fc 60    	vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 79 39 60    	vfnmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 78 fc 60    	vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 78 39 60    	vfnmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 7d fc 60    	vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 7d 39 60    	vfnmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 7c fc 60    	vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 ed 7c 39 60    	vfnmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 79 fc 60    	vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 79 39 60    	vfnmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 79 39 40    	vfnmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 78 fc 60    	vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 78 39 60    	vfnmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 78 39 40    	vfnmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7d fc 60    	vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7d 39 60    	vfnmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 7d 39 40    	vfnmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7c fc 60    	vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7c 39 60    	vfnmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 7c 39 40    	vfnmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7b fc 60    	vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7b 39 60    	vfnmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 7b 39 40    	vfnmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7f fc 60    	vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7f 39 60    	vfnmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 7f 39 40    	vfnmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7a fc 60    	vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7a 39 60    	vfnmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 69 7a 39 40    	vfnmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7e fc 60    	vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 e9 7e 39 60    	vfnmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
 #pass
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 9602b1e..4814ba3 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,13 @@
+2009-10-29  Sebastian Pop  <sebastian.pop@amd.com>
+
+	* i386-dis.c (OP_VEX_FMA): Removed.
+	(VexFMA): Removed.
+	(Vex128FMA): Removed.
+	(prefix_table): First source operand of FMA4 insns is decoded
+	with Vex not with VexFMA.
+	(OP_EX_VexW): Second source operand is decoded with get_vex_imm8
+	when vex.w is set.  Third source operand is decoded with
+
 2009-10-27  Alan Modra  <amodra@bigpond.net.au>
 
 	* Makefile.am (HFILES): Remove cgen-ops.h and cgen-types.h.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 8a74863..221584b 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -93,7 +93,6 @@ static void OP_MS (int, int);
 static void OP_XS (int, int);
 static void OP_M (int, int);
 static void OP_VEX (int, int);
-static void OP_VEX_FMA (int, int);
 static void OP_EX_Vex (int, int);
 static void OP_EX_VexW (int, int);
 static void OP_XMM_Vex (int, int);
@@ -363,8 +362,6 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
 #define Vex128 { OP_VEX, vex128_mode }
 #define Vex256 { OP_VEX, vex256_mode }
 #define VexI4 { VEXI4_Fixup, 0}
-#define VexFMA { OP_VEX_FMA, vex_mode }
-#define Vex128FMA { OP_VEX_FMA, vex128_mode }
 #define EXdVex { OP_EX_Vex, d_mode }
 #define EXdVexS { OP_EX_Vex, d_swap_mode }
 #define EXqVex { OP_EX_Vex, q_mode }
@@ -5101,7 +5098,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)",	{ XX } },
     { "(bad)",	{ XX } },
-    { "vfmaddsubps", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
+    { "vfmaddsubps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
     { "(bad)",	{ XX } },
   },
 
@@ -5109,7 +5106,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)",	{ XX } },
     { "(bad)",	{ XX } },
-    { "vfmaddsubpd", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
+    { "vfmaddsubpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
     { "(bad)",	{ XX } },
   },
 
@@ -5117,7 +5114,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)",	{ XX } },
     { "(bad)",	{ XX } },
-    { "vfmsubaddps", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
+    { "vfmsubaddps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
     { "(bad)",	{ XX } },
   },
 
@@ -5125,7 +5122,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)",	{ XX } },
     { "(bad)",	{ XX } },
-    { "vfmsubaddpd", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
+    { "vfmsubaddpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
     { "(bad)",	{ XX } },
   },
 
@@ -5165,7 +5162,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)",	{ XX } },
     { "(bad)",	{ XX } },
-    { "vfmaddps", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
+    { "vfmaddps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
     { "(bad)",	{ XX } },
   },
 
@@ -5173,7 +5170,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)",	{ XX } },
     { "(bad)",	{ XX } },
-    { "vfmaddpd", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
+    { "vfmaddpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
     { "(bad)",	{ XX } },
   },
 
@@ -5197,7 +5194,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)",	{ XX } },
     { "(bad)",	{ XX } },
-    { "vfmsubps", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
+    { "vfmsubps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
     { "(bad)",	{ XX } },
   },
 
@@ -5205,7 +5202,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)",	{ XX } },
     { "(bad)",	{ XX } },
-    { "vfmsubpd", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
+    { "vfmsubpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
     { "(bad)",	{ XX } },
   },
 
@@ -5229,7 +5226,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)",	{ XX } },
     { "(bad)",	{ XX } },
-    { "vfnmaddps", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
+    { "vfnmaddps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
     { "(bad)",	{ XX } },
   },
 
@@ -5237,7 +5234,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)",	{ XX } },
     { "(bad)",	{ XX } },
-    { "vfnmaddpd", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
+    { "vfnmaddpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
     { "(bad)",	{ XX } },
   },
 
@@ -5261,7 +5258,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)",	{ XX } },
     { "(bad)",	{ XX } },
-    { "vfnmsubps", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
+    { "vfnmsubps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
     { "(bad)",	{ XX } },
   },
 
@@ -5269,7 +5266,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)",	{ XX } },
     { "(bad)",	{ XX } },
-    { "vfnmsubpd", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
+    { "vfnmsubpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
     { "(bad)",	{ XX } },
   },
 
@@ -8384,49 +8381,49 @@ static const struct dis386 vex_len_table[][2] = {
 
   /* VEX_LEN_3A6A_P_2 */
   {
-    { "vfmaddss",	{ XMVexW, Vex128FMA, EXdVexW, EXdVexW, VexI4 } },
+    { "vfmaddss",	{ XMVexW, Vex128, EXdVexW, EXdVexW, VexI4 } },
     { "(bad)",		{ XX } },
   },
 
   /* VEX_LEN_3A6B_P_2 */
   {
-    { "vfmaddsd",	{ XMVexW, Vex128FMA, EXqVexW, EXqVexW, VexI4 } },
+    { "vfmaddsd",	{ XMVexW, Vex128, EXqVexW, EXqVexW, VexI4 } },
     { "(bad)",		{ XX } },
   },
 
   /* VEX_LEN_3A6E_P_2 */
   {
-    { "vfmsubss",	{ XMVexW, Vex128FMA, EXdVexW, EXdVexW, VexI4 } },
+    { "vfmsubss",	{ XMVexW, Vex128, EXdVexW, EXdVexW, VexI4 } },
     { "(bad)",		{ XX } },
   },
 
   /* VEX_LEN_3A6F_P_2 */
   {
-    { "vfmsubsd",	{ XMVexW, Vex128FMA, EXqVexW, EXqVexW, VexI4 } },
+    { "vfmsubsd",	{ XMVexW, Vex128, EXqVexW, EXqVexW, VexI4 } },
     { "(bad)",		{ XX } },
   },
 
   /* VEX_LEN_3A7A_P_2 */
   {
-    { "vfnmaddss",	{ XMVexW, Vex128FMA, EXdVexW, EXdVexW, VexI4 } },
+    { "vfnmaddss",	{ XMVexW, Vex128, EXdVexW, EXdVexW, VexI4 } },
     { "(bad)",		{ XX } },
   },
 
   /* VEX_LEN_3A7B_P_2 */
   {
-    { "vfnmaddsd",	{ XMVexW, Vex128FMA, EXqVexW, EXqVexW, VexI4 } },
+    { "vfnmaddsd",	{ XMVexW, Vex128, EXqVexW, EXqVexW, VexI4 } },
     { "(bad)",		{ XX } },
   },
 
   /* VEX_LEN_3A7E_P_2 */
   {
-    { "vfnmsubss",	{ XMVexW, Vex128FMA, EXdVexW, EXdVexW, VexI4 } },
+    { "vfnmsubss",	{ XMVexW, Vex128, EXdVexW, EXdVexW, VexI4 } },
     { "(bad)",		{ XX } },
   },
 
   /* VEX_LEN_3A7F_P_2 */
   {
-    { "vfnmsubsd",	{ XMVexW, Vex128FMA, EXqVexW, EXqVexW, VexI4 } },
+    { "vfnmsubsd",	{ XMVexW, Vex128, EXqVexW, EXqVexW, VexI4 } },
     { "(bad)",		{ XX } },
   },
 
@@ -12713,59 +12710,18 @@ OP_EX_VexW (int bytemode, int sizeflag)
     {
       vex_w_done = 1;
       if (vex.w)
-	reg = vex.register_specifier;
+	reg = get_vex_imm8 (sizeflag) >> 4;
     }
   else
     {
       if (!vex.w)
-	reg = vex.register_specifier;
+	reg = get_vex_imm8 (sizeflag) >> 4;
     }
 
   OP_EX_VexReg (bytemode, sizeflag, reg);
 }
 
 static void
-OP_VEX_FMA (int bytemode, int sizeflag)
-{
-  int reg = get_vex_imm8 (sizeflag) >> 4;
-
-  if (reg > 7 && address_mode != mode_64bit)
-    BadOp ();
-
-  switch (vex.length)
-    {
-    case 128:
-      switch (bytemode)
-	{
-	case vex_mode:
-	case vex128_mode:
-	  break;
-	default:
-	  abort ();
-	  return;
-	}
-
-      sprintf (scratchbuf, "%%xmm%d", reg);
-      break;
-    case 256:
-      switch (bytemode)
-	{
-	case vex_mode:
-	  break;
-	default:
-	  abort ();
-	  return;
-	}
-
-      sprintf (scratchbuf, "%%ymm%d", reg);
-      break;
-    default:
-      abort ();
-    }
-  oappend (scratchbuf + intel_syntax);
-}
-
-static void
 VEXI4_Fixup (int bytemode ATTRIBUTE_UNUSED,
 	     int sizeflag ATTRIBUTE_UNUSED)
 {