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authorYufeng Zhang <yufeng.zhang@arm.com>2013-01-17 16:09:44 +0000
committerYufeng Zhang <yufeng.zhang@arm.com>2013-01-17 16:09:44 +0000
commitf5555712ba2c20a6fd30b789e497009646a4638d (patch)
tree691b33edb086a7d1ae961993dff54b312aad5906
parentbe7d37a2c35f12d7fdcc9ad65333c0a81460cd89 (diff)
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include/opcode/
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com> * aarch64.h (aarch64_op): Remove OP_V_MOVI_B. opcodes/ 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com> * aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Handle 8-bit MOVI. * aarch64-dis.c (aarch64_ext_advsimd_imm_modified): Likewise. * aarch64-opc.c (operand_general_constraint_met_p): For AARCH64_MOD_LSL, move the range check on the shift amount before the alignment check; change to call set_sft_amount_out_of_range_error instead of set_imm_out_of_range_error. * aarch64-tbl.h (QL_SIMD_IMM_B): Replace NIL with LSL. (aarch64_opcode_table): Remove the OP enumerator from the asimdimm 8-bit MOVI entry; change the 2nd operand from SIMD_IMM to SIMD_IMM_SFT. gas/ 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com> * config/tc-aarch64.c (output_operand_error_record): Change to output the out-of-range error message as value-expected message if there is only one single value in the expected range. (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with LSL #0 as a programmer-friendly feature. gas/testsuite/ 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com> * gas/aarch64/diagnostic.l: Update. * gas/aarch64/movi.s: Add tests. * gas/aarch64/movi.d: Update. * gas/aarch64/programmer-friendly.s: Add comment.
-rw-r--r--gas/ChangeLog8
-rw-r--r--gas/config/tc-aarch64.c30
-rw-r--r--gas/testsuite/ChangeLog7
-rw-r--r--gas/testsuite/gas/aarch64/diagnostic.l4
-rw-r--r--gas/testsuite/gas/aarch64/movi.d520
-rw-r--r--gas/testsuite/gas/aarch64/movi.s11
-rw-r--r--gas/testsuite/gas/aarch64/programmer-friendly.s2
-rw-r--r--include/opcode/ChangeLog4
-rw-r--r--include/opcode/aarch64.h2
-rw-r--r--opcodes/ChangeLog13
-rw-r--r--opcodes/aarch64-asm.c6
-rw-r--r--opcodes/aarch64-dis.c1
-rw-r--r--opcodes/aarch64-opc.c10
-rw-r--r--opcodes/aarch64-tbl.h8
14 files changed, 585 insertions, 41 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index a011624..31653de 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,11 @@
+2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * config/tc-aarch64.c (output_operand_error_record): Change to output
+ the out-of-range error message as value-expected message if there is
+ only one single value in the expected range.
+ (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
+ LSL #0 as a programmer-friendly feature.
+
2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 3220d2b..f9b4cd0 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -3926,9 +3926,14 @@ output_operand_error_record (const operand_error_record *record, char *str)
break;
case AARCH64_OPDE_OUT_OF_RANGE:
- as_bad (_("%s out of range %d to %d at operand %d -- `%s'"),
- detail->error ? detail->error : _("immediate value"),
- detail->data[0], detail->data[1], detail->index + 1, str);
+ if (detail->data[0] != detail->data[1])
+ as_bad (_("%s out of range %d to %d at operand %d -- `%s'"),
+ detail->error ? detail->error : _("immediate value"),
+ detail->data[0], detail->data[1], detail->index + 1, str);
+ else
+ as_bad (_("%s expected to be %d at operand %d -- `%s'"),
+ detail->error ? detail->error : _("immediate value"),
+ detail->data[0], detail->index + 1, str);
break;
case AARCH64_OPDE_REG_LIST:
@@ -5259,25 +5264,6 @@ programmer_friendly_fixup (aarch64_instruction *instr)
}
}
break;
- case asimdimm:
- /* Allow MOVI V0.16B, 97, LSL 0, although the preferred architectural
- syntax requires that the LSL shifter can only be used when the
- destination register has the shape of 4H, 8H, 2S or 4S. */
- if (op == OP_V_MOVI_B && operands[1].shifter.kind == AARCH64_MOD_LSL
- && (operands[0].qualifier == AARCH64_OPND_QLF_V_8B
- || operands[0].qualifier == AARCH64_OPND_QLF_V_16B))
- {
- if (operands[1].shifter.amount != 0)
- {
- record_operand_error (opcode, 1,
- AARCH64_OPDE_OTHER_ERROR,
- _("shift amount non-zero"));
- return FALSE;
- }
- operands[1].shifter.kind = AARCH64_MOD_NONE;
- operands[1].qualifier = AARCH64_OPND_QLF_NIL;
- }
- break;
case log_shift:
case bitfield:
/* UXT[BHW] Wd, Wn
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 9bbead9..73c96e9 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * gas/aarch64/diagnostic.l: Update.
+ * gas/aarch64/movi.s: Add tests.
+ * gas/aarch64/movi.d: Update.
+ * gas/aarch64/programmer-friendly.s: Add comment.
+
2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run size-1, size-2, size-3, size-4,
diff --git a/gas/testsuite/gas/aarch64/diagnostic.l b/gas/testsuite/gas/aarch64/diagnostic.l
index cd8b3e2..5745012 100644
--- a/gas/testsuite/gas/aarch64/diagnostic.l
+++ b/gas/testsuite/gas/aarch64/diagnostic.l
@@ -43,7 +43,7 @@
[^:]*:45: Error: invalid shift operator at operand 2 -- `movi v1.4h,255,msl#8'
[^:]*:46: Error: invalid value for immediate at operand 2 -- `movi d0,256'
[^:]*:47: Error: immediate value should be a multiple of 8 at operand 2 -- `movi v1.4h,255,lsl#7'
-[^:]*:48: Error: immediate value out of range 0 to 8 at operand 2 -- `movi v1.4h,255,lsl#16'
+[^:]*:48: Error: shift amount out of range 0 to 8 at operand 2 -- `movi v1.4h,255,lsl#16'
[^:]*:49: Error: shift amount expected to be 0 or 16 at operand 2 -- `movi v2.2s,255,msl#0'
[^:]*:50: Error: shift amount expected to be 0 or 16 at operand 2 -- `movi v2.2s,255,msl#15'
[^:]*:51: Error: invalid floating-point constant at operand 2 -- `fmov v1.2s,1.01'
@@ -84,5 +84,5 @@
[^:]*:86: Error: unexpected address writeback at operand 3 -- `stnp x7,x15,\[x3,#32\]!'
[^:]*:87: Error: immediate offset out of range -256 to 252 at operand 3 -- `ldnp w7,w15,\[x3,#256\]'
[^:]*:88: Error: shift is not permitted at operand 2 -- `movi v1.2d,4294967295,lsl#0'
-[^:]*:89: Error: shift amount non-zero at operand 2 -- `movi v1.8b,97,lsl#8'
+[^:]*:89: Error: shift amount expected to be 0 at operand 2 -- `movi v1.8b,97,lsl#8'
[^:]*:90: Error: unknown or missing system register name at operand 1 -- `msr dummy,x1'
diff --git a/gas/testsuite/gas/aarch64/movi.d b/gas/testsuite/gas/aarch64/movi.d
index 2c73cc4..cd54cfd 100644
--- a/gas/testsuite/gas/aarch64/movi.d
+++ b/gas/testsuite/gas/aarch64/movi.d
@@ -8197,7 +8197,519 @@ Disassembly of section \.text:
7ff4: 4f0707af movi v15.4s, #0xfd
7ff8: 4f0707cf movi v15.4s, #0xfe
7ffc: 4f0707ef movi v15.4s, #0xff
- 8000: 6f07e7e0 movi v0.2d, #0xffffffffffffffff
- 8004: 6f07e7e0 movi v0.2d, #0xffffffffffffffff
- 8008: 6f07e7e0 movi v0.2d, #0xffffffffffffffff
- 800c: 2f07e7ff movi d31, #0xffffffffffffffff
+ 8000: 0f00e407 movi v7.8b, #0x0
+ 8004: 0f00e427 movi v7.8b, #0x1
+ 8008: 0f00e447 movi v7.8b, #0x2
+ 800c: 0f00e467 movi v7.8b, #0x3
+ 8010: 0f00e487 movi v7.8b, #0x4
+ 8014: 0f00e4a7 movi v7.8b, #0x5
+ 8018: 0f00e4c7 movi v7.8b, #0x6
+ 801c: 0f00e4e7 movi v7.8b, #0x7
+ 8020: 0f00e507 movi v7.8b, #0x8
+ 8024: 0f00e527 movi v7.8b, #0x9
+ 8028: 0f00e547 movi v7.8b, #0xa
+ 802c: 0f00e567 movi v7.8b, #0xb
+ 8030: 0f00e587 movi v7.8b, #0xc
+ 8034: 0f00e5a7 movi v7.8b, #0xd
+ 8038: 0f00e5c7 movi v7.8b, #0xe
+ 803c: 0f00e5e7 movi v7.8b, #0xf
+ 8040: 0f00e607 movi v7.8b, #0x10
+ 8044: 0f00e627 movi v7.8b, #0x11
+ 8048: 0f00e647 movi v7.8b, #0x12
+ 804c: 0f00e667 movi v7.8b, #0x13
+ 8050: 0f00e687 movi v7.8b, #0x14
+ 8054: 0f00e6a7 movi v7.8b, #0x15
+ 8058: 0f00e6c7 movi v7.8b, #0x16
+ 805c: 0f00e6e7 movi v7.8b, #0x17
+ 8060: 0f00e707 movi v7.8b, #0x18
+ 8064: 0f00e727 movi v7.8b, #0x19
+ 8068: 0f00e747 movi v7.8b, #0x1a
+ 806c: 0f00e767 movi v7.8b, #0x1b
+ 8070: 0f00e787 movi v7.8b, #0x1c
+ 8074: 0f00e7a7 movi v7.8b, #0x1d
+ 8078: 0f00e7c7 movi v7.8b, #0x1e
+ 807c: 0f00e7e7 movi v7.8b, #0x1f
+ 8080: 0f01e407 movi v7.8b, #0x20
+ 8084: 0f01e427 movi v7.8b, #0x21
+ 8088: 0f01e447 movi v7.8b, #0x22
+ 808c: 0f01e467 movi v7.8b, #0x23
+ 8090: 0f01e487 movi v7.8b, #0x24
+ 8094: 0f01e4a7 movi v7.8b, #0x25
+ 8098: 0f01e4c7 movi v7.8b, #0x26
+ 809c: 0f01e4e7 movi v7.8b, #0x27
+ 80a0: 0f01e507 movi v7.8b, #0x28
+ 80a4: 0f01e527 movi v7.8b, #0x29
+ 80a8: 0f01e547 movi v7.8b, #0x2a
+ 80ac: 0f01e567 movi v7.8b, #0x2b
+ 80b0: 0f01e587 movi v7.8b, #0x2c
+ 80b4: 0f01e5a7 movi v7.8b, #0x2d
+ 80b8: 0f01e5c7 movi v7.8b, #0x2e
+ 80bc: 0f01e5e7 movi v7.8b, #0x2f
+ 80c0: 0f01e607 movi v7.8b, #0x30
+ 80c4: 0f01e627 movi v7.8b, #0x31
+ 80c8: 0f01e647 movi v7.8b, #0x32
+ 80cc: 0f01e667 movi v7.8b, #0x33
+ 80d0: 0f01e687 movi v7.8b, #0x34
+ 80d4: 0f01e6a7 movi v7.8b, #0x35
+ 80d8: 0f01e6c7 movi v7.8b, #0x36
+ 80dc: 0f01e6e7 movi v7.8b, #0x37
+ 80e0: 0f01e707 movi v7.8b, #0x38
+ 80e4: 0f01e727 movi v7.8b, #0x39
+ 80e8: 0f01e747 movi v7.8b, #0x3a
+ 80ec: 0f01e767 movi v7.8b, #0x3b
+ 80f0: 0f01e787 movi v7.8b, #0x3c
+ 80f4: 0f01e7a7 movi v7.8b, #0x3d
+ 80f8: 0f01e7c7 movi v7.8b, #0x3e
+ 80fc: 0f01e7e7 movi v7.8b, #0x3f
+ 8100: 0f02e407 movi v7.8b, #0x40
+ 8104: 0f02e427 movi v7.8b, #0x41
+ 8108: 0f02e447 movi v7.8b, #0x42
+ 810c: 0f02e467 movi v7.8b, #0x43
+ 8110: 0f02e487 movi v7.8b, #0x44
+ 8114: 0f02e4a7 movi v7.8b, #0x45
+ 8118: 0f02e4c7 movi v7.8b, #0x46
+ 811c: 0f02e4e7 movi v7.8b, #0x47
+ 8120: 0f02e507 movi v7.8b, #0x48
+ 8124: 0f02e527 movi v7.8b, #0x49
+ 8128: 0f02e547 movi v7.8b, #0x4a
+ 812c: 0f02e567 movi v7.8b, #0x4b
+ 8130: 0f02e587 movi v7.8b, #0x4c
+ 8134: 0f02e5a7 movi v7.8b, #0x4d
+ 8138: 0f02e5c7 movi v7.8b, #0x4e
+ 813c: 0f02e5e7 movi v7.8b, #0x4f
+ 8140: 0f02e607 movi v7.8b, #0x50
+ 8144: 0f02e627 movi v7.8b, #0x51
+ 8148: 0f02e647 movi v7.8b, #0x52
+ 814c: 0f02e667 movi v7.8b, #0x53
+ 8150: 0f02e687 movi v7.8b, #0x54
+ 8154: 0f02e6a7 movi v7.8b, #0x55
+ 8158: 0f02e6c7 movi v7.8b, #0x56
+ 815c: 0f02e6e7 movi v7.8b, #0x57
+ 8160: 0f02e707 movi v7.8b, #0x58
+ 8164: 0f02e727 movi v7.8b, #0x59
+ 8168: 0f02e747 movi v7.8b, #0x5a
+ 816c: 0f02e767 movi v7.8b, #0x5b
+ 8170: 0f02e787 movi v7.8b, #0x5c
+ 8174: 0f02e7a7 movi v7.8b, #0x5d
+ 8178: 0f02e7c7 movi v7.8b, #0x5e
+ 817c: 0f02e7e7 movi v7.8b, #0x5f
+ 8180: 0f03e407 movi v7.8b, #0x60
+ 8184: 0f03e427 movi v7.8b, #0x61
+ 8188: 0f03e447 movi v7.8b, #0x62
+ 818c: 0f03e467 movi v7.8b, #0x63
+ 8190: 0f03e487 movi v7.8b, #0x64
+ 8194: 0f03e4a7 movi v7.8b, #0x65
+ 8198: 0f03e4c7 movi v7.8b, #0x66
+ 819c: 0f03e4e7 movi v7.8b, #0x67
+ 81a0: 0f03e507 movi v7.8b, #0x68
+ 81a4: 0f03e527 movi v7.8b, #0x69
+ 81a8: 0f03e547 movi v7.8b, #0x6a
+ 81ac: 0f03e567 movi v7.8b, #0x6b
+ 81b0: 0f03e587 movi v7.8b, #0x6c
+ 81b4: 0f03e5a7 movi v7.8b, #0x6d
+ 81b8: 0f03e5c7 movi v7.8b, #0x6e
+ 81bc: 0f03e5e7 movi v7.8b, #0x6f
+ 81c0: 0f03e607 movi v7.8b, #0x70
+ 81c4: 0f03e627 movi v7.8b, #0x71
+ 81c8: 0f03e647 movi v7.8b, #0x72
+ 81cc: 0f03e667 movi v7.8b, #0x73
+ 81d0: 0f03e687 movi v7.8b, #0x74
+ 81d4: 0f03e6a7 movi v7.8b, #0x75
+ 81d8: 0f03e6c7 movi v7.8b, #0x76
+ 81dc: 0f03e6e7 movi v7.8b, #0x77
+ 81e0: 0f03e707 movi v7.8b, #0x78
+ 81e4: 0f03e727 movi v7.8b, #0x79
+ 81e8: 0f03e747 movi v7.8b, #0x7a
+ 81ec: 0f03e767 movi v7.8b, #0x7b
+ 81f0: 0f03e787 movi v7.8b, #0x7c
+ 81f4: 0f03e7a7 movi v7.8b, #0x7d
+ 81f8: 0f03e7c7 movi v7.8b, #0x7e
+ 81fc: 0f03e7e7 movi v7.8b, #0x7f
+ 8200: 0f04e407 movi v7.8b, #0x80
+ 8204: 0f04e427 movi v7.8b, #0x81
+ 8208: 0f04e447 movi v7.8b, #0x82
+ 820c: 0f04e467 movi v7.8b, #0x83
+ 8210: 0f04e487 movi v7.8b, #0x84
+ 8214: 0f04e4a7 movi v7.8b, #0x85
+ 8218: 0f04e4c7 movi v7.8b, #0x86
+ 821c: 0f04e4e7 movi v7.8b, #0x87
+ 8220: 0f04e507 movi v7.8b, #0x88
+ 8224: 0f04e527 movi v7.8b, #0x89
+ 8228: 0f04e547 movi v7.8b, #0x8a
+ 822c: 0f04e567 movi v7.8b, #0x8b
+ 8230: 0f04e587 movi v7.8b, #0x8c
+ 8234: 0f04e5a7 movi v7.8b, #0x8d
+ 8238: 0f04e5c7 movi v7.8b, #0x8e
+ 823c: 0f04e5e7 movi v7.8b, #0x8f
+ 8240: 0f04e607 movi v7.8b, #0x90
+ 8244: 0f04e627 movi v7.8b, #0x91
+ 8248: 0f04e647 movi v7.8b, #0x92
+ 824c: 0f04e667 movi v7.8b, #0x93
+ 8250: 0f04e687 movi v7.8b, #0x94
+ 8254: 0f04e6a7 movi v7.8b, #0x95
+ 8258: 0f04e6c7 movi v7.8b, #0x96
+ 825c: 0f04e6e7 movi v7.8b, #0x97
+ 8260: 0f04e707 movi v7.8b, #0x98
+ 8264: 0f04e727 movi v7.8b, #0x99
+ 8268: 0f04e747 movi v7.8b, #0x9a
+ 826c: 0f04e767 movi v7.8b, #0x9b
+ 8270: 0f04e787 movi v7.8b, #0x9c
+ 8274: 0f04e7a7 movi v7.8b, #0x9d
+ 8278: 0f04e7c7 movi v7.8b, #0x9e
+ 827c: 0f04e7e7 movi v7.8b, #0x9f
+ 8280: 0f05e407 movi v7.8b, #0xa0
+ 8284: 0f05e427 movi v7.8b, #0xa1
+ 8288: 0f05e447 movi v7.8b, #0xa2
+ 828c: 0f05e467 movi v7.8b, #0xa3
+ 8290: 0f05e487 movi v7.8b, #0xa4
+ 8294: 0f05e4a7 movi v7.8b, #0xa5
+ 8298: 0f05e4c7 movi v7.8b, #0xa6
+ 829c: 0f05e4e7 movi v7.8b, #0xa7
+ 82a0: 0f05e507 movi v7.8b, #0xa8
+ 82a4: 0f05e527 movi v7.8b, #0xa9
+ 82a8: 0f05e547 movi v7.8b, #0xaa
+ 82ac: 0f05e567 movi v7.8b, #0xab
+ 82b0: 0f05e587 movi v7.8b, #0xac
+ 82b4: 0f05e5a7 movi v7.8b, #0xad
+ 82b8: 0f05e5c7 movi v7.8b, #0xae
+ 82bc: 0f05e5e7 movi v7.8b, #0xaf
+ 82c0: 0f05e607 movi v7.8b, #0xb0
+ 82c4: 0f05e627 movi v7.8b, #0xb1
+ 82c8: 0f05e647 movi v7.8b, #0xb2
+ 82cc: 0f05e667 movi v7.8b, #0xb3
+ 82d0: 0f05e687 movi v7.8b, #0xb4
+ 82d4: 0f05e6a7 movi v7.8b, #0xb5
+ 82d8: 0f05e6c7 movi v7.8b, #0xb6
+ 82dc: 0f05e6e7 movi v7.8b, #0xb7
+ 82e0: 0f05e707 movi v7.8b, #0xb8
+ 82e4: 0f05e727 movi v7.8b, #0xb9
+ 82e8: 0f05e747 movi v7.8b, #0xba
+ 82ec: 0f05e767 movi v7.8b, #0xbb
+ 82f0: 0f05e787 movi v7.8b, #0xbc
+ 82f4: 0f05e7a7 movi v7.8b, #0xbd
+ 82f8: 0f05e7c7 movi v7.8b, #0xbe
+ 82fc: 0f05e7e7 movi v7.8b, #0xbf
+ 8300: 0f06e407 movi v7.8b, #0xc0
+ 8304: 0f06e427 movi v7.8b, #0xc1
+ 8308: 0f06e447 movi v7.8b, #0xc2
+ 830c: 0f06e467 movi v7.8b, #0xc3
+ 8310: 0f06e487 movi v7.8b, #0xc4
+ 8314: 0f06e4a7 movi v7.8b, #0xc5
+ 8318: 0f06e4c7 movi v7.8b, #0xc6
+ 831c: 0f06e4e7 movi v7.8b, #0xc7
+ 8320: 0f06e507 movi v7.8b, #0xc8
+ 8324: 0f06e527 movi v7.8b, #0xc9
+ 8328: 0f06e547 movi v7.8b, #0xca
+ 832c: 0f06e567 movi v7.8b, #0xcb
+ 8330: 0f06e587 movi v7.8b, #0xcc
+ 8334: 0f06e5a7 movi v7.8b, #0xcd
+ 8338: 0f06e5c7 movi v7.8b, #0xce
+ 833c: 0f06e5e7 movi v7.8b, #0xcf
+ 8340: 0f06e607 movi v7.8b, #0xd0
+ 8344: 0f06e627 movi v7.8b, #0xd1
+ 8348: 0f06e647 movi v7.8b, #0xd2
+ 834c: 0f06e667 movi v7.8b, #0xd3
+ 8350: 0f06e687 movi v7.8b, #0xd4
+ 8354: 0f06e6a7 movi v7.8b, #0xd5
+ 8358: 0f06e6c7 movi v7.8b, #0xd6
+ 835c: 0f06e6e7 movi v7.8b, #0xd7
+ 8360: 0f06e707 movi v7.8b, #0xd8
+ 8364: 0f06e727 movi v7.8b, #0xd9
+ 8368: 0f06e747 movi v7.8b, #0xda
+ 836c: 0f06e767 movi v7.8b, #0xdb
+ 8370: 0f06e787 movi v7.8b, #0xdc
+ 8374: 0f06e7a7 movi v7.8b, #0xdd
+ 8378: 0f06e7c7 movi v7.8b, #0xde
+ 837c: 0f06e7e7 movi v7.8b, #0xdf
+ 8380: 0f07e407 movi v7.8b, #0xe0
+ 8384: 0f07e427 movi v7.8b, #0xe1
+ 8388: 0f07e447 movi v7.8b, #0xe2
+ 838c: 0f07e467 movi v7.8b, #0xe3
+ 8390: 0f07e487 movi v7.8b, #0xe4
+ 8394: 0f07e4a7 movi v7.8b, #0xe5
+ 8398: 0f07e4c7 movi v7.8b, #0xe6
+ 839c: 0f07e4e7 movi v7.8b, #0xe7
+ 83a0: 0f07e507 movi v7.8b, #0xe8
+ 83a4: 0f07e527 movi v7.8b, #0xe9
+ 83a8: 0f07e547 movi v7.8b, #0xea
+ 83ac: 0f07e567 movi v7.8b, #0xeb
+ 83b0: 0f07e587 movi v7.8b, #0xec
+ 83b4: 0f07e5a7 movi v7.8b, #0xed
+ 83b8: 0f07e5c7 movi v7.8b, #0xee
+ 83bc: 0f07e5e7 movi v7.8b, #0xef
+ 83c0: 0f07e607 movi v7.8b, #0xf0
+ 83c4: 0f07e627 movi v7.8b, #0xf1
+ 83c8: 0f07e647 movi v7.8b, #0xf2
+ 83cc: 0f07e667 movi v7.8b, #0xf3
+ 83d0: 0f07e687 movi v7.8b, #0xf4
+ 83d4: 0f07e6a7 movi v7.8b, #0xf5
+ 83d8: 0f07e6c7 movi v7.8b, #0xf6
+ 83dc: 0f07e6e7 movi v7.8b, #0xf7
+ 83e0: 0f07e707 movi v7.8b, #0xf8
+ 83e4: 0f07e727 movi v7.8b, #0xf9
+ 83e8: 0f07e747 movi v7.8b, #0xfa
+ 83ec: 0f07e767 movi v7.8b, #0xfb
+ 83f0: 0f07e787 movi v7.8b, #0xfc
+ 83f4: 0f07e7a7 movi v7.8b, #0xfd
+ 83f8: 0f07e7c7 movi v7.8b, #0xfe
+ 83fc: 0f07e7e7 movi v7.8b, #0xff
+ 8400: 4f00e407 movi v7.16b, #0x0
+ 8404: 4f00e427 movi v7.16b, #0x1
+ 8408: 4f00e447 movi v7.16b, #0x2
+ 840c: 4f00e467 movi v7.16b, #0x3
+ 8410: 4f00e487 movi v7.16b, #0x4
+ 8414: 4f00e4a7 movi v7.16b, #0x5
+ 8418: 4f00e4c7 movi v7.16b, #0x6
+ 841c: 4f00e4e7 movi v7.16b, #0x7
+ 8420: 4f00e507 movi v7.16b, #0x8
+ 8424: 4f00e527 movi v7.16b, #0x9
+ 8428: 4f00e547 movi v7.16b, #0xa
+ 842c: 4f00e567 movi v7.16b, #0xb
+ 8430: 4f00e587 movi v7.16b, #0xc
+ 8434: 4f00e5a7 movi v7.16b, #0xd
+ 8438: 4f00e5c7 movi v7.16b, #0xe
+ 843c: 4f00e5e7 movi v7.16b, #0xf
+ 8440: 4f00e607 movi v7.16b, #0x10
+ 8444: 4f00e627 movi v7.16b, #0x11
+ 8448: 4f00e647 movi v7.16b, #0x12
+ 844c: 4f00e667 movi v7.16b, #0x13
+ 8450: 4f00e687 movi v7.16b, #0x14
+ 8454: 4f00e6a7 movi v7.16b, #0x15
+ 8458: 4f00e6c7 movi v7.16b, #0x16
+ 845c: 4f00e6e7 movi v7.16b, #0x17
+ 8460: 4f00e707 movi v7.16b, #0x18
+ 8464: 4f00e727 movi v7.16b, #0x19
+ 8468: 4f00e747 movi v7.16b, #0x1a
+ 846c: 4f00e767 movi v7.16b, #0x1b
+ 8470: 4f00e787 movi v7.16b, #0x1c
+ 8474: 4f00e7a7 movi v7.16b, #0x1d
+ 8478: 4f00e7c7 movi v7.16b, #0x1e
+ 847c: 4f00e7e7 movi v7.16b, #0x1f
+ 8480: 4f01e407 movi v7.16b, #0x20
+ 8484: 4f01e427 movi v7.16b, #0x21
+ 8488: 4f01e447 movi v7.16b, #0x22
+ 848c: 4f01e467 movi v7.16b, #0x23
+ 8490: 4f01e487 movi v7.16b, #0x24
+ 8494: 4f01e4a7 movi v7.16b, #0x25
+ 8498: 4f01e4c7 movi v7.16b, #0x26
+ 849c: 4f01e4e7 movi v7.16b, #0x27
+ 84a0: 4f01e507 movi v7.16b, #0x28
+ 84a4: 4f01e527 movi v7.16b, #0x29
+ 84a8: 4f01e547 movi v7.16b, #0x2a
+ 84ac: 4f01e567 movi v7.16b, #0x2b
+ 84b0: 4f01e587 movi v7.16b, #0x2c
+ 84b4: 4f01e5a7 movi v7.16b, #0x2d
+ 84b8: 4f01e5c7 movi v7.16b, #0x2e
+ 84bc: 4f01e5e7 movi v7.16b, #0x2f
+ 84c0: 4f01e607 movi v7.16b, #0x30
+ 84c4: 4f01e627 movi v7.16b, #0x31
+ 84c8: 4f01e647 movi v7.16b, #0x32
+ 84cc: 4f01e667 movi v7.16b, #0x33
+ 84d0: 4f01e687 movi v7.16b, #0x34
+ 84d4: 4f01e6a7 movi v7.16b, #0x35
+ 84d8: 4f01e6c7 movi v7.16b, #0x36
+ 84dc: 4f01e6e7 movi v7.16b, #0x37
+ 84e0: 4f01e707 movi v7.16b, #0x38
+ 84e4: 4f01e727 movi v7.16b, #0x39
+ 84e8: 4f01e747 movi v7.16b, #0x3a
+ 84ec: 4f01e767 movi v7.16b, #0x3b
+ 84f0: 4f01e787 movi v7.16b, #0x3c
+ 84f4: 4f01e7a7 movi v7.16b, #0x3d
+ 84f8: 4f01e7c7 movi v7.16b, #0x3e
+ 84fc: 4f01e7e7 movi v7.16b, #0x3f
+ 8500: 4f02e407 movi v7.16b, #0x40
+ 8504: 4f02e427 movi v7.16b, #0x41
+ 8508: 4f02e447 movi v7.16b, #0x42
+ 850c: 4f02e467 movi v7.16b, #0x43
+ 8510: 4f02e487 movi v7.16b, #0x44
+ 8514: 4f02e4a7 movi v7.16b, #0x45
+ 8518: 4f02e4c7 movi v7.16b, #0x46
+ 851c: 4f02e4e7 movi v7.16b, #0x47
+ 8520: 4f02e507 movi v7.16b, #0x48
+ 8524: 4f02e527 movi v7.16b, #0x49
+ 8528: 4f02e547 movi v7.16b, #0x4a
+ 852c: 4f02e567 movi v7.16b, #0x4b
+ 8530: 4f02e587 movi v7.16b, #0x4c
+ 8534: 4f02e5a7 movi v7.16b, #0x4d
+ 8538: 4f02e5c7 movi v7.16b, #0x4e
+ 853c: 4f02e5e7 movi v7.16b, #0x4f
+ 8540: 4f02e607 movi v7.16b, #0x50
+ 8544: 4f02e627 movi v7.16b, #0x51
+ 8548: 4f02e647 movi v7.16b, #0x52
+ 854c: 4f02e667 movi v7.16b, #0x53
+ 8550: 4f02e687 movi v7.16b, #0x54
+ 8554: 4f02e6a7 movi v7.16b, #0x55
+ 8558: 4f02e6c7 movi v7.16b, #0x56
+ 855c: 4f02e6e7 movi v7.16b, #0x57
+ 8560: 4f02e707 movi v7.16b, #0x58
+ 8564: 4f02e727 movi v7.16b, #0x59
+ 8568: 4f02e747 movi v7.16b, #0x5a
+ 856c: 4f02e767 movi v7.16b, #0x5b
+ 8570: 4f02e787 movi v7.16b, #0x5c
+ 8574: 4f02e7a7 movi v7.16b, #0x5d
+ 8578: 4f02e7c7 movi v7.16b, #0x5e
+ 857c: 4f02e7e7 movi v7.16b, #0x5f
+ 8580: 4f03e407 movi v7.16b, #0x60
+ 8584: 4f03e427 movi v7.16b, #0x61
+ 8588: 4f03e447 movi v7.16b, #0x62
+ 858c: 4f03e467 movi v7.16b, #0x63
+ 8590: 4f03e487 movi v7.16b, #0x64
+ 8594: 4f03e4a7 movi v7.16b, #0x65
+ 8598: 4f03e4c7 movi v7.16b, #0x66
+ 859c: 4f03e4e7 movi v7.16b, #0x67
+ 85a0: 4f03e507 movi v7.16b, #0x68
+ 85a4: 4f03e527 movi v7.16b, #0x69
+ 85a8: 4f03e547 movi v7.16b, #0x6a
+ 85ac: 4f03e567 movi v7.16b, #0x6b
+ 85b0: 4f03e587 movi v7.16b, #0x6c
+ 85b4: 4f03e5a7 movi v7.16b, #0x6d
+ 85b8: 4f03e5c7 movi v7.16b, #0x6e
+ 85bc: 4f03e5e7 movi v7.16b, #0x6f
+ 85c0: 4f03e607 movi v7.16b, #0x70
+ 85c4: 4f03e627 movi v7.16b, #0x71
+ 85c8: 4f03e647 movi v7.16b, #0x72
+ 85cc: 4f03e667 movi v7.16b, #0x73
+ 85d0: 4f03e687 movi v7.16b, #0x74
+ 85d4: 4f03e6a7 movi v7.16b, #0x75
+ 85d8: 4f03e6c7 movi v7.16b, #0x76
+ 85dc: 4f03e6e7 movi v7.16b, #0x77
+ 85e0: 4f03e707 movi v7.16b, #0x78
+ 85e4: 4f03e727 movi v7.16b, #0x79
+ 85e8: 4f03e747 movi v7.16b, #0x7a
+ 85ec: 4f03e767 movi v7.16b, #0x7b
+ 85f0: 4f03e787 movi v7.16b, #0x7c
+ 85f4: 4f03e7a7 movi v7.16b, #0x7d
+ 85f8: 4f03e7c7 movi v7.16b, #0x7e
+ 85fc: 4f03e7e7 movi v7.16b, #0x7f
+ 8600: 4f04e407 movi v7.16b, #0x80
+ 8604: 4f04e427 movi v7.16b, #0x81
+ 8608: 4f04e447 movi v7.16b, #0x82
+ 860c: 4f04e467 movi v7.16b, #0x83
+ 8610: 4f04e487 movi v7.16b, #0x84
+ 8614: 4f04e4a7 movi v7.16b, #0x85
+ 8618: 4f04e4c7 movi v7.16b, #0x86
+ 861c: 4f04e4e7 movi v7.16b, #0x87
+ 8620: 4f04e507 movi v7.16b, #0x88
+ 8624: 4f04e527 movi v7.16b, #0x89
+ 8628: 4f04e547 movi v7.16b, #0x8a
+ 862c: 4f04e567 movi v7.16b, #0x8b
+ 8630: 4f04e587 movi v7.16b, #0x8c
+ 8634: 4f04e5a7 movi v7.16b, #0x8d
+ 8638: 4f04e5c7 movi v7.16b, #0x8e
+ 863c: 4f04e5e7 movi v7.16b, #0x8f
+ 8640: 4f04e607 movi v7.16b, #0x90
+ 8644: 4f04e627 movi v7.16b, #0x91
+ 8648: 4f04e647 movi v7.16b, #0x92
+ 864c: 4f04e667 movi v7.16b, #0x93
+ 8650: 4f04e687 movi v7.16b, #0x94
+ 8654: 4f04e6a7 movi v7.16b, #0x95
+ 8658: 4f04e6c7 movi v7.16b, #0x96
+ 865c: 4f04e6e7 movi v7.16b, #0x97
+ 8660: 4f04e707 movi v7.16b, #0x98
+ 8664: 4f04e727 movi v7.16b, #0x99
+ 8668: 4f04e747 movi v7.16b, #0x9a
+ 866c: 4f04e767 movi v7.16b, #0x9b
+ 8670: 4f04e787 movi v7.16b, #0x9c
+ 8674: 4f04e7a7 movi v7.16b, #0x9d
+ 8678: 4f04e7c7 movi v7.16b, #0x9e
+ 867c: 4f04e7e7 movi v7.16b, #0x9f
+ 8680: 4f05e407 movi v7.16b, #0xa0
+ 8684: 4f05e427 movi v7.16b, #0xa1
+ 8688: 4f05e447 movi v7.16b, #0xa2
+ 868c: 4f05e467 movi v7.16b, #0xa3
+ 8690: 4f05e487 movi v7.16b, #0xa4
+ 8694: 4f05e4a7 movi v7.16b, #0xa5
+ 8698: 4f05e4c7 movi v7.16b, #0xa6
+ 869c: 4f05e4e7 movi v7.16b, #0xa7
+ 86a0: 4f05e507 movi v7.16b, #0xa8
+ 86a4: 4f05e527 movi v7.16b, #0xa9
+ 86a8: 4f05e547 movi v7.16b, #0xaa
+ 86ac: 4f05e567 movi v7.16b, #0xab
+ 86b0: 4f05e587 movi v7.16b, #0xac
+ 86b4: 4f05e5a7 movi v7.16b, #0xad
+ 86b8: 4f05e5c7 movi v7.16b, #0xae
+ 86bc: 4f05e5e7 movi v7.16b, #0xaf
+ 86c0: 4f05e607 movi v7.16b, #0xb0
+ 86c4: 4f05e627 movi v7.16b, #0xb1
+ 86c8: 4f05e647 movi v7.16b, #0xb2
+ 86cc: 4f05e667 movi v7.16b, #0xb3
+ 86d0: 4f05e687 movi v7.16b, #0xb4
+ 86d4: 4f05e6a7 movi v7.16b, #0xb5
+ 86d8: 4f05e6c7 movi v7.16b, #0xb6
+ 86dc: 4f05e6e7 movi v7.16b, #0xb7
+ 86e0: 4f05e707 movi v7.16b, #0xb8
+ 86e4: 4f05e727 movi v7.16b, #0xb9
+ 86e8: 4f05e747 movi v7.16b, #0xba
+ 86ec: 4f05e767 movi v7.16b, #0xbb
+ 86f0: 4f05e787 movi v7.16b, #0xbc
+ 86f4: 4f05e7a7 movi v7.16b, #0xbd
+ 86f8: 4f05e7c7 movi v7.16b, #0xbe
+ 86fc: 4f05e7e7 movi v7.16b, #0xbf
+ 8700: 4f06e407 movi v7.16b, #0xc0
+ 8704: 4f06e427 movi v7.16b, #0xc1
+ 8708: 4f06e447 movi v7.16b, #0xc2
+ 870c: 4f06e467 movi v7.16b, #0xc3
+ 8710: 4f06e487 movi v7.16b, #0xc4
+ 8714: 4f06e4a7 movi v7.16b, #0xc5
+ 8718: 4f06e4c7 movi v7.16b, #0xc6
+ 871c: 4f06e4e7 movi v7.16b, #0xc7
+ 8720: 4f06e507 movi v7.16b, #0xc8
+ 8724: 4f06e527 movi v7.16b, #0xc9
+ 8728: 4f06e547 movi v7.16b, #0xca
+ 872c: 4f06e567 movi v7.16b, #0xcb
+ 8730: 4f06e587 movi v7.16b, #0xcc
+ 8734: 4f06e5a7 movi v7.16b, #0xcd
+ 8738: 4f06e5c7 movi v7.16b, #0xce
+ 873c: 4f06e5e7 movi v7.16b, #0xcf
+ 8740: 4f06e607 movi v7.16b, #0xd0
+ 8744: 4f06e627 movi v7.16b, #0xd1
+ 8748: 4f06e647 movi v7.16b, #0xd2
+ 874c: 4f06e667 movi v7.16b, #0xd3
+ 8750: 4f06e687 movi v7.16b, #0xd4
+ 8754: 4f06e6a7 movi v7.16b, #0xd5
+ 8758: 4f06e6c7 movi v7.16b, #0xd6
+ 875c: 4f06e6e7 movi v7.16b, #0xd7
+ 8760: 4f06e707 movi v7.16b, #0xd8
+ 8764: 4f06e727 movi v7.16b, #0xd9
+ 8768: 4f06e747 movi v7.16b, #0xda
+ 876c: 4f06e767 movi v7.16b, #0xdb
+ 8770: 4f06e787 movi v7.16b, #0xdc
+ 8774: 4f06e7a7 movi v7.16b, #0xdd
+ 8778: 4f06e7c7 movi v7.16b, #0xde
+ 877c: 4f06e7e7 movi v7.16b, #0xdf
+ 8780: 4f07e407 movi v7.16b, #0xe0
+ 8784: 4f07e427 movi v7.16b, #0xe1
+ 8788: 4f07e447 movi v7.16b, #0xe2
+ 878c: 4f07e467 movi v7.16b, #0xe3
+ 8790: 4f07e487 movi v7.16b, #0xe4
+ 8794: 4f07e4a7 movi v7.16b, #0xe5
+ 8798: 4f07e4c7 movi v7.16b, #0xe6
+ 879c: 4f07e4e7 movi v7.16b, #0xe7
+ 87a0: 4f07e507 movi v7.16b, #0xe8
+ 87a4: 4f07e527 movi v7.16b, #0xe9
+ 87a8: 4f07e547 movi v7.16b, #0xea
+ 87ac: 4f07e567 movi v7.16b, #0xeb
+ 87b0: 4f07e587 movi v7.16b, #0xec
+ 87b4: 4f07e5a7 movi v7.16b, #0xed
+ 87b8: 4f07e5c7 movi v7.16b, #0xee
+ 87bc: 4f07e5e7 movi v7.16b, #0xef
+ 87c0: 4f07e607 movi v7.16b, #0xf0
+ 87c4: 4f07e627 movi v7.16b, #0xf1
+ 87c8: 4f07e647 movi v7.16b, #0xf2
+ 87cc: 4f07e667 movi v7.16b, #0xf3
+ 87d0: 4f07e687 movi v7.16b, #0xf4
+ 87d4: 4f07e6a7 movi v7.16b, #0xf5
+ 87d8: 4f07e6c7 movi v7.16b, #0xf6
+ 87dc: 4f07e6e7 movi v7.16b, #0xf7
+ 87e0: 4f07e707 movi v7.16b, #0xf8
+ 87e4: 4f07e727 movi v7.16b, #0xf9
+ 87e8: 4f07e747 movi v7.16b, #0xfa
+ 87ec: 4f07e767 movi v7.16b, #0xfb
+ 87f0: 4f07e787 movi v7.16b, #0xfc
+ 87f4: 4f07e7a7 movi v7.16b, #0xfd
+ 87f8: 4f07e7c7 movi v7.16b, #0xfe
+ 87fc: 4f07e7e7 movi v7.16b, #0xff
+ 8800: 6f07e7e0 movi v0.2d, #0xffffffffffffffff
+ 8804: 6f07e7e0 movi v0.2d, #0xffffffffffffffff
+ 8808: 6f07e7e0 movi v0.2d, #0xffffffffffffffff
+ 880c: 2f07e7ff movi d31, #0xffffffffffffffff
diff --git a/gas/testsuite/gas/aarch64/movi.s b/gas/testsuite/gas/aarch64/movi.s
index 99ca34a..a650790 100644
--- a/gas/testsuite/gas/aarch64/movi.s
+++ b/gas/testsuite/gas/aarch64/movi.s
@@ -97,6 +97,17 @@
.endr
.endr
+ // Shift zeros, per byte
+ // MOVI <Vd>.<T>, #<imm8>, LSL #0
+ // This used to be a programmer-friendly feature (allowing LSL #0),
+ // but it is now part of the architecture specification.
+ .irp T, 8b, 16b
+ all_8bit_imm_movi_sft v7.\T, 0, 63, LSL, 0
+ all_8bit_imm_movi_sft v7.\T, 64, 127, LSL, 0
+ all_8bit_imm_movi_sft v7.\T, 128, 191, LSL, 0
+ all_8bit_imm_movi_sft v7.\T, 192, 255, LSL, 0
+ .endr
+
movi v0.2d, 18446744073709551615
movi v0.2d, -1
movi v0.2d, bignum
diff --git a/gas/testsuite/gas/aarch64/programmer-friendly.s b/gas/testsuite/gas/aarch64/programmer-friendly.s
index 9dd93fe..6254c64 100644
--- a/gas/testsuite/gas/aarch64/programmer-friendly.s
+++ b/gas/testsuite/gas/aarch64/programmer-friendly.s
@@ -6,7 +6,7 @@
// The preferred architectural syntax does not accept the shifter
// LSL or any other shift operator, when the destination register
// has the shape of 16B or 8B.
- movi v0.16b, 97, lsl 0
+ movi v0.16b, 97, lsl 0 // N.B.: this is now part of the architecture specification.
// LDR Wt, label | =value
// As a convenience assemblers will typically permit the notation
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index f8b25c6..85a1a8f 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * aarch64.h (aarch64_op): Remove OP_V_MOVI_B.
+
2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
* ppc.h (PPC_OPCODE_POWER8): New define.
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 3a26199..9005c8c 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -409,8 +409,6 @@ enum aarch64_op
OP_UXTH,
OP_UXTW,
- OP_V_MOVI_B,
-
OP_CINC,
OP_CINV,
OP_CNEG,
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 45f3e32..c593d9d 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,16 @@
+2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Handle 8-bit MOVI.
+ * aarch64-dis.c (aarch64_ext_advsimd_imm_modified): Likewise.
+ * aarch64-opc.c (operand_general_constraint_met_p): For
+ AARCH64_MOD_LSL, move the range check on the shift amount before the
+ alignment check; change to call set_sft_amount_out_of_range_error
+ instead of set_imm_out_of_range_error.
+ * aarch64-tbl.h (QL_SIMD_IMM_B): Replace NIL with LSL.
+ (aarch64_opcode_table): Remove the OP enumerator from the asimdimm
+ 8-bit MOVI entry; change the 2nd operand from SIMD_IMM to
+ SIMD_IMM_SFT.
+
2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (operand_type_init): Add OPERAND_TYPE_IMM32_64.
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index 3a6e7b1..4c1c521 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -382,7 +382,11 @@ aarch64_ins_advsimd_imm_modified (const aarch64_operand *self ATTRIBUTE_UNUSED,
{
/* AARCH64_MOD_LSL: shift zeros. */
int esize = aarch64_get_qualifier_esize (opnd0_qualifier);
- assert (esize == 4 || esize == 2);
+ assert (esize == 4 || esize == 2 || esize == 1);
+ /* For 8-bit move immediate, the optional LSL #0 does not require
+ encoding. */
+ if (esize == 1)
+ return NULL;
amount >>= 3;
if (esize == 4)
gen_sub_field (FLD_cmode, 1, 2, &field); /* per word */
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index 84b7b0a..bbd5a3e 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -642,6 +642,7 @@ aarch64_ext_advsimd_imm_modified (const aarch64_operand *self ATTRIBUTE_UNUSED,
{
case 4: gen_sub_field (FLD_cmode, 1, 2, &field); break; /* per word */
case 2: gen_sub_field (FLD_cmode, 1, 1, &field); break; /* per half */
+ case 1: gen_sub_field (FLD_cmode, 1, 0, &field); break; /* per byte */
default: assert (0); return 0;
}
/* 00: 0; 01: 8; 10:16; 11:24. */
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 72ecf5b..4bcb9ea 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -1745,15 +1745,15 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
{
case AARCH64_MOD_LSL:
size = aarch64_get_qualifier_esize (opnds[0].qualifier);
- if (!value_aligned_p (opnd->shifter.amount, 8))
+ if (!value_in_range_p (opnd->shifter.amount, 0, (size - 1) * 8))
{
- set_unaligned_error (mismatch_detail, idx, 8);
+ set_sft_amount_out_of_range_error (mismatch_detail, idx, 0,
+ (size - 1) * 8);
return 0;
}
- if (!value_in_range_p (opnd->shifter.amount, 0, (size - 1) * 8))
+ if (!value_aligned_p (opnd->shifter.amount, 8))
{
- set_imm_out_of_range_error (mismatch_detail, idx, 0,
- (size - 1) * 8);
+ set_unaligned_error (mismatch_detail, idx, 8);
return 0;
}
break;
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index fd38a9d..e2906f8 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -1171,11 +1171,11 @@
QLF2(V_4S, NIL), \
}
-/* e.g. MOVI <Vd>.8B, #<imm8>. */
+/* e.g. MOVI <Vd>.8B, #<imm8> {, LSL #<amount>}. */
#define QL_SIMD_IMM_B \
{ \
- QLF2(V_8B, NIL), \
- QLF2(V_16B, NIL), \
+ QLF2(V_8B, LSL), \
+ QLF2(V_16B, LSL), \
}
/* e.g. MOVI <Dd>, #<imm>. */
#define QL_SIMD_IMM_D \
@@ -1341,7 +1341,7 @@ struct aarch64_opcode aarch64_opcode_table[] =
{"movi", 0xf008400, 0xbff8dc00, asimdimm, 0, SIMD, OP2 (Vd, SIMD_IMM_SFT), QL_SIMD_IMM_S0H, F_SIZEQ},
{"orr", 0xf009400, 0xbff8dc00, asimdimm, 0, SIMD, OP2 (Vd, SIMD_IMM_SFT), QL_SIMD_IMM_S0H, F_SIZEQ},
{"movi", 0xf00c400, 0xbff8ec00, asimdimm, 0, SIMD, OP2 (Vd, SIMD_IMM_SFT), QL_SIMD_IMM_S1W, F_SIZEQ},
- {"movi", 0xf00e400, 0xbff8fc00, asimdimm, OP_V_MOVI_B, SIMD, OP2 (Vd, SIMD_IMM), QL_SIMD_IMM_B, F_SIZEQ},
+ {"movi", 0xf00e400, 0xbff8fc00, asimdimm, 0, SIMD, OP2 (Vd, SIMD_IMM_SFT), QL_SIMD_IMM_B, F_SIZEQ},
{"fmov", 0xf00f400, 0xbff8fc00, asimdimm, 0, SIMD, OP2 (Vd, SIMD_FPIMM), QL_SIMD_IMM_S, F_SIZEQ},
{"mvni", 0x2f000400, 0xbff89c00, asimdimm, 0, SIMD, OP2 (Vd, SIMD_IMM_SFT), QL_SIMD_IMM_S0W, F_SIZEQ},
{"bic", 0x2f001400, 0xbff89c00, asimdimm, 0, SIMD, OP2 (Vd, SIMD_IMM_SFT), QL_SIMD_IMM_S0W, F_SIZEQ},