PR binutils/6773

        * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
        <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
        (thumb32_opcodes): Likewise.

        * gas/arm/arch7em.d: Replace expected disassembly of
        <prefix>addsubx with <prefix>asx.  Also replace <prefix>subaddx
        with <prefix>sax.
        * gas/arm/archv6.d: Likewise.
        * gas/arm/thumb32.d: Likewise.

6 files changed, 116 insertions, 100 deletions

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 7a9b538..3ee595b 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,8 +1,17 @@
+2010-02-24  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/6773
+	* gas/arm/arch7em.d: Replace expected disassembly of
+	<prefix>addsubx with <prefix>asx.  Also replace <prefix>subaddx
+	with <prefix>sax.
+	* gas/arm/archv6.d: Likewise.
+	* gas/arm/thumb32.d: Likewise.
+
 2010-02-23  Daniel Gutson  <dgutson@codesourcery.com>
 
-    * gas/arm/depr-swp.d: New test case.
-    * gas/arm/depr-swp.s: New file.
-    * gas/arm/depr-swp.l: New file.
+	* gas/arm/depr-swp.d: New test case.
+	* gas/arm/depr-swp.s: New file.
+	* gas/arm/depr-swp.l: New file.
 
 2010-02-23  Nick Clifton  <nickc@redhat.com>
 
diff --git a/gas/testsuite/gas/arm/arch7em.d b/gas/testsuite/gas/arm/arch7em.d
index 4ca2bef..b9faead 100644
--- a/gas/testsuite/gas/arm/arch7em.d
+++ b/gas/testsuite/gas/arm/arch7em.d
@@ -16,55 +16,55 @@ Disassembly of section .text:
 0[0-9a-f]+ <[^>]+> fa83 f182 	qadd	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa92 f113 	qadd16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa82 f113 	qadd8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f113 	qaddsubx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f113 	qaddsubx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f113 	qasx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f113 	qasx	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa83 f192 	qdadd	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa83 f1b2 	qdsub	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa83 f1a2 	qsub	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fad2 f113 	qsub16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fac2 f113 	qsub8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f113 	qsubaddx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f113 	qsubaddx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f113 	qsax	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f113 	qsax	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa92 f103 	sadd16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa82 f103 	sadd8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f103 	saddsubx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f103 	saddsubx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f103 	sasx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f103 	sasx	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fad2 f103 	ssub16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fac2 f103 	ssub8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f103 	ssubaddx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f103 	ssubaddx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f103 	ssax	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f103 	ssax	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa92 f123 	shadd16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa82 f123 	shadd8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f123 	shaddsubx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f123 	shaddsubx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f123 	shasx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f123 	shasx	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fad2 f123 	shsub16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fac2 f123 	shsub8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f123 	shsubaddx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f123 	shsubaddx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f123 	shsax	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f123 	shsax	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa92 f143 	uadd16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa82 f143 	uadd8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f143 	uaddsubx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f143 	uaddsubx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f143 	uasx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f143 	uasx	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fad2 f143 	usub16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fac2 f143 	usub8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f143 	usubaddx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f143 	usubaddx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f143 	usax	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f143 	usax	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa92 f163 	uhadd16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa82 f163 	uhadd8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f163 	uhaddsubx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f163 	uhaddsubx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f163 	uhasx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f163 	uhasx	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fad2 f163 	uhsub16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fac2 f163 	uhsub8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f163 	uhsubaddx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f163 	uhsubaddx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f163 	uhsax	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f163 	uhsax	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa92 f153 	uqadd16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa82 f153 	uqadd8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f153 	uqaddsubx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f153 	uqaddsubx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f153 	uqasx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f153 	uqasx	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fad2 f153 	uqsub16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fac2 f153 	uqsub8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f153 	uqsubaddx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f153 	uqsubaddx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f153 	uqsax	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f153 	uqsax	r1, r2, r3
 0[0-9a-f]+ <[^>]+> faa2 f183 	sel	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fb10 0000 	smlabb	r0, r0, r0, r0
 0[0-9a-f]+ <[^>]+> fb10 0900 	smlabb	r9, r0, r0, r0
diff --git a/gas/testsuite/gas/arm/archv6.d b/gas/testsuite/gas/arm/archv6.d
index 6015a47..4f73a95 100644
--- a/gas/testsuite/gas/arm/archv6.d
+++ b/gas/testsuite/gas/arm/archv6.d
@@ -24,14 +24,14 @@ Disassembly of section .text:
 0+040 <[^>]*> 16242f17 ?	qadd16ne	r2, r4, r7
 0+044 <[^>]*> e6242f97 ?	qadd8	r2, r4, r7
 0+048 <[^>]*> 16242f97 ?	qadd8ne	r2, r4, r7
-0+04c <[^>]*> e6242f37 ?	qaddsubx	r2, r4, r7
-0+050 <[^>]*> 16242f37 ?	qaddsubxne	r2, r4, r7
+0+04c <[^>]*> e6242f37 ?	qasx	r2, r4, r7
+0+050 <[^>]*> 16242f37 ?	qasxne	r2, r4, r7
 0+054 <[^>]*> e6242f77 ?	qsub16	r2, r4, r7
 0+058 <[^>]*> 16242f77 ?	qsub16ne	r2, r4, r7
 0+05c <[^>]*> e6242ff7 ?	qsub8	r2, r4, r7
 0+060 <[^>]*> 16242ff7 ?	qsub8ne	r2, r4, r7
-0+064 <[^>]*> e6242f57 ?	qsubaddx	r2, r4, r7
-0+068 <[^>]*> e6242f57 ?	qsubaddx	r2, r4, r7
+0+064 <[^>]*> e6242f57 ?	qsax	r2, r4, r7
+0+068 <[^>]*> e6242f57 ?	qsax	r2, r4, r7
 0+06c <[^>]*> e6bf2f34 ?	rev	r2, r4
 0+070 <[^>]*> e6bf2fb4 ?	rev16	r2, r4
 0+074 <[^>]*> 16bf3fb5 ?	rev16ne	r3, r5
@@ -62,8 +62,8 @@ Disassembly of section .text:
 0+0d8 <[^>]*> e6a42475 ?	sxtab	r2, r4, r5, ror #8
 0+0dc <[^>]*> 16a42075 ?	sxtabne	r2, r4, r5
 0+0e0 <[^>]*> 16a42475 ?	sxtabne	r2, r4, r5, ror #8
-0+0e4 <[^>]*> e6142f37 ?	saddaddx	r2, r4, r7
-0+0e8 <[^>]*> 16142f37 ?	saddaddxne	r2, r4, r7
+0+0e4 <[^>]*> e6142f37 ?	sasx	r2, r4, r7
+0+0e8 <[^>]*> 16142f37 ?	sasxne	r2, r4, r7
 0+0ec <[^>]*> e6821fb3 ?	sel	r1, r2, r3
 0+0f0 <[^>]*> 16821fb3 ?	selne	r1, r2, r3
 0+0f4 <[^>]*> f1010200 ?	setend	be
@@ -72,14 +72,14 @@ Disassembly of section .text:
 0+100 <[^>]*> 16342f17 ?	shadd16ne	r2, r4, r7
 0+104 <[^>]*> e6342f97 ?	shadd8	r2, r4, r7
 0+108 <[^>]*> 16342f97 ?	shadd8ne	r2, r4, r7
-0+10c <[^>]*> e6342f37 ?	shaddsubx	r2, r4, r7
-0+110 <[^>]*> 16342f37 ?	shaddsubxne	r2, r4, r7
+0+10c <[^>]*> e6342f37 ?	shasx	r2, r4, r7
+0+110 <[^>]*> 16342f37 ?	shasxne	r2, r4, r7
 0+114 <[^>]*> e6342f77 ?	shsub16	r2, r4, r7
 0+118 <[^>]*> 16342f77 ?	shsub16ne	r2, r4, r7
 0+11c <[^>]*> e6342ff7 ?	shsub8	r2, r4, r7
 0+120 <[^>]*> 16342ff7 ?	shsub8ne	r2, r4, r7
-0+124 <[^>]*> e6342f57 ?	shsubaddx	r2, r4, r7
-0+128 <[^>]*> 16342f57 ?	shsubaddxne	r2, r4, r7
+0+124 <[^>]*> e6342f57 ?	shsax	r2, r4, r7
+0+128 <[^>]*> 16342f57 ?	shsaxne	r2, r4, r7
 0+12c <[^>]*> e7014312 ?	smlad	r1, r2, r3, r4
 0+130 <[^>]*> d7014312 ?	smladle	r1, r2, r3, r4
 0+134 <[^>]*> e7014332 ?	smladx	r1, r2, r3, r4
@@ -127,8 +127,8 @@ Disassembly of section .text:
 0+1dc <[^>]*> 16142f77 ?	ssub16ne	r2, r4, r7
 0+1e0 <[^>]*> e6142ff7 ?	ssub8	r2, r4, r7
 0+1e4 <[^>]*> 16142ff7 ?	ssub8ne	r2, r4, r7
-0+1e8 <[^>]*> e6142f57 ?	ssubaddx	r2, r4, r7
-0+1ec <[^>]*> 16142f57 ?	ssubaddxne	r2, r4, r7
+0+1e8 <[^>]*> e6142f57 ?	ssax	r2, r4, r7
+0+1ec <[^>]*> 16142f57 ?	ssaxne	r2, r4, r7
 0+1f0 <[^>]*> e1831f92 ?	strex	r1, r2, \[r3\]
 0+1f4 <[^>]*> 11831f92 ?	strexne	r1, r2, \[r3\]
 0+1f8 <[^>]*> e6bf2075 ?	sxth	r2, r5
@@ -159,34 +159,34 @@ Disassembly of section .text:
 0+25c <[^>]*> e6e32475 ?	uxtab	r2, r3, r5, ror #8
 0+260 <[^>]*> 16e32075 ?	uxtabne	r2, r3, r5
 0+264 <[^>]*> 16e32475 ?	uxtabne	r2, r3, r5, ror #8
-0+268 <[^>]*> e6542f37 ?	uaddsubx	r2, r4, r7
-0+26c <[^>]*> 16542f37 ?	uaddsubxne	r2, r4, r7
+0+268 <[^>]*> e6542f37 ?	uasx	r2, r4, r7
+0+26c <[^>]*> 16542f37 ?	uasxne	r2, r4, r7
 0+270 <[^>]*> e6742f17 ?	uhadd16	r2, r4, r7
 0+274 <[^>]*> 16742f17 ?	uhadd16ne	r2, r4, r7
 0+278 <[^>]*> e6742f97 ?	uhadd8	r2, r4, r7
 0+27c <[^>]*> 16742f97 ?	uhadd8ne	r2, r4, r7
-0+280 <[^>]*> e6742f37 ?	uhaddsubx	r2, r4, r7
-0+284 <[^>]*> 16742f37 ?	uhaddsubxne	r2, r4, r7
+0+280 <[^>]*> e6742f37 ?	uhasx	r2, r4, r7
+0+284 <[^>]*> 16742f37 ?	uhasxne	r2, r4, r7
 0+288 <[^>]*> e6742f77 ?	uhsub16	r2, r4, r7
 0+28c <[^>]*> 16742f77 ?	uhsub16ne	r2, r4, r7
 0+290 <[^>]*> e6742ff7 ?	uhsub8	r2, r4, r7
 0+294 <[^>]*> 16742ff7 ?	uhsub8ne	r2, r4, r7
-0+298 <[^>]*> e6742f57 ?	uhsubaddx	r2, r4, r7
-0+29c <[^>]*> 16742f57 ?	uhsubaddxne	r2, r4, r7
+0+298 <[^>]*> e6742f57 ?	uhsax	r2, r4, r7
+0+29c <[^>]*> 16742f57 ?	uhsaxne	r2, r4, r7
 0+2a0 <[^>]*> e0421493 ?	umaal	r1, r2, r3, r4
 0+2a4 <[^>]*> d0421493 ?	umaalle	r1, r2, r3, r4
 0+2a8 <[^>]*> e6642f17 ?	uqadd16	r2, r4, r7
 0+2ac <[^>]*> 16642f17 ?	uqadd16ne	r2, r4, r7
 0+2b0 <[^>]*> e6642f97 ?	uqadd8	r2, r4, r7
 0+2b4 <[^>]*> 16642f97 ?	uqadd8ne	r2, r4, r7
-0+2b8 <[^>]*> e6642f37 ?	uqaddsubx	r2, r4, r7
-0+2bc <[^>]*> 16642f37 ?	uqaddsubxne	r2, r4, r7
+0+2b8 <[^>]*> e6642f37 ?	uqasx	r2, r4, r7
+0+2bc <[^>]*> 16642f37 ?	uqasxne	r2, r4, r7
 0+2c0 <[^>]*> e6642f77 ?	uqsub16	r2, r4, r7
 0+2c4 <[^>]*> 16642f77 ?	uqsub16ne	r2, r4, r7
 0+2c8 <[^>]*> e6642ff7 ?	uqsub8	r2, r4, r7
 0+2cc <[^>]*> 16642ff7 ?	uqsub8ne	r2, r4, r7
-0+2d0 <[^>]*> e6642f57 ?	uqsubaddx	r2, r4, r7
-0+2d4 <[^>]*> 16642f57 ?	uqsubaddxne	r2, r4, r7
+0+2d0 <[^>]*> e6642f57 ?	uqsax	r2, r4, r7
+0+2d4 <[^>]*> 16642f57 ?	uqsaxne	r2, r4, r7
 0+2d8 <[^>]*> e781f312 ?	usad8	r1, r2, r3
 0+2dc <[^>]*> 1781f312 ?	usad8ne	r1, r2, r3
 0+2e0 <[^>]*> e7814312 ?	usada8	r1, r2, r3, r4
@@ -203,8 +203,8 @@ Disassembly of section .text:
 0+30c <[^>]*> 16542f77 ?	usub16ne	r2, r4, r7
 0+310 <[^>]*> e6542ff7 ?	usub8	r2, r4, r7
 0+314 <[^>]*> 16542ff7 ?	usub8ne	r2, r4, r7
-0+318 <[^>]*> e6542f57 ?	usubaddx	r2, r4, r7
-0+31c <[^>]*> 16542f57 ?	usubaddxne	r2, r4, r7
+0+318 <[^>]*> e6542f57 ?	usax	r2, r4, r7
+0+31c <[^>]*> 16542f57 ?	usaxne	r2, r4, r7
 0+320 <[^>]*> e6ff2075 ?	uxth	r2, r5
 0+324 <[^>]*> e6ff2475 ?	uxth	r2, r5, ror #8
 0+328 <[^>]*> 16ff2075 ?	uxthne	r2, r5
diff --git a/gas/testsuite/gas/arm/thumb32.d b/gas/testsuite/gas/arm/thumb32.d
index 95508f2..e2e6286 100644
--- a/gas/testsuite/gas/arm/thumb32.d
+++ b/gas/testsuite/gas/arm/thumb32.d
@@ -698,55 +698,55 @@ Disassembly of section .text:
 0[0-9a-f]+ <[^>]+> fa83 f182 	qadd	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa92 f113 	qadd16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa82 f113 	qadd8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f113 	qaddsubx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f113 	qaddsubx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f113 	qasx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f113 	qasx	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa83 f192 	qdadd	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa83 f1b2 	qdsub	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa83 f1a2 	qsub	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fad2 f113 	qsub16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fac2 f113 	qsub8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f113 	qsubaddx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f113 	qsubaddx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f113 	qsax	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f113 	qsax	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa92 f103 	sadd16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa82 f103 	sadd8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f103 	saddsubx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f103 	saddsubx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f103 	sasx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f103 	sasx	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fad2 f103 	ssub16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fac2 f103 	ssub8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f103 	ssubaddx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f103 	ssubaddx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f103 	ssax	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f103 	ssax	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa92 f123 	shadd16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa82 f123 	shadd8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f123 	shaddsubx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f123 	shaddsubx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f123 	shasx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f123 	shasx	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fad2 f123 	shsub16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fac2 f123 	shsub8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f123 	shsubaddx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f123 	shsubaddx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f123 	shsax	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f123 	shsax	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa92 f143 	uadd16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa82 f143 	uadd8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f143 	uaddsubx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f143 	uaddsubx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f143 	uasx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f143 	uasx	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fad2 f143 	usub16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fac2 f143 	usub8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f143 	usubaddx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f143 	usubaddx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f143 	usax	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f143 	usax	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa92 f163 	uhadd16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa82 f163 	uhadd8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f163 	uhaddsubx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f163 	uhaddsubx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f163 	uhasx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f163 	uhasx	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fad2 f163 	uhsub16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fac2 f163 	uhsub8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f163 	uhsubaddx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f163 	uhsubaddx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f163 	uhsax	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f163 	uhsax	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa92 f153 	uqadd16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fa82 f153 	uqadd8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f153 	uqaddsubx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> faa2 f153 	uqaddsubx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f153 	uqasx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> faa2 f153 	uqasx	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fad2 f153 	uqsub16	r1, r2, r3
 0[0-9a-f]+ <[^>]+> fac2 f153 	uqsub8	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f153 	uqsubaddx	r1, r2, r3
-0[0-9a-f]+ <[^>]+> fae2 f153 	uqsubaddx	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f153 	uqsax	r1, r2, r3
+0[0-9a-f]+ <[^>]+> fae2 f153 	uqsax	r1, r2, r3
 0[0-9a-f]+ <[^>]+> faa2 f183 	sel	r1, r2, r3
 0[0-9a-f]+ <[^>]+> ba00      	rev	r0, r0
 0[0-9a-f]+ <[^>]+> fa90 f080 	rev\.w	r0, r0
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index f275fba..5ba52c8 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2010-02-24  Nick Clifton  <nickc@redhat.com>
+
+	PR binutils/6773
+	* arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
+	<prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
+	(thumb32_opcodes): Likewise.
+
 2010-02-15  Nick Clifton  <nickc@redhat.com>
 
 	* po/vi.po: Updated Vietnamese translation.
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index fba3e3b..1d53128 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -1,6 +1,6 @@
 /* Instruction printing code for the ARM
    Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
-   2004, 2005, 2006, 2007, 2008, 2009  Free Software Foundation, Inc.
+   2004, 2005, 2006, 2007, 2008, 2009, 2010  Free Software Foundation, Inc.
    Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
    Modification by James G. Smith (jsmith@cygnus.co.uk)
 
@@ -881,40 +881,40 @@ static const struct opcode32 arm_opcodes[] =
   {ARM_EXT_V6, 0x01900f9f, 0x0ff00fff, "ldrex%c\tr%12-15d, [%16-19R]"},
   {ARM_EXT_V6, 0x06200f10, 0x0ff00ff0, "qadd16%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06200f90, 0x0ff00ff0, "qadd8%c\t%12-15R, %16-19R, %0-3R"},
-  {ARM_EXT_V6, 0x06200f30, 0x0ff00ff0, "qaddsubx%c\t%12-15R, %16-19R, %0-3R"},
+  {ARM_EXT_V6, 0x06200f30, 0x0ff00ff0, "qasx%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06200f70, 0x0ff00ff0, "qsub16%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06200ff0, 0x0ff00ff0, "qsub8%c\t%12-15R, %16-19R, %0-3R"},
-  {ARM_EXT_V6, 0x06200f50, 0x0ff00ff0, "qsubaddx%c\t%12-15R, %16-19R, %0-3R"},
+  {ARM_EXT_V6, 0x06200f50, 0x0ff00ff0, "qsax%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06100f10, 0x0ff00ff0, "sadd16%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06100f90, 0x0ff00ff0, "sadd8%c\t%12-15R, %16-19R, %0-3R"},
-  {ARM_EXT_V6, 0x06100f30, 0x0ff00ff0, "saddaddx%c\t%12-15R, %16-19R, %0-3R"},
+  {ARM_EXT_V6, 0x06100f30, 0x0ff00ff0, "sasx%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06300f10, 0x0ff00ff0, "shadd16%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06300f90, 0x0ff00ff0, "shadd8%c\t%12-15R, %16-19R, %0-3R"},
-  {ARM_EXT_V6, 0x06300f30, 0x0ff00ff0, "shaddsubx%c\t%12-15R, %16-19R, %0-3R"},
+  {ARM_EXT_V6, 0x06300f30, 0x0ff00ff0, "shasx%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06300f70, 0x0ff00ff0, "shsub16%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06300ff0, 0x0ff00ff0, "shsub8%c\t%12-15R, %16-19R, %0-3R"},
-  {ARM_EXT_V6, 0x06300f50, 0x0ff00ff0, "shsubaddx%c\t%12-15R, %16-19R, %0-3R"},
+  {ARM_EXT_V6, 0x06300f50, 0x0ff00ff0, "shsax%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06100f70, 0x0ff00ff0, "ssub16%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06100ff0, 0x0ff00ff0, "ssub8%c\t%12-15R, %16-19R, %0-3R"},
-  {ARM_EXT_V6, 0x06100f50, 0x0ff00ff0, "ssubaddx%c\t%12-15R, %16-19R, %0-3R"},
+  {ARM_EXT_V6, 0x06100f50, 0x0ff00ff0, "ssax%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06500f10, 0x0ff00ff0, "uadd16%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06500f90, 0x0ff00ff0, "uadd8%c\t%12-15R, %16-19R, %0-3R"},
-  {ARM_EXT_V6, 0x06500f30, 0x0ff00ff0, "uaddsubx%c\t%12-15R, %16-19R, %0-3R"},
+  {ARM_EXT_V6, 0x06500f30, 0x0ff00ff0, "uasx%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06700f10, 0x0ff00ff0, "uhadd16%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06700f90, 0x0ff00ff0, "uhadd8%c\t%12-15R, %16-19R, %0-3R"},
-  {ARM_EXT_V6, 0x06700f30, 0x0ff00ff0, "uhaddsubx%c\t%12-15R, %16-19R, %0-3R"},
+  {ARM_EXT_V6, 0x06700f30, 0x0ff00ff0, "uhasx%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06700f70, 0x0ff00ff0, "uhsub16%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06700ff0, 0x0ff00ff0, "uhsub8%c\t%12-15R, %16-19R, %0-3R"},
-  {ARM_EXT_V6, 0x06700f50, 0x0ff00ff0, "uhsubaddx%c\t%12-15R, %16-19R, %0-3R"},
+  {ARM_EXT_V6, 0x06700f50, 0x0ff00ff0, "uhsax%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06600f10, 0x0ff00ff0, "uqadd16%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06600f90, 0x0ff00ff0, "uqadd8%c\t%12-15R, %16-19R, %0-3R"},
-  {ARM_EXT_V6, 0x06600f30, 0x0ff00ff0, "uqaddsubx%c\t%12-15R, %16-19R, %0-3R"},
+  {ARM_EXT_V6, 0x06600f30, 0x0ff00ff0, "uqasx%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06600f70, 0x0ff00ff0, "uqsub16%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06600ff0, 0x0ff00ff0, "uqsub8%c\t%12-15R, %16-19R, %0-3R"},
-  {ARM_EXT_V6, 0x06600f50, 0x0ff00ff0, "uqsubaddx%c\t%12-15R, %16-19R, %0-3R"},
+  {ARM_EXT_V6, 0x06600f50, 0x0ff00ff0, "uqsax%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06500f70, 0x0ff00ff0, "usub16%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06500ff0, 0x0ff00ff0, "usub8%c\t%12-15R, %16-19R, %0-3R"},
-  {ARM_EXT_V6, 0x06500f50, 0x0ff00ff0, "usubaddx%c\t%12-15R, %16-19R, %0-3R"},
+  {ARM_EXT_V6, 0x06500f50, 0x0ff00ff0, "usax%c\t%12-15R, %16-19R, %0-3R"},
   {ARM_EXT_V6, 0x06bf0f30, 0x0fff0ff0, "rev%c\t%12-15R, %0-3R"},
   {ARM_EXT_V6, 0x06bf0fb0, 0x0fff0ff0, "rev16%c\t%12-15R, %0-3R"},
   {ARM_EXT_V6, 0x06ff0fb0, 0x0fff0ff0, "revsh%c\t%12-15R, %0-3R"},
@@ -1404,12 +1404,12 @@ static const struct opcode32 thumb32_opcodes[] =
   {ARM_EXT_V6T2, 0xfa90f090, 0xfff0f0f0, "rev16%c.w\t%8-11r, %16-19r"},
   {ARM_EXT_V6T2, 0xfa90f0a0, 0xfff0f0f0, "rbit%c\t%8-11r, %16-19r"},
   {ARM_EXT_V6T2, 0xfa90f0b0, 0xfff0f0f0, "revsh%c.w\t%8-11r, %16-19r"},
-  {ARM_EXT_V6T2, 0xfaa0f000, 0xfff0f0f0, "saddsubx%c\t%8-11r, %16-19r, %0-3r"},
-  {ARM_EXT_V6T2, 0xfaa0f010, 0xfff0f0f0, "qaddsubx%c\t%8-11r, %16-19r, %0-3r"},
-  {ARM_EXT_V6T2, 0xfaa0f020, 0xfff0f0f0, "shaddsubx%c\t%8-11r, %16-19r, %0-3r"},
-  {ARM_EXT_V6T2, 0xfaa0f040, 0xfff0f0f0, "uaddsubx%c\t%8-11r, %16-19r, %0-3r"},
-  {ARM_EXT_V6T2, 0xfaa0f050, 0xfff0f0f0, "uqaddsubx%c\t%8-11r, %16-19r, %0-3r"},
-  {ARM_EXT_V6T2, 0xfaa0f060, 0xfff0f0f0, "uhaddsubx%c\t%8-11r, %16-19r, %0-3r"},
+  {ARM_EXT_V6T2, 0xfaa0f000, 0xfff0f0f0, "sasx%c\t%8-11r, %16-19r, %0-3r"},
+  {ARM_EXT_V6T2, 0xfaa0f010, 0xfff0f0f0, "qasx%c\t%8-11r, %16-19r, %0-3r"},
+  {ARM_EXT_V6T2, 0xfaa0f020, 0xfff0f0f0, "shasx%c\t%8-11r, %16-19r, %0-3r"},
+  {ARM_EXT_V6T2, 0xfaa0f040, 0xfff0f0f0, "uasx%c\t%8-11r, %16-19r, %0-3r"},
+  {ARM_EXT_V6T2, 0xfaa0f050, 0xfff0f0f0, "uqasx%c\t%8-11r, %16-19r, %0-3r"},
+  {ARM_EXT_V6T2, 0xfaa0f060, 0xfff0f0f0, "uhasx%c\t%8-11r, %16-19r, %0-3r"},
   {ARM_EXT_V6T2, 0xfaa0f080, 0xfff0f0f0, "sel%c\t%8-11r, %16-19r, %0-3r"},
   {ARM_EXT_V6T2, 0xfab0f080, 0xfff0f0f0, "clz%c\t%8-11r, %16-19r"},
   {ARM_EXT_V6T2, 0xfac0f000, 0xfff0f0f0, "ssub8%c\t%8-11r, %16-19r, %0-3r"},
@@ -1424,12 +1424,12 @@ static const struct opcode32 thumb32_opcodes[] =
   {ARM_EXT_V6T2, 0xfad0f040, 0xfff0f0f0, "usub16%c\t%8-11r, %16-19r, %0-3r"},
   {ARM_EXT_V6T2, 0xfad0f050, 0xfff0f0f0, "uqsub16%c\t%8-11r, %16-19r, %0-3r"},
   {ARM_EXT_V6T2, 0xfad0f060, 0xfff0f0f0, "uhsub16%c\t%8-11r, %16-19r, %0-3r"},
-  {ARM_EXT_V6T2, 0xfae0f000, 0xfff0f0f0, "ssubaddx%c\t%8-11r, %16-19r, %0-3r"},
-  {ARM_EXT_V6T2, 0xfae0f010, 0xfff0f0f0, "qsubaddx%c\t%8-11r, %16-19r, %0-3r"},
-  {ARM_EXT_V6T2, 0xfae0f020, 0xfff0f0f0, "shsubaddx%c\t%8-11r, %16-19r, %0-3r"},
-  {ARM_EXT_V6T2, 0xfae0f040, 0xfff0f0f0, "usubaddx%c\t%8-11r, %16-19r, %0-3r"},
-  {ARM_EXT_V6T2, 0xfae0f050, 0xfff0f0f0, "uqsubaddx%c\t%8-11r, %16-19r, %0-3r"},
-  {ARM_EXT_V6T2, 0xfae0f060, 0xfff0f0f0, "uhsubaddx%c\t%8-11r, %16-19r, %0-3r"},
+  {ARM_EXT_V6T2, 0xfae0f000, 0xfff0f0f0, "ssax%c\t%8-11r, %16-19r, %0-3r"},
+  {ARM_EXT_V6T2, 0xfae0f010, 0xfff0f0f0, "qsax%c\t%8-11r, %16-19r, %0-3r"},
+  {ARM_EXT_V6T2, 0xfae0f020, 0xfff0f0f0, "shsax%c\t%8-11r, %16-19r, %0-3r"},
+  {ARM_EXT_V6T2, 0xfae0f040, 0xfff0f0f0, "usax%c\t%8-11r, %16-19r, %0-3r"},
+  {ARM_EXT_V6T2, 0xfae0f050, 0xfff0f0f0, "uqsax%c\t%8-11r, %16-19r, %0-3r"},
+  {ARM_EXT_V6T2, 0xfae0f060, 0xfff0f0f0, "uhsax%c\t%8-11r, %16-19r, %0-3r"},
   {ARM_EXT_V6T2, 0xfb00f000, 0xfff0f0f0, "mul%c.w\t%8-11r, %16-19r, %0-3r"},
   {ARM_EXT_V6T2, 0xfb70f000, 0xfff0f0f0, "usad8%c\t%8-11r, %16-19r, %0-3r"},
   {ARM_EXT_V6T2, 0xfa00f000, 0xffe0f0f0, "lsl%20's%c.w\t%8-11R, %16-19R, %0-3R"},