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author | Jim Blandy <jimb@codesourcery.com> | 2004-06-07 15:38:52 +0000 |
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committer | Jim Blandy <jimb@codesourcery.com> | 2004-06-07 15:38:52 +0000 |
commit | 83ecb59f2d30383338dd70b3913485233a79b17d (patch) | |
tree | ba6df57a599c357e3004a46e246db3e2b069a744 | |
parent | 822392cef5840fa439b88ca930573f356ef0cdab (diff) | |
download | gdb-83ecb59f2d30383338dd70b3913485233a79b17d.zip gdb-83ecb59f2d30383338dd70b3913485233a79b17d.tar.gz gdb-83ecb59f2d30383338dd70b3913485233a79b17d.tar.bz2 |
* gdb.arch/i386-sse.exp, gdb.arch/i386-sse.c: New tests.
* gdb.arch/i386-cpuid.h: New helper file.
-rw-r--r-- | gdb/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gdb/testsuite/gdb.arch/i386-cpuid.h | 77 | ||||
-rw-r--r-- | gdb/testsuite/gdb.arch/i386-sse.c | 90 | ||||
-rw-r--r-- | gdb/testsuite/gdb.arch/i386-sse.exp | 91 |
4 files changed, 263 insertions, 0 deletions
diff --git a/gdb/testsuite/ChangeLog b/gdb/testsuite/ChangeLog index 20f5d54..5f709a8 100644 --- a/gdb/testsuite/ChangeLog +++ b/gdb/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2004-06-07 Jim Blandy <jimb@redhat.com> + + * gdb.arch/i386-sse.exp, gdb.arch/i386-sse.c: New tests. + * gdb.arch/i386-cpuid.h: New helper file. + 2004-06-07 Randolph Chung <tausq@debian.org> * gdb.base/shlib-call.exp: Allow breakpoint to be added after inferior diff --git a/gdb/testsuite/gdb.arch/i386-cpuid.h b/gdb/testsuite/gdb.arch/i386-cpuid.h new file mode 100644 index 0000000..067b22f --- /dev/null +++ b/gdb/testsuite/gdb.arch/i386-cpuid.h @@ -0,0 +1,77 @@ +/* Helper file for i386 platform. Runtime check for MMX/SSE/SSE2 support. + + Copyright 2004 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +/* Used by 20020523-2.c and i386-sse-6.c, and possibly others. */ +/* Plagarized from 20020523-2.c. */ +/* Plagarized from gcc. */ + +#define bit_CMOV (1 << 15) +#define bit_MMX (1 << 23) +#define bit_SSE (1 << 25) +#define bit_SSE2 (1 << 26) + +#ifndef NOINLINE +#define NOINLINE __attribute__ ((noinline)) +#endif + +unsigned int i386_cpuid (void) NOINLINE; + +unsigned int NOINLINE +i386_cpuid (void) +{ + int fl1, fl2; + +#ifndef __x86_64__ + /* See if we can use cpuid. On AMD64 we always can. */ + __asm__ ("pushfl; pushfl; popl %0; movl %0,%1; xorl %2,%0;" + "pushl %0; popfl; pushfl; popl %0; popfl" + : "=&r" (fl1), "=&r" (fl2) + : "i" (0x00200000)); + if (((fl1 ^ fl2) & 0x00200000) == 0) + return (0); +#endif + + /* Host supports cpuid. See if cpuid gives capabilities, try + CPUID(0). Preserve %ebx and %ecx; cpuid insn clobbers these, we + don't need their CPUID values here, and %ebx may be the PIC + register. */ +#ifdef __x86_64__ + __asm__ ("pushq %%rcx; pushq %%rbx; cpuid; popq %%rbx; popq %%rcx" + : "=a" (fl1) : "0" (0) : "rdx", "cc"); +#else + __asm__ ("pushl %%ecx; pushl %%ebx; cpuid; popl %%ebx; popl %%ecx" + : "=a" (fl1) : "0" (0) : "edx", "cc"); +#endif + if (fl1 == 0) + return (0); + + /* Invoke CPUID(1), return %edx; caller can examine bits to + determine what's supported. */ +#ifdef __x86_64__ + __asm__ ("pushq %%rcx; pushq %%rbx; cpuid; popq %%rbx; popq %%rcx" + : "=d" (fl2), "=a" (fl1) : "1" (1) : "cc"); +#else + __asm__ ("pushl %%ecx; pushl %%ebx; cpuid; popl %%ebx; popl %%ecx" + : "=d" (fl2), "=a" (fl1) : "1" (1) : "cc"); +#endif + + return fl2; +} diff --git a/gdb/testsuite/gdb.arch/i386-sse.c b/gdb/testsuite/gdb.arch/i386-sse.c new file mode 100644 index 0000000..496721c --- /dev/null +++ b/gdb/testsuite/gdb.arch/i386-sse.c @@ -0,0 +1,90 @@ +/* Test program for SSE registers. + + Copyright 2004 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +#include <stdio.h> +#include "i386-cpuid.h" + +typedef struct { + float f[4]; +} v4sf_t; + + +v4sf_t data[8] = + { + { { 0.0, 0.25, 0.50, 0.75 } }, + { { 1.0, 1.25, 1.50, 1.75 } }, + { { 2.0, 2.25, 2.50, 2.75 } }, + { { 3.0, 3.25, 3.50, 3.75 } }, + { { 4.0, 4.25, 4.50, 4.75 } }, + { { 5.0, 5.25, 5.50, 5.75 } }, + { { 6.0, 6.25, 6.50, 6.75 } }, + { { 7.0, 7.25, 7.50, 7.75 } }, + }; + + +int +have_sse (void) +{ + int edx = i386_cpuid (); + + if (edx & bit_SSE) + return 1; + else + return 0; +} + +int +main (int argc, char **argv) +{ + if (have_sse ()) + { + asm ("movaps 0(%0), %%xmm0\n\t" + "movaps 16(%0), %%xmm1\n\t" + "movaps 32(%0), %%xmm2\n\t" + "movaps 48(%0), %%xmm3\n\t" + "movaps 64(%0), %%xmm4\n\t" + "movaps 80(%0), %%xmm5\n\t" + "movaps 96(%0), %%xmm6\n\t" + "movaps 112(%0), %%xmm7\n\t" + : /* no output operands */ + : "r" (data) + : "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7"); + + puts ("Hi!"); /* first breakpoint here */ + + asm ( + "movaps %%xmm0, 0(%0)\n\t" + "movaps %%xmm1, 16(%0)\n\t" + "movaps %%xmm2, 32(%0)\n\t" + "movaps %%xmm3, 48(%0)\n\t" + "movaps %%xmm4, 64(%0)\n\t" + "movaps %%xmm5, 80(%0)\n\t" + "movaps %%xmm6, 96(%0)\n\t" + "movaps %%xmm7, 112(%0)\n\t" + : /* no output operands */ + : "r" (data) + : "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7"); + + puts ("Bye!"); /* second breakpoint here */ + } + + return 0; +} diff --git a/gdb/testsuite/gdb.arch/i386-sse.exp b/gdb/testsuite/gdb.arch/i386-sse.exp new file mode 100644 index 0000000..5240e10 --- /dev/null +++ b/gdb/testsuite/gdb.arch/i386-sse.exp @@ -0,0 +1,91 @@ +# Copyright 2004 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +# Please email any bugs, comments, and/or additions to this file to: +# bug-gdb@gnu.org + +# This file is part of the gdb testsuite. + +if $tracelevel { + strace $tracelevel +} + +set prms_id 0 +set bug_id 0 + +if ![istarget "i?86-*-*"] then { + verbose "Skipping i386 SSE tests." + return +} + +set testfile "i386-sse" +set srcfile ${testfile}.c +set binfile ${objdir}/${subdir}/${testfile} +if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable {debug}] != "" } { + gdb_suppress_entire_file "Testcase compile failed, so all tests in this file will automatically fail." +} + +gdb_exit +gdb_start +gdb_reinitialize_dir $srcdir/$subdir +gdb_load ${binfile} + +if ![runto_main] then { + gdb_suppress_tests +} + +send_gdb "print have_sse ()\r" +gdb_expect { + -re ".. = 1\r\n$gdb_prompt " { + pass "check whether processor supports SSE" + } + -re ".. = 0\r\n$gdb_prompt " { + verbose "processor does not support SSE; skipping SSE tests" + return + } + -re ".*$gdb_prompt $" { + fail "check whether processor supports SSE" + } + timeout { + fail "check whether processor supports SSE (timeout)" + } +} + +gdb_test "break [gdb_get_line_number "first breakpoint here"]" \ + "Breakpoint .* at .*i386-sse.c.*" \ + "set breakpoint in main" +gdb_continue_to_breakpoint "continue to first breakpoint in main" + +foreach r {0 1 2 3 4 5 6 7} { + gdb_test "print \$xmm$r.v4_float" \ + ".. = {$r, $r.25, $r.5, $r.75}.*" \ + "check contents of %xmm$r" +} + +foreach r {0 1 2 3 4 5 6 7} { + gdb_test "set var \$xmm$r.v4_float\[0\] = $r + 10" "" "set %xmm$r" +} + +gdb_test "break [gdb_get_line_number "second breakpoint here"]" \ + "Breakpoint .* at .*i386-sse.c.*" \ + "set breakpoint in main" +gdb_continue_to_breakpoint "continue to second breakpoint in main" + +foreach r {0 1 2 3 4 5 6 7} { + gdb_test "print data\[$r\]" \ + ".. = {f = {[expr $r + 10], $r.25, $r.5, $r.75}}.*" \ + "check contents of data\[$r\]" +} |