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authorDavid Edelsohn <dje.gcc@gmail.com>1996-01-22 16:25:54 +0000
committerDavid Edelsohn <dje.gcc@gmail.com>1996-01-22 16:25:54 +0000
commit224721792f6cac651d73d8f42a2068390cbe01bf (patch)
treeb7d1526ebb84e5ba3c42c1a8637c2a7a99c8524f
parent4d99a9505ce20214f02eae77570caab77a6ef339 (diff)
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* sparc.h (enum sparc_architecture): Add v9a.
-rw-r--r--include/opcode/ChangeLog4
-rw-r--r--include/opcode/sparc.h15
2 files changed, 15 insertions, 4 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 379e57c..92369cd 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
+
+ * sparc.h (enum sparc_architecture): Add v9a.
+
Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
* i386.h: Added Pentium Pro instructions.
diff --git a/include/opcode/sparc.h b/include/opcode/sparc.h
index 2ccdb43..15c3bd3 100644
--- a/include/opcode/sparc.h
+++ b/include/opcode/sparc.h
@@ -1,5 +1,5 @@
/* Definitions for opcode table for the sparc.
- Copyright 1989, 1991, 1992, 1995 Free Software Foundation, Inc.
+ Copyright (C) 1989, 1991, 1992, 1995, 1996 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and
the GNU Binutils.
@@ -35,21 +35,23 @@ Boston, MA 02111-1307, USA. */
/*
* Structure of an opcode table entry.
* This enumerator must parallel the architecture_pname array
- * in bfd/opc-sparc.c.
+ * in opcodes/sparc-opc.c.
*/
enum sparc_architecture {
v6 = 0,
v7,
v8,
sparclite,
- v9
+ v9,
+ v9a /* v9 with ultrasparc additions */
};
extern const char *architecture_pname[];
/* Sparclite and v9 are both supersets of v8; we can't bump between them. */
-#define ARCHITECTURES_CONFLICT_P(ARCH1, ARCH2) ((ARCH1) == sparclite && (ARCH2) == v9)
+#define ARCHITECTURES_CONFLICT_P(ARCH1, ARCH2) \
+((ARCH1) == sparclite && ((ARCH2) == v9 || (ARCH2) == v9vis))
struct sparc_opcode {
const char *name;
@@ -163,6 +165,7 @@ The following chars are unused: (note: ,[] are used as punctuation)
#define RD(x) (((x)&0x1f) << 25) /* destination register field */
#define RS1(x) (((x)&0x1f) << 14) /* rs1 field */
#define ASI_RS2(x) (SIMM13(x))
+#define MEMBAR(x) ((x)&0x7f)
#define ANNUL (1<<29)
#define BPRED (1<<19) /* v9 */
@@ -178,6 +181,10 @@ extern const int bfd_sparc_num_opcodes;
int sparc_encode_asi ();
char *sparc_decode_asi ();
+int sparc_encode_membar ();
+char *sparc_decode_membar ();
+int sparc_encode_prefetch ();
+char *sparc_decode_prefetch ();
/*
* Local Variables: