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author | Andrew Cagney <cagney@redhat.com> | 1998-02-02 14:06:52 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1998-02-02 14:06:52 +0000 |
commit | a97f304b04e1c9300611c2f712d76ebabd7e791a (patch) | |
tree | db0a02ff5c25e10ddbd0705a002d2945019276b3 | |
parent | 2acd126a477a02ad1674d4407ca5daad0643757a (diff) | |
download | gdb-a97f304b04e1c9300611c2f712d76ebabd7e791a.zip gdb-a97f304b04e1c9300611c2f712d76ebabd7e791a.tar.gz gdb-a97f304b04e1c9300611c2f712d76ebabd7e791a.tar.bz2 |
Add support for configuring the size of the floating point unit (fp_word).
For mips, move fp_registers into a separate array of type fp_word[].
-rw-r--r-- | sim/common/ChangeLog | 12 | ||||
-rw-r--r-- | sim/mips/ChangeLog | 21 | ||||
-rwxr-xr-x | sim/mips/configure | 33 | ||||
-rw-r--r-- | sim/mips/interp.c | 46 | ||||
-rw-r--r-- | sim/tic80/ChangeLog | 4 |
5 files changed, 97 insertions, 19 deletions
diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog index 4d9e270..eb00325 100644 --- a/sim/common/ChangeLog +++ b/sim/common/ChangeLog @@ -1,3 +1,15 @@ +Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> + + * configure: Regenerated to track ../common/aclocal.m4 changes. + +Sun Feb 1 16:16:57 1998 Andrew Cagney <cagney@b1.cygnus.com> + + * sim-types.h (fp_word): New type, define according to + WITH_TARGET_FLOATING_POINT_BITSIZE. + + * aclocal.m4 (default_sim_floating_point_bitsize): Add + configuration of size of floating point registers. + Sun Feb 1 14:02:31 1998 Andrew Cagney <cagney@b1.cygnus.com> * sim-profile.c (profile_print): Only print CPU <N> if other diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index a1dee76..ba1ba1a 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,24 @@ +Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com> + + * sim-main.h (SizeFGR): Determine from floating-point and not gpr + bitsize. + + * interp.c (sim_fetch_register, sim_store_register): Read/write + FGR from correct location. + (sim_open): Set size of FGR's according to + WITH_TARGET_FLOATING_POINT_BITSIZE. + + * sim-main.h (FGR): Store floating point registers in a separate + array. + +Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> + + * configure: Regenerated to track ../common/aclocal.m4 changes. + +start-sanitize-vr5400 + * mdmx.igen: Mark all instructions as 64bit/fp specific. + +end-sanitize-vr5400 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com> * interp.c (ColdReset): Call PENDING_INVALIDATE. diff --git a/sim/mips/configure b/sim/mips/configure index 0eca742..80b7918 100755 --- a/sim/mips/configure +++ b/sim/mips/configure @@ -1806,20 +1806,31 @@ case "${target}" in *) mips_fpu=HARD_FLOATING_POINT ;; esac -default_sim_floating_point="$mips_fpu" +default_sim_float="$mips_fpu" +default_sim_float_bitsize="" # Check whether --enable-sim-float or --disable-sim-float was given. if test "${enable_sim_float+set}" = set; then enableval="$enable_sim_float" case "${enableval}" in yes | hard) sim_float="-DWITH_FLOATING_POINT=HARD_FLOATING_POINT";; no | soft) sim_float="-DWITH_FLOATING_POINT=SOFT_FLOATING_POINT";; + 32) sim_float="-DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=32";; + 64) sim_float="-DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=64";; *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-float"" 1>&2; exit 1; }; sim_float="";; esac if test x"$silent" != x"yes" && test x"$sim_float" != x""; then echo "Setting float flags = $sim_float" 6>&1 fi else - sim_float="-DWITH_FLOATING_POINT=${default_sim_floating_point}" + +sim_float= +if test x"${default_sim_float}" != x""; then + sim_float="-DWITH_FLOATING_POINT=${default_sim_float}" +fi +if test x"${default_sim_float_bitsize}" != x""; then + sim_float="$sim_float -DWITH_TARGET_FLOATING_POINT_BITSIZE=${default_sim_float_bitsize}" +fi + fi @@ -1931,17 +1942,17 @@ for ac_hdr in string.h strings.h stdlib.h stdlib.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:1935: checking for $ac_hdr" >&5 +echo "configure:1946: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1940 "configure" +#line 1951 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:1945: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:1956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out` if test -z "$ac_err"; then rm -rf conftest* @@ -1968,7 +1979,7 @@ fi done echo $ac_n "checking for fabs in -lm""... $ac_c" 1>&6 -echo "configure:1972: checking for fabs in -lm" >&5 +echo "configure:1983: checking for fabs in -lm" >&5 ac_lib_var=`echo m'_'fabs | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -1976,7 +1987,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lm $LIBS" cat > conftest.$ac_ext <<EOF -#line 1980 "configure" +#line 1991 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -1987,7 +1998,7 @@ int main() { fabs() ; return 0; } EOF -if { (eval echo configure:1991: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then +if { (eval echo configure:2002: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -2017,12 +2028,12 @@ fi for ac_func in aint anint sqrt do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:2021: checking for $ac_func" >&5 +echo "configure:2032: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 2026 "configure" +#line 2037 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -2045,7 +2056,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:2049: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then +if { (eval echo configure:2060: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else diff --git a/sim/mips/interp.c b/sim/mips/interp.c index 095be78..6de127a 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -339,6 +339,21 @@ sim_open (kind, cb, abfd, argv) registers: */ { int rn; +<<<<<<< interp.c + for (rn = 0; (rn < (LAST_EMBED_REGNUM + 1)); rn++) + { + if (rn < 32) + cpu->register_widths[rn] = WITH_TARGET_WORD_BITSIZE; + else if ((rn >= FGRIDX) && (rn < (FGRIDX + NR_FGR))) + cpu->register_widths[rn] = WITH_TARGET_FLOATING_POINT_BITSIZE; + else if ((rn >= 33) && (rn <= 37)) + cpu->register_widths[rn] = WITH_TARGET_WORD_BITSIZE; + else if ((rn == SRIDX) || (rn == FCR0IDX) || (rn == FCR31IDX) || ((rn >= 72) && (rn <= 89))) + cpu->register_widths[rn] = 32; + else + cpu->register_widths[rn] = 0; + } +======= for (rn = 0; (rn < (LAST_EMBED_REGNUM + 1)); rn++) { if (rn < 32) cpu->register_widths[rn] = WITH_TARGET_WORD_BITSIZE; @@ -351,6 +366,7 @@ sim_open (kind, cb, abfd, argv) else cpu->register_widths[rn] = 0; } +>>>>>>> 1.94 /* start-sanitize-r5900 */ /* set the 5900 "upper" registers to 64 bits */ @@ -551,14 +567,21 @@ sim_store_register (sd,rn,memory) sim_io_eprintf(sd,"Invalid register width for %d (register store ignored)\n",rn); /* start-sanitize-r5900 */ else if (rn == REGISTER_SA) - SA = T2H_8(*(uword64*)memory); + SA = T2H_8(*(unsigned64*)memory); else if (rn > LAST_EMBED_REGNUM) - cpu->registers1[rn - LAST_EMBED_REGNUM - 1] = T2H_8(*(uword64*)memory); + cpu->registers1[rn - LAST_EMBED_REGNUM - 1] = T2H_8(*(unsigned64*)memory); /* end-sanitize-r5900 */ + else if (rn >= FGRIDX && rn < FGRIDX + NR_FGR) + { + if (cpu->register_widths[rn] == 32) + cpu->fgr[rn - FGRIDX] = T2H_4 (*(unsigned32*)memory); + else + cpu->fgr[rn - FGRIDX] = T2H_8 (*(unsigned64*)memory); + } else if (cpu->register_widths[rn] == 32) - cpu->registers[rn] = T2H_4 (*(unsigned int*)memory); + cpu->registers[rn] = T2H_4 (*(unsigned32*)memory); else - cpu->registers[rn] = T2H_8 (*(uword64*)memory); + cpu->registers[rn] = T2H_8 (*(unsigned64*)memory); return; } @@ -580,14 +603,21 @@ sim_fetch_register (sd,rn,memory) sim_io_eprintf(sd,"Invalid register width for %d (register fetch ignored)\n",rn); /* start-sanitize-r5900 */ else if (rn == REGISTER_SA) - *((uword64 *)memory) = H2T_8(SA); + *((unsigned64*)memory) = H2T_8(SA); else if (rn > LAST_EMBED_REGNUM) - *((uword64 *)memory) = H2T_8(cpu->registers1[rn - LAST_EMBED_REGNUM - 1]); + *((unsigned64*)memory) = H2T_8(cpu->registers1[rn - LAST_EMBED_REGNUM - 1]); /* end-sanitize-r5900 */ + else if (rn >= FGRIDX && rn < FGRIDX + NR_FGR) + { + if (cpu->register_widths[rn] == 32) + *(unsigned32*)memory = H2T_4 (cpu->fgr[rn - FGRIDX]); + else + *(unsigned64*)memory = H2T_8 (cpu->fgr[rn - FGRIDX]); + } else if (cpu->register_widths[rn] == 32) - *((unsigned int *)memory) = H2T_4 ((unsigned int)(cpu->registers[rn] & 0xFFFFFFFF)); + *(unsigned32*)memory = H2T_4 ((unsigned32)(cpu->registers[rn])); else /* 64bit register */ - *((uword64 *)memory) = H2T_8 (cpu->registers[rn]); + *(unsigned64*)memory = H2T_8 ((unsigned64)(cpu->registers[rn])); return; } diff --git a/sim/tic80/ChangeLog b/sim/tic80/ChangeLog index 3c825d4..a89dd25 100644 --- a/sim/tic80/ChangeLog +++ b/sim/tic80/ChangeLog @@ -1,3 +1,7 @@ +Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> + + * configure: Regenerated to track ../common/aclocal.m4 changes. + Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> * configure: Regenerated to track ../common/aclocal.m4 changes. |