diff options
| author | H.J. Lu <hjl.tools@gmail.com> | 2012-09-04 13:52:06 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2012-09-04 13:52:06 +0000 |
| commit | b3e14edafcdc558d724452ee5b803ff096c32d0f (patch) | |
| tree | 44a3814f838c0bdf05c27616bfc7828962d33eb9 | |
| parent | c6d8cab4ac5c906937dcd4f884e65fb4d1052381 (diff) | |
| download | gdb-b3e14edafcdc558d724452ee5b803ff096c32d0f.zip gdb-b3e14edafcdc558d724452ee5b803ff096c32d0f.tar.gz gdb-b3e14edafcdc558d724452ee5b803ff096c32d0f.tar.bz2 | |
Add Intel Itanium Series 9500 support
bfd/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* cpu-ia64-opc.c (ins_cnt6a): New function.
(ext_cnt6a): Ditto.
(ins_strd5b): Ditto.
(ext_strd5b): Ditto.
(elf64_ia64_operands): Add new operand types.
gas/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* config/tc-ia64.c (reg_symbol): Add a new register.
(indirect_reg): Ditto.
(pseudo_func): Add new symbolic constants.
(operand_match): Add new operand types recognition.
(operand_insn): Add new register recognition.
(md_begin): Add new register definition.
(specify_resource): Add new register recognition.
gas/testsuite/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* gas/testsuite/gas/ia64/psn.d: New file.
* gas/testsuite/gas/ia64/psn.s: New file.
* gas/testsuite/gas/ia64/ia64.exp: Add new testcase.
* gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests.
* gas/testsuite/gas/ia64/opc-m.d: Ditto.
include/opcode/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64.h (ia64_opnd): Add new operand types.
opcodes/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64-asmtab.h (completer_index): Extend bitfield to full uint.
* ia64-gen.c: Promote completer index type to longlong.
(irf_operand): Add new register recognition.
(in_iclass_mov_x): Add an entry for the new mov_* instruction type.
(lookup_specifier): Add new resource recognition.
(insert_bit_table_ent): Relax abort condition according to the
changed completer index type.
(print_dis_table): Fix printf format for completer index.
* ia64-ic.tbl: Add a new instruction class.
* ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
* ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
* ia64-opc.h: Define short names for new operand types.
* ia64-raw.tbl: Add new RAW resource for DAHR register.
* ia64-waw.tbl: Add new WAW resource for DAHR register.
* ia64-asmtab.c: Regenerate.
| -rw-r--r-- | bfd/ChangeLog | 8 | ||||
| -rw-r--r-- | bfd/cpu-ia64-opc.c | 54 | ||||
| -rw-r--r-- | gas/ChangeLog | 10 | ||||
| -rw-r--r-- | gas/config/tc-ia64.c | 78 | ||||
| -rw-r--r-- | gas/testsuite/ChangeLog | 8 | ||||
| -rw-r--r-- | gas/testsuite/gas/ia64/ia64.exp | 1 | ||||
| -rw-r--r-- | gas/testsuite/gas/ia64/opc-i.d | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/ia64/opc-m.d | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/ia64/psn.d | 1467 | ||||
| -rw-r--r-- | gas/testsuite/gas/ia64/psn.s | 1018 | ||||
| -rw-r--r-- | include/opcode/ChangeLog | 48 | ||||
| -rw-r--r-- | include/opcode/ia64.h | 9 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 18 | ||||
| -rw-r--r-- | opcodes/ia64-asmtab.c | 16489 | ||||
| -rw-r--r-- | opcodes/ia64-asmtab.h | 2 | ||||
| -rw-r--r-- | opcodes/ia64-gen.c | 35 | ||||
| -rw-r--r-- | opcodes/ia64-ic.tbl | 1 | ||||
| -rw-r--r-- | opcodes/ia64-opc-i.c | 7 | ||||
| -rw-r--r-- | opcodes/ia64-opc-m.c | 1223 | ||||
| -rw-r--r-- | opcodes/ia64-opc.h | 6 | ||||
| -rw-r--r-- | opcodes/ia64-raw.tbl | 1 | ||||
| -rw-r--r-- | opcodes/ia64-waw.tbl | 1 |
22 files changed, 13103 insertions, 7389 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index a716502..ff0c5c2 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,11 @@ +2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> + + * cpu-ia64-opc.c (ins_cnt6a): New function. + (ext_cnt6a): Ditto. + (ins_strd5b): Ditto. + (ext_strd5b): Ditto. + (elf64_ia64_operands): Add new operand types. + 2012-09-04 H.J. Lu <hongjiu.lu@intel.com> PR binutils/14493 diff --git a/bfd/cpu-ia64-opc.c b/bfd/cpu-ia64-opc.c index b797e44..dcc318e 100644 --- a/bfd/cpu-ia64-opc.c +++ b/bfd/cpu-ia64-opc.c @@ -380,6 +380,46 @@ ext_cnt2c (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) } static const char* +ins_cnt6a (const struct ia64_operand *self, ia64_insn value, + ia64_insn *code) +{ + if (value < 1 || value > 64) + return "value must be between 1 and 64"; + return ins_immu (self, value - 1, code); +} + +static const char* +ext_cnt6a (const struct ia64_operand *self, ia64_insn code, + ia64_insn *valuep) +{ + const char *result; + + result = ext_immu (self, code, valuep); + if (result) + return result; + + *valuep = *valuep + 1; + return 0; +} + +static const char* +ins_strd5b (const struct ia64_operand *self, ia64_insn value, + ia64_insn *code) +{ + if ( value & 0x3f ) + return "value must be a multiple of 64"; + return ins_imms_scaled (self, value, code, 6); +} + +static const char* +ext_strd5b (const struct ia64_operand *self, ia64_insn code, + ia64_insn *valuep) +{ + return ext_imms_scaled (self, code, valuep, 6); +} + + +static const char* ins_inc3 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) { BFD_HOST_64_BIT val = value; @@ -480,6 +520,8 @@ const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] = "a general register" }, { REG, ins_reg, ext_reg, "r", {{ 2, 20}}, 0, /* R3_2 */ "a general register r0-r3" }, + { REG, ins_reg, ext_reg, "dahr", {{ 3, 23}}, 0, /* DAHR */ + "a dahr register dahr0-7" }, /* memory operands: */ { IND, ins_reg, ext_reg, "", {{7, 20}}, 0, /* MR3 */ @@ -504,6 +546,8 @@ const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] = "a pmc register" }, { IND, ins_reg, ext_reg, "pmd", {{7, 20}}, 0, /* PMD_R3 */ "a pmd register" }, + { IND, ins_reg, ext_reg, "dahr", {{7, 20}}, 0, /* DAHR_R3 */ + "a dahr register" }, { IND, ins_reg, ext_reg, "rr", {{7, 20}}, 0, /* RR_R3 */ "an rr register" }, @@ -568,9 +612,15 @@ const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] = { ABS, ins_imms, ext_imms, 0, /* IMM14 */ {{ 7, 13}, { 6, 27}, { 1, 36}}, SDEC, "a 14-bit integer (-8192-8191)" }, + { ABS, ins_immu, ext_immu, 0, /* IMMU16 */ + {{4, 6}, {11, 12}, { 1, 36}}, UDEC, + "a 16-bit unsigned" }, { ABS, ins_imms1, ext_imms1, 0, /* IMM17 */ {{ 7, 6}, { 8, 24}, { 1, 36}}, 0, "a 17-bit integer (-65536-65535)" }, + { ABS, ins_immu, ext_immu, 0, /* IMMU19 */ + {{4, 6}, {14, 12}, { 1, 36}}, UDEC, + "a 19-bit unsigned" }, { ABS, ins_immu, ext_immu, 0, {{20, 6}, { 1, 36}}, 0, /* IMMU21 */ "a 21-bit unsigned" }, { ABS, ins_imms, ext_imms, 0, /* IMM22 */ @@ -613,4 +663,8 @@ const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] = { ABS, ins_const, ext_const, 0, {{0, 0}}, 0, /* LDXMOV */ "ldxmov target" }, + { ABS, ins_cnt6a, ext_cnt6a, 0, {{6, 6}}, UDEC, /* CNT6a */ + "lfetch count" }, + { ABS, ins_strd5b, ext_strd5b, 0, {{5, 13}}, SDEC, /* STRD5b*/ + "lfetch stride" }, }; diff --git a/gas/ChangeLog b/gas/ChangeLog index c3270d2..b59ed84 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,13 @@ +2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> + + * config/tc-ia64.c (reg_symbol): Add a new register. + (indirect_reg): Ditto. + (pseudo_func): Add new symbolic constants. + (operand_match): Add new operand types recognition. + (operand_insn): Add new register recognition. + (md_begin): Add new register definition. + (specify_resource): Add new register recognition. + 2012-09-01 Hans-Peter Nilsson <hp@bitrange.com> PR gas/14521 diff --git a/gas/config/tc-ia64.c b/gas/config/tc-ia64.c index 0366ac4..a4e702f 100644 --- a/gas/config/tc-ia64.c +++ b/gas/config/tc-ia64.c @@ -114,7 +114,8 @@ enum reg_symbol REG_FR = (REG_GR + 128), REG_AR = (REG_FR + 128), REG_CR = (REG_AR + 128), - REG_P = (REG_CR + 128), + REG_DAHR = (REG_CR + 128), + REG_P = (REG_DAHR + 8), REG_BR = (REG_P + 64), REG_IP = (REG_BR + 8), REG_CFM, @@ -133,6 +134,7 @@ enum reg_symbol IND_PKR, IND_PMC, IND_PMD, + IND_DAHR, IND_RR, /* The following pseudo-registers are used for unwind directives only: */ REG_PSP, @@ -539,6 +541,7 @@ indirect_reg[] = { "pkr", IND_PKR }, { "pmc", IND_PMC }, { "pmd", IND_PMD }, + { "dahr", IND_DAHR }, { "rr", IND_RR }, }; @@ -609,6 +612,12 @@ pseudo_func[] = /* hint constants: */ { "pause", PSEUDO_FUNC_CONST, { 0x0 } }, + { "priority", PSEUDO_FUNC_CONST, { 0x1 } }, + + /* tf constants: */ + { "clz", PSEUDO_FUNC_CONST, { 32 } }, + { "mpy", PSEUDO_FUNC_CONST, { 33 } }, + { "datahints", PSEUDO_FUNC_CONST, { 34 } }, /* unwind-related constants: */ { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } }, @@ -5567,6 +5576,12 @@ operand_match (const struct ia64_opcode *idesc, int res_index, expressionS *e) return OPERAND_MATCH; break; + case IA64_OPND_DAHR3: + if (e->X_op == O_register && e->X_add_number >= REG_DAHR + && e->X_add_number < REG_DAHR + 8) + return OPERAND_MATCH; + break; + case IA64_OPND_F1: case IA64_OPND_F2: case IA64_OPND_F3: @@ -5611,6 +5626,7 @@ operand_match (const struct ia64_opcode *idesc, int res_index, expressionS *e) case IA64_OPND_PKR_R3: case IA64_OPND_PMC_R3: case IA64_OPND_PMD_R3: + case IA64_OPND_DAHR_R3: case IA64_OPND_RR_R3: if (e->X_op == O_index && e->X_op_symbol && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID @@ -5731,6 +5747,8 @@ operand_match (const struct ia64_opcode *idesc, int res_index, expressionS *e) case IA64_OPND_IMMU2: case IA64_OPND_IMMU7a: case IA64_OPND_IMMU7b: + case IA64_OPND_IMMU16: + case IA64_OPND_IMMU19: case IA64_OPND_IMMU21: case IA64_OPND_IMMU24: case IA64_OPND_MBTYPE4: @@ -5987,6 +6005,39 @@ operand_match (const struct ia64_opcode *idesc, int res_index, expressionS *e) ++CURR_SLOT.num_fixups; return OPERAND_MATCH; + case IA64_OPND_STRD5b: + if (e->X_op == O_constant) + { + /* 5-bit signed scaled by 64 */ + if ((e->X_add_number <= ( 0xf << 6 )) + && (e->X_add_number >= -( 0x10 << 6 ))) + { + + /* Must be a multiple of 64 */ + if ((e->X_add_number & 0x3f) != 0) + as_warn (_("stride must be a multiple of 64; lower 6 bits ignored")); + + e->X_add_number &= ~ 0x3f; + return OPERAND_MATCH; + } + else + return OPERAND_OUT_OF_RANGE; + } + break; + case IA64_OPND_CNT6a: + if (e->X_op == O_constant) + { + /* 6-bit unsigned biased by 1 -- count 0 is meaningless */ + if ((e->X_add_number <= 64) + && (e->X_add_number > 0) ) + { + return OPERAND_MATCH; + } + else + return OPERAND_OUT_OF_RANGE; + } + break; + default: break; } @@ -6437,6 +6488,10 @@ build_insn (struct slot *slot, bfd_vma *insnp) val -= REG_CR; break; + case IA64_OPND_DAHR3: + val -= REG_DAHR; + break; + case IA64_OPND_F1: case IA64_OPND_F2: case IA64_OPND_F3: @@ -6463,6 +6518,7 @@ build_insn (struct slot *slot, bfd_vma *insnp) case IA64_OPND_PKR_R3: case IA64_OPND_PMC_R3: case IA64_OPND_PMD_R3: + case IA64_OPND_DAHR_R3: case IA64_OPND_RR_R3: val -= REG_GR; break; @@ -7435,6 +7491,9 @@ md_begin (void) for (i = 0; i < NELEMS (cr); ++i) declare_register (cr[i].name, REG_CR + cr[i].regnum); + /* dahr registers: */ + declare_register_set ("dahr", 8, REG_DAHR); + declare_register ("ip", REG_IP); declare_register ("cfm", REG_CFM); declare_register ("psr", REG_PSR); @@ -8688,6 +8747,22 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note) } break; + case IA64_RS_DAHR: + if (note == 0) + { + if (idesc->operands[!rsrc_write] == IA64_OPND_DAHR3) + { + specs[count] = tmpl; + specs[count++].index = + CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_DAHR; + } + } + else + { + UNHANDLED; + } + break; + case IA64_RS_FR: case IA64_RS_FRb: if (note != 1) @@ -8762,6 +8837,7 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note) || idesc->operands[i] == IA64_OPND_PKR_R3 || idesc->operands[i] == IA64_OPND_PMC_R3 || idesc->operands[i] == IA64_OPND_PMD_R3 + || idesc->operands[i] == IA64_OPND_DAHR_R3 || idesc->operands[i] == IA64_OPND_RR_R3 || ((i >= idesc->num_outputs) && (idesc->operands[i] == IA64_OPND_R1 diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index cd23916..56b7eda 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> + + * gas/testsuite/gas/ia64/psn.d: New file. + * gas/testsuite/gas/ia64/psn.s: New file. + * gas/testsuite/gas/ia64/ia64.exp: Add new testcase. + * gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests. + * gas/testsuite/gas/ia64/opc-m.d: Ditto. + 2012-09-01 Hans-Peter Nilsson <hp@bitrange.com> PR gas/14521 diff --git a/gas/testsuite/gas/ia64/ia64.exp b/gas/testsuite/gas/ia64/ia64.exp index 669a112..5e4a253 100644 --- a/gas/testsuite/gas/ia64/ia64.exp +++ b/gas/testsuite/gas/ia64/ia64.exp @@ -11,6 +11,7 @@ if [istarget "ia64-*"] then { run_dump_test "opc-i" run_dump_test "opc-m" run_dump_test "opc-x" + run_dump_test "psn" run_dump_test "pseudo" run_dump_test "nop_x" run_dump_test "mov-ar" diff --git a/gas/testsuite/gas/ia64/opc-i.d b/gas/testsuite/gas/ia64/opc-i.d index 175e07a..6efcc9a 100644 --- a/gas/testsuite/gas/ia64/opc-i.d +++ b/gas/testsuite/gas/ia64/opc-i.d @@ -244,7 +244,7 @@ Disassembly of section \.text: 976: 30 20 18 84 03 60 mov\.ret\.dptk b3=r4,a70 <_start\+0xa70> 97c: 40 70 08 07 mov\.ret\.dptk\.imp b3=r4,a70 <_start\+0xa70>;; \.\.\. - a70: 00 00 00 80 01 00 \[MII\] hint\.m 0x0 + a70: 00 00 00 80 01 00 \[MII\] hint\.m 0 a76: 00 00 00 03 00 00 hint\.i 0x0 a7c: 00 00 06 00 hint\.i 0x0 a80: 00 00 00 00 01 00 \[MII\] nop\.m 0x0 diff --git a/gas/testsuite/gas/ia64/opc-m.d b/gas/testsuite/gas/ia64/opc-m.d index 7ec2a42..5c6e939 100644 --- a/gas/testsuite/gas/ia64/opc-m.d +++ b/gas/testsuite/gas/ia64/opc-m.d @@ -1327,10 +1327,10 @@ Disassembly of section \.text: 1b70: 18 20 00 0a 1e 04 \[MMB\] tpa r4=r5 1b76: 40 00 14 3e 08 00 tak r4=r5 1b7c: 00 00 00 20 nop\.b 0x0 - 1b80: 18 00 00 80 01 00 \[MMB\] hint\.m 0x0 - 1b86: 00 00 00 03 00 00 hint\.m 0x0 + 1b80: 18 00 00 80 01 00 \[MMB\] hint\.m 0 + 1b86: 00 00 00 03 00 00 hint\.m 0 1b8c: 00 00 00 20 nop\.b 0x0 - 1b90: 18 f8 ff 8f 01 00 \[MMB\] hint\.m 0x1ffff + 1b90: 18 78 fe bf 01 00 \[MMB\] hint\.m 131071 1b96: 40 30 14 02 22 00 cmp8xchg16\.acq r4=\[r5\],r6,ar\.csd,ar\.ccv 1b9c: 00 00 00 20 nop\.b 0x0 1ba0: 18 20 18 0a 03 11 \[MMB\] cmp8xchg16\.acq\.nt1 r4=\[r5\],r6,ar\.csd,ar\.ccv diff --git a/gas/testsuite/gas/ia64/psn.d b/gas/testsuite/gas/ia64/psn.d new file mode 100644 index 0000000..10e921e --- /dev/null +++ b/gas/testsuite/gas/ia64/psn.d @@ -0,0 +1,1467 @@ +# as: -xnone -W +# objdump: -d +# name: ia64 psn + +.*: +file format elf64-ia64.* + +Disassembly of section \.text: + +0+000 <AAAAA-0x1.*>: + 0: 08 00 04 05 60 19 \[MMI\] lfetch.count \[r2\],1,64 + 6: 40 f8 5a c0 32 00 lfetch.count \[r22\],5,-64 + c: 00 00 04 00 nop.i 0x0 + 10: 08 40 3c 2f 62 19 \[MMI\] lfetch.count.nt1 \[r23\],9,960 + 16: b0 80 ea c5 32 00 lfetch.count.nt1 \[r122\],12,-1024 + 1c: 00 00 04 00 nop.i 0x0 + 20: 08 78 08 0b 64 19 \[MMI\] lfetch.count.nt2 \[r5\],16,128 + 26: 30 e1 3e c8 32 00 lfetch.count.nt2 \[r15\],20,-256 + 2c: 00 00 04 00 nop.i 0x0 + 30: 08 b8 20 fb 66 19 \[MMI\] lfetch.count.nta \[r125\],24,512 + 36: c0 79 22 cc 32 00 lfetch.count.nta \[r8\],29,960 + 3c: 00 00 04 00 nop.i 0x0 + 40: 08 08 43 25 60 19 \[MMI\] lfetch.count.d4 \[r18\],34,-1024 + 46: d0 77 fe c5 32 00 lfetch.count.d5 \[r127\],62,896 + 4c: 00 00 04 00 nop.i 0x0 + 50: 09 f0 43 15 64 19 \[MMI\] lfetch.count.d6 \[r10\],63,-1024 + 56: f0 07 82 cd 32 20 lfetch.count.d7 \[r96\],64,0 + 5c: 10 04 08 50 tf.z p1,p2=32;; + 60: 02 00 00 00 01 00 \[MII\] nop.m 0x0 + 66: 20 08 02 0e 28 60 tf.z p2,p7=32;; + 6c: 18 04 08 50 tf.z.unc p3,p2=32 + 70: 00 00 00 00 01 00 \[MII\] nop.m 0x0 + 76: 40 18 02 06 28 a0 tf.z p4,p3=33 + 7c: 50 04 10 58 tf.z.and p5,p4=34 + 80: 00 00 00 00 01 00 \[MII\] nop.m 0x0 + 86: 50 3c 02 0c 2c c0 tf.nz.and p5,p6=35 + 8c: 70 04 14 58 tf.z.and p6,p5=35 + 90: 00 00 00 00 01 00 \[MII\] nop.m 0x0 + 96: 70 f8 03 8c 28 a0 tf.z.or p7,p6=63 + 9c: 78 04 18 51 tf.nz.or p5,p6=35 + a0: 00 00 00 00 01 00 \[MII\] nop.m 0x0 + a6: 70 18 02 8c 2c e0 tf.z.or.andcm p7,p6=33 + ac: 58 04 18 59 tf.nz.or.andcm p7,p6=34 + b0: 00 00 00 00 01 00 \[MII\] nop.m 0x0 + b6: 60 0c 02 8e 2c c0 tf.nz.or.andcm p6,p7=32 + bc: 30 04 1c 59 tf.z.or.andcm p6,p7=33 + c0: 11 00 00 00 01 00 \[MIB\] nop.m 0x0 + c6: 00 1c 02 0c 28 00 tf.z.unc p0,p6=33 + cc: 00 00 00 20 nop.b 0x0;; + d0: 08 00 02 24 60 19 \[MMI\] lfetch.d4 \[r18\] + d6: 00 00 00 02 00 00 nop.m 0x0 + dc: 00 00 04 00 nop.i 0x0 + e0: 0a 00 02 26 7e 19 \[MMI\] lfetch.fault.excl.d7 \[r19\];; + e6: 10 10 3a c0 32 00 lfetch.count \[r14\],2,128 + ec: 01 50 58 00 sxt4 r8=r10 + f0: 0a f8 13 17 60 19 \[MMI\] lfetch.count.d4 \[r11\],64,256;; + f6: 00 04 44 d4 32 00 lfetch.excl.d5 \[r17\] + fc: 00 00 04 00 nop.i 0x0 + 100: 0b 00 02 20 74 19 \[MMI\] lfetch.fault.d6 \[r16\];; + 106: 70 01 e0 03 00 60 mov dahr7=7 + 10c: 00 48 68 73 clz r3=r9;; + 110: 00 b0 00 e0 01 00 \[MII\] mov dahr6=6 + 116: 20 48 20 34 3c 40 mpy4 r2=r9,r8 + 11c: 90 40 78 78 mpyshl4 r2=r9,r8 + 120: 0b a8 00 d0 01 00 \[MMI\] mov dahr5=5;; + 126: 40 01 80 03 00 00 mov dahr4=4 + 12c: 00 00 04 00 nop.i 0x0;; + 130: 11 98 00 b0 01 00 \[MIB\] mov dahr3=3 + 136: 80 10 0c 00 40 00 add r8=r2,r3 + 13c: 00 00 00 20 nop.b 0x0;; + 140: 0b 90 00 a0 01 00 \[MMI\] mov dahr2=2;; + 146: 10 01 20 03 00 00 mov dahr1=1 + 14c: 00 00 04 00 nop.i 0x0;; + 150: 10 80 00 80 01 00 \[MIB\] mov dahr0=0 + 156: 00 00 00 02 00 00 nop.i 0x0 + 15c: 00 00 00 20 nop.b 0x0 + 160: 08 60 00 0a 20 04 \[MMI\] mov r12=dahr\[r5\] + 166: a0 07 dc 40 08 00 mov r122=dahr\[r55\] + 16c: 00 00 04 00 nop.i 0x0 + 170: 08 00 74 83 80 11 \[MMI\] st1 \[r65\]=r93 + 176: 00 e8 06 05 23 00 st1.d1 \[r65\]=r93 + 17c: 00 00 04 00 nop.i 0x0 + 180: 08 00 74 83 82 11 \[MMI\] st1.d1 \[r65\]=r93 + 186: 00 e8 06 09 23 00 st1.d2 \[r65\]=r93 + 18c: 00 00 04 00 nop.i 0x0 + 190: 08 00 74 83 84 11 \[MMI\] st1.d2 \[r65\]=r93 + 196: 00 e8 06 0d 23 00 st1.nta \[r65\]=r93 + 19c: 00 00 04 00 nop.i 0x0 + 1a0: 08 00 74 83 86 11 \[MMI\] st1.nta \[r65\]=r93 + 1a6: 00 ec 06 01 23 00 st1.d4 \[r65\]=r93 + 1ac: 00 00 04 00 nop.i 0x0 + 1b0: 08 00 76 83 82 11 \[MMI\] st1.d5 \[r65\]=r93 + 1b6: 00 ec 06 09 23 00 st1.d6 \[r65\]=r93 + 1bc: 00 00 04 00 nop.i 0x0 + 1c0: 08 00 76 83 86 11 \[MMI\] st1.d7 \[r65\]=r93 + 1c6: 00 e8 06 11 23 00 st2 \[r65\]=r93 + 1cc: 00 00 04 00 nop.i 0x0 + 1d0: 08 00 74 83 8a 11 \[MMI\] st2.d1 \[r65\]=r93 + 1d6: 00 e8 06 15 23 00 st2.d1 \[r65\]=r93 + 1dc: 00 00 04 00 nop.i 0x0 + 1e0: 08 00 74 83 8c 11 \[MMI\] st2.d2 \[r65\]=r93 + 1e6: 00 e8 06 19 23 00 st2.d2 \[r65\]=r93 + 1ec: 00 00 04 00 nop.i 0x0 + 1f0: 08 00 74 83 8e 11 \[MMI\] st2.nta \[r65\]=r93 + 1f6: 00 e8 06 1d 23 00 st2.nta \[r65\]=r93 + 1fc: 00 00 04 00 nop.i 0x0 + 200: 08 00 76 83 88 11 \[MMI\] st2.d4 \[r65\]=r93 + 206: 00 ec 06 15 23 00 st2.d5 \[r65\]=r93 + 20c: 00 00 04 00 nop.i 0x0 + 210: 08 00 76 83 8c 11 \[MMI\] st2.d6 \[r65\]=r93 + 216: 00 ec 06 1d 23 00 st2.d7 \[r65\]=r93 + 21c: 00 00 04 00 nop.i 0x0 + 220: 08 00 74 83 90 11 \[MMI\] st4 \[r65\]=r93 + 226: 00 e8 06 25 23 00 st4.d1 \[r65\]=r93 + 22c: 00 00 04 00 nop.i 0x0 + 230: 08 00 74 83 92 11 \[MMI\] st4.d1 \[r65\]=r93 + 236: 00 e8 06 29 23 00 st4.d2 \[r65\]=r93 + 23c: 00 00 04 00 nop.i 0x0 + 240: 08 00 74 83 94 11 \[MMI\] st4.d2 \[r65\]=r93 + 246: 00 e8 06 2d 23 00 st4.nta \[r65\]=r93 + 24c: 00 00 04 00 nop.i 0x0 + 250: 08 00 74 83 96 11 \[MMI\] st4.nta \[r65\]=r93 + 256: 00 ec 06 21 23 00 st4.d4 \[r65\]=r93 + 25c: 00 00 04 00 nop.i 0x0 + 260: 08 00 76 83 92 11 \[MMI\] st4.d5 \[r65\]=r93 + 266: 00 ec 06 29 23 00 st4.d6 \[r65\]=r93 + 26c: 00 00 04 00 nop.i 0x0 + 270: 08 00 76 83 96 11 \[MMI\] st4.d7 \[r65\]=r93 + 276: 00 e8 06 31 23 00 st8 \[r65\]=r93 + 27c: 00 00 04 00 nop.i 0x0 + 280: 08 00 74 83 9a 11 \[MMI\] st8.d1 \[r65\]=r93 + 286: 00 e8 06 35 23 00 st8.d1 \[r65\]=r93 + 28c: 00 00 04 00 nop.i 0x0 + 290: 08 00 74 83 9c 11 \[MMI\] st8.d2 \[r65\]=r93 + 296: 00 e8 06 39 23 00 st8.d2 \[r65\]=r93 + 29c: 00 00 04 00 nop.i 0x0 + 2a0: 08 00 74 83 9e 11 \[MMI\] st8.nta \[r65\]=r93 + 2a6: 00 e8 06 3d 23 00 st8.nta \[r65\]=r93 + 2ac: 00 00 04 00 nop.i 0x0 + 2b0: 08 00 76 83 98 11 \[MMI\] st8.d4 \[r65\]=r93 + 2b6: 00 ec 06 35 23 00 st8.d5 \[r65\]=r93 + 2bc: 00 00 04 00 nop.i 0x0 + 2c0: 08 00 76 83 9c 11 \[MMI\] st8.d6 \[r65\]=r93 + 2c6: 00 ec 06 3d 23 00 st8.d7 \[r65\]=r93 + 2cc: 00 00 04 00 nop.i 0x0 + 2d0: 08 00 74 83 81 11 \[MMI\] st16 \[r65\]=r93,ar.csd + 2d6: 00 e8 06 03 23 00 st16 \[r65\]=r93,ar.csd + 2dc: 00 00 04 00 nop.i 0x0 + 2e0: 08 00 74 83 83 11 \[MMI\] st16.d1 \[r65\]=r93,ar.csd + 2e6: 00 e8 06 07 23 00 st16.d1 \[r65\]=r93,ar.csd + 2ec: 00 00 04 00 nop.i 0x0 + 2f0: 08 00 74 83 85 11 \[MMI\] st16.d2 \[r65\]=r93,ar.csd + 2f6: 00 e8 06 0b 23 00 st16.d2 \[r65\]=r93,ar.csd + 2fc: 00 00 04 00 nop.i 0x0 + 300: 08 00 74 83 87 11 \[MMI\] st16.nta \[r65\]=r93,ar.csd + 306: 00 e8 06 0f 23 00 st16.nta \[r65\]=r93,ar.csd + 30c: 00 00 04 00 nop.i 0x0 + 310: 08 00 76 83 81 11 \[MMI\] st16.d4 \[r65\]=r93,ar.csd + 316: 00 ec 06 07 23 00 st16.d5 \[r65\]=r93,ar.csd + 31c: 00 00 04 00 nop.i 0x0 + 320: 08 00 76 83 85 11 \[MMI\] st16.d6 \[r65\]=r93,ar.csd + 326: 00 ec 06 0f 23 00 st16.d7 \[r65\]=r93,ar.csd + 32c: 00 00 04 00 nop.i 0x0 + 330: 08 00 74 83 87 11 \[MMI\] st16.nta \[r65\]=r93,ar.csd + 336: 00 e8 06 0f 23 00 st16.nta \[r65\]=r93,ar.csd + 33c: 00 00 04 00 nop.i 0x0 + 340: 08 00 76 83 81 11 \[MMI\] st16.d4 \[r65\]=r93,ar.csd + 346: 00 ec 06 07 23 00 st16.d5 \[r65\]=r93,ar.csd + 34c: 00 00 04 00 nop.i 0x0 + 350: 08 00 76 83 85 11 \[MMI\] st16.d6 \[r65\]=r93,ar.csd + 356: 00 ec 06 0f 23 00 st16.d7 \[r65\]=r93,ar.csd + 35c: 00 00 04 00 nop.i 0x0 + 360: 08 00 74 83 a0 11 \[MMI\] st1.rel \[r65\]=r93 + 366: 00 e8 06 45 23 00 st1.rel.d1 \[r65\]=r93 + 36c: 00 00 04 00 nop.i 0x0 + 370: 08 00 74 83 a2 11 \[MMI\] st1.rel.d1 \[r65\]=r93 + 376: 00 e8 06 49 23 00 st1.rel.d2 \[r65\]=r93 + 37c: 00 00 04 00 nop.i 0x0 + 380: 08 00 74 83 a4 11 \[MMI\] st1.rel.d2 \[r65\]=r93 + 386: 00 e8 06 4d 23 00 st1.rel.nta \[r65\]=r93 + 38c: 00 00 04 00 nop.i 0x0 + 390: 08 00 74 83 a6 11 \[MMI\] st1.rel.nta \[r65\]=r93 + 396: 00 ec 06 41 23 00 st1.rel.d4 \[r65\]=r93 + 39c: 00 00 04 00 nop.i 0x0 + 3a0: 08 00 76 83 a2 11 \[MMI\] st1.rel.d5 \[r65\]=r93 + 3a6: 00 ec 06 49 23 00 st1.rel.d6 \[r65\]=r93 + 3ac: 00 00 04 00 nop.i 0x0 + 3b0: 08 00 76 83 a6 11 \[MMI\] st1.rel.d7 \[r65\]=r93 + 3b6: 00 e8 06 51 23 00 st2.rel \[r65\]=r93 + 3bc: 00 00 04 00 nop.i 0x0 + 3c0: 08 00 74 83 aa 11 \[MMI\] st2.rel.d1 \[r65\]=r93 + 3c6: 00 e8 06 55 23 00 st2.rel.d1 \[r65\]=r93 + 3cc: 00 00 04 00 nop.i 0x0 + 3d0: 08 00 74 83 ac 11 \[MMI\] st2.rel.d2 \[r65\]=r93 + 3d6: 00 e8 06 59 23 00 st2.rel.d2 \[r65\]=r93 + 3dc: 00 00 04 00 nop.i 0x0 + 3e0: 08 00 74 83 ae 11 \[MMI\] st2.rel.nta \[r65\]=r93 + 3e6: 00 e8 06 5d 23 00 st2.rel.nta \[r65\]=r93 + 3ec: 00 00 04 00 nop.i 0x0 + 3f0: 08 00 76 83 a8 11 \[MMI\] st2.rel.d4 \[r65\]=r93 + 3f6: 00 ec 06 55 23 00 st2.rel.d5 \[r65\]=r93 + 3fc: 00 00 04 00 nop.i 0x0 + 400: 08 00 76 83 ac 11 \[MMI\] st2.rel.d6 \[r65\]=r93 + 406: 00 ec 06 5d 23 00 st2.rel.d7 \[r65\]=r93 + 40c: 00 00 04 00 nop.i 0x0 + 410: 08 00 74 83 b0 11 \[MMI\] st4.rel \[r65\]=r93 + 416: 00 e8 06 65 23 00 st4.rel.d1 \[r65\]=r93 + 41c: 00 00 04 00 nop.i 0x0 + 420: 08 00 74 83 b2 11 \[MMI\] st4.rel.d1 \[r65\]=r93 + 426: 00 e8 06 69 23 00 st4.rel.d2 \[r65\]=r93 + 42c: 00 00 04 00 nop.i 0x0 + 430: 08 00 74 83 b4 11 \[MMI\] st4.rel.d2 \[r65\]=r93 + 436: 00 e8 06 6d 23 00 st4.rel.nta \[r65\]=r93 + 43c: 00 00 04 00 nop.i 0x0 + 440: 08 00 74 83 b6 11 \[MMI\] st4.rel.nta \[r65\]=r93 + 446: 00 ec 06 61 23 00 st4.rel.d4 \[r65\]=r93 + 44c: 00 00 04 00 nop.i 0x0 + 450: 08 00 76 83 b2 11 \[MMI\] st4.rel.d5 \[r65\]=r93 + 456: 00 ec 06 69 23 00 st4.rel.d6 \[r65\]=r93 + 45c: 00 00 04 00 nop.i 0x0 + 460: 08 00 76 83 b6 11 \[MMI\] st4.rel.d7 \[r65\]=r93 + 466: 00 e8 06 71 23 00 st8.rel \[r65\]=r93 + 46c: 00 00 04 00 nop.i 0x0 + 470: 08 00 74 83 ba 11 \[MMI\] st8.rel.d1 \[r65\]=r93 + 476: 00 e8 06 75 23 00 st8.rel.d1 \[r65\]=r93 + 47c: 00 00 04 00 nop.i 0x0 + 480: 08 00 74 83 bc 11 \[MMI\] st8.rel.d2 \[r65\]=r93 + 486: 00 e8 06 79 23 00 st8.rel.d2 \[r65\]=r93 + 48c: 00 00 04 00 nop.i 0x0 + 490: 08 00 74 83 be 11 \[MMI\] st8.rel.nta \[r65\]=r93 + 496: 00 e8 06 7d 23 00 st8.rel.nta \[r65\]=r93 + 49c: 00 00 04 00 nop.i 0x0 + 4a0: 08 00 76 83 b8 11 \[MMI\] st8.rel.d4 \[r65\]=r93 + 4a6: 00 ec 06 75 23 00 st8.rel.d5 \[r65\]=r93 + 4ac: 00 00 04 00 nop.i 0x0 + 4b0: 08 00 76 83 bc 11 \[MMI\] st8.rel.d6 \[r65\]=r93 + 4b6: 00 ec 06 7d 23 00 st8.rel.d7 \[r65\]=r93 + 4bc: 00 00 04 00 nop.i 0x0 + 4c0: 08 00 74 83 a1 11 \[MMI\] st16.rel \[r65\]=r93,ar.csd + 4c6: 00 e8 06 43 23 00 st16.rel \[r65\]=r93,ar.csd + 4cc: 00 00 04 00 nop.i 0x0 + 4d0: 08 00 74 83 a3 11 \[MMI\] st16.rel.d1 \[r65\]=r93,ar.csd + 4d6: 00 e8 06 47 23 00 st16.rel.d1 \[r65\]=r93,ar.csd + 4dc: 00 00 04 00 nop.i 0x0 + 4e0: 08 00 74 83 a3 11 \[MMI\] st16.rel.d1 \[r65\]=r93,ar.csd + 4e6: 00 e8 06 47 23 00 st16.rel.d1 \[r65\]=r93,ar.csd + 4ec: 00 00 04 00 nop.i 0x0 + 4f0: 08 00 74 83 a5 11 \[MMI\] st16.rel.d2 \[r65\]=r93,ar.csd + 4f6: 00 e8 06 4b 23 00 st16.rel.d2 \[r65\]=r93,ar.csd + 4fc: 00 00 04 00 nop.i 0x0 + 500: 08 00 74 83 a5 11 \[MMI\] st16.rel.d2 \[r65\]=r93,ar.csd + 506: 00 e8 06 4b 23 00 st16.rel.d2 \[r65\]=r93,ar.csd + 50c: 00 00 04 00 nop.i 0x0 + 510: 08 00 74 83 a7 11 \[MMI\] st16.rel.nta \[r65\]=r93,ar.csd + 516: 00 e8 06 4f 23 00 st16.rel.nta \[r65\]=r93,ar.csd + 51c: 00 00 04 00 nop.i 0x0 + 520: 08 00 76 83 a1 11 \[MMI\] st16.rel.d4 \[r65\]=r93,ar.csd + 526: 00 ec 06 47 23 00 st16.rel.d5 \[r65\]=r93,ar.csd + 52c: 00 00 04 00 nop.i 0x0 + 530: 08 00 76 83 a5 11 \[MMI\] st16.rel.d6 \[r65\]=r93,ar.csd + 536: 00 ec 06 4f 23 00 st16.rel.d7 \[r65\]=r93,ar.csd + 53c: 00 00 04 00 nop.i 0x0 + 540: 08 00 74 83 a7 11 \[MMI\] st16.rel.nta \[r65\]=r93,ar.csd + 546: 00 e8 06 4f 23 00 st16.rel.nta \[r65\]=r93,ar.csd + 54c: 00 00 04 00 nop.i 0x0 + 550: 08 00 76 83 a1 11 \[MMI\] st16.rel.d4 \[r65\]=r93,ar.csd + 556: 00 ec 06 47 23 00 st16.rel.d5 \[r65\]=r93,ar.csd + 55c: 00 00 04 00 nop.i 0x0 + 560: 08 00 76 83 a5 11 \[MMI\] st16.rel.d6 \[r65\]=r93,ar.csd + 566: 00 ec 06 4f 23 00 st16.rel.d7 \[r65\]=r93,ar.csd + 56c: 00 00 04 00 nop.i 0x0 + 570: 08 00 74 83 d8 11 \[MMI\] st8.spill \[r65\]=r93 + 576: 00 e8 06 b5 23 00 st8.spill.d1 \[r65\]=r93 + 57c: 00 00 04 00 nop.i 0x0 + 580: 08 00 74 83 da 11 \[MMI\] st8.spill.d1 \[r65\]=r93 + 586: 00 e8 06 b9 23 00 st8.spill.d2 \[r65\]=r93 + 58c: 00 00 04 00 nop.i 0x0 + 590: 08 00 74 83 dc 11 \[MMI\] st8.spill.d2 \[r65\]=r93 + 596: 00 e8 06 bd 23 00 st8.spill.nta \[r65\]=r93 + 59c: 00 00 04 00 nop.i 0x0 + 5a0: 08 00 74 83 de 11 \[MMI\] st8.spill.nta \[r65\]=r93 + 5a6: 00 ec 06 b1 23 00 st8.spill.d4 \[r65\]=r93 + 5ac: 00 00 04 00 nop.i 0x0 + 5b0: 08 00 76 83 da 11 \[MMI\] st8.spill.d5 \[r65\]=r93 + 5b6: 00 ec 06 b9 23 00 st8.spill.d6 \[r65\]=r93 + 5bc: 00 00 04 00 nop.i 0x0 + 5c0: 08 00 76 83 de 11 \[MMI\] st8.spill.d7 \[r65\]=r93 + 5c6: 00 00 f0 c0 32 00 lfetch \[r60\] + 5cc: 00 00 04 00 nop.i 0x0 + 5d0: 08 00 00 78 62 19 \[MMI\] lfetch.nt1 \[r60\] + 5d6: 00 00 f0 c4 32 00 lfetch.nt1 \[r60\] + 5dc: 00 00 04 00 nop.i 0x0 + 5e0: 08 00 00 78 64 19 \[MMI\] lfetch.nt2 \[r60\] + 5e6: 00 00 f0 c8 32 00 lfetch.nt2 \[r60\] + 5ec: 00 00 04 00 nop.i 0x0 + 5f0: 08 00 00 78 66 19 \[MMI\] lfetch.nta \[r60\] + 5f6: 00 00 f0 cc 32 00 lfetch.nta \[r60\] + 5fc: 00 00 04 00 nop.i 0x0 + 600: 08 00 02 78 60 19 \[MMI\] lfetch.d4 \[r60\] + 606: 00 04 f0 c4 32 00 lfetch.d5 \[r60\] + 60c: 00 00 04 00 nop.i 0x0 + 610: 08 00 02 78 64 19 \[MMI\] lfetch.d6 \[r60\] + 616: 00 04 f0 cc 32 00 lfetch.d7 \[r60\] + 61c: 00 00 04 00 nop.i 0x0 + 620: 08 00 68 79 90 19 \[MMI\] stfs \[r60\]=f90 + 626: 00 d0 f2 24 33 00 stfs.d1 \[r60\]=f90 + 62c: 00 00 04 00 nop.i 0x0 + 630: 08 00 68 79 92 19 \[MMI\] stfs.d1 \[r60\]=f90 + 636: 00 d0 f2 28 33 00 stfs.d2 \[r60\]=f90 + 63c: 00 00 04 00 nop.i 0x0 + 640: 08 00 68 79 94 19 \[MMI\] stfs.d2 \[r60\]=f90 + 646: 00 d0 f2 2c 33 00 stfs.nta \[r60\]=f90 + 64c: 00 00 04 00 nop.i 0x0 + 650: 08 00 68 79 96 19 \[MMI\] stfs.nta \[r60\]=f90 + 656: 00 d4 f2 20 33 00 stfs.d4 \[r60\]=f90 + 65c: 00 00 04 00 nop.i 0x0 + 660: 08 00 6a 79 92 19 \[MMI\] stfs.d5 \[r60\]=f90 + 666: 00 d4 f2 28 33 00 stfs.d6 \[r60\]=f90 + 66c: 00 00 04 00 nop.i 0x0 + 670: 08 00 6a 79 96 19 \[MMI\] stfs.d7 \[r60\]=f90 + 676: 00 d0 f2 30 33 00 stfd \[r60\]=f90 + 67c: 00 00 04 00 nop.i 0x0 + 680: 08 00 68 79 9a 19 \[MMI\] stfd.d1 \[r60\]=f90 + 686: 00 d0 f2 34 33 00 stfd.d1 \[r60\]=f90 + 68c: 00 00 04 00 nop.i 0x0 + 690: 08 00 68 79 9c 19 \[MMI\] stfd.d2 \[r60\]=f90 + 696: 00 d0 f2 38 33 00 stfd.d2 \[r60\]=f90 + 69c: 00 00 04 00 nop.i 0x0 + 6a0: 08 00 68 79 9e 19 \[MMI\] stfd.nta \[r60\]=f90 + 6a6: 00 d0 f2 3c 33 00 stfd.nta \[r60\]=f90 + 6ac: 00 00 04 00 nop.i 0x0 + 6b0: 08 00 6a 79 98 19 \[MMI\] stfd.d4 \[r60\]=f90 + 6b6: 00 d4 f2 34 33 00 stfd.d5 \[r60\]=f90 + 6bc: 00 00 04 00 nop.i 0x0 + 6c0: 08 00 6a 79 9c 19 \[MMI\] stfd.d6 \[r60\]=f90 + 6c6: 00 d4 f2 3c 33 00 stfd.d7 \[r60\]=f90 + 6cc: 00 00 04 00 nop.i 0x0 + 6d0: 08 00 68 79 88 19 \[MMI\] stf8 \[r60\]=f90 + 6d6: 00 d0 f2 14 33 00 stf8.d1 \[r60\]=f90 + 6dc: 00 00 04 00 nop.i 0x0 + 6e0: 08 00 68 79 8a 19 \[MMI\] stf8.d1 \[r60\]=f90 + 6e6: 00 d0 f2 18 33 00 stf8.d2 \[r60\]=f90 + 6ec: 00 00 04 00 nop.i 0x0 + 6f0: 08 00 68 79 8c 19 \[MMI\] stf8.d2 \[r60\]=f90 + 6f6: 00 d0 f2 1c 33 00 stf8.nta \[r60\]=f90 + 6fc: 00 00 04 00 nop.i 0x0 + 700: 08 00 68 79 8e 19 \[MMI\] stf8.nta \[r60\]=f90 + 706: 00 d4 f2 10 33 00 stf8.d4 \[r60\]=f90 + 70c: 00 00 04 00 nop.i 0x0 + 710: 08 00 6a 79 8a 19 \[MMI\] stf8.d5 \[r60\]=f90 + 716: 00 d4 f2 18 33 00 stf8.d6 \[r60\]=f90 + 71c: 00 00 04 00 nop.i 0x0 + 720: 08 00 6a 79 8e 19 \[MMI\] stf8.d7 \[r60\]=f90 + 726: 00 d0 f2 00 33 00 stfe \[r60\]=f90 + 72c: 00 00 04 00 nop.i 0x0 + 730: 08 00 68 79 82 19 \[MMI\] stfe.d1 \[r60\]=f90 + 736: 00 d0 f2 04 33 00 stfe.d1 \[r60\]=f90 + 73c: 00 00 04 00 nop.i 0x0 + 740: 08 00 68 79 84 19 \[MMI\] stfe.d2 \[r60\]=f90 + 746: 00 d0 f2 08 33 00 stfe.d2 \[r60\]=f90 + 74c: 00 00 04 00 nop.i 0x0 + 750: 08 00 68 79 86 19 \[MMI\] stfe.nta \[r60\]=f90 + 756: 00 d0 f2 0c 33 00 stfe.nta \[r60\]=f90 + 75c: 00 00 04 00 nop.i 0x0 + 760: 08 00 6a 79 80 19 \[MMI\] stfe.d4 \[r60\]=f90 + 766: 00 d4 f2 04 33 00 stfe.d5 \[r60\]=f90 + 76c: 00 00 04 00 nop.i 0x0 + 770: 08 00 6a 79 84 19 \[MMI\] stfe.d6 \[r60\]=f90 + 776: 00 d4 f2 0c 33 00 stfe.d7 \[r60\]=f90 + 77c: 00 00 04 00 nop.i 0x0 + 780: 08 00 68 79 d8 19 \[MMI\] stf.spill \[r60\]=f90 + 786: 00 d0 f2 b4 33 00 stf.spill.d1 \[r60\]=f90 + 78c: 00 00 04 00 nop.i 0x0 + 790: 08 00 68 79 da 19 \[MMI\] stf.spill.d1 \[r60\]=f90 + 796: 00 d0 f2 b8 33 00 stf.spill.d2 \[r60\]=f90 + 79c: 00 00 04 00 nop.i 0x0 + 7a0: 08 00 68 79 dc 19 \[MMI\] stf.spill.d2 \[r60\]=f90 + 7a6: 00 d0 f2 bc 33 00 stf.spill.nta \[r60\]=f90 + 7ac: 00 00 04 00 nop.i 0x0 + 7b0: 08 00 68 79 de 19 \[MMI\] stf.spill.nta \[r60\]=f90 + 7b6: 00 d4 f2 b0 33 00 stf.spill.d4 \[r60\]=f90 + 7bc: 00 00 04 00 nop.i 0x0 + 7c0: 08 00 6a 79 da 19 \[MMI\] stf.spill.d5 \[r60\]=f90 + 7c6: 00 d4 f2 b8 33 00 stf.spill.d6 \[r60\]=f90 + 7cc: 00 00 04 00 nop.i 0x0 + 7d0: 08 00 6a 79 de 19 \[MMI\] stf.spill.d7 \[r60\]=f90 + 7d6: 90 07 f4 21 30 00 ldfs f121=\[r125\] + 7dc: 00 00 04 00 nop.i 0x0 + 7e0: 08 c8 03 fa 12 18 \[MMI\] ldfs.nt1 f121=\[r125\] + 7e6: 90 07 f4 25 30 00 ldfs.nt1 f121=\[r125\] + 7ec: 00 00 04 00 nop.i 0x0 + 7f0: 08 c8 03 fa 14 18 \[MMI\] ldfs.d2 f121=\[r125\] + 7f6: 90 07 f4 29 30 00 ldfs.d2 f121=\[r125\] + 7fc: 00 00 04 00 nop.i 0x0 + 800: 08 c8 03 fa 16 18 \[MMI\] ldfs.nta f121=\[r125\] + 806: 90 07 f4 2d 30 00 ldfs.nta f121=\[r125\] + 80c: 00 00 04 00 nop.i 0x0 + 810: 08 c8 03 fb 10 18 \[MMI\] ldfs.d4 f121=\[r125\] + 816: 90 07 f6 25 30 00 ldfs.d5 f121=\[r125\] + 81c: 00 00 04 00 nop.i 0x0 + 820: 08 c8 03 fb 14 18 \[MMI\] ldfs.d6 f121=\[r125\] + 826: 90 07 f6 2d 30 00 ldfs.d7 f121=\[r125\] + 82c: 00 00 04 00 nop.i 0x0 + 830: 08 c8 03 fa 18 18 \[MMI\] ldfd f121=\[r125\] + 836: 90 07 f4 35 30 00 ldfd.nt1 f121=\[r125\] + 83c: 00 00 04 00 nop.i 0x0 + 840: 08 c8 03 fa 1a 18 \[MMI\] ldfd.nt1 f121=\[r125\] + 846: 90 07 f4 39 30 00 ldfd.d2 f121=\[r125\] + 84c: 00 00 04 00 nop.i 0x0 + 850: 08 c8 03 fa 1c 18 \[MMI\] ldfd.d2 f121=\[r125\] + 856: 90 07 f4 3d 30 00 ldfd.nta f121=\[r125\] + 85c: 00 00 04 00 nop.i 0x0 + 860: 08 c8 03 fa 1e 18 \[MMI\] ldfd.nta f121=\[r125\] + 866: 90 07 f6 31 30 00 ldfd.d4 f121=\[r125\] + 86c: 00 00 04 00 nop.i 0x0 + 870: 08 c8 03 fb 1a 18 \[MMI\] ldfd.d5 f121=\[r125\] + 876: 90 07 f6 39 30 00 ldfd.d6 f121=\[r125\] + 87c: 00 00 04 00 nop.i 0x0 + 880: 08 c8 03 fb 1e 18 \[MMI\] ldfd.d7 f121=\[r125\] + 886: 90 07 f4 11 30 00 ldf8 f121=\[r125\] + 88c: 00 00 04 00 nop.i 0x0 + 890: 08 c8 03 fa 0a 18 \[MMI\] ldf8.nt1 f121=\[r125\] + 896: 90 07 f4 15 30 00 ldf8.nt1 f121=\[r125\] + 89c: 00 00 04 00 nop.i 0x0 + 8a0: 08 c8 03 fa 0c 18 \[MMI\] ldf8.d2 f121=\[r125\] + 8a6: 90 07 f4 19 30 00 ldf8.d2 f121=\[r125\] + 8ac: 00 00 04 00 nop.i 0x0 + 8b0: 08 c8 03 fa 0e 18 \[MMI\] ldf8.nta f121=\[r125\] + 8b6: 90 07 f4 1d 30 00 ldf8.nta f121=\[r125\] + 8bc: 00 00 04 00 nop.i 0x0 + 8c0: 08 c8 03 fb 08 18 \[MMI\] ldf8.d4 f121=\[r125\] + 8c6: 90 07 f6 15 30 00 ldf8.d5 f121=\[r125\] + 8cc: 00 00 04 00 nop.i 0x0 + 8d0: 08 c8 03 fb 0c 18 \[MMI\] ldf8.d6 f121=\[r125\] + 8d6: 90 07 f6 1d 30 00 ldf8.d7 f121=\[r125\] + 8dc: 00 00 04 00 nop.i 0x0 + 8e0: 08 c8 03 fa 00 18 \[MMI\] ldfe f121=\[r125\] + 8e6: 90 07 f4 05 30 00 ldfe.nt1 f121=\[r125\] + 8ec: 00 00 04 00 nop.i 0x0 + 8f0: 08 c8 03 fa 02 18 \[MMI\] ldfe.nt1 f121=\[r125\] + 8f6: 90 07 f4 09 30 00 ldfe.d2 f121=\[r125\] + 8fc: 00 00 04 00 nop.i 0x0 + 900: 08 c8 03 fa 04 18 \[MMI\] ldfe.d2 f121=\[r125\] + 906: 90 07 f4 0d 30 00 ldfe.nta f121=\[r125\] + 90c: 00 00 04 00 nop.i 0x0 + 910: 08 c8 03 fa 06 18 \[MMI\] ldfe.nta f121=\[r125\] + 916: 90 07 f6 01 30 00 ldfe.d4 f121=\[r125\] + 91c: 00 00 04 00 nop.i 0x0 + 920: 08 c8 03 fb 02 18 \[MMI\] ldfe.d5 f121=\[r125\] + 926: 90 07 f6 09 30 00 ldfe.d6 f121=\[r125\] + 92c: 00 00 04 00 nop.i 0x0 + 930: 08 c8 03 fb 06 18 \[MMI\] ldfe.d7 f121=\[r125\] + 936: 90 07 f4 61 30 00 ldfs.s f121=\[r125\] + 93c: 00 00 04 00 nop.i 0x0 + 940: 08 c8 03 fa 32 18 \[MMI\] ldfs.s.nt1 f121=\[r125\] + 946: 90 07 f4 65 30 00 ldfs.s.nt1 f121=\[r125\] + 94c: 00 00 04 00 nop.i 0x0 + 950: 08 c8 03 fa 34 18 \[MMI\] ldfs.s.d2 f121=\[r125\] + 956: 90 07 f4 69 30 00 ldfs.s.d2 f121=\[r125\] + 95c: 00 00 04 00 nop.i 0x0 + 960: 08 c8 03 fa 36 18 \[MMI\] ldfs.s.nta f121=\[r125\] + 966: 90 07 f4 6d 30 00 ldfs.s.nta f121=\[r125\] + 96c: 00 00 04 00 nop.i 0x0 + 970: 08 c8 03 fb 30 18 \[MMI\] ldfs.s.d4 f121=\[r125\] + 976: 90 07 f6 65 30 00 ldfs.s.d5 f121=\[r125\] + 97c: 00 00 04 00 nop.i 0x0 + 980: 08 c8 03 fb 34 18 \[MMI\] ldfs.s.d6 f121=\[r125\] + 986: 90 07 f6 6d 30 00 ldfs.s.d7 f121=\[r125\] + 98c: 00 00 04 00 nop.i 0x0 + 990: 08 c8 03 fa 38 18 \[MMI\] ldfd.s f121=\[r125\] + 996: 90 07 f4 75 30 00 ldfd.s.nt1 f121=\[r125\] + 99c: 00 00 04 00 nop.i 0x0 + 9a0: 08 c8 03 fa 3a 18 \[MMI\] ldfd.s.nt1 f121=\[r125\] + 9a6: 90 07 f4 79 30 00 ldfd.s.d2 f121=\[r125\] + 9ac: 00 00 04 00 nop.i 0x0 + 9b0: 08 c8 03 fa 3c 18 \[MMI\] ldfd.s.d2 f121=\[r125\] + 9b6: 90 07 f4 7d 30 00 ldfd.s.nta f121=\[r125\] + 9bc: 00 00 04 00 nop.i 0x0 + 9c0: 08 c8 03 fa 3e 18 \[MMI\] ldfd.s.nta f121=\[r125\] + 9c6: 90 07 f6 71 30 00 ldfd.s.d4 f121=\[r125\] + 9cc: 00 00 04 00 nop.i 0x0 + 9d0: 08 c8 03 fb 3a 18 \[MMI\] ldfd.s.d5 f121=\[r125\] + 9d6: 90 07 f6 79 30 00 ldfd.s.d6 f121=\[r125\] + 9dc: 00 00 04 00 nop.i 0x0 + 9e0: 08 c8 03 fb 3e 18 \[MMI\] ldfd.s.d7 f121=\[r125\] + 9e6: 90 07 f4 51 30 00 ldf8.s f121=\[r125\] + 9ec: 00 00 04 00 nop.i 0x0 + 9f0: 08 c8 03 fa 2a 18 \[MMI\] ldf8.s.nt1 f121=\[r125\] + 9f6: 90 07 f4 55 30 00 ldf8.s.nt1 f121=\[r125\] + 9fc: 00 00 04 00 nop.i 0x0 + a00: 08 c8 03 fa 2c 18 \[MMI\] ldf8.s.d2 f121=\[r125\] + a06: 90 07 f4 59 30 00 ldf8.s.d2 f121=\[r125\] + a0c: 00 00 04 00 nop.i 0x0 + a10: 08 c8 03 fa 2e 18 \[MMI\] ldf8.s.nta f121=\[r125\] + a16: 90 07 f4 5d 30 00 ldf8.s.nta f121=\[r125\] + a1c: 00 00 04 00 nop.i 0x0 + a20: 08 c8 03 fb 28 18 \[MMI\] ldf8.s.d4 f121=\[r125\] + a26: 90 07 f6 55 30 00 ldf8.s.d5 f121=\[r125\] + a2c: 00 00 04 00 nop.i 0x0 + a30: 08 c8 03 fb 2c 18 \[MMI\] ldf8.s.d6 f121=\[r125\] + a36: 90 07 f6 5d 30 00 ldf8.s.d7 f121=\[r125\] + a3c: 00 00 04 00 nop.i 0x0 + a40: 08 c8 03 fa 20 18 \[MMI\] ldfe.s f121=\[r125\] + a46: 90 07 f4 45 30 00 ldfe.s.nt1 f121=\[r125\] + a4c: 00 00 04 00 nop.i 0x0 + a50: 08 c8 03 fa 22 18 \[MMI\] ldfe.s.nt1 f121=\[r125\] + a56: 90 07 f4 49 30 00 ldfe.s.d2 f121=\[r125\] + a5c: 00 00 04 00 nop.i 0x0 + a60: 08 c8 03 fa 24 18 \[MMI\] ldfe.s.d2 f121=\[r125\] + a66: 90 07 f4 4d 30 00 ldfe.s.nta f121=\[r125\] + a6c: 00 00 04 00 nop.i 0x0 + a70: 08 c8 03 fa 26 18 \[MMI\] ldfe.s.nta f121=\[r125\] + a76: 90 07 f6 41 30 00 ldfe.s.d4 f121=\[r125\] + a7c: 00 00 04 00 nop.i 0x0 + a80: 08 c8 03 fb 22 18 \[MMI\] ldfe.s.d5 f121=\[r125\] + a86: 90 07 f6 49 30 00 ldfe.s.d6 f121=\[r125\] + a8c: 00 00 04 00 nop.i 0x0 + a90: 08 c8 03 fb 26 18 \[MMI\] ldfe.s.d7 f121=\[r125\] + a96: 90 07 f4 a1 30 00 ldfs.a f121=\[r125\] + a9c: 00 00 04 00 nop.i 0x0 + aa0: 08 c8 03 fa 52 18 \[MMI\] ldfs.a.nt1 f121=\[r125\] + aa6: 90 07 f4 a5 30 00 ldfs.a.nt1 f121=\[r125\] + aac: 00 00 04 00 nop.i 0x0 + ab0: 08 c8 03 fa 54 18 \[MMI\] ldfs.a.d2 f121=\[r125\] + ab6: 90 07 f4 a9 30 00 ldfs.a.d2 f121=\[r125\] + abc: 00 00 04 00 nop.i 0x0 + ac0: 08 c8 03 fa 56 18 \[MMI\] ldfs.a.nta f121=\[r125\] + ac6: 90 07 f4 ad 30 00 ldfs.a.nta f121=\[r125\] + acc: 00 00 04 00 nop.i 0x0 + ad0: 08 c8 03 fb 50 18 \[MMI\] ldfs.a.d4 f121=\[r125\] + ad6: 90 07 f6 a5 30 00 ldfs.a.d5 f121=\[r125\] + adc: 00 00 04 00 nop.i 0x0 + ae0: 08 c8 03 fb 54 18 \[MMI\] ldfs.a.d6 f121=\[r125\] + ae6: 90 07 f6 ad 30 00 ldfs.a.d7 f121=\[r125\] + aec: 00 00 04 00 nop.i 0x0 + af0: 08 c8 03 fa 58 18 \[MMI\] ldfd.a f121=\[r125\] + af6: 90 07 f4 b5 30 00 ldfd.a.nt1 f121=\[r125\] + afc: 00 00 04 00 nop.i 0x0 + b00: 08 c8 03 fa 5a 18 \[MMI\] ldfd.a.nt1 f121=\[r125\] + b06: 90 07 f4 b9 30 00 ldfd.a.d2 f121=\[r125\] + b0c: 00 00 04 00 nop.i 0x0 + b10: 08 c8 03 fa 5c 18 \[MMI\] ldfd.a.d2 f121=\[r125\] + b16: 90 07 f4 bd 30 00 ldfd.a.nta f121=\[r125\] + b1c: 00 00 04 00 nop.i 0x0 + b20: 08 c8 03 fa 5e 18 \[MMI\] ldfd.a.nta f121=\[r125\] + b26: 90 07 f6 b1 30 00 ldfd.a.d4 f121=\[r125\] + b2c: 00 00 04 00 nop.i 0x0 + b30: 08 c8 03 fb 5a 18 \[MMI\] ldfd.a.d5 f121=\[r125\] + b36: 90 07 f6 b9 30 00 ldfd.a.d6 f121=\[r125\] + b3c: 00 00 04 00 nop.i 0x0 + b40: 08 c8 03 fb 5e 18 \[MMI\] ldfd.a.d7 f121=\[r125\] + b46: 90 07 f4 91 30 00 ldf8.a f121=\[r125\] + b4c: 00 00 04 00 nop.i 0x0 + b50: 08 c8 03 fa 4a 18 \[MMI\] ldf8.a.nt1 f121=\[r125\] + b56: 90 07 f4 95 30 00 ldf8.a.nt1 f121=\[r125\] + b5c: 00 00 04 00 nop.i 0x0 + b60: 08 c8 03 fa 4c 18 \[MMI\] ldf8.a.d2 f121=\[r125\] + b66: 90 07 f4 99 30 00 ldf8.a.d2 f121=\[r125\] + b6c: 00 00 04 00 nop.i 0x0 + b70: 08 c8 03 fa 4e 18 \[MMI\] ldf8.a.nta f121=\[r125\] + b76: 90 07 f4 9d 30 00 ldf8.a.nta f121=\[r125\] + b7c: 00 00 04 00 nop.i 0x0 + b80: 08 c8 03 fb 48 18 \[MMI\] ldf8.a.d4 f121=\[r125\] + b86: 90 07 f6 95 30 00 ldf8.a.d5 f121=\[r125\] + b8c: 00 00 04 00 nop.i 0x0 + b90: 08 c8 03 fb 4c 18 \[MMI\] ldf8.a.d6 f121=\[r125\] + b96: 90 07 f6 9d 30 00 ldf8.a.d7 f121=\[r125\] + b9c: 00 00 04 00 nop.i 0x0 + ba0: 08 c8 03 fa 40 18 \[MMI\] ldfe.a f121=\[r125\] + ba6: 90 07 f4 85 30 00 ldfe.a.nt1 f121=\[r125\] + bac: 00 00 04 00 nop.i 0x0 + bb0: 08 c8 03 fa 42 18 \[MMI\] ldfe.a.nt1 f121=\[r125\] + bb6: 90 07 f4 89 30 00 ldfe.a.d2 f121=\[r125\] + bbc: 00 00 04 00 nop.i 0x0 + bc0: 08 c8 03 fa 44 18 \[MMI\] ldfe.a.d2 f121=\[r125\] + bc6: 90 07 f4 8d 30 00 ldfe.a.nta f121=\[r125\] + bcc: 00 00 04 00 nop.i 0x0 + bd0: 08 c8 03 fa 46 18 \[MMI\] ldfe.a.nta f121=\[r125\] + bd6: 90 07 f6 81 30 00 ldfe.a.d4 f121=\[r125\] + bdc: 00 00 04 00 nop.i 0x0 + be0: 08 c8 03 fb 42 18 \[MMI\] ldfe.a.d5 f121=\[r125\] + be6: 90 07 f6 89 30 00 ldfe.a.d6 f121=\[r125\] + bec: 00 00 04 00 nop.i 0x0 + bf0: 08 c8 03 fb 46 18 \[MMI\] ldfe.a.d7 f121=\[r125\] + bf6: 90 07 f4 e1 30 00 ldfs.sa f121=\[r125\] + bfc: 00 00 04 00 nop.i 0x0 + c00: 08 c8 03 fa 72 18 \[MMI\] ldfs.sa.nt1 f121=\[r125\] + c06: 90 07 f4 e5 30 00 ldfs.sa.nt1 f121=\[r125\] + c0c: 00 00 04 00 nop.i 0x0 + c10: 08 c8 03 fa 74 18 \[MMI\] ldfs.sa.d2 f121=\[r125\] + c16: 90 07 f4 e9 30 00 ldfs.sa.d2 f121=\[r125\] + c1c: 00 00 04 00 nop.i 0x0 + c20: 08 c8 03 fa 76 18 \[MMI\] ldfs.sa.nta f121=\[r125\] + c26: 90 07 f4 ed 30 00 ldfs.sa.nta f121=\[r125\] + c2c: 00 00 04 00 nop.i 0x0 + c30: 08 c8 03 fb 70 18 \[MMI\] ldfs.sa.d4 f121=\[r125\] + c36: 90 07 f6 e5 30 00 ldfs.sa.d5 f121=\[r125\] + c3c: 00 00 04 00 nop.i 0x0 + c40: 08 c8 03 fb 74 18 \[MMI\] ldfs.sa.d6 f121=\[r125\] + c46: 90 07 f6 ed 30 00 ldfs.sa.d7 f121=\[r125\] + c4c: 00 00 04 00 nop.i 0x0 + c50: 08 c8 03 fa 78 18 \[MMI\] ldfd.sa f121=\[r125\] + c56: 90 07 f4 f5 30 00 ldfd.sa.nt1 f121=\[r125\] + c5c: 00 00 04 00 nop.i 0x0 + c60: 08 c8 03 fa 7a 18 \[MMI\] ldfd.sa.nt1 f121=\[r125\] + c66: 90 07 f4 f9 30 00 ldfd.sa.d2 f121=\[r125\] + c6c: 00 00 04 00 nop.i 0x0 + c70: 08 c8 03 fa 7c 18 \[MMI\] ldfd.sa.d2 f121=\[r125\] + c76: 90 07 f4 fd 30 00 ldfd.sa.nta f121=\[r125\] + c7c: 00 00 04 00 nop.i 0x0 + c80: 08 c8 03 fa 7e 18 \[MMI\] ldfd.sa.nta f121=\[r125\] + c86: 90 07 f6 f1 30 00 ldfd.sa.d4 f121=\[r125\] + c8c: 00 00 04 00 nop.i 0x0 + c90: 08 c8 03 fb 7a 18 \[MMI\] ldfd.sa.d5 f121=\[r125\] + c96: 90 07 f6 f9 30 00 ldfd.sa.d6 f121=\[r125\] + c9c: 00 00 04 00 nop.i 0x0 + ca0: 08 c8 03 fb 7e 18 \[MMI\] ldfd.sa.d7 f121=\[r125\] + ca6: 90 07 f4 d1 30 00 ldf8.sa f121=\[r125\] + cac: 00 00 04 00 nop.i 0x0 + cb0: 08 c8 03 fa 6a 18 \[MMI\] ldf8.sa.nt1 f121=\[r125\] + cb6: 90 07 f4 d5 30 00 ldf8.sa.nt1 f121=\[r125\] + cbc: 00 00 04 00 nop.i 0x0 + cc0: 08 c8 03 fa 6c 18 \[MMI\] ldf8.sa.d2 f121=\[r125\] + cc6: 90 07 f4 d9 30 00 ldf8.sa.d2 f121=\[r125\] + ccc: 00 00 04 00 nop.i 0x0 + cd0: 08 c8 03 fa 6e 18 \[MMI\] ldf8.sa.nta f121=\[r125\] + cd6: 90 07 f4 dd 30 00 ldf8.sa.nta f121=\[r125\] + cdc: 00 00 04 00 nop.i 0x0 + ce0: 08 c8 03 fb 68 18 \[MMI\] ldf8.sa.d4 f121=\[r125\] + ce6: 90 07 f6 d5 30 00 ldf8.sa.d5 f121=\[r125\] + cec: 00 00 04 00 nop.i 0x0 + cf0: 08 c8 03 fb 6c 18 \[MMI\] ldf8.sa.d6 f121=\[r125\] + cf6: 90 07 f6 dd 30 00 ldf8.sa.d7 f121=\[r125\] + cfc: 00 00 04 00 nop.i 0x0 + d00: 08 c8 03 fa 60 18 \[MMI\] ldfe.sa f121=\[r125\] + d06: 90 07 f4 c5 30 00 ldfe.sa.nt1 f121=\[r125\] + d0c: 00 00 04 00 nop.i 0x0 + d10: 08 c8 03 fa 62 18 \[MMI\] ldfe.sa.nt1 f121=\[r125\] + d16: 90 07 f4 c9 30 00 ldfe.sa.d2 f121=\[r125\] + d1c: 00 00 04 00 nop.i 0x0 + d20: 08 c8 03 fa 64 18 \[MMI\] ldfe.sa.d2 f121=\[r125\] + d26: 90 07 f4 cd 30 00 ldfe.sa.nta f121=\[r125\] + d2c: 00 00 04 00 nop.i 0x0 + d30: 08 c8 03 fa 66 18 \[MMI\] ldfe.sa.nta f121=\[r125\] + d36: 90 07 f6 c1 30 00 ldfe.sa.d4 f121=\[r125\] + d3c: 00 00 04 00 nop.i 0x0 + d40: 08 c8 03 fb 62 18 \[MMI\] ldfe.sa.d5 f121=\[r125\] + d46: 90 07 f6 c9 30 00 ldfe.sa.d6 f121=\[r125\] + d4c: 00 00 04 00 nop.i 0x0 + d50: 08 c8 03 fb 66 18 \[MMI\] ldfe.sa.d7 f121=\[r125\] + d56: 90 07 f4 b1 31 00 ldf.fill f121=\[r125\] + d5c: 00 00 04 00 nop.i 0x0 + d60: 08 c8 03 fa da 18 \[MMI\] ldf.fill.nt1 f121=\[r125\] + d66: 90 07 f4 b5 31 00 ldf.fill.nt1 f121=\[r125\] + d6c: 00 00 04 00 nop.i 0x0 + d70: 08 c8 03 fa dc 18 \[MMI\] ldf.fill.d2 f121=\[r125\] + d76: 90 07 f4 b9 31 00 ldf.fill.d2 f121=\[r125\] + d7c: 00 00 04 00 nop.i 0x0 + d80: 08 c8 03 fa de 18 \[MMI\] ldf.fill.nta f121=\[r125\] + d86: 90 07 f4 bd 31 00 ldf.fill.nta f121=\[r125\] + d8c: 00 00 04 00 nop.i 0x0 + d90: 08 c8 03 fb d8 18 \[MMI\] ldf.fill.d4 f121=\[r125\] + d96: 90 07 f6 b5 31 00 ldf.fill.d5 f121=\[r125\] + d9c: 00 00 04 00 nop.i 0x0 + da0: 08 c8 03 fb dc 18 \[MMI\] ldf.fill.d6 f121=\[r125\] + da6: 90 07 f6 bd 31 00 ldf.fill.d7 f121=\[r125\] + dac: 00 00 04 00 nop.i 0x0 + db0: 08 c8 03 fa 10 19 \[MMI\] ldfs.c.clr f121=\[r125\] + db6: 90 07 f4 25 32 00 ldfs.c.clr.nt1 f121=\[r125\] + dbc: 00 00 04 00 nop.i 0x0 + dc0: 08 c8 03 fa 12 19 \[MMI\] ldfs.c.clr.nt1 f121=\[r125\] + dc6: 90 07 f4 29 32 00 ldfs.c.clr.d2 f121=\[r125\] + dcc: 00 00 04 00 nop.i 0x0 + dd0: 08 c8 03 fa 14 19 \[MMI\] ldfs.c.clr.d2 f121=\[r125\] + dd6: 90 07 f4 2d 32 00 ldfs.c.clr.nta f121=\[r125\] + ddc: 00 00 04 00 nop.i 0x0 + de0: 08 c8 03 fa 16 19 \[MMI\] ldfs.c.clr.nta f121=\[r125\] + de6: 90 07 f6 21 32 00 ldfs.c.clr.d4 f121=\[r125\] + dec: 00 00 04 00 nop.i 0x0 + df0: 08 c8 03 fb 12 19 \[MMI\] ldfs.c.clr.d5 f121=\[r125\] + df6: 90 07 f6 29 32 00 ldfs.c.clr.d6 f121=\[r125\] + dfc: 00 00 04 00 nop.i 0x0 + e00: 08 c8 03 fb 16 19 \[MMI\] ldfs.c.clr.d7 f121=\[r125\] + e06: 90 07 f4 31 32 00 ldfd.c.clr f121=\[r125\] + e0c: 00 00 04 00 nop.i 0x0 + e10: 08 c8 03 fa 1a 19 \[MMI\] ldfd.c.clr.nt1 f121=\[r125\] + e16: 90 07 f4 35 32 00 ldfd.c.clr.nt1 f121=\[r125\] + e1c: 00 00 04 00 nop.i 0x0 + e20: 08 c8 03 fa 1c 19 \[MMI\] ldfd.c.clr.d2 f121=\[r125\] + e26: 90 07 f4 39 32 00 ldfd.c.clr.d2 f121=\[r125\] + e2c: 00 00 04 00 nop.i 0x0 + e30: 08 c8 03 fa 1e 19 \[MMI\] ldfd.c.clr.nta f121=\[r125\] + e36: 90 07 f4 3d 32 00 ldfd.c.clr.nta f121=\[r125\] + e3c: 00 00 04 00 nop.i 0x0 + e40: 08 c8 03 fb 18 19 \[MMI\] ldfd.c.clr.d4 f121=\[r125\] + e46: 90 07 f6 35 32 00 ldfd.c.clr.d5 f121=\[r125\] + e4c: 00 00 04 00 nop.i 0x0 + e50: 08 c8 03 fb 1c 19 \[MMI\] ldfd.c.clr.d6 f121=\[r125\] + e56: 90 07 f6 3d 32 00 ldfd.c.clr.d7 f121=\[r125\] + e5c: 00 00 04 00 nop.i 0x0 + e60: 08 c8 03 fa 08 19 \[MMI\] ldf8.c.clr f121=\[r125\] + e66: 90 07 f4 15 32 00 ldf8.c.clr.nt1 f121=\[r125\] + e6c: 00 00 04 00 nop.i 0x0 + e70: 08 c8 03 fa 0a 19 \[MMI\] ldf8.c.clr.nt1 f121=\[r125\] + e76: 90 07 f4 19 32 00 ldf8.c.clr.d2 f121=\[r125\] + e7c: 00 00 04 00 nop.i 0x0 + e80: 08 c8 03 fa 0c 19 \[MMI\] ldf8.c.clr.d2 f121=\[r125\] + e86: 90 07 f4 1d 32 00 ldf8.c.clr.nta f121=\[r125\] + e8c: 00 00 04 00 nop.i 0x0 + e90: 08 c8 03 fa 0e 19 \[MMI\] ldf8.c.clr.nta f121=\[r125\] + e96: 90 07 f6 11 32 00 ldf8.c.clr.d4 f121=\[r125\] + e9c: 00 00 04 00 nop.i 0x0 + ea0: 08 c8 03 fb 0a 19 \[MMI\] ldf8.c.clr.d5 f121=\[r125\] + ea6: 90 07 f6 19 32 00 ldf8.c.clr.d6 f121=\[r125\] + eac: 00 00 04 00 nop.i 0x0 + eb0: 08 c8 03 fb 0e 19 \[MMI\] ldf8.c.clr.d7 f121=\[r125\] + eb6: 90 07 f4 01 32 00 ldfe.c.clr f121=\[r125\] + ebc: 00 00 04 00 nop.i 0x0 + ec0: 08 c8 03 fa 02 19 \[MMI\] ldfe.c.clr.nt1 f121=\[r125\] + ec6: 90 07 f4 05 32 00 ldfe.c.clr.nt1 f121=\[r125\] + ecc: 00 00 04 00 nop.i 0x0 + ed0: 08 c8 03 fa 04 19 \[MMI\] ldfe.c.clr.d2 f121=\[r125\] + ed6: 90 07 f4 09 32 00 ldfe.c.clr.d2 f121=\[r125\] + edc: 00 00 04 00 nop.i 0x0 + ee0: 08 c8 03 fa 06 19 \[MMI\] ldfe.c.clr.nta f121=\[r125\] + ee6: 90 07 f4 0d 32 00 ldfe.c.clr.nta f121=\[r125\] + eec: 00 00 04 00 nop.i 0x0 + ef0: 08 c8 03 fb 00 19 \[MMI\] ldfe.c.clr.d4 f121=\[r125\] + ef6: 90 07 f6 05 32 00 ldfe.c.clr.d5 f121=\[r125\] + efc: 00 00 04 00 nop.i 0x0 + f00: 08 c8 03 fb 04 19 \[MMI\] ldfe.c.clr.d6 f121=\[r125\] + f06: 90 07 f6 0d 32 00 ldfe.c.clr.d7 f121=\[r125\] + f0c: 00 00 04 00 nop.i 0x0 + f10: 08 c8 03 fa 30 19 \[MMI\] ldfs.c.nc f121=\[r125\] + f16: 90 07 f4 65 32 00 ldfs.c.nc.nt1 f121=\[r125\] + f1c: 00 00 04 00 nop.i 0x0 + f20: 08 c8 03 fa 32 19 \[MMI\] ldfs.c.nc.nt1 f121=\[r125\] + f26: 90 07 f4 69 32 00 ldfs.c.nc.d2 f121=\[r125\] + f2c: 00 00 04 00 nop.i 0x0 + f30: 08 c8 03 fa 34 19 \[MMI\] ldfs.c.nc.d2 f121=\[r125\] + f36: 90 07 f4 6d 32 00 ldfs.c.nc.nta f121=\[r125\] + f3c: 00 00 04 00 nop.i 0x0 + f40: 08 c8 03 fa 36 19 \[MMI\] ldfs.c.nc.nta f121=\[r125\] + f46: 90 07 f6 61 32 00 ldfs.c.nc.d4 f121=\[r125\] + f4c: 00 00 04 00 nop.i 0x0 + f50: 08 c8 03 fb 32 19 \[MMI\] ldfs.c.nc.d5 f121=\[r125\] + f56: 90 07 f6 69 32 00 ldfs.c.nc.d6 f121=\[r125\] + f5c: 00 00 04 00 nop.i 0x0 + f60: 08 c8 03 fb 36 19 \[MMI\] ldfs.c.nc.d7 f121=\[r125\] + f66: 90 07 f4 71 32 00 ldfd.c.nc f121=\[r125\] + f6c: 00 00 04 00 nop.i 0x0 + f70: 08 c8 03 fa 3a 19 \[MMI\] ldfd.c.nc.nt1 f121=\[r125\] + f76: 90 07 f4 75 32 00 ldfd.c.nc.nt1 f121=\[r125\] + f7c: 00 00 04 00 nop.i 0x0 + f80: 08 c8 03 fa 3c 19 \[MMI\] ldfd.c.nc.d2 f121=\[r125\] + f86: 90 07 f4 79 32 00 ldfd.c.nc.d2 f121=\[r125\] + f8c: 00 00 04 00 nop.i 0x0 + f90: 08 c8 03 fa 3e 19 \[MMI\] ldfd.c.nc.nta f121=\[r125\] + f96: 90 07 f4 7d 32 00 ldfd.c.nc.nta f121=\[r125\] + f9c: 00 00 04 00 nop.i 0x0 + fa0: 08 c8 03 fb 38 19 \[MMI\] ldfd.c.nc.d4 f121=\[r125\] + fa6: 90 07 f6 75 32 00 ldfd.c.nc.d5 f121=\[r125\] + fac: 00 00 04 00 nop.i 0x0 + fb0: 08 c8 03 fb 3c 19 \[MMI\] ldfd.c.nc.d6 f121=\[r125\] + fb6: 90 07 f6 7d 32 00 ldfd.c.nc.d7 f121=\[r125\] + fbc: 00 00 04 00 nop.i 0x0 + fc0: 08 c8 03 fa 28 19 \[MMI\] ldf8.c.nc f121=\[r125\] + fc6: 90 07 f4 55 32 00 ldf8.c.nc.nt1 f121=\[r125\] + fcc: 00 00 04 00 nop.i 0x0 + fd0: 08 c8 03 fa 2a 19 \[MMI\] ldf8.c.nc.nt1 f121=\[r125\] + fd6: 90 07 f4 59 32 00 ldf8.c.nc.d2 f121=\[r125\] + fdc: 00 00 04 00 nop.i 0x0 + fe0: 08 c8 03 fa 2c 19 \[MMI\] ldf8.c.nc.d2 f121=\[r125\] + fe6: 90 07 f4 5d 32 00 ldf8.c.nc.nta f121=\[r125\] + fec: 00 00 04 00 nop.i 0x0 + ff0: 08 c8 03 fa 2e 19 \[MMI\] ldf8.c.nc.nta f121=\[r125\] + ff6: 90 07 f6 51 32 00 ldf8.c.nc.d4 f121=\[r125\] + ffc: 00 00 04 00 nop.i 0x0 + 1000: 08 c8 03 fb 2a 19 \[MMI\] ldf8.c.nc.d5 f121=\[r125\] + 1006: 90 07 f6 59 32 00 ldf8.c.nc.d6 f121=\[r125\] + 100c: 00 00 04 00 nop.i 0x0 + 1010: 08 c8 03 fb 2e 19 \[MMI\] ldf8.c.nc.d7 f121=\[r125\] + 1016: 90 07 f4 41 32 00 ldfe.c.nc f121=\[r125\] + 101c: 00 00 04 00 nop.i 0x0 + 1020: 08 c8 03 fa 22 19 \[MMI\] ldfe.c.nc.nt1 f121=\[r125\] + 1026: 90 07 f4 45 32 00 ldfe.c.nc.nt1 f121=\[r125\] + 102c: 00 00 04 00 nop.i 0x0 + 1030: 08 c8 03 fa 24 19 \[MMI\] ldfe.c.nc.d2 f121=\[r125\] + 1036: 90 07 f4 49 32 00 ldfe.c.nc.d2 f121=\[r125\] + 103c: 00 00 04 00 nop.i 0x0 + 1040: 08 c8 03 fa 26 19 \[MMI\] ldfe.c.nc.nta f121=\[r125\] + 1046: 90 07 f4 4d 32 00 ldfe.c.nc.nta f121=\[r125\] + 104c: 00 00 04 00 nop.i 0x0 + 1050: 08 c8 03 fb 20 19 \[MMI\] ldfe.c.nc.d4 f121=\[r125\] + 1056: 90 07 f6 45 32 00 ldfe.c.nc.d5 f121=\[r125\] + 105c: 00 00 04 00 nop.i 0x0 + 1060: 08 c8 03 fb 24 19 \[MMI\] ldfe.c.nc.d6 f121=\[r125\] + 1066: 90 07 f6 4d 32 00 ldfe.c.nc.d7 f121=\[r125\] + 106c: 00 00 04 00 nop.i 0x0 + 1070: 08 c0 03 28 00 10 \[MMI\] ld1 r120=\[r20\] + 1076: 80 07 50 04 20 00 ld1.nt1 r120=\[r20\] + 107c: 00 00 04 00 nop.i 0x0 + 1080: 08 c0 03 28 02 10 \[MMI\] ld1.nt1 r120=\[r20\] + 1086: 80 07 50 08 20 00 ld1.d2 r120=\[r20\] + 108c: 00 00 04 00 nop.i 0x0 + 1090: 08 c0 03 28 04 10 \[MMI\] ld1.d2 r120=\[r20\] + 1096: 80 07 50 0c 20 00 ld1.nta r120=\[r20\] + 109c: 00 00 04 00 nop.i 0x0 + 10a0: 08 c0 03 28 06 10 \[MMI\] ld1.nta r120=\[r20\] + 10a6: 80 07 52 00 20 00 ld1.d4 r120=\[r20\] + 10ac: 00 00 04 00 nop.i 0x0 + 10b0: 08 c0 03 29 02 10 \[MMI\] ld1.d5 r120=\[r20\] + 10b6: 80 07 52 08 20 00 ld1.d6 r120=\[r20\] + 10bc: 00 00 04 00 nop.i 0x0 + 10c0: 08 c0 03 29 06 10 \[MMI\] ld1.d7 r120=\[r20\] + 10c6: 80 07 50 10 20 00 ld2 r120=\[r20\] + 10cc: 00 00 04 00 nop.i 0x0 + 10d0: 08 c0 03 28 0a 10 \[MMI\] ld2.nt1 r120=\[r20\] + 10d6: 80 07 50 14 20 00 ld2.nt1 r120=\[r20\] + 10dc: 00 00 04 00 nop.i 0x0 + 10e0: 08 c0 03 28 0c 10 \[MMI\] ld2.d2 r120=\[r20\] + 10e6: 80 07 50 18 20 00 ld2.d2 r120=\[r20\] + 10ec: 00 00 04 00 nop.i 0x0 + 10f0: 08 c0 03 28 0e 10 \[MMI\] ld2.nta r120=\[r20\] + 10f6: 80 07 50 1c 20 00 ld2.nta r120=\[r20\] + 10fc: 00 00 04 00 nop.i 0x0 + 1100: 08 c0 03 29 08 10 \[MMI\] ld2.d4 r120=\[r20\] + 1106: 80 07 52 14 20 00 ld2.d5 r120=\[r20\] + 110c: 00 00 04 00 nop.i 0x0 + 1110: 08 c0 03 29 0c 10 \[MMI\] ld2.d6 r120=\[r20\] + 1116: 80 07 52 1c 20 00 ld2.d7 r120=\[r20\] + 111c: 00 00 04 00 nop.i 0x0 + 1120: 08 c0 03 28 10 10 \[MMI\] ld4 r120=\[r20\] + 1126: 80 07 50 24 20 00 ld4.nt1 r120=\[r20\] + 112c: 00 00 04 00 nop.i 0x0 + 1130: 08 c0 03 28 12 10 \[MMI\] ld4.nt1 r120=\[r20\] + 1136: 80 07 50 28 20 00 ld4.d2 r120=\[r20\] + 113c: 00 00 04 00 nop.i 0x0 + 1140: 08 c0 03 28 14 10 \[MMI\] ld4.d2 r120=\[r20\] + 1146: 80 07 50 2c 20 00 ld4.nta r120=\[r20\] + 114c: 00 00 04 00 nop.i 0x0 + 1150: 08 c0 03 28 16 10 \[MMI\] ld4.nta r120=\[r20\] + 1156: 80 07 52 20 20 00 ld4.d4 r120=\[r20\] + 115c: 00 00 04 00 nop.i 0x0 + 1160: 08 c0 03 29 12 10 \[MMI\] ld4.d5 r120=\[r20\] + 1166: 80 07 52 28 20 00 ld4.d6 r120=\[r20\] + 116c: 00 00 04 00 nop.i 0x0 + 1170: 08 c0 03 29 16 10 \[MMI\] ld4.d7 r120=\[r20\] + 1176: 80 07 50 30 20 00 ld8 r120=\[r20\] + 117c: 00 00 04 00 nop.i 0x0 + 1180: 08 c0 03 28 1a 10 \[MMI\] ld8.nt1 r120=\[r20\] + 1186: 80 07 50 34 20 00 ld8.nt1 r120=\[r20\] + 118c: 00 00 04 00 nop.i 0x0 + 1190: 08 c0 03 28 1c 10 \[MMI\] ld8.d2 r120=\[r20\] + 1196: 80 07 50 38 20 00 ld8.d2 r120=\[r20\] + 119c: 00 00 04 00 nop.i 0x0 + 11a0: 08 c0 03 28 1e 10 \[MMI\] ld8.nta r120=\[r20\] + 11a6: 80 07 50 3c 20 00 ld8.nta r120=\[r20\] + 11ac: 00 00 04 00 nop.i 0x0 + 11b0: 08 c0 03 29 18 10 \[MMI\] ld8.d4 r120=\[r20\] + 11b6: 80 07 52 34 20 00 ld8.d5 r120=\[r20\] + 11bc: 00 00 04 00 nop.i 0x0 + 11c0: 08 c0 03 29 1c 10 \[MMI\] ld8.d6 r120=\[r20\] + 11c6: 80 07 52 3c 20 00 ld8.d7 r120=\[r20\] + 11cc: 00 00 04 00 nop.i 0x0 + 11d0: 08 c0 03 28 20 10 \[MMI\] ld1.s r120=\[r20\] + 11d6: 80 07 50 44 20 00 ld1.s.nt1 r120=\[r20\] + 11dc: 00 00 04 00 nop.i 0x0 + 11e0: 08 c0 03 28 22 10 \[MMI\] ld1.s.nt1 r120=\[r20\] + 11e6: 80 07 50 48 20 00 ld1.s.d2 r120=\[r20\] + 11ec: 00 00 04 00 nop.i 0x0 + 11f0: 08 c0 03 28 24 10 \[MMI\] ld1.s.d2 r120=\[r20\] + 11f6: 80 07 50 4c 20 00 ld1.s.nta r120=\[r20\] + 11fc: 00 00 04 00 nop.i 0x0 + 1200: 08 c0 03 28 26 10 \[MMI\] ld1.s.nta r120=\[r20\] + 1206: 80 07 52 40 20 00 ld1.s.d4 r120=\[r20\] + 120c: 00 00 04 00 nop.i 0x0 + 1210: 08 c0 03 29 22 10 \[MMI\] ld1.s.d5 r120=\[r20\] + 1216: 80 07 52 48 20 00 ld1.s.d6 r120=\[r20\] + 121c: 00 00 04 00 nop.i 0x0 + 1220: 08 c0 03 29 26 10 \[MMI\] ld1.s.d7 r120=\[r20\] + 1226: 80 07 50 50 20 00 ld2.s r120=\[r20\] + 122c: 00 00 04 00 nop.i 0x0 + 1230: 08 c0 03 28 2a 10 \[MMI\] ld2.s.nt1 r120=\[r20\] + 1236: 80 07 50 54 20 00 ld2.s.nt1 r120=\[r20\] + 123c: 00 00 04 00 nop.i 0x0 + 1240: 08 c0 03 28 2c 10 \[MMI\] ld2.s.d2 r120=\[r20\] + 1246: 80 07 50 58 20 00 ld2.s.d2 r120=\[r20\] + 124c: 00 00 04 00 nop.i 0x0 + 1250: 08 c0 03 28 2e 10 \[MMI\] ld2.s.nta r120=\[r20\] + 1256: 80 07 50 5c 20 00 ld2.s.nta r120=\[r20\] + 125c: 00 00 04 00 nop.i 0x0 + 1260: 08 c0 03 29 28 10 \[MMI\] ld2.s.d4 r120=\[r20\] + 1266: 80 07 52 54 20 00 ld2.s.d5 r120=\[r20\] + 126c: 00 00 04 00 nop.i 0x0 + 1270: 08 c0 03 29 2c 10 \[MMI\] ld2.s.d6 r120=\[r20\] + 1276: 80 07 52 5c 20 00 ld2.s.d7 r120=\[r20\] + 127c: 00 00 04 00 nop.i 0x0 + 1280: 08 c0 03 28 30 10 \[MMI\] ld4.s r120=\[r20\] + 1286: 80 07 50 64 20 00 ld4.s.nt1 r120=\[r20\] + 128c: 00 00 04 00 nop.i 0x0 + 1290: 08 c0 03 28 32 10 \[MMI\] ld4.s.nt1 r120=\[r20\] + 1296: 80 07 50 68 20 00 ld4.s.d2 r120=\[r20\] + 129c: 00 00 04 00 nop.i 0x0 + 12a0: 08 c0 03 28 34 10 \[MMI\] ld4.s.d2 r120=\[r20\] + 12a6: 80 07 50 6c 20 00 ld4.s.nta r120=\[r20\] + 12ac: 00 00 04 00 nop.i 0x0 + 12b0: 08 c0 03 28 36 10 \[MMI\] ld4.s.nta r120=\[r20\] + 12b6: 80 07 52 60 20 00 ld4.s.d4 r120=\[r20\] + 12bc: 00 00 04 00 nop.i 0x0 + 12c0: 08 c0 03 29 32 10 \[MMI\] ld4.s.d5 r120=\[r20\] + 12c6: 80 07 52 68 20 00 ld4.s.d6 r120=\[r20\] + 12cc: 00 00 04 00 nop.i 0x0 + 12d0: 08 c0 03 29 36 10 \[MMI\] ld4.s.d7 r120=\[r20\] + 12d6: 80 07 50 70 20 00 ld8.s r120=\[r20\] + 12dc: 00 00 04 00 nop.i 0x0 + 12e0: 08 c0 03 28 3a 10 \[MMI\] ld8.s.nt1 r120=\[r20\] + 12e6: 80 07 50 74 20 00 ld8.s.nt1 r120=\[r20\] + 12ec: 00 00 04 00 nop.i 0x0 + 12f0: 08 c0 03 28 3c 10 \[MMI\] ld8.s.d2 r120=\[r20\] + 12f6: 80 07 50 78 20 00 ld8.s.d2 r120=\[r20\] + 12fc: 00 00 04 00 nop.i 0x0 + 1300: 08 c0 03 28 3e 10 \[MMI\] ld8.s.nta r120=\[r20\] + 1306: 80 07 50 7c 20 00 ld8.s.nta r120=\[r20\] + 130c: 00 00 04 00 nop.i 0x0 + 1310: 08 c0 03 29 38 10 \[MMI\] ld8.s.d4 r120=\[r20\] + 1316: 80 07 52 74 20 00 ld8.s.d5 r120=\[r20\] + 131c: 00 00 04 00 nop.i 0x0 + 1320: 08 c0 03 29 3c 10 \[MMI\] ld8.s.d6 r120=\[r20\] + 1326: 80 07 52 7c 20 00 ld8.s.d7 r120=\[r20\] + 132c: 00 00 04 00 nop.i 0x0 + 1330: 08 c0 03 28 40 10 \[MMI\] ld1.a r120=\[r20\] + 1336: 80 07 50 84 20 00 ld1.a.nt1 r120=\[r20\] + 133c: 00 00 04 00 nop.i 0x0 + 1340: 08 c0 03 28 42 10 \[MMI\] ld1.a.nt1 r120=\[r20\] + 1346: 80 07 50 88 20 00 ld1.a.d2 r120=\[r20\] + 134c: 00 00 04 00 nop.i 0x0 + 1350: 08 c0 03 28 44 10 \[MMI\] ld1.a.d2 r120=\[r20\] + 1356: 80 07 50 8c 20 00 ld1.a.nta r120=\[r20\] + 135c: 00 00 04 00 nop.i 0x0 + 1360: 08 c0 03 28 46 10 \[MMI\] ld1.a.nta r120=\[r20\] + 1366: 80 07 52 80 20 00 ld1.a.d4 r120=\[r20\] + 136c: 00 00 04 00 nop.i 0x0 + 1370: 08 c0 03 29 42 10 \[MMI\] ld1.a.d5 r120=\[r20\] + 1376: 80 07 52 88 20 00 ld1.a.d6 r120=\[r20\] + 137c: 00 00 04 00 nop.i 0x0 + 1380: 08 c0 03 29 46 10 \[MMI\] ld1.a.d7 r120=\[r20\] + 1386: 80 07 50 90 20 00 ld2.a r120=\[r20\] + 138c: 00 00 04 00 nop.i 0x0 + 1390: 08 c0 03 28 4a 10 \[MMI\] ld2.a.nt1 r120=\[r20\] + 1396: 80 07 50 94 20 00 ld2.a.nt1 r120=\[r20\] + 139c: 00 00 04 00 nop.i 0x0 + 13a0: 08 c0 03 28 4c 10 \[MMI\] ld2.a.d2 r120=\[r20\] + 13a6: 80 07 50 9c 20 00 ld2.a.nta r120=\[r20\] + 13ac: 00 00 04 00 nop.i 0x0 + 13b0: 08 c0 03 28 4e 10 \[MMI\] ld2.a.nta r120=\[r20\] + 13b6: 80 07 52 90 20 00 ld2.a.d4 r120=\[r20\] + 13bc: 00 00 04 00 nop.i 0x0 + 13c0: 08 c0 03 29 4a 10 \[MMI\] ld2.a.d5 r120=\[r20\] + 13c6: 80 07 52 98 20 00 ld2.a.d6 r120=\[r20\] + 13cc: 00 00 04 00 nop.i 0x0 + 13d0: 08 c0 03 29 4e 10 \[MMI\] ld2.a.d7 r120=\[r20\] + 13d6: 80 07 50 a0 20 00 ld4.a r120=\[r20\] + 13dc: 00 00 04 00 nop.i 0x0 + 13e0: 08 c0 03 28 52 10 \[MMI\] ld4.a.nt1 r120=\[r20\] + 13e6: 80 07 50 a4 20 00 ld4.a.nt1 r120=\[r20\] + 13ec: 00 00 04 00 nop.i 0x0 + 13f0: 08 c0 03 28 54 10 \[MMI\] ld4.a.d2 r120=\[r20\] + 13f6: 80 07 50 a8 20 00 ld4.a.d2 r120=\[r20\] + 13fc: 00 00 04 00 nop.i 0x0 + 1400: 08 c0 03 28 56 10 \[MMI\] ld4.a.nta r120=\[r20\] + 1406: 80 07 50 ac 20 00 ld4.a.nta r120=\[r20\] + 140c: 00 00 04 00 nop.i 0x0 + 1410: 08 c0 03 29 50 10 \[MMI\] ld4.a.d4 r120=\[r20\] + 1416: 80 07 52 a4 20 00 ld4.a.d5 r120=\[r20\] + 141c: 00 00 04 00 nop.i 0x0 + 1420: 08 c0 03 29 54 10 \[MMI\] ld4.a.d6 r120=\[r20\] + 1426: 80 07 52 ac 20 00 ld4.a.d7 r120=\[r20\] + 142c: 00 00 04 00 nop.i 0x0 + 1430: 08 c0 03 28 58 10 \[MMI\] ld8.a r120=\[r20\] + 1436: 80 07 50 b4 20 00 ld8.a.nt1 r120=\[r20\] + 143c: 00 00 04 00 nop.i 0x0 + 1440: 08 c0 03 28 5a 10 \[MMI\] ld8.a.nt1 r120=\[r20\] + 1446: 80 07 50 b8 20 00 ld8.a.d2 r120=\[r20\] + 144c: 00 00 04 00 nop.i 0x0 + 1450: 08 c0 03 28 5c 10 \[MMI\] ld8.a.d2 r120=\[r20\] + 1456: 80 07 50 bc 20 00 ld8.a.nta r120=\[r20\] + 145c: 00 00 04 00 nop.i 0x0 + 1460: 08 c0 03 28 5e 10 \[MMI\] ld8.a.nta r120=\[r20\] + 1466: 80 07 52 b4 20 00 ld8.a.d5 r120=\[r20\] + 146c: 00 00 04 00 nop.i 0x0 + 1470: 08 c0 03 29 5c 10 \[MMI\] ld8.a.d6 r120=\[r20\] + 1476: 80 07 52 bc 20 00 ld8.a.d7 r120=\[r20\] + 147c: 00 00 04 00 nop.i 0x0 + 1480: 08 c0 03 28 60 10 \[MMI\] ld1.sa r120=\[r20\] + 1486: 80 07 50 c4 20 00 ld1.sa.nt1 r120=\[r20\] + 148c: 00 00 04 00 nop.i 0x0 + 1490: 08 c0 03 28 62 10 \[MMI\] ld1.sa.nt1 r120=\[r20\] + 1496: 80 07 50 c8 20 00 ld1.sa.d2 r120=\[r20\] + 149c: 00 00 04 00 nop.i 0x0 + 14a0: 08 c0 03 28 64 10 \[MMI\] ld1.sa.d2 r120=\[r20\] + 14a6: 80 07 50 cc 20 00 ld1.sa.nta r120=\[r20\] + 14ac: 00 00 04 00 nop.i 0x0 + 14b0: 08 c0 03 28 66 10 \[MMI\] ld1.sa.nta r120=\[r20\] + 14b6: 80 07 52 c0 20 00 ld1.sa.d4 r120=\[r20\] + 14bc: 00 00 04 00 nop.i 0x0 + 14c0: 08 c0 03 29 62 10 \[MMI\] ld1.sa.d5 r120=\[r20\] + 14c6: 80 07 52 c8 20 00 ld1.sa.d6 r120=\[r20\] + 14cc: 00 00 04 00 nop.i 0x0 + 14d0: 08 c0 03 29 66 10 \[MMI\] ld1.sa.d7 r120=\[r20\] + 14d6: 80 07 50 d0 20 00 ld2.sa r120=\[r20\] + 14dc: 00 00 04 00 nop.i 0x0 + 14e0: 08 c0 03 28 6a 10 \[MMI\] ld2.sa.nt1 r120=\[r20\] + 14e6: 80 07 50 d4 20 00 ld2.sa.nt1 r120=\[r20\] + 14ec: 00 00 04 00 nop.i 0x0 + 14f0: 08 c0 03 28 6c 10 \[MMI\] ld2.sa.d2 r120=\[r20\] + 14f6: 80 07 50 d8 20 00 ld2.sa.d2 r120=\[r20\] + 14fc: 00 00 04 00 nop.i 0x0 + 1500: 08 c0 03 28 6e 10 \[MMI\] ld2.sa.nta r120=\[r20\] + 1506: 80 07 50 dc 20 00 ld2.sa.nta r120=\[r20\] + 150c: 00 00 04 00 nop.i 0x0 + 1510: 08 c0 03 29 68 10 \[MMI\] ld2.sa.d4 r120=\[r20\] + 1516: 80 07 52 d4 20 00 ld2.sa.d5 r120=\[r20\] + 151c: 00 00 04 00 nop.i 0x0 + 1520: 08 c0 03 29 6c 10 \[MMI\] ld2.sa.d6 r120=\[r20\] + 1526: 80 07 52 dc 20 00 ld2.sa.d7 r120=\[r20\] + 152c: 00 00 04 00 nop.i 0x0 + 1530: 08 c0 03 28 72 10 \[MMI\] ld4.sa.nt1 r120=\[r20\] + 1536: 80 07 50 e4 20 00 ld4.sa.nt1 r120=\[r20\] + 153c: 00 00 04 00 nop.i 0x0 + 1540: 08 c0 03 28 74 10 \[MMI\] ld4.sa.d2 r120=\[r20\] + 1546: 80 07 50 e8 20 00 ld4.sa.d2 r120=\[r20\] + 154c: 00 00 04 00 nop.i 0x0 + 1550: 08 c0 03 28 76 10 \[MMI\] ld4.sa.nta r120=\[r20\] + 1556: 80 07 50 ec 20 00 ld4.sa.nta r120=\[r20\] + 155c: 00 00 04 00 nop.i 0x0 + 1560: 08 c0 03 29 70 10 \[MMI\] ld4.sa.d4 r120=\[r20\] + 1566: 80 07 52 e4 20 00 ld4.sa.d5 r120=\[r20\] + 156c: 00 00 04 00 nop.i 0x0 + 1570: 08 c0 03 29 74 10 \[MMI\] ld4.sa.d6 r120=\[r20\] + 1576: 80 07 52 ec 20 00 ld4.sa.d7 r120=\[r20\] + 157c: 00 00 04 00 nop.i 0x0 + 1580: 08 c0 03 28 78 10 \[MMI\] ld8.sa r120=\[r20\] + 1586: 80 07 50 f4 20 00 ld8.sa.nt1 r120=\[r20\] + 158c: 00 00 04 00 nop.i 0x0 + 1590: 08 c0 03 28 7a 10 \[MMI\] ld8.sa.nt1 r120=\[r20\] + 1596: 80 07 50 f8 20 00 ld8.sa.d2 r120=\[r20\] + 159c: 00 00 04 00 nop.i 0x0 + 15a0: 08 c0 03 28 7c 10 \[MMI\] ld8.sa.d2 r120=\[r20\] + 15a6: 80 07 50 fc 20 00 ld8.sa.nta r120=\[r20\] + 15ac: 00 00 04 00 nop.i 0x0 + 15b0: 08 c0 03 28 7e 10 \[MMI\] ld8.sa.nta r120=\[r20\] + 15b6: 80 07 52 f0 20 00 ld8.sa.d4 r120=\[r20\] + 15bc: 00 00 04 00 nop.i 0x0 + 15c0: 08 c0 03 29 7a 10 \[MMI\] ld8.sa.d5 r120=\[r20\] + 15c6: 80 07 52 f8 20 00 ld8.sa.d6 r120=\[r20\] + 15cc: 00 00 04 00 nop.i 0x0 + 15d0: 08 c0 03 29 7e 10 \[MMI\] ld8.sa.d7 r120=\[r20\] + 15d6: 80 07 50 00 21 00 ld1.bias r120=\[r20\] + 15dc: 00 00 04 00 nop.i 0x0 + 15e0: 08 c0 03 28 82 10 \[MMI\] ld1.bias.nt1 r120=\[r20\] + 15e6: 80 07 50 04 21 00 ld1.bias.nt1 r120=\[r20\] + 15ec: 00 00 04 00 nop.i 0x0 + 15f0: 08 c0 03 28 84 10 \[MMI\] ld1.bias.d2 r120=\[r20\] + 15f6: 80 07 50 08 21 00 ld1.bias.d2 r120=\[r20\] + 15fc: 00 00 04 00 nop.i 0x0 + 1600: 08 c0 03 28 86 10 \[MMI\] ld1.bias.nta r120=\[r20\] + 1606: 80 07 50 0c 21 00 ld1.bias.nta r120=\[r20\] + 160c: 00 00 04 00 nop.i 0x0 + 1610: 08 c0 03 29 80 10 \[MMI\] ld1.bias.d4 r120=\[r20\] + 1616: 80 07 52 04 21 00 ld1.bias.d5 r120=\[r20\] + 161c: 00 00 04 00 nop.i 0x0 + 1620: 08 c0 03 29 84 10 \[MMI\] ld1.bias.d6 r120=\[r20\] + 1626: 80 07 52 0c 21 00 ld1.bias.d7 r120=\[r20\] + 162c: 00 00 04 00 nop.i 0x0 + 1630: 08 c0 03 28 88 10 \[MMI\] ld2.bias r120=\[r20\] + 1636: 80 07 50 14 21 00 ld2.bias.nt1 r120=\[r20\] + 163c: 00 00 04 00 nop.i 0x0 + 1640: 08 c0 03 28 8a 10 \[MMI\] ld2.bias.nt1 r120=\[r20\] + 1646: 80 07 50 18 21 00 ld2.bias.d2 r120=\[r20\] + 164c: 00 00 04 00 nop.i 0x0 + 1650: 08 c0 03 28 8c 10 \[MMI\] ld2.bias.d2 r120=\[r20\] + 1656: 80 07 50 1c 21 00 ld2.bias.nta r120=\[r20\] + 165c: 00 00 04 00 nop.i 0x0 + 1660: 08 c0 03 28 8e 10 \[MMI\] ld2.bias.nta r120=\[r20\] + 1666: 80 07 52 10 21 00 ld2.bias.d4 r120=\[r20\] + 166c: 00 00 04 00 nop.i 0x0 + 1670: 08 c0 03 29 8a 10 \[MMI\] ld2.bias.d5 r120=\[r20\] + 1676: 80 07 52 18 21 00 ld2.bias.d6 r120=\[r20\] + 167c: 00 00 04 00 nop.i 0x0 + 1680: 08 c0 03 29 8e 10 \[MMI\] ld2.bias.d7 r120=\[r20\] + 1686: 80 07 50 20 21 00 ld4.bias r120=\[r20\] + 168c: 00 00 04 00 nop.i 0x0 + 1690: 08 c0 03 28 92 10 \[MMI\] ld4.bias.nt1 r120=\[r20\] + 1696: 80 07 50 24 21 00 ld4.bias.nt1 r120=\[r20\] + 169c: 00 00 04 00 nop.i 0x0 + 16a0: 08 c0 03 28 94 10 \[MMI\] ld4.bias.d2 r120=\[r20\] + 16a6: 80 07 50 28 21 00 ld4.bias.d2 r120=\[r20\] + 16ac: 00 00 04 00 nop.i 0x0 + 16b0: 08 c0 03 28 96 10 \[MMI\] ld4.bias.nta r120=\[r20\] + 16b6: 80 07 50 2c 21 00 ld4.bias.nta r120=\[r20\] + 16bc: 00 00 04 00 nop.i 0x0 + 16c0: 08 c0 03 29 90 10 \[MMI\] ld4.bias.d4 r120=\[r20\] + 16c6: 80 07 52 24 21 00 ld4.bias.d5 r120=\[r20\] + 16cc: 00 00 04 00 nop.i 0x0 + 16d0: 08 c0 03 29 94 10 \[MMI\] ld4.bias.d6 r120=\[r20\] + 16d6: 80 07 52 2c 21 00 ld4.bias.d7 r120=\[r20\] + 16dc: 00 00 04 00 nop.i 0x0 + 16e0: 08 c0 03 28 98 10 \[MMI\] ld8.bias r120=\[r20\] + 16e6: 80 07 50 34 21 00 ld8.bias.nt1 r120=\[r20\] + 16ec: 00 00 04 00 nop.i 0x0 + 16f0: 08 c0 03 28 9a 10 \[MMI\] ld8.bias.nt1 r120=\[r20\] + 16f6: 80 07 50 38 21 00 ld8.bias.d2 r120=\[r20\] + 16fc: 00 00 04 00 nop.i 0x0 + 1700: 08 c0 03 28 9c 10 \[MMI\] ld8.bias.d2 r120=\[r20\] + 1706: 80 07 50 3c 21 00 ld8.bias.nta r120=\[r20\] + 170c: 00 00 04 00 nop.i 0x0 + 1710: 08 c0 03 28 9e 10 \[MMI\] ld8.bias.nta r120=\[r20\] + 1716: 80 07 52 30 21 00 ld8.bias.d4 r120=\[r20\] + 171c: 00 00 04 00 nop.i 0x0 + 1720: 08 c0 03 29 9a 10 \[MMI\] ld8.bias.d5 r120=\[r20\] + 1726: 80 07 52 38 21 00 ld8.bias.d6 r120=\[r20\] + 172c: 00 00 04 00 nop.i 0x0 + 1730: 08 c0 03 29 9e 10 \[MMI\] ld8.bias.d7 r120=\[r20\] + 1736: 80 07 50 40 21 00 ld1.acq r120=\[r20\] + 173c: 00 00 04 00 nop.i 0x0 + 1740: 08 c0 03 28 a2 10 \[MMI\] ld1.acq.nt1 r120=\[r20\] + 1746: 80 07 50 44 21 00 ld1.acq.nt1 r120=\[r20\] + 174c: 00 00 04 00 nop.i 0x0 + 1750: 08 c0 03 28 a4 10 \[MMI\] ld1.acq.d2 r120=\[r20\] + 1756: 80 07 50 48 21 00 ld1.acq.d2 r120=\[r20\] + 175c: 00 00 04 00 nop.i 0x0 + 1760: 08 c0 03 28 a6 10 \[MMI\] ld1.acq.nta r120=\[r20\] + 1766: 80 07 50 4c 21 00 ld1.acq.nta r120=\[r20\] + 176c: 00 00 04 00 nop.i 0x0 + 1770: 08 c0 03 29 a0 10 \[MMI\] ld1.acq.d4 r120=\[r20\] + 1776: 80 07 52 44 21 00 ld1.acq.d5 r120=\[r20\] + 177c: 00 00 04 00 nop.i 0x0 + 1780: 08 c0 03 29 a4 10 \[MMI\] ld1.acq.d6 r120=\[r20\] + 1786: 80 07 50 50 21 00 ld2.acq r120=\[r20\] + 178c: 00 00 04 00 nop.i 0x0 + 1790: 08 c0 03 28 aa 10 \[MMI\] ld2.acq.nt1 r120=\[r20\] + 1796: 80 07 50 54 21 00 ld2.acq.nt1 r120=\[r20\] + 179c: 00 00 04 00 nop.i 0x0 + 17a0: 08 c0 03 28 ac 10 \[MMI\] ld2.acq.d2 r120=\[r20\] + 17a6: 80 07 50 58 21 00 ld2.acq.d2 r120=\[r20\] + 17ac: 00 00 04 00 nop.i 0x0 + 17b0: 08 c0 03 28 ae 10 \[MMI\] ld2.acq.nta r120=\[r20\] + 17b6: 80 07 50 5c 21 00 ld2.acq.nta r120=\[r20\] + 17bc: 00 00 04 00 nop.i 0x0 + 17c0: 08 c0 03 29 a8 10 \[MMI\] ld2.acq.d4 r120=\[r20\] + 17c6: 80 07 52 54 21 00 ld2.acq.d5 r120=\[r20\] + 17cc: 00 00 04 00 nop.i 0x0 + 17d0: 08 c0 03 29 ac 10 \[MMI\] ld2.acq.d6 r120=\[r20\] + 17d6: 80 07 52 5c 21 00 ld2.acq.d7 r120=\[r20\] + 17dc: 00 00 04 00 nop.i 0x0 + 17e0: 08 c0 03 28 b0 10 \[MMI\] ld4.acq r120=\[r20\] + 17e6: 80 07 50 64 21 00 ld4.acq.nt1 r120=\[r20\] + 17ec: 00 00 04 00 nop.i 0x0 + 17f0: 08 c0 03 28 b2 10 \[MMI\] ld4.acq.nt1 r120=\[r20\] + 17f6: 80 07 50 68 21 00 ld4.acq.d2 r120=\[r20\] + 17fc: 00 00 04 00 nop.i 0x0 + 1800: 08 c0 03 28 b4 10 \[MMI\] ld4.acq.d2 r120=\[r20\] + 1806: 80 07 50 6c 21 00 ld4.acq.nta r120=\[r20\] + 180c: 00 00 04 00 nop.i 0x0 + 1810: 08 c0 03 28 b6 10 \[MMI\] ld4.acq.nta r120=\[r20\] + 1816: 80 07 52 60 21 00 ld4.acq.d4 r120=\[r20\] + 181c: 00 00 04 00 nop.i 0x0 + 1820: 08 c0 03 29 b2 10 \[MMI\] ld4.acq.d5 r120=\[r20\] + 1826: 80 07 52 68 21 00 ld4.acq.d6 r120=\[r20\] + 182c: 00 00 04 00 nop.i 0x0 + 1830: 08 c0 03 29 b6 10 \[MMI\] ld4.acq.d7 r120=\[r20\] + 1836: 80 07 50 70 21 00 ld8.acq r120=\[r20\] + 183c: 00 00 04 00 nop.i 0x0 + 1840: 08 c0 03 28 ba 10 \[MMI\] ld8.acq.nt1 r120=\[r20\] + 1846: 80 07 50 74 21 00 ld8.acq.nt1 r120=\[r20\] + 184c: 00 00 04 00 nop.i 0x0 + 1850: 08 c0 03 28 bc 10 \[MMI\] ld8.acq.d2 r120=\[r20\] + 1856: 80 07 50 78 21 00 ld8.acq.d2 r120=\[r20\] + 185c: 00 00 04 00 nop.i 0x0 + 1860: 08 c0 03 28 be 10 \[MMI\] ld8.acq.nta r120=\[r20\] + 1866: 80 07 50 7c 21 00 ld8.acq.nta r120=\[r20\] + 186c: 00 00 04 00 nop.i 0x0 + 1870: 08 c0 03 29 b8 10 \[MMI\] ld8.acq.d4 r120=\[r20\] + 1876: 80 07 52 74 21 00 ld8.acq.d5 r120=\[r20\] + 187c: 00 00 04 00 nop.i 0x0 + 1880: 08 c0 03 29 bc 10 \[MMI\] ld8.acq.d6 r120=\[r20\] + 1886: 80 07 52 7c 21 00 ld8.acq.d7 r120=\[r20\] + 188c: 00 00 04 00 nop.i 0x0 + 1890: 08 c0 03 28 d8 10 \[MMI\] ld8.fill r120=\[r20\] + 1896: 80 07 50 b4 21 00 ld8.fill.nt1 r120=\[r20\] + 189c: 00 00 04 00 nop.i 0x0 + 18a0: 08 c0 03 28 da 10 \[MMI\] ld8.fill.nt1 r120=\[r20\] + 18a6: 80 07 50 b8 21 00 ld8.fill.d2 r120=\[r20\] + 18ac: 00 00 04 00 nop.i 0x0 + 18b0: 08 c0 03 28 dc 10 \[MMI\] ld8.fill.d2 r120=\[r20\] + 18b6: 80 07 50 bc 21 00 ld8.fill.nta r120=\[r20\] + 18bc: 00 00 04 00 nop.i 0x0 + 18c0: 08 c0 03 28 de 10 \[MMI\] ld8.fill.nta r120=\[r20\] + 18c6: 80 07 52 b0 21 00 ld8.fill.d4 r120=\[r20\] + 18cc: 00 00 04 00 nop.i 0x0 + 18d0: 08 c0 03 29 da 10 \[MMI\] ld8.fill.d5 r120=\[r20\] + 18d6: 80 07 52 b8 21 00 ld8.fill.d6 r120=\[r20\] + 18dc: 00 00 04 00 nop.i 0x0 + 18e0: 08 c0 03 29 de 10 \[MMI\] ld8.fill.d7 r120=\[r20\] + 18e6: 80 07 50 00 22 00 ld1.c.clr r120=\[r20\] + 18ec: 00 00 04 00 nop.i 0x0 + 18f0: 08 c0 03 28 02 11 \[MMI\] ld1.c.clr.nt1 r120=\[r20\] + 18f6: 80 07 50 04 22 00 ld1.c.clr.nt1 r120=\[r20\] + 18fc: 00 00 04 00 nop.i 0x0 + 1900: 08 c0 03 28 04 11 \[MMI\] ld1.c.clr.d2 r120=\[r20\] + 1906: 80 07 50 08 22 00 ld1.c.clr.d2 r120=\[r20\] + 190c: 00 00 04 00 nop.i 0x0 + 1910: 08 c0 03 28 06 11 \[MMI\] ld1.c.clr.nta r120=\[r20\] + 1916: 80 07 50 0c 22 00 ld1.c.clr.nta r120=\[r20\] + 191c: 00 00 04 00 nop.i 0x0 + 1920: 08 c0 03 29 00 11 \[MMI\] ld1.c.clr.d4 r120=\[r20\] + 1926: 80 07 52 04 22 00 ld1.c.clr.d5 r120=\[r20\] + 192c: 00 00 04 00 nop.i 0x0 + 1930: 08 c0 03 29 04 11 \[MMI\] ld1.c.clr.d6 r120=\[r20\] + 1936: 80 07 52 0c 22 00 ld1.c.clr.d7 r120=\[r20\] + 193c: 00 00 04 00 nop.i 0x0 + 1940: 08 c0 03 28 08 11 \[MMI\] ld2.c.clr r120=\[r20\] + 1946: 80 07 50 14 22 00 ld2.c.clr.nt1 r120=\[r20\] + 194c: 00 00 04 00 nop.i 0x0 + 1950: 08 c0 03 28 0a 11 \[MMI\] ld2.c.clr.nt1 r120=\[r20\] + 1956: 80 07 50 18 22 00 ld2.c.clr.d2 r120=\[r20\] + 195c: 00 00 04 00 nop.i 0x0 + 1960: 08 c0 03 28 0c 11 \[MMI\] ld2.c.clr.d2 r120=\[r20\] + 1966: 80 07 50 1c 22 00 ld2.c.clr.nta r120=\[r20\] + 196c: 00 00 04 00 nop.i 0x0 + 1970: 08 c0 03 28 0e 11 \[MMI\] ld2.c.clr.nta r120=\[r20\] + 1976: 80 07 52 10 22 00 ld2.c.clr.d4 r120=\[r20\] + 197c: 00 00 04 00 nop.i 0x0 + 1980: 08 c0 03 29 0a 11 \[MMI\] ld2.c.clr.d5 r120=\[r20\] + 1986: 80 07 52 18 22 00 ld2.c.clr.d6 r120=\[r20\] + 198c: 00 00 04 00 nop.i 0x0 + 1990: 08 c0 03 29 0e 11 \[MMI\] ld2.c.clr.d7 r120=\[r20\] + 1996: 80 07 50 20 22 00 ld4.c.clr r120=\[r20\] + 199c: 00 00 04 00 nop.i 0x0 + 19a0: 08 c0 03 28 12 11 \[MMI\] ld4.c.clr.nt1 r120=\[r20\] + 19a6: 80 07 50 24 22 00 ld4.c.clr.nt1 r120=\[r20\] + 19ac: 00 00 04 00 nop.i 0x0 + 19b0: 08 c0 03 28 14 11 \[MMI\] ld4.c.clr.d2 r120=\[r20\] + 19b6: 80 07 50 28 22 00 ld4.c.clr.d2 r120=\[r20\] + 19bc: 00 00 04 00 nop.i 0x0 + 19c0: 08 c0 03 28 16 11 \[MMI\] ld4.c.clr.nta r120=\[r20\] + 19c6: 80 07 50 2c 22 00 ld4.c.clr.nta r120=\[r20\] + 19cc: 00 00 04 00 nop.i 0x0 + 19d0: 08 c0 03 29 10 11 \[MMI\] ld4.c.clr.d4 r120=\[r20\] + 19d6: 80 07 52 24 22 00 ld4.c.clr.d5 r120=\[r20\] + 19dc: 00 00 04 00 nop.i 0x0 + 19e0: 08 c0 03 29 14 11 \[MMI\] ld4.c.clr.d6 r120=\[r20\] + 19e6: 80 07 52 2c 22 00 ld4.c.clr.d7 r120=\[r20\] + 19ec: 00 00 04 00 nop.i 0x0 + 19f0: 08 c0 03 28 18 11 \[MMI\] ld8.c.clr r120=\[r20\] + 19f6: 80 07 50 34 22 00 ld8.c.clr.nt1 r120=\[r20\] + 19fc: 00 00 04 00 nop.i 0x0 + 1a00: 08 c0 03 28 1a 11 \[MMI\] ld8.c.clr.nt1 r120=\[r20\] + 1a06: 80 07 50 38 22 00 ld8.c.clr.d2 r120=\[r20\] + 1a0c: 00 00 04 00 nop.i 0x0 + 1a10: 08 c0 03 28 1c 11 \[MMI\] ld8.c.clr.d2 r120=\[r20\] + 1a16: 80 07 50 3c 22 00 ld8.c.clr.nta r120=\[r20\] + 1a1c: 00 00 04 00 nop.i 0x0 + 1a20: 08 c0 03 28 1e 11 \[MMI\] ld8.c.clr.nta r120=\[r20\] + 1a26: 80 07 52 30 22 00 ld8.c.clr.d4 r120=\[r20\] + 1a2c: 00 00 04 00 nop.i 0x0 + 1a30: 08 c0 03 29 1a 11 \[MMI\] ld8.c.clr.d5 r120=\[r20\] + 1a36: 80 07 52 38 22 00 ld8.c.clr.d6 r120=\[r20\] + 1a3c: 00 00 04 00 nop.i 0x0 + 1a40: 08 c0 03 29 1e 11 \[MMI\] ld8.c.clr.d7 r120=\[r20\] + 1a46: 80 07 50 40 22 00 ld1.c.nc r120=\[r20\] + 1a4c: 00 00 04 00 nop.i 0x0 + 1a50: 08 c0 03 28 22 11 \[MMI\] ld1.c.nc.nt1 r120=\[r20\] + 1a56: 80 07 50 44 22 00 ld1.c.nc.nt1 r120=\[r20\] + 1a5c: 00 00 04 00 nop.i 0x0 + 1a60: 08 c0 03 28 24 11 \[MMI\] ld1.c.nc.d2 r120=\[r20\] + 1a66: 80 07 50 48 22 00 ld1.c.nc.d2 r120=\[r20\] + 1a6c: 00 00 04 00 nop.i 0x0 + 1a70: 08 c0 03 28 26 11 \[MMI\] ld1.c.nc.nta r120=\[r20\] + 1a76: 80 07 50 4c 22 00 ld1.c.nc.nta r120=\[r20\] + 1a7c: 00 00 04 00 nop.i 0x0 + 1a80: 08 c0 03 29 20 11 \[MMI\] ld1.c.nc.d4 r120=\[r20\] + 1a86: 80 07 52 44 22 00 ld1.c.nc.d5 r120=\[r20\] + 1a8c: 00 00 04 00 nop.i 0x0 + 1a90: 08 c0 03 29 26 11 \[MMI\] ld1.c.nc.d7 r120=\[r20\] + 1a96: 80 07 50 50 22 00 ld2.c.nc r120=\[r20\] + 1a9c: 00 00 04 00 nop.i 0x0 + 1aa0: 08 c0 03 28 2a 11 \[MMI\] ld2.c.nc.nt1 r120=\[r20\] + 1aa6: 80 07 50 54 22 00 ld2.c.nc.nt1 r120=\[r20\] + 1aac: 00 00 04 00 nop.i 0x0 + 1ab0: 08 c0 03 28 2c 11 \[MMI\] ld2.c.nc.d2 r120=\[r20\] + 1ab6: 80 07 50 58 22 00 ld2.c.nc.d2 r120=\[r20\] + 1abc: 00 00 04 00 nop.i 0x0 + 1ac0: 08 c0 03 28 2e 11 \[MMI\] ld2.c.nc.nta r120=\[r20\] + 1ac6: 80 07 50 5c 22 00 ld2.c.nc.nta r120=\[r20\] + 1acc: 00 00 04 00 nop.i 0x0 + 1ad0: 08 c0 03 29 28 11 \[MMI\] ld2.c.nc.d4 r120=\[r20\] + 1ad6: 80 07 52 54 22 00 ld2.c.nc.d5 r120=\[r20\] + 1adc: 00 00 04 00 nop.i 0x0 + 1ae0: 08 c0 03 29 2c 11 \[MMI\] ld2.c.nc.d6 r120=\[r20\] + 1ae6: 80 07 52 5c 22 00 ld2.c.nc.d7 r120=\[r20\] + 1aec: 00 00 04 00 nop.i 0x0 + 1af0: 08 c0 03 28 30 11 \[MMI\] ld4.c.nc r120=\[r20\] + 1af6: 80 07 50 64 22 00 ld4.c.nc.nt1 r120=\[r20\] + 1afc: 00 00 04 00 nop.i 0x0 + 1b00: 08 c0 03 28 32 11 \[MMI\] ld4.c.nc.nt1 r120=\[r20\] + 1b06: 80 07 50 68 22 00 ld4.c.nc.d2 r120=\[r20\] + 1b0c: 00 00 04 00 nop.i 0x0 + 1b10: 08 c0 03 28 34 11 \[MMI\] ld4.c.nc.d2 r120=\[r20\] + 1b16: 80 07 50 6c 22 00 ld4.c.nc.nta r120=\[r20\] + 1b1c: 00 00 04 00 nop.i 0x0 + 1b20: 08 c0 03 28 36 11 \[MMI\] ld4.c.nc.nta r120=\[r20\] + 1b26: 80 07 52 60 22 00 ld4.c.nc.d4 r120=\[r20\] + 1b2c: 00 00 04 00 nop.i 0x0 + 1b30: 08 c0 03 29 32 11 \[MMI\] ld4.c.nc.d5 r120=\[r20\] + 1b36: 80 07 52 68 22 00 ld4.c.nc.d6 r120=\[r20\] + 1b3c: 00 00 04 00 nop.i 0x0 + 1b40: 08 c0 03 29 36 11 \[MMI\] ld4.c.nc.d7 r120=\[r20\] + 1b46: 80 07 50 70 22 00 ld8.c.nc r120=\[r20\] + 1b4c: 00 00 04 00 nop.i 0x0 + 1b50: 08 c0 03 28 3a 11 \[MMI\] ld8.c.nc.nt1 r120=\[r20\] + 1b56: 80 07 50 74 22 00 ld8.c.nc.nt1 r120=\[r20\] + 1b5c: 00 00 04 00 nop.i 0x0 + 1b60: 08 c0 03 28 3c 11 \[MMI\] ld8.c.nc.d2 r120=\[r20\] + 1b66: 80 07 50 78 22 00 ld8.c.nc.d2 r120=\[r20\] + 1b6c: 00 00 04 00 nop.i 0x0 + 1b70: 08 c0 03 28 3e 11 \[MMI\] ld8.c.nc.nta r120=\[r20\] + 1b76: 80 07 50 7c 22 00 ld8.c.nc.nta r120=\[r20\] + 1b7c: 00 00 04 00 nop.i 0x0 + 1b80: 08 c0 03 29 38 11 \[MMI\] ld8.c.nc.d4 r120=\[r20\] + 1b86: 80 07 52 74 22 00 ld8.c.nc.d5 r120=\[r20\] + 1b8c: 00 00 04 00 nop.i 0x0 + 1b90: 08 c0 03 29 3c 11 \[MMI\] ld8.c.nc.d6 r120=\[r20\] + 1b96: 80 07 52 7c 22 00 ld8.c.nc.d7 r120=\[r20\] + 1b9c: 00 00 04 00 nop.i 0x0 + 1ba0: 08 c0 03 28 40 11 \[MMI\] ld1.c.clr.acq r120=\[r20\] + 1ba6: 80 07 50 84 22 00 ld1.c.clr.acq.nt1 r120=\[r20\] + 1bac: 00 00 04 00 nop.i 0x0 + 1bb0: 08 c0 03 28 42 11 \[MMI\] ld1.c.clr.acq.nt1 r120=\[r20\] + 1bb6: 80 07 50 88 22 00 ld1.c.clr.acq.d2 r120=\[r20\] + 1bbc: 00 00 04 00 nop.i 0x0 + 1bc0: 08 c0 03 28 44 11 \[MMI\] ld1.c.clr.acq.d2 r120=\[r20\] + 1bc6: 80 07 50 8c 22 00 ld1.c.clr.acq.nta r120=\[r20\] + 1bcc: 00 00 04 00 nop.i 0x0 + 1bd0: 08 c0 03 28 46 11 \[MMI\] ld1.c.clr.acq.nta r120=\[r20\] + 1bd6: 80 07 52 80 22 00 ld1.c.clr.acq.d4 r120=\[r20\] + 1bdc: 00 00 04 00 nop.i 0x0 + 1be0: 08 c0 03 29 42 11 \[MMI\] ld1.c.clr.acq.d5 r120=\[r20\] + 1be6: 80 07 52 88 22 00 ld1.c.clr.acq.d6 r120=\[r20\] + 1bec: 00 00 04 00 nop.i 0x0 + 1bf0: 08 c0 03 29 46 11 \[MMI\] ld1.c.clr.acq.d7 r120=\[r20\] + 1bf6: 80 07 50 90 22 00 ld2.c.clr.acq r120=\[r20\] + 1bfc: 00 00 04 00 nop.i 0x0 + 1c00: 08 c0 03 28 4a 11 \[MMI\] ld2.c.clr.acq.nt1 r120=\[r20\] + 1c06: 80 07 50 94 22 00 ld2.c.clr.acq.nt1 r120=\[r20\] + 1c0c: 00 00 04 00 nop.i 0x0 + 1c10: 08 c0 03 28 4c 11 \[MMI\] ld2.c.clr.acq.d2 r120=\[r20\] + 1c16: 80 07 50 98 22 00 ld2.c.clr.acq.d2 r120=\[r20\] + 1c1c: 00 00 04 00 nop.i 0x0 + 1c20: 08 c0 03 28 4e 11 \[MMI\] ld2.c.clr.acq.nta r120=\[r20\] + 1c26: 80 07 52 90 22 00 ld2.c.clr.acq.d4 r120=\[r20\] + 1c2c: 00 00 04 00 nop.i 0x0 + 1c30: 08 c0 03 29 4a 11 \[MMI\] ld2.c.clr.acq.d5 r120=\[r20\] + 1c36: 80 07 52 98 22 00 ld2.c.clr.acq.d6 r120=\[r20\] + 1c3c: 00 00 04 00 nop.i 0x0 + 1c40: 08 c0 03 29 4e 11 \[MMI\] ld2.c.clr.acq.d7 r120=\[r20\] + 1c46: 80 07 50 a0 22 00 ld4.c.clr.acq r120=\[r20\] + 1c4c: 00 00 04 00 nop.i 0x0 + 1c50: 08 c0 03 28 52 11 \[MMI\] ld4.c.clr.acq.nt1 r120=\[r20\] + 1c56: 80 07 50 a4 22 00 ld4.c.clr.acq.nt1 r120=\[r20\] + 1c5c: 00 00 04 00 nop.i 0x0 + 1c60: 08 c0 03 28 54 11 \[MMI\] ld4.c.clr.acq.d2 r120=\[r20\] + 1c66: 80 07 50 a8 22 00 ld4.c.clr.acq.d2 r120=\[r20\] + 1c6c: 00 00 04 00 nop.i 0x0 + 1c70: 08 c0 03 28 56 11 \[MMI\] ld4.c.clr.acq.nta r120=\[r20\] + 1c76: 80 07 50 ac 22 00 ld4.c.clr.acq.nta r120=\[r20\] + 1c7c: 00 00 04 00 nop.i 0x0 + 1c80: 08 c0 03 29 50 11 \[MMI\] ld4.c.clr.acq.d4 r120=\[r20\] + 1c86: 80 07 52 a4 22 00 ld4.c.clr.acq.d5 r120=\[r20\] + 1c8c: 00 00 04 00 nop.i 0x0 + 1c90: 08 c0 03 29 54 11 \[MMI\] ld4.c.clr.acq.d6 r120=\[r20\] + 1c96: 80 07 52 ac 22 00 ld4.c.clr.acq.d7 r120=\[r20\] + 1c9c: 00 00 04 00 nop.i 0x0 + 1ca0: 08 c0 03 28 58 11 \[MMI\] ld8.c.clr.acq r120=\[r20\] + 1ca6: 80 07 50 b4 22 00 ld8.c.clr.acq.nt1 r120=\[r20\] + 1cac: 00 00 04 00 nop.i 0x0 + 1cb0: 08 c0 03 28 5a 11 \[MMI\] ld8.c.clr.acq.nt1 r120=\[r20\] + 1cb6: 80 07 50 b8 22 00 ld8.c.clr.acq.d2 r120=\[r20\] + 1cbc: 00 00 04 00 nop.i 0x0 + 1cc0: 08 c0 03 28 5c 11 \[MMI\] ld8.c.clr.acq.d2 r120=\[r20\] + 1cc6: 80 07 50 bc 22 00 ld8.c.clr.acq.nta r120=\[r20\] + 1ccc: 00 00 04 00 nop.i 0x0 + 1cd0: 08 c0 03 28 5e 11 \[MMI\] ld8.c.clr.acq.nta r120=\[r20\] + 1cd6: 80 07 52 b0 22 00 ld8.c.clr.acq.d4 r120=\[r20\] + 1cdc: 00 00 04 00 nop.i 0x0 + 1ce0: 08 c0 03 29 5a 11 \[MMI\] ld8.c.clr.acq.d5 r120=\[r20\] + 1ce6: 80 07 52 b8 22 00 ld8.c.clr.acq.d6 r120=\[r20\] + 1cec: 00 00 04 00 nop.i 0x0 + 1cf0: 08 c0 03 29 5e 11 \[MMI\] ld8.c.clr.acq.d7 r120=\[r20\] + 1cf6: 80 07 50 82 22 00 ld16 r120,ar.csd=\[r20\] + 1cfc: 00 00 04 00 nop.i 0x0 + 1d00: 08 c0 03 28 41 11 \[MMI\] ld16 r120,ar.csd=\[r20\] + 1d06: 80 07 50 86 22 00 ld16.nt1 r120,ar.csd=\[r20\] + 1d0c: 00 00 04 00 nop.i 0x0 + 1d10: 08 c0 03 28 43 11 \[MMI\] ld16.nt1 r120,ar.csd=\[r20\] + 1d16: 80 07 50 8a 22 00 ld16.d2 r120,ar.csd=\[r20\] + 1d1c: 00 00 04 00 nop.i 0x0 + 1d20: 08 c0 03 28 45 11 \[MMI\] ld16.d2 r120,ar.csd=\[r20\] + 1d26: 80 07 50 86 22 00 ld16.nt1 r120,ar.csd=\[r20\] + 1d2c: 00 00 04 00 nop.i 0x0 + 1d30: 08 c0 03 28 43 11 \[MMI\] ld16.nt1 r120,ar.csd=\[r20\] + 1d36: 80 07 50 8a 22 00 ld16.d2 r120,ar.csd=\[r20\] + 1d3c: 00 00 04 00 nop.i 0x0 + 1d40: 08 c0 03 28 45 11 \[MMI\] ld16.d2 r120,ar.csd=\[r20\] + 1d46: 80 07 50 8e 22 00 ld16.nta r120,ar.csd=\[r20\] + 1d4c: 00 00 04 00 nop.i 0x0 + 1d50: 08 c0 03 28 47 11 \[MMI\] ld16.nta r120,ar.csd=\[r20\] + 1d56: 80 07 52 82 22 00 ld16.d4 r120,ar.csd=\[r20\] + 1d5c: 00 00 04 00 nop.i 0x0 + 1d60: 08 c0 03 29 43 11 \[MMI\] ld16.d5 r120,ar.csd=\[r20\] + 1d66: 80 07 52 8a 22 00 ld16.d6 r120,ar.csd=\[r20\] + 1d6c: 00 00 04 00 nop.i 0x0 + 1d70: 08 c0 03 29 47 11 \[MMI\] ld16.d7 r120,ar.csd=\[r20\] + 1d76: 80 07 50 8e 22 00 ld16.nta r120,ar.csd=\[r20\] + 1d7c: 00 00 04 00 nop.i 0x0 + 1d80: 08 c0 03 28 47 11 \[MMI\] ld16.nta r120,ar.csd=\[r20\] + 1d86: 80 07 52 82 22 00 ld16.d4 r120,ar.csd=\[r20\] + 1d8c: 00 00 04 00 nop.i 0x0 + 1d90: 08 c0 03 29 43 11 \[MMI\] ld16.d5 r120,ar.csd=\[r20\] + 1d96: 80 07 52 8a 22 00 ld16.d6 r120,ar.csd=\[r20\] + 1d9c: 00 00 04 00 nop.i 0x0 + 1da0: 08 c0 03 29 47 11 \[MMI\] ld16.d7 r120,ar.csd=\[r20\] + 1da6: 80 07 50 c2 22 00 ld16.acq r120,ar.csd=\[r20\] + 1dac: 00 00 04 00 nop.i 0x0 + 1db0: 08 c0 03 28 61 11 \[MMI\] ld16.acq r120,ar.csd=\[r20\] + 1db6: 80 07 50 c6 22 00 ld16.acq.nt1 r120,ar.csd=\[r20\] + 1dbc: 00 00 04 00 nop.i 0x0 + 1dc0: 08 c0 03 28 63 11 \[MMI\] ld16.acq.nt1 r120,ar.csd=\[r20\] + 1dc6: 80 07 50 ca 22 00 ld16.acq.d2 r120,ar.csd=\[r20\] + 1dcc: 00 00 04 00 nop.i 0x0 + 1dd0: 08 c0 03 28 65 11 \[MMI\] ld16.acq.d2 r120,ar.csd=\[r20\] + 1dd6: 80 07 50 c6 22 00 ld16.acq.nt1 r120,ar.csd=\[r20\] + 1ddc: 00 00 04 00 nop.i 0x0 + 1de0: 08 c0 03 28 63 11 \[MMI\] ld16.acq.nt1 r120,ar.csd=\[r20\] + 1de6: 80 07 50 ca 22 00 ld16.acq.d2 r120,ar.csd=\[r20\] + 1dec: 00 00 04 00 nop.i 0x0 + 1df0: 08 c0 03 28 65 11 \[MMI\] ld16.acq.d2 r120,ar.csd=\[r20\] + 1df6: 80 07 50 ce 22 00 ld16.acq.nta r120,ar.csd=\[r20\] + 1dfc: 00 00 04 00 nop.i 0x0 + 1e00: 08 c0 03 28 67 11 \[MMI\] ld16.acq.nta r120,ar.csd=\[r20\] + 1e06: 80 07 52 c2 22 00 ld16.acq.d4 r120,ar.csd=\[r20\] + 1e0c: 00 00 04 00 nop.i 0x0 + 1e10: 08 c0 03 29 63 11 \[MMI\] ld16.acq.d5 r120,ar.csd=\[r20\] + 1e16: 80 07 52 ca 22 00 ld16.acq.d6 r120,ar.csd=\[r20\] + 1e1c: 00 00 04 00 nop.i 0x0 + 1e20: 08 c0 03 29 67 11 \[MMI\] ld16.acq.d7 r120,ar.csd=\[r20\] + 1e26: 80 07 50 ce 22 00 ld16.acq.nta r120,ar.csd=\[r20\] + 1e2c: 00 00 04 00 nop.i 0x0 + 1e30: 08 c0 03 28 67 11 \[MMI\] ld16.acq.nta r120,ar.csd=\[r20\] + 1e36: 80 07 52 c2 22 00 ld16.acq.d4 r120,ar.csd=\[r20\] + 1e3c: 00 00 04 00 nop.i 0x0 + 1e40: 08 c0 03 29 63 11 \[MMI\] ld16.acq.d5 r120,ar.csd=\[r20\] + 1e46: 80 07 52 ca 22 00 ld16.acq.d6 r120,ar.csd=\[r20\] + 1e4c: 00 00 04 00 nop.i 0x0 + 1e50: 09 c0 03 29 67 11 \[MMI\] ld16.acq.d7 r120,ar.csd=\[r20\] + 1e56: 80 07 50 30 20 00 ld8 r120=\[r20\] + 1e5c: 00 00 04 00 nop.i 0x0;; diff --git a/gas/testsuite/gas/ia64/psn.s b/gas/testsuite/gas/ia64/psn.s new file mode 100644 index 0000000..bd2a4ef --- /dev/null +++ b/gas/testsuite/gas/ia64/psn.s @@ -0,0 +1,1018 @@ + + lfetch.count [r2], 1, 64 + lfetch.count.d0 [r22], 5, -64 + lfetch.count.nt1 [r23], 9, 1024-64 + lfetch.count.d1 [r122], 12, -1024 + lfetch.count.nt2 [r5], 16, 0x80 + lfetch.count.d2 [r15], 20, -0x100 + lfetch.count.nta [r125], 24, 512 + lfetch.count.d3 [r8], 29, 960 + lfetch.count.d4 [r18], 34, -0x400 + lfetch.count.d5 [r127], 62, 0x3bf + lfetch.count.d6 [r10], 63, -0x3ff + lfetch.count.d7 [r96], 64, 0 + + + + tf.z p1,p2 = 32;; + tf.nz p7,p2 = @clz;; + tf.z.unc p3,p2 = @clz + tf.nz p3,p4 = @mpy + tf.z.and p5,p4 = @datahints + tf.nz.and p5,p6 = 35 + tf.nz.andcm p5,p6 = 35 + tf.z.or p7,p6 = 63 + tf.nz.or p5,p6 = 35 + tf.z.or.andcm p7,p6 = @mpy + tf.nz.or.andcm p7,p6 = @datahints + tf.z.and.orcm p7,p6 = @clz + tf.nz.and.orcm p7,p6 = @mpy + + + { .mib + tf.nz.unc p6,p0=33 + nop.b 0 ;; + } + lfetch.d4 [r18] + { .mmi + lfetch.fault.excl.d7 [r19] ;; + lfetch.count [r14], 2, 128 + sxt4 r8=r10 + } + { .mmi + lfetch.count.d4 [r11], 64, 256;; + lfetch.excl.d5 [r17] + nop.i 0 + } + { .mmi + lfetch.fault.d6 [r16] ;; + mov dahr7=7 + clz r3=r9 ;; + } + + mov dahr6=6 + mpy4 r2=r9,r8 + mpyshl4 r2=r9,r8 + + { .mmi + mov dahr5=5 ;; + mov dahr4=4 + nop.i 0 ;; + } + { .mib + mov dahr3=3 + add r8=r2,r3 + nop.b 0 ;; + } + { .mmi + mov dahr2=2 ;; + mov dahr1=1 + nop.i 0 ;; + } + { .mib + mov dahr0=0 + nop.i 0 + } + mov r12 = dahr[r5] + mov r122 = dahr[r55] + + st1 [ r65 ] = r93 + st1.d1 [ r65 ] = r93 + st1.nt1 [ r65 ] = r93 + st1.d2 [ r65 ] = r93 + st1.nt2 [ r65 ] = r93 + st1.nta [ r65 ] = r93 + st1.d3 [ r65 ] = r93 + st1.d4 [ r65 ] = r93 + st1.d5 [ r65 ] = r93 + st1.d6 [ r65 ] = r93 + st1.d7 [ r65 ] = r93 + st2 [ r65 ] = r93 + st2.d1 [ r65 ] = r93 + st2.nt1 [ r65 ] = r93 + st2.d2 [ r65 ] = r93 + st2.nt2 [ r65 ] = r93 + st2.nta [ r65 ] = r93 + st2.d3 [ r65 ] = r93 + st2.d4 [ r65 ] = r93 + st2.d5 [ r65 ] = r93 + st2.d6 [ r65 ] = r93 + st2.d7 [ r65 ] = r93 + st4 [ r65 ] = r93 + st4.d1 [ r65 ] = r93 + st4.nt1 [ r65 ] = r93 + st4.d2 [ r65 ] = r93 + st4.nt2 [ r65 ] = r93 + st4.nta [ r65 ] = r93 + st4.d3 [ r65 ] = r93 + st4.d4 [ r65 ] = r93 + st4.d5 [ r65 ] = r93 + st4.d6 [ r65 ] = r93 + st4.d7 [ r65 ] = r93 + st8 [ r65 ] = r93 + st8.d1 [ r65 ] = r93 + st8.nt1 [ r65 ] = r93 + st8.d2 [ r65 ] = r93 + st8.nt2 [ r65 ] = r93 + st8.nta [ r65 ] = r93 + st8.d3 [ r65 ] = r93 + st8.d4 [ r65 ] = r93 + st8.d5 [ r65 ] = r93 + st8.d6 [ r65 ] = r93 + st8.d7 [ r65 ] = r93 + st16 [ r65 ] = r93 + st16 [ r65 ] = r93 + st16.d1 [ r65 ] = r93 + st16.nt1 [ r65 ] = r93 + st16.d2 [ r65 ] = r93 + st16.nt2 [ r65 ] = r93 + st16.nta [ r65 ] = r93 + st16.d3 [ r65 ] = r93 + st16.d4 [ r65 ] = r93 + st16.d5 [ r65 ] = r93 + st16.d6 [ r65 ] = r93 + st16.d7 [ r65 ] = r93 + st16.nta [ r65 ] = r93 + st16.d3 [ r65 ] = r93 + st16.d4 [ r65 ] = r93 + st16.d5 [ r65 ] = r93 + st16.d6 [ r65 ] = r93 + st16.d7 [ r65 ] = r93 + st1.rel [ r65 ] = r93 + st1.rel.d1 [ r65 ] = r93 + st1.rel.nt1 [ r65 ] = r93 + st1.rel.d2 [ r65 ] = r93 + st1.rel.nt2 [ r65 ] = r93 + st1.rel.nta [ r65 ] = r93 + st1.rel.d3 [ r65 ] = r93 + st1.rel.d4 [ r65 ] = r93 + st1.rel.d5 [ r65 ] = r93 + st1.rel.d6 [ r65 ] = r93 + st1.rel.d7 [ r65 ] = r93 + st2.rel [ r65 ] = r93 + st2.rel.d1 [ r65 ] = r93 + st2.rel.nt1 [ r65 ] = r93 + st2.rel.d2 [ r65 ] = r93 + st2.rel.nt2 [ r65 ] = r93 + st2.rel.nta [ r65 ] = r93 + st2.rel.d3 [ r65 ] = r93 + st2.rel.d4 [ r65 ] = r93 + st2.rel.d5 [ r65 ] = r93 + st2.rel.d6 [ r65 ] = r93 + st2.rel.d7 [ r65 ] = r93 + st4.rel [ r65 ] = r93 + st4.rel.d1 [ r65 ] = r93 + st4.rel.nt1 [ r65 ] = r93 + st4.rel.d2 [ r65 ] = r93 + st4.rel.nt2 [ r65 ] = r93 + st4.rel.nta [ r65 ] = r93 + st4.rel.d3 [ r65 ] = r93 + st4.rel.d4 [ r65 ] = r93 + st4.rel.d5 [ r65 ] = r93 + st4.rel.d6 [ r65 ] = r93 + st4.rel.d7 [ r65 ] = r93 + st8.rel [ r65 ] = r93 + st8.rel.d1 [ r65 ] = r93 + st8.rel.nt1 [ r65 ] = r93 + st8.rel.d2 [ r65 ] = r93 + st8.rel.nt2 [ r65 ] = r93 + st8.rel.nta [ r65 ] = r93 + st8.rel.d3 [ r65 ] = r93 + st8.rel.d4 [ r65 ] = r93 + st8.rel.d5 [ r65 ] = r93 + st8.rel.d6 [ r65 ] = r93 + st8.rel.d7 [ r65 ] = r93 + st16.rel [ r65 ] = r93 + st16.rel [ r65 ] = r93, ar.csd + st16.rel.d1 [ r65 ] = r93 + st16.rel.d1 [ r65 ] = r93, ar.csd + st16.rel.nt1 [ r65 ] = r93 + st16.rel.nt1 [ r65 ] = r93, ar.csd + st16.rel.d2 [ r65 ] = r93 + st16.rel.d2 [ r65 ] = r93, ar.csd + st16.rel.nt2 [ r65 ] = r93 + st16.rel.nt2 [ r65 ] = r93, ar.csd + st16.rel.nta [ r65 ] = r93 + st16.rel.d3 [ r65 ] = r93 + st16.rel.d4 [ r65 ] = r93 + st16.rel.d5 [ r65 ] = r93 + st16.rel.d6 [ r65 ] = r93 + st16.rel.d7 [ r65 ] = r93 + st16.rel.nta [ r65 ] = r93, ar.csd + st16.rel.d3 [ r65 ] = r93, ar.csd + st16.rel.d4 [ r65 ] = r93, ar.csd + st16.rel.d5 [ r65 ] = r93, ar.csd + st16.rel.d6 [ r65 ] = r93, ar.csd + st16.rel.d7 [ r65 ] = r93, ar.csd + st8.spill [ r65 ] = r93 + st8.spill.d1 [ r65 ] = r93 + st8.spill.nt1 [ r65 ] = r93 + st8.spill.d2 [ r65 ] = r93 + st8.spill.nt2 [ r65 ] = r93 + st8.spill.nta [ r65 ] = r93 + st8.spill.d3 [ r65 ] = r93 + st8.spill.d4 [ r65 ] = r93 + st8.spill.d5 [ r65 ] = r93 + st8.spill.d6 [ r65 ] = r93 + st8.spill.d7 [ r65 ] = r93 + + lfetch [ r60 ] + lfetch.d1 [ r60 ] + lfetch.nt1 [ r60 ] + lfetch.d2 [ r60 ] + lfetch.nt2 [ r60 ] + lfetch.nta [ r60 ] + lfetch.d3 [ r60 ] + lfetch.d4 [ r60 ] + lfetch.d5 [ r60 ] + lfetch.d6 [ r60 ] + lfetch.d7 [ r60 ] + + + stfs [ r60 ] = f90 + stfs.d1 [ r60 ] = f90 + stfs.nt1 [ r60 ] = f90 + stfs.d2 [ r60 ] = f90 + stfs.nt2 [ r60 ] = f90 + stfs.nta [ r60 ] = f90 + stfs.d3 [ r60 ] = f90 + stfs.d4 [ r60 ] = f90 + stfs.d5 [ r60 ] = f90 + stfs.d6 [ r60 ] = f90 + stfs.d7 [ r60 ] = f90 + stfd [ r60 ] = f90 + stfd.d1 [ r60 ] = f90 + stfd.nt1 [ r60 ] = f90 + stfd.d2 [ r60 ] = f90 + stfd.nt2 [ r60 ] = f90 + stfd.nta [ r60 ] = f90 + stfd.d3 [ r60 ] = f90 + stfd.d4 [ r60 ] = f90 + stfd.d5 [ r60 ] = f90 + stfd.d6 [ r60 ] = f90 + stfd.d7 [ r60 ] = f90 + stf8 [ r60 ] = f90 + stf8.d1 [ r60 ] = f90 + stf8.nt1 [ r60 ] = f90 + stf8.d2 [ r60 ] = f90 + stf8.nt2 [ r60 ] = f90 + stf8.nta [ r60 ] = f90 + stf8.d3 [ r60 ] = f90 + stf8.d4 [ r60 ] = f90 + stf8.d5 [ r60 ] = f90 + stf8.d6 [ r60 ] = f90 + stf8.d7 [ r60 ] = f90 + stfe [ r60 ] = f90 + stfe.d1 [ r60 ] = f90 + stfe.nt1 [ r60 ] = f90 + stfe.d2 [ r60 ] = f90 + stfe.nt2 [ r60 ] = f90 + stfe.nta [ r60 ] = f90 + stfe.d3 [ r60 ] = f90 + stfe.d4 [ r60 ] = f90 + stfe.d5 [ r60 ] = f90 + stfe.d6 [ r60 ] = f90 + stfe.d7 [ r60 ] = f90 + stf.spill [ r60 ] = f90 + stf.spill.d1 [ r60 ] = f90 + stf.spill.nt1 [ r60 ] = f90 + stf.spill.d2 [ r60 ] = f90 + stf.spill.nt2 [ r60 ] = f90 + stf.spill.nta [ r60 ] = f90 + stf.spill.d3 [ r60 ] = f90 + stf.spill.d4 [ r60 ] = f90 + stf.spill.d5 [ r60 ] = f90 + stf.spill.d6 [ r60 ] = f90 + stf.spill.d7 [ r60 ] = f90 + + + /* Floating-point load. */ + ldfs f121 = [ r125 ] + ldfs.nt1 f121 = [ r125 ] + ldfs.d1 f121 = [ r125 ] + ldfs.d2 f121 = [ r125 ] + ldfs.nt2 f121 = [ r125 ] + ldfs.nta f121 = [ r125 ] + ldfs.d3 f121 = [ r125 ] + ldfs.d4 f121 = [ r125 ] + ldfs.d5 f121 = [ r125 ] + ldfs.d6 f121 = [ r125 ] + ldfs.d7 f121 = [ r125 ] + ldfd f121 = [ r125 ] + ldfd.nt1 f121 = [ r125 ] + ldfd.d1 f121 = [ r125 ] + ldfd.d2 f121 = [ r125 ] + ldfd.nt2 f121 = [ r125 ] + ldfd.nta f121 = [ r125 ] + ldfd.d3 f121 = [ r125 ] + ldfd.d4 f121 = [ r125 ] + ldfd.d5 f121 = [ r125 ] + ldfd.d6 f121 = [ r125 ] + ldfd.d7 f121 = [ r125 ] + ldf8 f121 = [ r125 ] + ldf8.nt1 f121 = [ r125 ] + ldf8.d1 f121 = [ r125 ] + ldf8.d2 f121 = [ r125 ] + ldf8.nt2 f121 = [ r125 ] + ldf8.nta f121 = [ r125 ] + ldf8.d3 f121 = [ r125 ] + ldf8.d4 f121 = [ r125 ] + ldf8.d5 f121 = [ r125 ] + ldf8.d6 f121 = [ r125 ] + ldf8.d7 f121 = [ r125 ] + ldfe f121 = [ r125 ] + ldfe.nt1 f121 = [ r125 ] + ldfe.d1 f121 = [ r125 ] + ldfe.d2 f121 = [ r125 ] + ldfe.nt2 f121 = [ r125 ] + ldfe.nta f121 = [ r125 ] + ldfe.d3 f121 = [ r125 ] + ldfe.d4 f121 = [ r125 ] + ldfe.d5 f121 = [ r125 ] + ldfe.d6 f121 = [ r125 ] + ldfe.d7 f121 = [ r125 ] + ldfs.s f121 = [ r125 ] + ldfs.s.nt1 f121 = [ r125 ] + ldfs.s.d1 f121 = [ r125 ] + ldfs.s.d2 f121 = [ r125 ] + ldfs.s.nt2 f121 = [ r125 ] + ldfs.s.nta f121 = [ r125 ] + ldfs.s.d3 f121 = [ r125 ] + ldfs.s.d4 f121 = [ r125 ] + ldfs.s.d5 f121 = [ r125 ] + ldfs.s.d6 f121 = [ r125 ] + ldfs.s.d7 f121 = [ r125 ] + ldfd.s f121 = [ r125 ] + ldfd.s.nt1 f121 = [ r125 ] + ldfd.s.d1 f121 = [ r125 ] + ldfd.s.d2 f121 = [ r125 ] + ldfd.s.nt2 f121 = [ r125 ] + ldfd.s.nta f121 = [ r125 ] + ldfd.s.d3 f121 = [ r125 ] + ldfd.s.d4 f121 = [ r125 ] + ldfd.s.d5 f121 = [ r125 ] + ldfd.s.d6 f121 = [ r125 ] + ldfd.s.d7 f121 = [ r125 ] + ldf8.s f121 = [ r125 ] + ldf8.s.nt1 f121 = [ r125 ] + ldf8.s.d1 f121 = [ r125 ] + ldf8.s.d2 f121 = [ r125 ] + ldf8.s.nt2 f121 = [ r125 ] + ldf8.s.nta f121 = [ r125 ] + ldf8.s.d3 f121 = [ r125 ] + ldf8.s.d4 f121 = [ r125 ] + ldf8.s.d5 f121 = [ r125 ] + ldf8.s.d6 f121 = [ r125 ] + ldf8.s.d7 f121 = [ r125 ] + ldfe.s f121 = [ r125 ] + ldfe.s.nt1 f121 = [ r125 ] + ldfe.s.d1 f121 = [ r125 ] + ldfe.s.d2 f121 = [ r125 ] + ldfe.s.nt2 f121 = [ r125 ] + ldfe.s.nta f121 = [ r125 ] + ldfe.s.d3 f121 = [ r125 ] + ldfe.s.d4 f121 = [ r125 ] + ldfe.s.d5 f121 = [ r125 ] + ldfe.s.d6 f121 = [ r125 ] + ldfe.s.d7 f121 = [ r125 ] + ldfs.a f121 = [ r125 ] + ldfs.a.nt1 f121 = [ r125 ] + ldfs.a.d1 f121 = [ r125 ] + ldfs.a.d2 f121 = [ r125 ] + ldfs.a.nt2 f121 = [ r125 ] + ldfs.a.nta f121 = [ r125 ] + ldfs.a.d3 f121 = [ r125 ] + ldfs.a.d4 f121 = [ r125 ] + ldfs.a.d5 f121 = [ r125 ] + ldfs.a.d6 f121 = [ r125 ] + ldfs.a.d7 f121 = [ r125 ] + ldfd.a f121 = [ r125 ] + ldfd.a.nt1 f121 = [ r125 ] + ldfd.a.d1 f121 = [ r125 ] + ldfd.a.d2 f121 = [ r125 ] + ldfd.a.nt2 f121 = [ r125 ] + ldfd.a.nta f121 = [ r125 ] + ldfd.a.d3 f121 = [ r125 ] + ldfd.a.d4 f121 = [ r125 ] + ldfd.a.d5 f121 = [ r125 ] + ldfd.a.d6 f121 = [ r125 ] + ldfd.a.d7 f121 = [ r125 ] + ldf8.a f121 = [ r125 ] + ldf8.a.nt1 f121 = [ r125 ] + ldf8.a.d1 f121 = [ r125 ] + ldf8.a.d2 f121 = [ r125 ] + ldf8.a.nt2 f121 = [ r125 ] + ldf8.a.nta f121 = [ r125 ] + ldf8.a.d3 f121 = [ r125 ] + ldf8.a.d4 f121 = [ r125 ] + ldf8.a.d5 f121 = [ r125 ] + ldf8.a.d6 f121 = [ r125 ] + ldf8.a.d7 f121 = [ r125 ] + ldfe.a f121 = [ r125 ] + ldfe.a.nt1 f121 = [ r125 ] + ldfe.a.d1 f121 = [ r125 ] + ldfe.a.d2 f121 = [ r125 ] + ldfe.a.nt2 f121 = [ r125 ] + ldfe.a.nta f121 = [ r125 ] + ldfe.a.d3 f121 = [ r125 ] + ldfe.a.d4 f121 = [ r125 ] + ldfe.a.d5 f121 = [ r125 ] + ldfe.a.d6 f121 = [ r125 ] + ldfe.a.d7 f121 = [ r125 ] + ldfs.sa f121 = [ r125 ] + ldfs.sa.nt1 f121 = [ r125 ] + ldfs.sa.d1 f121 = [ r125 ] + ldfs.sa.d2 f121 = [ r125 ] + ldfs.sa.nt2 f121 = [ r125 ] + ldfs.sa.nta f121 = [ r125 ] + ldfs.sa.d3 f121 = [ r125 ] + ldfs.sa.d4 f121 = [ r125 ] + ldfs.sa.d5 f121 = [ r125 ] + ldfs.sa.d6 f121 = [ r125 ] + ldfs.sa.d7 f121 = [ r125 ] + ldfd.sa f121 = [ r125 ] + ldfd.sa.nt1 f121 = [ r125 ] + ldfd.sa.d1 f121 = [ r125 ] + ldfd.sa.d2 f121 = [ r125 ] + ldfd.sa.nt2 f121 = [ r125 ] + ldfd.sa.nta f121 = [ r125 ] + ldfd.sa.d3 f121 = [ r125 ] + ldfd.sa.d4 f121 = [ r125 ] + ldfd.sa.d5 f121 = [ r125 ] + ldfd.sa.d6 f121 = [ r125 ] + ldfd.sa.d7 f121 = [ r125 ] + ldf8.sa f121 = [ r125 ] + ldf8.sa.nt1 f121 = [ r125 ] + ldf8.sa.d1 f121 = [ r125 ] + ldf8.sa.d2 f121 = [ r125 ] + ldf8.sa.nt2 f121 = [ r125 ] + ldf8.sa.nta f121 = [ r125 ] + ldf8.sa.d3 f121 = [ r125 ] + ldf8.sa.d4 f121 = [ r125 ] + ldf8.sa.d5 f121 = [ r125 ] + ldf8.sa.d6 f121 = [ r125 ] + ldf8.sa.d7 f121 = [ r125 ] + ldfe.sa f121 = [ r125 ] + ldfe.sa.nt1 f121 = [ r125 ] + ldfe.sa.d1 f121 = [ r125 ] + ldfe.sa.d2 f121 = [ r125 ] + ldfe.sa.nt2 f121 = [ r125 ] + ldfe.sa.nta f121 = [ r125 ] + ldfe.sa.d3 f121 = [ r125 ] + ldfe.sa.d4 f121 = [ r125 ] + ldfe.sa.d5 f121 = [ r125 ] + ldfe.sa.d6 f121 = [ r125 ] + ldfe.sa.d7 f121 = [ r125 ] + ldf.fill f121 = [ r125 ] + ldf.fill.nt1 f121 = [ r125 ] + ldf.fill.d1 f121 = [ r125 ] + ldf.fill.d2 f121 = [ r125 ] + ldf.fill.nt2 f121 = [ r125 ] + ldf.fill.nta f121 = [ r125 ] + ldf.fill.d3 f121 = [ r125 ] + ldf.fill.d4 f121 = [ r125 ] + ldf.fill.d5 f121 = [ r125 ] + ldf.fill.d6 f121 = [ r125 ] + ldf.fill.d7 f121 = [ r125 ] + ldfs.c.clr f121 = [ r125 ] + ldfs.c.clr.nt1 f121 = [ r125 ] + ldfs.c.clr.d1 f121 = [ r125 ] + ldfs.c.clr.d2 f121 = [ r125 ] + ldfs.c.clr.nt2 f121 = [ r125 ] + ldfs.c.clr.nta f121 = [ r125 ] + ldfs.c.clr.d3 f121 = [ r125 ] + ldfs.c.clr.d4 f121 = [ r125 ] + ldfs.c.clr.d5 f121 = [ r125 ] + ldfs.c.clr.d6 f121 = [ r125 ] + ldfs.c.clr.d7 f121 = [ r125 ] + ldfd.c.clr f121 = [ r125 ] + ldfd.c.clr.nt1 f121 = [ r125 ] + ldfd.c.clr.d1 f121 = [ r125 ] + ldfd.c.clr.d2 f121 = [ r125 ] + ldfd.c.clr.nt2 f121 = [ r125 ] + ldfd.c.clr.nta f121 = [ r125 ] + ldfd.c.clr.d3 f121 = [ r125 ] + ldfd.c.clr.d4 f121 = [ r125 ] + ldfd.c.clr.d5 f121 = [ r125 ] + ldfd.c.clr.d6 f121 = [ r125 ] + ldfd.c.clr.d7 f121 = [ r125 ] + ldf8.c.clr f121 = [ r125 ] + ldf8.c.clr.nt1 f121 = [ r125 ] + ldf8.c.clr.d1 f121 = [ r125 ] + ldf8.c.clr.d2 f121 = [ r125 ] + ldf8.c.clr.nt2 f121 = [ r125 ] + ldf8.c.clr.nta f121 = [ r125 ] + ldf8.c.clr.d3 f121 = [ r125 ] + ldf8.c.clr.d4 f121 = [ r125 ] + ldf8.c.clr.d5 f121 = [ r125 ] + ldf8.c.clr.d6 f121 = [ r125 ] + ldf8.c.clr.d7 f121 = [ r125 ] + ldfe.c.clr f121 = [ r125 ] + ldfe.c.clr.nt1 f121 = [ r125 ] + ldfe.c.clr.d1 f121 = [ r125 ] + ldfe.c.clr.d2 f121 = [ r125 ] + ldfe.c.clr.nt2 f121 = [ r125 ] + ldfe.c.clr.nta f121 = [ r125 ] + ldfe.c.clr.d3 f121 = [ r125 ] + ldfe.c.clr.d4 f121 = [ r125 ] + ldfe.c.clr.d5 f121 = [ r125 ] + ldfe.c.clr.d6 f121 = [ r125 ] + ldfe.c.clr.d7 f121 = [ r125 ] + ldfs.c.nc f121 = [ r125 ] + ldfs.c.nc.nt1 f121 = [ r125 ] + ldfs.c.nc.d1 f121 = [ r125 ] + ldfs.c.nc.d2 f121 = [ r125 ] + ldfs.c.nc.nt2 f121 = [ r125 ] + ldfs.c.nc.nta f121 = [ r125 ] + ldfs.c.nc.d3 f121 = [ r125 ] + ldfs.c.nc.d4 f121 = [ r125 ] + ldfs.c.nc.d5 f121 = [ r125 ] + ldfs.c.nc.d6 f121 = [ r125 ] + ldfs.c.nc.d7 f121 = [ r125 ] + ldfd.c.nc f121 = [ r125 ] + ldfd.c.nc.nt1 f121 = [ r125 ] + ldfd.c.nc.d1 f121 = [ r125 ] + ldfd.c.nc.d2 f121 = [ r125 ] + ldfd.c.nc.nt2 f121 = [ r125 ] + ldfd.c.nc.nta f121 = [ r125 ] + ldfd.c.nc.d3 f121 = [ r125 ] + ldfd.c.nc.d4 f121 = [ r125 ] + ldfd.c.nc.d5 f121 = [ r125 ] + ldfd.c.nc.d6 f121 = [ r125 ] + ldfd.c.nc.d7 f121 = [ r125 ] + ldf8.c.nc f121 = [ r125 ] + ldf8.c.nc.nt1 f121 = [ r125 ] + ldf8.c.nc.d1 f121 = [ r125 ] + ldf8.c.nc.d2 f121 = [ r125 ] + ldf8.c.nc.nt2 f121 = [ r125 ] + ldf8.c.nc.nta f121 = [ r125 ] + ldf8.c.nc.d3 f121 = [ r125 ] + ldf8.c.nc.d4 f121 = [ r125 ] + ldf8.c.nc.d5 f121 = [ r125 ] + ldf8.c.nc.d6 f121 = [ r125 ] + ldf8.c.nc.d7 f121 = [ r125 ] + ldfe.c.nc f121 = [ r125 ] + ldfe.c.nc.nt1 f121 = [ r125 ] + ldfe.c.nc.d1 f121 = [ r125 ] + ldfe.c.nc.d2 f121 = [ r125 ] + ldfe.c.nc.nt2 f121 = [ r125 ] + ldfe.c.nc.nta f121 = [ r125 ] + ldfe.c.nc.d3 f121 = [ r125 ] + ldfe.c.nc.d4 f121 = [ r125 ] + ldfe.c.nc.d5 f121 = [ r125 ] + ldfe.c.nc.d6 f121 = [ r125 ] + ldfe.c.nc.d7 f121 = [ r125 ] + + + + + ld1 r120 = [ r20 ] + ld1.nt1 r120 = [ r20 ] + ld1.d1 r120 = [ r20 ] + ld1.d2 r120 = [ r20 ] + ld1.nt2 r120 = [ r20 ] + ld1.nta r120 = [ r20 ] + ld1.d3 r120 = [ r20 ] + ld1.d4 r120 = [ r20 ] + ld1.d5 r120 = [ r20 ] + ld1.d6 r120 = [ r20 ] + ld1.d7 r120 = [ r20 ] + ld2 r120 = [ r20 ] + ld2.nt1 r120 = [ r20 ] + ld2.d1 r120 = [ r20 ] + ld2.d2 r120 = [ r20 ] + ld2.nt2 r120 = [ r20 ] + ld2.nta r120 = [ r20 ] + ld2.d3 r120 = [ r20 ] + ld2.d4 r120 = [ r20 ] + ld2.d5 r120 = [ r20 ] + ld2.d6 r120 = [ r20 ] + ld2.d7 r120 = [ r20 ] + ld4 r120 = [ r20 ] + ld4.nt1 r120 = [ r20 ] + ld4.d1 r120 = [ r20 ] + ld4.d2 r120 = [ r20 ] + ld4.nt2 r120 = [ r20 ] + ld4.nta r120 = [ r20 ] + ld4.d3 r120 = [ r20 ] + ld4.d4 r120 = [ r20 ] + ld4.d5 r120 = [ r20 ] + ld4.d6 r120 = [ r20 ] + ld4.d7 r120 = [ r20 ] + ld8 r120 = [ r20 ] + ld8.nt1 r120 = [ r20 ] + ld8.d1 r120 = [ r20 ] + ld8.d2 r120 = [ r20 ] + ld8.nt2 r120 = [ r20 ] + ld8.nta r120 = [ r20 ] + ld8.d3 r120 = [ r20 ] + ld8.d4 r120 = [ r20 ] + ld8.d5 r120 = [ r20 ] + ld8.d6 r120 = [ r20 ] + ld8.d7 r120 = [ r20 ] + ld1.s r120 = [ r20 ] + ld1.s.nt1 r120 = [ r20 ] + ld1.s.d1 r120 = [ r20 ] + ld1.s.d2 r120 = [ r20 ] + ld1.s.nt2 r120 = [ r20 ] + ld1.s.nta r120 = [ r20 ] + ld1.s.d3 r120 = [ r20 ] + ld1.s.d4 r120 = [ r20 ] + ld1.s.d5 r120 = [ r20 ] + ld1.s.d6 r120 = [ r20 ] + ld1.s.d7 r120 = [ r20 ] + ld2.s r120 = [ r20 ] + ld2.s.nt1 r120 = [ r20 ] + ld2.s.d1 r120 = [ r20 ] + ld2.s.d2 r120 = [ r20 ] + ld2.s.nt2 r120 = [ r20 ] + ld2.s.nta r120 = [ r20 ] + ld2.s.d3 r120 = [ r20 ] + ld2.s.d4 r120 = [ r20 ] + ld2.s.d5 r120 = [ r20 ] + ld2.s.d6 r120 = [ r20 ] + ld2.s.d7 r120 = [ r20 ] + ld4.s r120 = [ r20 ] + ld4.s.nt1 r120 = [ r20 ] + ld4.s.d1 r120 = [ r20 ] + ld4.s.d2 r120 = [ r20 ] + ld4.s.nt2 r120 = [ r20 ] + ld4.s.nta r120 = [ r20 ] + ld4.s.d3 r120 = [ r20 ] + ld4.s.d4 r120 = [ r20 ] + ld4.s.d5 r120 = [ r20 ] + ld4.s.d6 r120 = [ r20 ] + ld4.s.d7 r120 = [ r20 ] + ld8.s r120 = [ r20 ] + ld8.s.nt1 r120 = [ r20 ] + ld8.s.d1 r120 = [ r20 ] + ld8.s.d2 r120 = [ r20 ] + ld8.s.nt2 r120 = [ r20 ] + ld8.s.nta r120 = [ r20 ] + ld8.s.d3 r120 = [ r20 ] + ld8.s.d4 r120 = [ r20 ] + ld8.s.d5 r120 = [ r20 ] + ld8.s.d6 r120 = [ r20 ] + ld8.s.d7 r120 = [ r20 ] + ld1.a r120 = [ r20 ] + ld1.a.nt1 r120 = [ r20 ] + ld1.a.d1 r120 = [ r20 ] + ld1.a.d2 r120 = [ r20 ] + ld1.a.nt2 r120 = [ r20 ] + ld1.a.nta r120 = [ r20 ] + ld1.a.d3 r120 = [ r20 ] + ld1.a.d4 r120 = [ r20 ] + ld1.a.d5 r120 = [ r20 ] + ld1.a.d6 r120 = [ r20 ] + ld1.a.d7 r120 = [ r20 ] + ld2.a r120 = [ r20 ] + ld2.a.nt1 r120 = [ r20 ] + ld2.a.d1 r120 = [ r20 ] + ld2.a.nt2 r120 = [ r20 ] + ld2.a.nta r120 = [ r20 ] + ld2.a.d3 r120 = [ r20 ] + ld2.a.d4 r120 = [ r20 ] + ld2.a.d5 r120 = [ r20 ] + ld2.a.d6 r120 = [ r20 ] + ld2.a.d7 r120 = [ r20 ] + ld4.a r120 = [ r20 ] + ld4.a.nt1 r120 = [ r20 ] + ld4.a.d1 r120 = [ r20 ] + ld4.a.d2 r120 = [ r20 ] + ld4.a.nt2 r120 = [ r20 ] + ld4.a.nta r120 = [ r20 ] + ld4.a.d3 r120 = [ r20 ] + ld4.a.d4 r120 = [ r20 ] + ld4.a.d5 r120 = [ r20 ] + ld4.a.d6 r120 = [ r20 ] + ld4.a.d7 r120 = [ r20 ] + ld8.a r120 = [ r20 ] + ld8.a.nt1 r120 = [ r20 ] + ld8.a.d1 r120 = [ r20 ] + ld8.a.d2 r120 = [ r20 ] + ld8.a.nt2 r120 = [ r20 ] + ld8.a.nta r120 = [ r20 ] + ld8.a.d3 r120 = [ r20 ] + ld8.a.d5 r120 = [ r20 ] + ld8.a.d6 r120 = [ r20 ] + ld8.a.d7 r120 = [ r20 ] + ld1.sa r120 = [ r20 ] + ld1.sa.nt1 r120 = [ r20 ] + ld1.sa.d1 r120 = [ r20 ] + ld1.sa.d2 r120 = [ r20 ] + ld1.sa.nt2 r120 = [ r20 ] + ld1.sa.nta r120 = [ r20 ] + ld1.sa.d3 r120 = [ r20 ] + ld1.sa.d4 r120 = [ r20 ] + ld1.sa.d5 r120 = [ r20 ] + ld1.sa.d6 r120 = [ r20 ] + ld1.sa.d7 r120 = [ r20 ] + ld2.sa r120 = [ r20 ] + ld2.sa.nt1 r120 = [ r20 ] + ld2.sa.d1 r120 = [ r20 ] + ld2.sa.d2 r120 = [ r20 ] + ld2.sa.nt2 r120 = [ r20 ] + ld2.sa.nta r120 = [ r20 ] + ld2.sa.d3 r120 = [ r20 ] + ld2.sa.d4 r120 = [ r20 ] + ld2.sa.d5 r120 = [ r20 ] + ld2.sa.d6 r120 = [ r20 ] + ld2.sa.d7 r120 = [ r20 ] + ld4.sa.nt1 r120 = [ r20 ] + ld4.sa.d1 r120 = [ r20 ] + ld4.sa.d2 r120 = [ r20 ] + ld4.sa.nt2 r120 = [ r20 ] + ld4.sa.nta r120 = [ r20 ] + ld4.sa.d3 r120 = [ r20 ] + ld4.sa.d4 r120 = [ r20 ] + ld4.sa.d5 r120 = [ r20 ] + ld4.sa.d6 r120 = [ r20 ] + ld4.sa.d7 r120 = [ r20 ] + ld8.sa r120 = [ r20 ] + ld8.sa.nt1 r120 = [ r20 ] + ld8.sa.d1 r120 = [ r20 ] + ld8.sa.d2 r120 = [ r20 ] + ld8.sa.nt2 r120 = [ r20 ] + ld8.sa.nta r120 = [ r20 ] + ld8.sa.d3 r120 = [ r20 ] + ld8.sa.d4 r120 = [ r20 ] + ld8.sa.d5 r120 = [ r20 ] + ld8.sa.d6 r120 = [ r20 ] + ld8.sa.d7 r120 = [ r20 ] + ld1.bias r120 = [ r20 ] + ld1.bias.nt1 r120 = [ r20 ] + ld1.bias.d1 r120 = [ r20 ] + ld1.bias.d2 r120 = [ r20 ] + ld1.bias.nt2 r120 = [ r20 ] + ld1.bias.nta r120 = [ r20 ] + ld1.bias.d3 r120 = [ r20 ] + ld1.bias.d4 r120 = [ r20 ] + ld1.bias.d5 r120 = [ r20 ] + ld1.bias.d6 r120 = [ r20 ] + ld1.bias.d7 r120 = [ r20 ] + ld2.bias r120 = [ r20 ] + ld2.bias.nt1 r120 = [ r20 ] + ld2.bias.d1 r120 = [ r20 ] + ld2.bias.d2 r120 = [ r20 ] + ld2.bias.nt2 r120 = [ r20 ] + ld2.bias.nta r120 = [ r20 ] + ld2.bias.d3 r120 = [ r20 ] + ld2.bias.d4 r120 = [ r20 ] + ld2.bias.d5 r120 = [ r20 ] + ld2.bias.d6 r120 = [ r20 ] + ld2.bias.d7 r120 = [ r20 ] + ld4.bias r120 = [ r20 ] + ld4.bias.nt1 r120 = [ r20 ] + ld4.bias.d1 r120 = [ r20 ] + ld4.bias.d2 r120 = [ r20 ] + ld4.bias.nt2 r120 = [ r20 ] + ld4.bias.nta r120 = [ r20 ] + ld4.bias.d3 r120 = [ r20 ] + ld4.bias.d4 r120 = [ r20 ] + ld4.bias.d5 r120 = [ r20 ] + ld4.bias.d6 r120 = [ r20 ] + ld4.bias.d7 r120 = [ r20 ] + ld8.bias r120 = [ r20 ] + ld8.bias.nt1 r120 = [ r20 ] + ld8.bias.d1 r120 = [ r20 ] + ld8.bias.d2 r120 = [ r20 ] + ld8.bias.nt2 r120 = [ r20 ] + ld8.bias.nta r120 = [ r20 ] + ld8.bias.d3 r120 = [ r20 ] + ld8.bias.d4 r120 = [ r20 ] + ld8.bias.d5 r120 = [ r20 ] + ld8.bias.d6 r120 = [ r20 ] + ld8.bias.d7 r120 = [ r20 ] + ld1.acq r120 = [ r20 ] + ld1.acq.nt1 r120 = [ r20 ] + ld1.acq.d1 r120 = [ r20 ] + ld1.acq.d2 r120 = [ r20 ] + ld1.acq.nt2 r120 = [ r20 ] + ld1.acq.nta r120 = [ r20 ] + ld1.acq.d3 r120 = [ r20 ] + ld1.acq.d4 r120 = [ r20 ] + ld1.acq.d5 r120 = [ r20 ] + ld1.acq.d6 r120 = [ r20 ] + ld2.acq r120 = [ r20 ] + ld2.acq.nt1 r120 = [ r20 ] + ld2.acq.d1 r120 = [ r20 ] + ld2.acq.d2 r120 = [ r20 ] + ld2.acq.nt2 r120 = [ r20 ] + ld2.acq.nta r120 = [ r20 ] + ld2.acq.d3 r120 = [ r20 ] + ld2.acq.d4 r120 = [ r20 ] + ld2.acq.d5 r120 = [ r20 ] + ld2.acq.d6 r120 = [ r20 ] + ld2.acq.d7 r120 = [ r20 ] + ld4.acq r120 = [ r20 ] + ld4.acq.nt1 r120 = [ r20 ] + ld4.acq.d1 r120 = [ r20 ] + ld4.acq.d2 r120 = [ r20 ] + ld4.acq.nt2 r120 = [ r20 ] + ld4.acq.nta r120 = [ r20 ] + ld4.acq.d3 r120 = [ r20 ] + ld4.acq.d4 r120 = [ r20 ] + ld4.acq.d5 r120 = [ r20 ] + ld4.acq.d6 r120 = [ r20 ] + ld4.acq.d7 r120 = [ r20 ] + ld8.acq r120 = [ r20 ] + ld8.acq.nt1 r120 = [ r20 ] + ld8.acq.d1 r120 = [ r20 ] + ld8.acq.d2 r120 = [ r20 ] + ld8.acq.nt2 r120 = [ r20 ] + ld8.acq.nta r120 = [ r20 ] + ld8.acq.d3 r120 = [ r20 ] + ld8.acq.d4 r120 = [ r20 ] + ld8.acq.d5 r120 = [ r20 ] + ld8.acq.d6 r120 = [ r20 ] + ld8.acq.d7 r120 = [ r20 ] + ld8.fill r120 = [ r20 ] + ld8.fill.nt1 r120 = [ r20 ] + ld8.fill.d1 r120 = [ r20 ] + ld8.fill.d2 r120 = [ r20 ] + ld8.fill.nt2 r120 = [ r20 ] + ld8.fill.nta r120 = [ r20 ] + ld8.fill.d3 r120 = [ r20 ] + ld8.fill.d4 r120 = [ r20 ] + ld8.fill.d5 r120 = [ r20 ] + ld8.fill.d6 r120 = [ r20 ] + ld8.fill.d7 r120 = [ r20 ] + ld1.c.clr r120 = [ r20 ] + ld1.c.clr.nt1 r120 = [ r20 ] + ld1.c.clr.d1 r120 = [ r20 ] + ld1.c.clr.d2 r120 = [ r20 ] + ld1.c.clr.nt2 r120 = [ r20 ] + ld1.c.clr.nta r120 = [ r20 ] + ld1.c.clr.d3 r120 = [ r20 ] + ld1.c.clr.d4 r120 = [ r20 ] + ld1.c.clr.d5 r120 = [ r20 ] + ld1.c.clr.d6 r120 = [ r20 ] + ld1.c.clr.d7 r120 = [ r20 ] + ld2.c.clr r120 = [ r20 ] + ld2.c.clr.nt1 r120 = [ r20 ] + ld2.c.clr.d1 r120 = [ r20 ] + ld2.c.clr.d2 r120 = [ r20 ] + ld2.c.clr.nt2 r120 = [ r20 ] + ld2.c.clr.nta r120 = [ r20 ] + ld2.c.clr.d3 r120 = [ r20 ] + ld2.c.clr.d4 r120 = [ r20 ] + ld2.c.clr.d5 r120 = [ r20 ] + ld2.c.clr.d6 r120 = [ r20 ] + ld2.c.clr.d7 r120 = [ r20 ] + ld4.c.clr r120 = [ r20 ] + ld4.c.clr.nt1 r120 = [ r20 ] + ld4.c.clr.d1 r120 = [ r20 ] + ld4.c.clr.d2 r120 = [ r20 ] + ld4.c.clr.nt2 r120 = [ r20 ] + ld4.c.clr.nta r120 = [ r20 ] + ld4.c.clr.d3 r120 = [ r20 ] + ld4.c.clr.d4 r120 = [ r20 ] + ld4.c.clr.d5 r120 = [ r20 ] + ld4.c.clr.d6 r120 = [ r20 ] + ld4.c.clr.d7 r120 = [ r20 ] + ld8.c.clr r120 = [ r20 ] + ld8.c.clr.nt1 r120 = [ r20 ] + ld8.c.clr.d1 r120 = [ r20 ] + ld8.c.clr.d2 r120 = [ r20 ] + ld8.c.clr.nt2 r120 = [ r20 ] + ld8.c.clr.nta r120 = [ r20 ] + ld8.c.clr.d3 r120 = [ r20 ] + ld8.c.clr.d4 r120 = [ r20 ] + ld8.c.clr.d5 r120 = [ r20 ] + ld8.c.clr.d6 r120 = [ r20 ] + ld8.c.clr.d7 r120 = [ r20 ] + ld1.c.nc r120 = [ r20 ] + ld1.c.nc.nt1 r120 = [ r20 ] + ld1.c.nc.d1 r120 = [ r20 ] + ld1.c.nc.d2 r120 = [ r20 ] + ld1.c.nc.nt2 r120 = [ r20 ] + ld1.c.nc.nta r120 = [ r20 ] + ld1.c.nc.d3 r120 = [ r20 ] + ld1.c.nc.d4 r120 = [ r20 ] + ld1.c.nc.d5 r120 = [ r20 ] + ld1.c.nc.d7 r120 = [ r20 ] + ld2.c.nc r120 = [ r20 ] + ld2.c.nc.nt1 r120 = [ r20 ] + ld2.c.nc.d1 r120 = [ r20 ] + ld2.c.nc.d2 r120 = [ r20 ] + ld2.c.nc.nt2 r120 = [ r20 ] + ld2.c.nc.nta r120 = [ r20 ] + ld2.c.nc.d3 r120 = [ r20 ] + ld2.c.nc.d4 r120 = [ r20 ] + ld2.c.nc.d5 r120 = [ r20 ] + ld2.c.nc.d6 r120 = [ r20 ] + ld2.c.nc.d7 r120 = [ r20 ] + ld4.c.nc r120 = [ r20 ] + ld4.c.nc.nt1 r120 = [ r20 ] + ld4.c.nc.d1 r120 = [ r20 ] + ld4.c.nc.d2 r120 = [ r20 ] + ld4.c.nc.nt2 r120 = [ r20 ] + ld4.c.nc.nta r120 = [ r20 ] + ld4.c.nc.d3 r120 = [ r20 ] + ld4.c.nc.d4 r120 = [ r20 ] + ld4.c.nc.d5 r120 = [ r20 ] + ld4.c.nc.d6 r120 = [ r20 ] + ld4.c.nc.d7 r120 = [ r20 ] + ld8.c.nc r120 = [ r20 ] + ld8.c.nc.nt1 r120 = [ r20 ] + ld8.c.nc.d1 r120 = [ r20 ] + ld8.c.nc.d2 r120 = [ r20 ] + ld8.c.nc.nt2 r120 = [ r20 ] + ld8.c.nc.nta r120 = [ r20 ] + ld8.c.nc.d3 r120 = [ r20 ] + ld8.c.nc.d4 r120 = [ r20 ] + ld8.c.nc.d5 r120 = [ r20 ] + ld8.c.nc.d6 r120 = [ r20 ] + ld8.c.nc.d7 r120 = [ r20 ] + ld1.c.clr.acq r120 = [ r20 ] + ld1.c.clr.acq.nt1 r120 = [ r20 ] + ld1.c.clr.acq.d1 r120 = [ r20 ] + ld1.c.clr.acq.d2 r120 = [ r20 ] + ld1.c.clr.acq.nt2 r120 = [ r20 ] + ld1.c.clr.acq.nta r120 = [ r20 ] + ld1.c.clr.acq.d3 r120 = [ r20 ] + ld1.c.clr.acq.d4 r120 = [ r20 ] + ld1.c.clr.acq.d5 r120 = [ r20 ] + ld1.c.clr.acq.d6 r120 = [ r20 ] + ld1.c.clr.acq.d7 r120 = [ r20 ] + ld2.c.clr.acq r120 = [ r20 ] + ld2.c.clr.acq.nt1 r120 = [ r20 ] + ld2.c.clr.acq.d1 r120 = [ r20 ] + ld2.c.clr.acq.d2 r120 = [ r20 ] + ld2.c.clr.acq.nt2 r120 = [ r20 ] + ld2.c.clr.acq.d3 r120 = [ r20 ] + ld2.c.clr.acq.d4 r120 = [ r20 ] + ld2.c.clr.acq.d5 r120 = [ r20 ] + ld2.c.clr.acq.d6 r120 = [ r20 ] + ld2.c.clr.acq.d7 r120 = [ r20 ] + ld4.c.clr.acq r120 = [ r20 ] + ld4.c.clr.acq.nt1 r120 = [ r20 ] + ld4.c.clr.acq.d1 r120 = [ r20 ] + ld4.c.clr.acq.d2 r120 = [ r20 ] + ld4.c.clr.acq.nt2 r120 = [ r20 ] + ld4.c.clr.acq.nta r120 = [ r20 ] + ld4.c.clr.acq.d3 r120 = [ r20 ] + ld4.c.clr.acq.d4 r120 = [ r20 ] + ld4.c.clr.acq.d5 r120 = [ r20 ] + ld4.c.clr.acq.d6 r120 = [ r20 ] + ld4.c.clr.acq.d7 r120 = [ r20 ] + ld8.c.clr.acq r120 = [ r20 ] + ld8.c.clr.acq.nt1 r120 = [ r20 ] + ld8.c.clr.acq.d1 r120 = [ r20 ] + ld8.c.clr.acq.d2 r120 = [ r20 ] + ld8.c.clr.acq.nt2 r120 = [ r20 ] + ld8.c.clr.acq.nta r120 = [ r20 ] + ld8.c.clr.acq.d3 r120 = [ r20 ] + ld8.c.clr.acq.d4 r120 = [ r20 ] + ld8.c.clr.acq.d5 r120 = [ r20 ] + ld8.c.clr.acq.d6 r120 = [ r20 ] + ld8.c.clr.acq.d7 r120 = [ r20 ] + ld16 r120 = [ r20 ] + ld16 r120 = [ r20 ] + ld16.nt1 r120 = [ r20 ] + ld16.d1 r120 = [ r20 ] + ld16.d2 r120 = [ r20 ] + ld16.nt2 r120 = [ r20 ] + ld16.nt1 r120 = [ r20 ] + ld16.d1 r120 = [ r20 ] + ld16.d2 r120 = [ r20 ] + ld16.nt2 r120 = [ r20 ] + ld16.nta r120 = [ r20 ] + ld16.d3 r120 = [ r20 ] + ld16.d4 r120 = [ r20 ] + ld16.d5 r120 = [ r20 ] + ld16.d6 r120 = [ r20 ] + ld16.d7 r120 = [ r20 ] + ld16.nta r120 = [ r20 ] + ld16.d3 r120 = [ r20 ] + ld16.d4 r120 = [ r20 ] + ld16.d5 r120 = [ r20 ] + ld16.d6 r120 = [ r20 ] + ld16.d7 r120 = [ r20 ] + ld16.acq r120 = [ r20 ] + ld16.acq r120, ar.csd = [ r20 ] + ld16.acq.nt1 r120 = [ r20 ] + ld16.acq.d1 r120 = [ r20 ] + ld16.acq.d2 r120, ar.csd = [ r20 ] + ld16.acq.nt2 r120 = [ r20 ] + ld16.acq.nt1 r120 = [ r20 ] + ld16.acq.d1 r120 = [ r20 ] + ld16.acq.d2 r120 = [ r20 ] + ld16.acq.nt2 r120 = [ r20 ] + ld16.acq.nta r120 = [ r20 ] + ld16.acq.d3 r120 = [ r20 ] + ld16.acq.d4 r120 = [ r20 ] + ld16.acq.d5 r120 = [ r20 ] + ld16.acq.d6 r120 = [ r20 ] + ld16.acq.d7 r120 = [ r20 ] + ld16.acq.nta r120, ar.csd = [ r20 ] + ld16.acq.d3 r120 = [ r20 ] + ld16.acq.d4 r120 = [ r20 ] + ld16.acq.d5 r120 = [ r20 ] + ld16.acq.d6 r120 = [ r20 ] + ld16.acq.d7 r120 = [ r20 ] + + /* Pseudo-op that generates ldxmov relocation. */ + ld8.mov r120 = [ r20 ], AAAAA +AAAAA: + diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index e0b0673..ce5c71d 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,22 +1,26 @@ +2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> + + * ia64.h (ia64_opnd): Add new operand types. + 2012-08-21 David S. Miller <davem@davemloft.net> * sparc.h (F3F4): New macro. 2012-08-13 Ian Bolton <ian.bolton@arm.com> - Laurent Desnogues <laurent.desnogues@arm.com> - Jim MacArthur <jim.macarthur@arm.com> - Marcus Shawcroft <marcus.shawcroft@arm.com> - Nigel Stephens <nigel.stephens@arm.com> - Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> - Richard Earnshaw <rearnsha@arm.com> - Sofiane Naci <sofiane.naci@arm.com> - Tejas Belagod <tejas.belagod@arm.com> - Yufeng Zhang <yufeng.zhang@arm.com> + Laurent Desnogues <laurent.desnogues@arm.com> + Jim MacArthur <jim.macarthur@arm.com> + Marcus Shawcroft <marcus.shawcroft@arm.com> + Nigel Stephens <nigel.stephens@arm.com> + Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + Richard Earnshaw <rearnsha@arm.com> + Sofiane Naci <sofiane.naci@arm.com> + Tejas Belagod <tejas.belagod@arm.com> + Yufeng Zhang <yufeng.zhang@arm.com> * aarch64.h: New file. 2012-08-13 Richard Sandiford <rdsandiford@googlemail.com> - Maciej W. Rozycki <macro@codesourcery.com> + Maciej W. Rozycki <macro@codesourcery.com> * mips.h (mips_opcode): Add the exclusions field. (OPCODE_IS_MEMBER): Remove macro. @@ -24,8 +28,8 @@ (opcode_is_member): Likewise. 2012-07-31 Chao-Ying Fu <fu@mips.com> - Catherine Moore <clm@codesourcery.com> - Maciej W. Rozycki <macro@codesourcery.com> + Catherine Moore <clm@codesourcery.com> + Maciej W. Rozycki <macro@codesourcery.com> * mips.h: Document microMIPS DSP ASE usage. (MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for @@ -110,7 +114,7 @@ (XRELEASE_PREFIX_OPCODE): Likewise. 2011-12-08 Andrew Pinski <apinski@cavium.com> - Adam Nemet <anemet@caviumnetworks.com> + Adam Nemet <anemet@caviumnetworks.com> * mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEON2. (INSN_OCTEON2): New macro. @@ -141,7 +145,7 @@ F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING): New flag bits. 2011-08-09 Chao-ying Fu <fu@mips.com> - Maciej W. Rozycki <macro@codesourcery.com> + Maciej W. Rozycki <macro@codesourcery.com> * mips.h (OP_MASK_3BITPOS, OP_SH_3BITPOS): New macros. (OP_MASK_OFFSET12, OP_SH_OFFSET12): Redefine. @@ -187,7 +191,7 @@ (MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): Remove macros. 2011-07-24 Chao-ying Fu <fu@mips.com> - Maciej W. Rozycki <macro@codesourcery.com> + Maciej W. Rozycki <macro@codesourcery.com> * mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros. (OP_MASK_STYPE, OP_SH_STYPE): Likewise. @@ -750,7 +754,7 @@ 2008-11-28 Joshua Kinard <kumba@gentoo.org> * mips.h: Define CPU_R14000, CPU_R16000. - (OPCODE_IS_MEMBER): Include R14000, R16000 in test. + (OPCODE_IS_MEMBER): Include R14000, R16000 in test. 2008-11-18 Catherine Moore <clm@codesourcery.com> @@ -989,9 +993,9 @@ * i386.h: Replace CpuMNI with CpuSSSE3. 2006-09-26 Mark Shinwell <shinwell@codesourcery.com> - Joseph Myers <joseph@codesourcery.com> - Ian Lance Taylor <ian@wasabisystems.com> - Ben Elliston <bje@wasabisystems.com> + Joseph Myers <joseph@codesourcery.com> + Ian Lance Taylor <ian@wasabisystems.com> + Ben Elliston <bje@wasabisystems.com> * arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define. @@ -1034,18 +1038,18 @@ * m68k.h (mcf_mask): Define. 2006-05-05 Thiemo Seufer <ths@mips.com> - David Ung <davidu@mips.com> + David Ung <davidu@mips.com> * mips.h (enum): Add macro M_CACHE_AB. 2006-05-04 Thiemo Seufer <ths@mips.com> - Nigel Stephens <nigel@mips.com> + Nigel Stephens <nigel@mips.com> David Ung <davidu@mips.com> * mips.h: Add INSN_SMARTMIPS define. 2006-04-30 Thiemo Seufer <ths@mips.com> - David Ung <davidu@mips.com> + David Ung <davidu@mips.com> * mips.h: Defines udi bits and masks. Add description of characters which may appear in the args field of udi diff --git a/include/opcode/ia64.h b/include/opcode/ia64.h index 4285377..433c505 100644 --- a/include/opcode/ia64.h +++ b/include/opcode/ia64.h @@ -91,6 +91,7 @@ enum ia64_opnd IA64_OPND_R2, /* second register # */ IA64_OPND_R3, /* third register # */ IA64_OPND_R3_2, /* third register # (limited to gr0-gr3) */ + IA64_OPND_DAHR3, /* dahr reg # ( bits 23-25) */ /* memory operands: */ IA64_OPND_MR3, /* memory at addr of third register # */ @@ -105,6 +106,7 @@ enum ia64_opnd IA64_OPND_PKR_R3, /* pkr[reg] */ IA64_OPND_PMC_R3, /* pmc[reg] */ IA64_OPND_PMD_R3, /* pmd[reg] */ + IA64_OPND_DAHR_R3, /* dahr[reg] */ IA64_OPND_RR_R3, /* rr[reg] */ /* immediate operands: */ @@ -134,7 +136,9 @@ enum ia64_opnd IA64_OPND_IMM9a, /* signed 9-bit immediate (bits 6-12, 27, 36) */ IA64_OPND_IMM9b, /* signed 9-bit immediate (bits 13-19, 27, 36) */ IA64_OPND_IMM14, /* signed 14-bit immediate (bits 13-19, 27-32, 36) */ + IA64_OPND_IMMU16, /* unsigned 16-bit immediate (bits 6-9, 12-22, 36) */ IA64_OPND_IMM17, /* signed 17-bit immediate (2*bits 6-12, 24-31, 36) */ + IA64_OPND_IMMU19, /* unsigned 19-bit immediate (bits 6-9, 12-25, 36) */ IA64_OPND_IMMU21, /* unsigned 21-bit immediate (bits 6-25, 36) */ IA64_OPND_IMM22, /* signed 22-bit immediate (bits 13-19, 22-36) */ IA64_OPND_IMMU24, /* unsigned 24-bit immediate (bits 6-26, 31-32, 36) */ @@ -155,6 +159,9 @@ enum ia64_opnd IA64_OPND_TGT64, /* 64-bit (ip + 16*bits 13-32, 36, 2-40(L)) */ IA64_OPND_LDXMOV, /* any symbol, generates R_IA64_LDXMOV. */ + IA64_OPND_CNT6a, /* 6-bit count (bits 6-11) */ + IA64_OPND_STRD5b, /* 5-bit stride (bits 13-17) */ + IA64_OPND_COUNT /* # of operand types (MUST BE LAST!) */ }; @@ -191,6 +198,7 @@ enum ia64_resource_specifier IA64_RS_CR_IRR, IA64_RS_CR_LRR, IA64_RS_CR, /* 3-7,10-15,18,28-63,75-79,82-127 */ + IA64_RS_DAHR, IA64_RS_DBR, IA64_RS_FR, IA64_RS_FRb, @@ -212,6 +220,7 @@ enum ia64_resource_specifier IA64_RS_PSR, /* PSR bits */ IA64_RS_RSE, /* implementation-specific RSE resources */ IA64_RS_AR_FPSR, + }; enum ia64_rse_resource diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index a77330e..1cfb715 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,21 @@ +2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> + + * ia64-asmtab.h (completer_index): Extend bitfield to full uint. + * ia64-gen.c: Promote completer index type to longlong. + (irf_operand): Add new register recognition. + (in_iclass_mov_x): Add an entry for the new mov_* instruction type. + (lookup_specifier): Add new resource recognition. + (insert_bit_table_ent): Relax abort condition according to the + changed completer index type. + (print_dis_table): Fix printf format for completer index. + * ia64-ic.tbl: Add a new instruction class. + * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions. + * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions. + * ia64-opc.h: Define short names for new operand types. + * ia64-raw.tbl: Add new RAW resource for DAHR register. + * ia64-waw.tbl: Add new WAW resource for DAHR register. + * ia64-asmtab.c: Regenerate. + 2012-08-29 Peter Bergner <bergner@vnet.ibm.com> * ppc-opc.c (VXASHB_MASK): New define. diff --git a/opcodes/ia64-asmtab.c b/opcodes/ia64-asmtab.c index 3285228..f17dc91 100644 --- a/opcodes/ia64-asmtab.c +++ b/opcodes/ia64-asmtab.c @@ -20,9 +20,10 @@ static const char * const ia64_strings[] = { "", "0", "1", "a", "acq", "add", "addl", "addp4", "adds", "alloc", "and", "andcm", "b", "bias", "br", "break", "brl", "brp", "bsw", "c", "call", - "cexit", "chk", "cloop", "clr", "clrrrb", "cmp", "cmp4", "cmp8xchg16", - "cmpxchg1", "cmpxchg2", "cmpxchg4", "cmpxchg8", "cond", "cover", "ctop", - "czx1", "czx2", "d", "dep", "dpnt", "dptk", "e", "epc", "eq", "excl", + "cexit", "chk", "cloop", "clr", "clrrrb", "clz", "cmp", "cmp4", + "cmp8xchg16", "cmpxchg1", "cmpxchg2", "cmpxchg4", "cmpxchg8", "cond", + "count", "cover", "ctop", "czx1", "czx2", "d", "d0", "d1", "d2", "d3", + "d4", "d5", "d6", "d7", "dep", "dpnt", "dptk", "e", "epc", "eq", "excl", "exit", "exp", "extr", "f", "fabs", "fadd", "famax", "famin", "fand", "fandcm", "fault", "fc", "fchkf", "fclass", "fclrf", "fcmp", "fcvt", "fetchadd4", "fetchadd8", "few", "fill", "flushrs", "fma", "fmax", @@ -35,58 +36,58 @@ static const char * const ia64_strings[] = { "imp", "invala", "itc", "itr", "l", "ld1", "ld16", "ld2", "ld4", "ld8", "ldf", "ldf8", "ldfd", "ldfe", "ldfp8", "ldfpd", "ldfps", "ldfs", "le", "leu", "lfetch", "loadrs", "loop", "lr", "lt", "ltu", "lu", "m", "many", - "mf", "mix1", "mix2", "mix4", "mov", "movl", "mux1", "mux2", "nc", "ne", - "neq", "nge", "ngt", "nl", "nle", "nlt", "nm", "nop", "nr", "ns", "nt1", - "nt2", "nta", "nz", "or", "orcm", "ord", "pack2", "pack4", "padd1", - "padd2", "padd4", "pavg1", "pavg2", "pavgsub1", "pavgsub2", "pcmp1", - "pcmp2", "pcmp4", "pmax1", "pmax2", "pmin1", "pmin2", "pmpy2", "pmpyshr2", - "popcnt", "pr", "probe", "psad1", "pshl2", "pshl4", "pshladd2", "pshr2", - "pshr4", "pshradd2", "psub1", "psub2", "psub4", "ptc", "ptr", "r", "raz", - "rel", "ret", "rfi", "rsm", "rum", "rw", "s", "s0", "s1", "s2", "s3", - "sa", "se", "setf", "shl", "shladd", "shladdp4", "shr", "shrp", "sig", - "spill", "spnt", "sptk", "srlz", "ssm", "sss", "st1", "st16", "st2", - "st4", "st8", "stf", "stf8", "stfd", "stfe", "stfs", "sub", "sum", "sxt1", - "sxt2", "sxt4", "sync", "tak", "tbit", "tf", "thash", "tnat", "tpa", - "trunc", "ttag", "u", "unc", "unord", "unpack1", "unpack2", "unpack4", - "uss", "uus", "uuu", "vmsw", "w", "wexit", "wtop", "x", "xchg1", "xchg2", - "xchg4", "xchg8", "xf", "xma", "xmpy", "xor", "xuf", "z", "zxt1", "zxt2", - "zxt4", + "mf", "mix1", "mix2", "mix4", "mov", "movl", "mpy4", "mpyshl4", "mux1", + "mux2", "nc", "ne", "neq", "nge", "ngt", "nl", "nle", "nlt", "nm", "nop", + "nr", "ns", "nt1", "nt2", "nta", "nz", "or", "orcm", "ord", "pack2", + "pack4", "padd1", "padd2", "padd4", "pavg1", "pavg2", "pavgsub1", + "pavgsub2", "pcmp1", "pcmp2", "pcmp4", "pmax1", "pmax2", "pmin1", "pmin2", + "pmpy2", "pmpyshr2", "popcnt", "pr", "probe", "psad1", "pshl2", "pshl4", + "pshladd2", "pshr2", "pshr4", "pshradd2", "psub1", "psub2", "psub4", + "ptc", "ptr", "r", "raz", "rel", "ret", "rfi", "rsm", "rum", "rw", "s", + "s0", "s1", "s2", "s3", "sa", "se", "setf", "shl", "shladd", "shladdp4", + "shr", "shrp", "sig", "spill", "spnt", "sptk", "srlz", "ssm", "sss", + "st1", "st16", "st2", "st4", "st8", "stf", "stf8", "stfd", "stfe", "stfs", + "sub", "sum", "sxt1", "sxt2", "sxt4", "sync", "tak", "tbit", "tf", + "thash", "tnat", "tpa", "trunc", "ttag", "u", "unc", "unord", "unpack1", + "unpack2", "unpack4", "uss", "uus", "uuu", "vmsw", "w", "wexit", "wtop", + "x", "xchg1", "xchg2", "xchg4", "xchg8", "xf", "xma", "xmpy", "xor", + "xuf", "z", "zxt1", "zxt2", "zxt4", }; static const struct ia64_dependency dependencies[] = { { "ALAT", 0, 0, 0, -1, NULL, }, - { "AR[BSP]", 27, 0, 2, 17, NULL, }, - { "AR[BSPSTORE]", 27, 0, 2, 18, NULL, }, - { "AR[CCV]", 27, 0, 2, 32, NULL, }, - { "AR[CFLG]", 27, 0, 2, 27, NULL, }, - { "AR[CSD]", 27, 0, 2, 25, NULL, }, - { "AR[EC]", 27, 0, 2, 66, NULL, }, - { "AR[EFLAG]", 27, 0, 2, 24, NULL, }, - { "AR[FCR]", 27, 0, 2, 21, NULL, }, - { "AR[FDR]", 27, 0, 2, 30, NULL, }, - { "AR[FIR]", 27, 0, 2, 29, NULL, }, - { "AR[FPSR].sf0.controls", 31, 0, 2, -1, NULL, }, - { "AR[FPSR].sf1.controls", 31, 0, 2, -1, NULL, }, - { "AR[FPSR].sf2.controls", 31, 0, 2, -1, NULL, }, - { "AR[FPSR].sf3.controls", 31, 0, 2, -1, NULL, }, - { "AR[FPSR].sf0.flags", 31, 0, 2, -1, NULL, }, - { "AR[FPSR].sf1.flags", 31, 0, 2, -1, NULL, }, - { "AR[FPSR].sf2.flags", 31, 0, 2, -1, NULL, }, - { "AR[FPSR].sf3.flags", 31, 0, 2, -1, NULL, }, - { "AR[FPSR].traps", 31, 0, 2, -1, NULL, }, - { "AR[FPSR].rv", 31, 0, 2, -1, NULL, }, - { "AR[FSR]", 27, 0, 2, 28, NULL, }, - { "AR[ITC]", 27, 0, 2, 44, NULL, }, + { "AR[BSP]", 28, 0, 2, 17, NULL, }, + { "AR[BSPSTORE]", 28, 0, 2, 18, NULL, }, + { "AR[CCV]", 28, 0, 2, 32, NULL, }, + { "AR[CFLG]", 28, 0, 2, 27, NULL, }, + { "AR[CSD]", 28, 0, 2, 25, NULL, }, + { "AR[EC]", 28, 0, 2, 66, NULL, }, + { "AR[EFLAG]", 28, 0, 2, 24, NULL, }, + { "AR[FCR]", 28, 0, 2, 21, NULL, }, + { "AR[FDR]", 28, 0, 2, 30, NULL, }, + { "AR[FIR]", 28, 0, 2, 29, NULL, }, + { "AR[FPSR].sf0.controls", 32, 0, 2, -1, NULL, }, + { "AR[FPSR].sf1.controls", 32, 0, 2, -1, NULL, }, + { "AR[FPSR].sf2.controls", 32, 0, 2, -1, NULL, }, + { "AR[FPSR].sf3.controls", 32, 0, 2, -1, NULL, }, + { "AR[FPSR].sf0.flags", 32, 0, 2, -1, NULL, }, + { "AR[FPSR].sf1.flags", 32, 0, 2, -1, NULL, }, + { "AR[FPSR].sf2.flags", 32, 0, 2, -1, NULL, }, + { "AR[FPSR].sf3.flags", 32, 0, 2, -1, NULL, }, + { "AR[FPSR].traps", 32, 0, 2, -1, NULL, }, + { "AR[FPSR].rv", 32, 0, 2, -1, NULL, }, + { "AR[FSR]", 28, 0, 2, 28, NULL, }, + { "AR[ITC]", 28, 0, 2, 44, NULL, }, { "AR[K%], % in 0 - 7", 1, 0, 2, -1, NULL, }, - { "AR[LC]", 27, 0, 2, 65, NULL, }, - { "AR[PFS]", 27, 0, 2, 64, NULL, }, - { "AR[PFS]", 27, 0, 2, 64, NULL, }, - { "AR[PFS]", 27, 0, 0, 64, NULL, }, - { "AR[RNAT]", 27, 0, 2, 19, NULL, }, - { "AR[RSC]", 27, 0, 2, 16, NULL, }, - { "AR[RUC]", 27, 0, 2, 45, NULL, }, - { "AR[SSD]", 27, 0, 2, 26, NULL, }, + { "AR[LC]", 28, 0, 2, 65, NULL, }, + { "AR[PFS]", 28, 0, 2, 64, NULL, }, + { "AR[PFS]", 28, 0, 2, 64, NULL, }, + { "AR[PFS]", 28, 0, 0, 64, NULL, }, + { "AR[RNAT]", 28, 0, 2, 19, NULL, }, + { "AR[RSC]", 28, 0, 2, 16, NULL, }, + { "AR[RUC]", 28, 0, 2, 45, NULL, }, + { "AR[SSD]", 28, 0, 2, 26, NULL, }, { "AR[UNAT]{%}, % in 0 - 63", 2, 0, 2, -1, NULL, }, { "AR%, % in 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 46-47, 67-111", 3, 0, 0, -1, NULL, }, { "AR%, % in 48-63, 112-127", 4, 0, 2, -1, NULL, }, @@ -99,41 +100,42 @@ dependencies[] = { { "CFM", 6, 0, 2, -1, NULL, }, { "CFM", 6, 0, 0, -1, NULL, }, { "CPUID#", 7, 0, 5, -1, NULL, }, - { "CR[CMCV]", 28, 0, 3, 74, NULL, }, - { "CR[DCR]", 28, 0, 3, 0, NULL, }, - { "CR[EOI]", 28, 0, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI Ð CR67)\" on page 2:119", }, - { "CR[GPTA]", 28, 0, 3, 9, NULL, }, - { "CR[IFA]", 28, 0, 1, 20, NULL, }, - { "CR[IFA]", 28, 0, 3, 20, NULL, }, - { "CR[IFS]", 28, 0, 3, 23, NULL, }, - { "CR[IFS]", 28, 0, 1, 23, NULL, }, - { "CR[IFS]", 28, 0, 1, 23, NULL, }, - { "CR[IHA]", 28, 0, 3, 25, NULL, }, + { "CR[CMCV]", 29, 0, 3, 74, NULL, }, + { "CR[DCR]", 29, 0, 3, 0, NULL, }, + { "CR[EOI]", 29, 0, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI Ð CR67)\" on page 2:119", }, + { "CR[GPTA]", 29, 0, 3, 9, NULL, }, + { "CR[IFA]", 29, 0, 1, 20, NULL, }, + { "CR[IFA]", 29, 0, 3, 20, NULL, }, + { "CR[IFS]", 29, 0, 3, 23, NULL, }, + { "CR[IFS]", 29, 0, 1, 23, NULL, }, + { "CR[IFS]", 29, 0, 1, 23, NULL, }, + { "CR[IHA]", 29, 0, 3, 25, NULL, }, { "CR[IIB%], % in 0 - 1", 8, 0, 3, -1, NULL, }, - { "CR[IIM]", 28, 0, 3, 24, NULL, }, - { "CR[IIP]", 28, 0, 3, 19, NULL, }, - { "CR[IIP]", 28, 0, 1, 19, NULL, }, - { "CR[IIPA]", 28, 0, 3, 22, NULL, }, - { "CR[IPSR]", 28, 0, 3, 16, NULL, }, - { "CR[IPSR]", 28, 0, 1, 16, NULL, }, + { "CR[IIM]", 29, 0, 3, 24, NULL, }, + { "CR[IIP]", 29, 0, 3, 19, NULL, }, + { "CR[IIP]", 29, 0, 1, 19, NULL, }, + { "CR[IIPA]", 29, 0, 3, 22, NULL, }, + { "CR[IPSR]", 29, 0, 3, 16, NULL, }, + { "CR[IPSR]", 29, 0, 1, 16, NULL, }, { "CR[IRR%], % in 0 - 3", 9, 0, 3, -1, NULL, }, - { "CR[ISR]", 28, 0, 3, 17, NULL, }, - { "CR[ITIR]", 28, 0, 3, 21, NULL, }, - { "CR[ITIR]", 28, 0, 1, 21, NULL, }, - { "CR[ITM]", 28, 0, 3, 1, NULL, }, - { "CR[ITV]", 28, 0, 3, 72, NULL, }, - { "CR[IVA]", 28, 0, 4, 2, NULL, }, - { "CR[IVR]", 28, 0, 7, 65, "SC Section 5.8.3.2, \"External Interrupt Vector Register (IVR Ð CR65)\" on page 2:118", }, - { "CR[LID]", 28, 0, 7, 64, "SC Section 5.8.3.1, \"Local ID (LID Ð CR64)\" on page 2:117", }, + { "CR[ISR]", 29, 0, 3, 17, NULL, }, + { "CR[ITIR]", 29, 0, 3, 21, NULL, }, + { "CR[ITIR]", 29, 0, 1, 21, NULL, }, + { "CR[ITM]", 29, 0, 3, 1, NULL, }, + { "CR[ITV]", 29, 0, 3, 72, NULL, }, + { "CR[IVA]", 29, 0, 4, 2, NULL, }, + { "CR[IVR]", 29, 0, 7, 65, "SC Section 5.8.3.2, \"External Interrupt Vector Register (IVR Ð CR65)\" on page 2:118", }, + { "CR[LID]", 29, 0, 7, 64, "SC Section 5.8.3.1, \"Local ID (LID Ð CR64)\" on page 2:117", }, { "CR[LRR%], % in 0 - 1", 10, 0, 3, -1, NULL, }, - { "CR[PMV]", 28, 0, 3, 73, NULL, }, - { "CR[PTA]", 28, 0, 3, 8, NULL, }, - { "CR[TPR]", 28, 0, 3, 66, NULL, }, - { "CR[TPR]", 28, 0, 7, 66, "SC Section 5.8.3.3, \"Task Priority Register (TPR Ð CR66)\" on page 2:119", }, - { "CR[TPR]", 28, 0, 1, 66, NULL, }, + { "CR[PMV]", 29, 0, 3, 73, NULL, }, + { "CR[PTA]", 29, 0, 3, 8, NULL, }, + { "CR[TPR]", 29, 0, 3, 66, NULL, }, + { "CR[TPR]", 29, 0, 7, 66, "SC Section 5.8.3.3, \"Task Priority Register (TPR Ð CR66)\" on page 2:119", }, + { "CR[TPR]", 29, 0, 1, 66, NULL, }, { "CR%, % in 3-7, 10-15, 18, 28-63, 75-79, 82-127", 11, 0, 0, -1, NULL, }, - { "DBR#", 12, 0, 2, -1, NULL, }, - { "DBR#", 12, 0, 3, -1, NULL, }, + { "DAHR%, % in 0-7", 12, 0, 1, -1, NULL, }, + { "DBR#", 13, 0, 2, -1, NULL, }, + { "DBR#", 13, 0, 3, -1, NULL, }, { "DTC", 0, 0, 3, -1, NULL, }, { "DTC", 0, 0, 2, -1, NULL, }, { "DTC", 0, 0, 0, -1, NULL, }, @@ -144,16 +146,16 @@ dependencies[] = { { "DTR", 0, 0, 3, -1, NULL, }, { "DTR", 0, 0, 0, -1, NULL, }, { "DTR", 0, 0, 2, -1, NULL, }, - { "FR%, % in 0 - 1", 13, 0, 0, -1, NULL, }, - { "FR%, % in 2 - 127", 14, 0, 2, -1, NULL, }, - { "FR%, % in 2 - 127", 14, 0, 0, -1, NULL, }, - { "GR0", 15, 0, 0, -1, NULL, }, - { "GR%, % in 1 - 127", 16, 0, 0, -1, NULL, }, - { "GR%, % in 1 - 127", 16, 0, 2, -1, NULL, }, - { "IBR#", 17, 0, 2, -1, NULL, }, - { "InService*", 18, 0, 3, -1, NULL, }, - { "InService*", 18, 0, 2, -1, NULL, }, - { "InService*", 18, 0, 2, -1, NULL, }, + { "FR%, % in 0 - 1", 14, 0, 0, -1, NULL, }, + { "FR%, % in 2 - 127", 15, 0, 2, -1, NULL, }, + { "FR%, % in 2 - 127", 15, 0, 0, -1, NULL, }, + { "GR0", 16, 0, 0, -1, NULL, }, + { "GR%, % in 1 - 127", 17, 0, 0, -1, NULL, }, + { "GR%, % in 1 - 127", 17, 0, 2, -1, NULL, }, + { "IBR#", 18, 0, 2, -1, NULL, }, + { "InService*", 19, 0, 3, -1, NULL, }, + { "InService*", 19, 0, 2, -1, NULL, }, + { "InService*", 19, 0, 2, -1, NULL, }, { "IP", 0, 0, 0, -1, NULL, }, { "ITC", 0, 0, 4, -1, NULL, }, { "ITC", 0, 0, 2, -1, NULL, }, @@ -167,131 +169,131 @@ dependencies[] = { { "ITR", 0, 0, 0, -1, NULL, }, { "ITR", 0, 0, 4, -1, NULL, }, { "memory", 0, 0, 0, -1, NULL, }, - { "MSR#", 19, 0, 5, -1, NULL, }, - { "PKR#", 20, 0, 3, -1, NULL, }, - { "PKR#", 20, 0, 0, -1, NULL, }, - { "PKR#", 20, 0, 2, -1, NULL, }, - { "PKR#", 20, 0, 2, -1, NULL, }, - { "PMC#", 21, 0, 2, -1, NULL, }, - { "PMC#", 21, 0, 7, -1, "SC Section 7.2.1, \"Generic Performance Counter Registers\" for PMC[0].fr on page 2:150", }, - { "PMD#", 22, 0, 2, -1, NULL, }, + { "MSR#", 20, 0, 5, -1, NULL, }, + { "PKR#", 21, 0, 3, -1, NULL, }, + { "PKR#", 21, 0, 0, -1, NULL, }, + { "PKR#", 21, 0, 2, -1, NULL, }, + { "PKR#", 21, 0, 2, -1, NULL, }, + { "PMC#", 22, 0, 2, -1, NULL, }, + { "PMC#", 22, 0, 7, -1, "SC Section 7.2.1, \"Generic Performance Counter Registers\" for PMC[0].fr on page 2:150", }, + { "PMD#", 23, 0, 2, -1, NULL, }, { "PR0", 0, 0, 0, -1, NULL, }, - { "PR%, % in 1 - 15", 23, 0, 2, -1, NULL, }, - { "PR%, % in 1 - 15", 23, 0, 2, -1, NULL, }, - { "PR%, % in 1 - 15", 23, 0, 0, -1, NULL, }, - { "PR%, % in 16 - 62", 24, 0, 2, -1, NULL, }, - { "PR%, % in 16 - 62", 24, 0, 2, -1, NULL, }, - { "PR%, % in 16 - 62", 24, 0, 0, -1, NULL, }, - { "PR63", 25, 0, 2, -1, NULL, }, - { "PR63", 25, 0, 2, -1, NULL, }, - { "PR63", 25, 0, 0, -1, NULL, }, - { "PSR.ac", 29, 0, 1, 3, NULL, }, - { "PSR.ac", 29, 0, 3, 3, NULL, }, - { "PSR.ac", 29, 0, 2, 3, NULL, }, - { "PSR.ac", 29, 0, 2, 3, NULL, }, - { "PSR.be", 29, 0, 1, 1, NULL, }, - { "PSR.be", 29, 0, 3, 1, NULL, }, - { "PSR.be", 29, 0, 2, 1, NULL, }, - { "PSR.be", 29, 0, 2, 1, NULL, }, - { "PSR.bn", 29, 0, 2, 44, NULL, }, - { "PSR.cpl", 29, 0, 1, 32, NULL, }, - { "PSR.cpl", 29, 0, 2, 32, NULL, }, - { "PSR.da", 29, 0, 2, 38, NULL, }, - { "PSR.db", 29, 0, 3, 24, NULL, }, - { "PSR.db", 29, 0, 2, 24, NULL, }, - { "PSR.db", 29, 0, 2, 24, NULL, }, - { "PSR.dd", 29, 0, 2, 39, NULL, }, - { "PSR.dfh", 29, 0, 3, 19, NULL, }, - { "PSR.dfh", 29, 0, 2, 19, NULL, }, - { "PSR.dfh", 29, 0, 2, 19, NULL, }, - { "PSR.dfl", 29, 0, 3, 18, NULL, }, - { "PSR.dfl", 29, 0, 2, 18, NULL, }, - { "PSR.dfl", 29, 0, 2, 18, NULL, }, - { "PSR.di", 29, 0, 3, 22, NULL, }, - { "PSR.di", 29, 0, 2, 22, NULL, }, - { "PSR.di", 29, 0, 2, 22, NULL, }, - { "PSR.dt", 29, 0, 3, 17, NULL, }, - { "PSR.dt", 29, 0, 2, 17, NULL, }, - { "PSR.dt", 29, 0, 2, 17, NULL, }, - { "PSR.ed", 29, 0, 2, 43, NULL, }, - { "PSR.i", 29, 0, 2, 14, NULL, }, - { "PSR.ia", 29, 0, 0, 14, NULL, }, - { "PSR.ic", 29, 0, 2, 13, NULL, }, - { "PSR.ic", 29, 0, 3, 13, NULL, }, - { "PSR.ic", 29, 0, 2, 13, NULL, }, - { "PSR.id", 29, 0, 0, 14, NULL, }, - { "PSR.is", 29, 0, 0, 14, NULL, }, - { "PSR.it", 29, 0, 2, 14, NULL, }, - { "PSR.lp", 29, 0, 2, 25, NULL, }, - { "PSR.lp", 29, 0, 3, 25, NULL, }, - { "PSR.lp", 29, 0, 2, 25, NULL, }, - { "PSR.mc", 29, 0, 2, 35, NULL, }, - { "PSR.mfh", 29, 0, 2, 5, NULL, }, - { "PSR.mfl", 29, 0, 2, 4, NULL, }, - { "PSR.pk", 29, 0, 3, 15, NULL, }, - { "PSR.pk", 29, 0, 2, 15, NULL, }, - { "PSR.pk", 29, 0, 2, 15, NULL, }, - { "PSR.pp", 29, 0, 2, 21, NULL, }, - { "PSR.ri", 29, 0, 0, 41, NULL, }, - { "PSR.rt", 29, 0, 2, 27, NULL, }, - { "PSR.rt", 29, 0, 3, 27, NULL, }, - { "PSR.rt", 29, 0, 2, 27, NULL, }, - { "PSR.si", 29, 0, 2, 23, NULL, }, - { "PSR.si", 29, 0, 3, 23, NULL, }, - { "PSR.si", 29, 0, 2, 23, NULL, }, - { "PSR.sp", 29, 0, 2, 20, NULL, }, - { "PSR.sp", 29, 0, 3, 20, NULL, }, - { "PSR.sp", 29, 0, 2, 20, NULL, }, - { "PSR.ss", 29, 0, 2, 40, NULL, }, - { "PSR.tb", 29, 0, 3, 26, NULL, }, - { "PSR.tb", 29, 0, 2, 26, NULL, }, - { "PSR.tb", 29, 0, 2, 26, NULL, }, - { "PSR.up", 29, 0, 2, 2, NULL, }, - { "PSR.vm", 29, 0, 1, 46, NULL, }, - { "PSR.vm", 29, 0, 2, 46, NULL, }, - { "RR#", 26, 0, 3, -1, NULL, }, - { "RR#", 26, 0, 2, -1, NULL, }, - { "RSE", 30, 0, 2, -1, NULL, }, + { "PR%, % in 1 - 15", 24, 0, 2, -1, NULL, }, + { "PR%, % in 1 - 15", 24, 0, 2, -1, NULL, }, + { "PR%, % in 1 - 15", 24, 0, 0, -1, NULL, }, + { "PR%, % in 16 - 62", 25, 0, 2, -1, NULL, }, + { "PR%, % in 16 - 62", 25, 0, 2, -1, NULL, }, + { "PR%, % in 16 - 62", 25, 0, 0, -1, NULL, }, + { "PR63", 26, 0, 2, -1, NULL, }, + { "PR63", 26, 0, 2, -1, NULL, }, + { "PR63", 26, 0, 0, -1, NULL, }, + { "PSR.ac", 30, 0, 1, 3, NULL, }, + { "PSR.ac", 30, 0, 3, 3, NULL, }, + { "PSR.ac", 30, 0, 2, 3, NULL, }, + { "PSR.ac", 30, 0, 2, 3, NULL, }, + { "PSR.be", 30, 0, 1, 1, NULL, }, + { "PSR.be", 30, 0, 3, 1, NULL, }, + { "PSR.be", 30, 0, 2, 1, NULL, }, + { "PSR.be", 30, 0, 2, 1, NULL, }, + { "PSR.bn", 30, 0, 2, 44, NULL, }, + { "PSR.cpl", 30, 0, 1, 32, NULL, }, + { "PSR.cpl", 30, 0, 2, 32, NULL, }, + { "PSR.da", 30, 0, 2, 38, NULL, }, + { "PSR.db", 30, 0, 3, 24, NULL, }, + { "PSR.db", 30, 0, 2, 24, NULL, }, + { "PSR.db", 30, 0, 2, 24, NULL, }, + { "PSR.dd", 30, 0, 2, 39, NULL, }, + { "PSR.dfh", 30, 0, 3, 19, NULL, }, + { "PSR.dfh", 30, 0, 2, 19, NULL, }, + { "PSR.dfh", 30, 0, 2, 19, NULL, }, + { "PSR.dfl", 30, 0, 3, 18, NULL, }, + { "PSR.dfl", 30, 0, 2, 18, NULL, }, + { "PSR.dfl", 30, 0, 2, 18, NULL, }, + { "PSR.di", 30, 0, 3, 22, NULL, }, + { "PSR.di", 30, 0, 2, 22, NULL, }, + { "PSR.di", 30, 0, 2, 22, NULL, }, + { "PSR.dt", 30, 0, 3, 17, NULL, }, + { "PSR.dt", 30, 0, 2, 17, NULL, }, + { "PSR.dt", 30, 0, 2, 17, NULL, }, + { "PSR.ed", 30, 0, 2, 43, NULL, }, + { "PSR.i", 30, 0, 2, 14, NULL, }, + { "PSR.ia", 30, 0, 0, 14, NULL, }, + { "PSR.ic", 30, 0, 2, 13, NULL, }, + { "PSR.ic", 30, 0, 3, 13, NULL, }, + { "PSR.ic", 30, 0, 2, 13, NULL, }, + { "PSR.id", 30, 0, 0, 14, NULL, }, + { "PSR.is", 30, 0, 0, 14, NULL, }, + { "PSR.it", 30, 0, 2, 14, NULL, }, + { "PSR.lp", 30, 0, 2, 25, NULL, }, + { "PSR.lp", 30, 0, 3, 25, NULL, }, + { "PSR.lp", 30, 0, 2, 25, NULL, }, + { "PSR.mc", 30, 0, 2, 35, NULL, }, + { "PSR.mfh", 30, 0, 2, 5, NULL, }, + { "PSR.mfl", 30, 0, 2, 4, NULL, }, + { "PSR.pk", 30, 0, 3, 15, NULL, }, + { "PSR.pk", 30, 0, 2, 15, NULL, }, + { "PSR.pk", 30, 0, 2, 15, NULL, }, + { "PSR.pp", 30, 0, 2, 21, NULL, }, + { "PSR.ri", 30, 0, 0, 41, NULL, }, + { "PSR.rt", 30, 0, 2, 27, NULL, }, + { "PSR.rt", 30, 0, 3, 27, NULL, }, + { "PSR.rt", 30, 0, 2, 27, NULL, }, + { "PSR.si", 30, 0, 2, 23, NULL, }, + { "PSR.si", 30, 0, 3, 23, NULL, }, + { "PSR.si", 30, 0, 2, 23, NULL, }, + { "PSR.sp", 30, 0, 2, 20, NULL, }, + { "PSR.sp", 30, 0, 3, 20, NULL, }, + { "PSR.sp", 30, 0, 2, 20, NULL, }, + { "PSR.ss", 30, 0, 2, 40, NULL, }, + { "PSR.tb", 30, 0, 3, 26, NULL, }, + { "PSR.tb", 30, 0, 2, 26, NULL, }, + { "PSR.tb", 30, 0, 2, 26, NULL, }, + { "PSR.up", 30, 0, 2, 2, NULL, }, + { "PSR.vm", 30, 0, 1, 46, NULL, }, + { "PSR.vm", 30, 0, 2, 46, NULL, }, + { "RR#", 27, 0, 3, -1, NULL, }, + { "RR#", 27, 0, 2, -1, NULL, }, + { "RSE", 31, 0, 2, -1, NULL, }, { "ALAT", 0, 1, 0, -1, NULL, }, - { "AR[BSP]", 27, 1, 2, 17, NULL, }, - { "AR[BSPSTORE]", 27, 1, 2, 18, NULL, }, - { "AR[CCV]", 27, 1, 2, 32, NULL, }, - { "AR[CFLG]", 27, 1, 2, 27, NULL, }, - { "AR[CSD]", 27, 1, 2, 25, NULL, }, - { "AR[EC]", 27, 1, 2, 66, NULL, }, - { "AR[EFLAG]", 27, 1, 2, 24, NULL, }, - { "AR[FCR]", 27, 1, 2, 21, NULL, }, - { "AR[FDR]", 27, 1, 2, 30, NULL, }, - { "AR[FIR]", 27, 1, 2, 29, NULL, }, - { "AR[FPSR].sf0.controls", 31, 1, 2, -1, NULL, }, - { "AR[FPSR].sf1.controls", 31, 1, 2, -1, NULL, }, - { "AR[FPSR].sf2.controls", 31, 1, 2, -1, NULL, }, - { "AR[FPSR].sf3.controls", 31, 1, 2, -1, NULL, }, - { "AR[FPSR].sf0.flags", 31, 1, 0, -1, NULL, }, - { "AR[FPSR].sf0.flags", 31, 1, 2, -1, NULL, }, - { "AR[FPSR].sf0.flags", 31, 1, 2, -1, NULL, }, - { "AR[FPSR].sf1.flags", 31, 1, 0, -1, NULL, }, - { "AR[FPSR].sf1.flags", 31, 1, 2, -1, NULL, }, - { "AR[FPSR].sf1.flags", 31, 1, 2, -1, NULL, }, - { "AR[FPSR].sf2.flags", 31, 1, 0, -1, NULL, }, - { "AR[FPSR].sf2.flags", 31, 1, 2, -1, NULL, }, - { "AR[FPSR].sf2.flags", 31, 1, 2, -1, NULL, }, - { "AR[FPSR].sf3.flags", 31, 1, 0, -1, NULL, }, - { "AR[FPSR].sf3.flags", 31, 1, 2, -1, NULL, }, - { "AR[FPSR].sf3.flags", 31, 1, 2, -1, NULL, }, - { "AR[FPSR].rv", 31, 1, 2, -1, NULL, }, - { "AR[FPSR].traps", 31, 1, 2, -1, NULL, }, - { "AR[FSR]", 27, 1, 2, 28, NULL, }, - { "AR[ITC]", 27, 1, 2, 44, NULL, }, + { "AR[BSP]", 28, 1, 2, 17, NULL, }, + { "AR[BSPSTORE]", 28, 1, 2, 18, NULL, }, + { "AR[CCV]", 28, 1, 2, 32, NULL, }, + { "AR[CFLG]", 28, 1, 2, 27, NULL, }, + { "AR[CSD]", 28, 1, 2, 25, NULL, }, + { "AR[EC]", 28, 1, 2, 66, NULL, }, + { "AR[EFLAG]", 28, 1, 2, 24, NULL, }, + { "AR[FCR]", 28, 1, 2, 21, NULL, }, + { "AR[FDR]", 28, 1, 2, 30, NULL, }, + { "AR[FIR]", 28, 1, 2, 29, NULL, }, + { "AR[FPSR].sf0.controls", 32, 1, 2, -1, NULL, }, + { "AR[FPSR].sf1.controls", 32, 1, 2, -1, NULL, }, + { "AR[FPSR].sf2.controls", 32, 1, 2, -1, NULL, }, + { "AR[FPSR].sf3.controls", 32, 1, 2, -1, NULL, }, + { "AR[FPSR].sf0.flags", 32, 1, 0, -1, NULL, }, + { "AR[FPSR].sf0.flags", 32, 1, 2, -1, NULL, }, + { "AR[FPSR].sf0.flags", 32, 1, 2, -1, NULL, }, + { "AR[FPSR].sf1.flags", 32, 1, 0, -1, NULL, }, + { "AR[FPSR].sf1.flags", 32, 1, 2, -1, NULL, }, + { "AR[FPSR].sf1.flags", 32, 1, 2, -1, NULL, }, + { "AR[FPSR].sf2.flags", 32, 1, 0, -1, NULL, }, + { "AR[FPSR].sf2.flags", 32, 1, 2, -1, NULL, }, + { "AR[FPSR].sf2.flags", 32, 1, 2, -1, NULL, }, + { "AR[FPSR].sf3.flags", 32, 1, 0, -1, NULL, }, + { "AR[FPSR].sf3.flags", 32, 1, 2, -1, NULL, }, + { "AR[FPSR].sf3.flags", 32, 1, 2, -1, NULL, }, + { "AR[FPSR].rv", 32, 1, 2, -1, NULL, }, + { "AR[FPSR].traps", 32, 1, 2, -1, NULL, }, + { "AR[FSR]", 28, 1, 2, 28, NULL, }, + { "AR[ITC]", 28, 1, 2, 44, NULL, }, { "AR[K%], % in 0 - 7", 1, 1, 2, -1, NULL, }, - { "AR[LC]", 27, 1, 2, 65, NULL, }, - { "AR[PFS]", 27, 1, 0, 64, NULL, }, - { "AR[PFS]", 27, 1, 2, 64, NULL, }, - { "AR[PFS]", 27, 1, 2, 64, NULL, }, - { "AR[RNAT]", 27, 1, 2, 19, NULL, }, - { "AR[RSC]", 27, 1, 2, 16, NULL, }, - { "AR[RUC]", 27, 1, 2, 45, NULL, }, - { "AR[SSD]", 27, 1, 2, 26, NULL, }, + { "AR[LC]", 28, 1, 2, 65, NULL, }, + { "AR[PFS]", 28, 1, 0, 64, NULL, }, + { "AR[PFS]", 28, 1, 2, 64, NULL, }, + { "AR[PFS]", 28, 1, 2, 64, NULL, }, + { "AR[RNAT]", 28, 1, 2, 19, NULL, }, + { "AR[RSC]", 28, 1, 2, 16, NULL, }, + { "AR[RUC]", 28, 1, 2, 45, NULL, }, + { "AR[SSD]", 28, 1, 2, 26, NULL, }, { "AR[UNAT]{%}, % in 0 - 63", 2, 1, 2, -1, NULL, }, { "AR%, % in 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 46-47, 67-111", 3, 1, 0, -1, NULL, }, { "AR%, % in 48 - 63, 112-127", 4, 1, 2, -1, NULL, }, @@ -301,32 +303,33 @@ dependencies[] = { { "BR%, % in 0 - 7", 5, 1, 0, -1, NULL, }, { "CFM", 6, 1, 2, -1, NULL, }, { "CPUID#", 7, 1, 0, -1, NULL, }, - { "CR[CMCV]", 28, 1, 2, 74, NULL, }, - { "CR[DCR]", 28, 1, 2, 0, NULL, }, - { "CR[EOI]", 28, 1, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI Ð CR67)\" on page 2:119", }, - { "CR[GPTA]", 28, 1, 2, 9, NULL, }, - { "CR[IFA]", 28, 1, 2, 20, NULL, }, - { "CR[IFS]", 28, 1, 2, 23, NULL, }, - { "CR[IHA]", 28, 1, 2, 25, NULL, }, + { "CR[CMCV]", 29, 1, 2, 74, NULL, }, + { "CR[DCR]", 29, 1, 2, 0, NULL, }, + { "CR[EOI]", 29, 1, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI Ð CR67)\" on page 2:119", }, + { "CR[GPTA]", 29, 1, 2, 9, NULL, }, + { "CR[IFA]", 29, 1, 2, 20, NULL, }, + { "CR[IFS]", 29, 1, 2, 23, NULL, }, + { "CR[IHA]", 29, 1, 2, 25, NULL, }, { "CR[IIB%], % in 0 - 1", 8, 1, 2, -1, NULL, }, - { "CR[IIM]", 28, 1, 2, 24, NULL, }, - { "CR[IIP]", 28, 1, 2, 19, NULL, }, - { "CR[IIPA]", 28, 1, 2, 22, NULL, }, - { "CR[IPSR]", 28, 1, 2, 16, NULL, }, + { "CR[IIM]", 29, 1, 2, 24, NULL, }, + { "CR[IIP]", 29, 1, 2, 19, NULL, }, + { "CR[IIPA]", 29, 1, 2, 22, NULL, }, + { "CR[IPSR]", 29, 1, 2, 16, NULL, }, { "CR[IRR%], % in 0 - 3", 9, 1, 2, -1, NULL, }, - { "CR[ISR]", 28, 1, 2, 17, NULL, }, - { "CR[ITIR]", 28, 1, 2, 21, NULL, }, - { "CR[ITM]", 28, 1, 2, 1, NULL, }, - { "CR[ITV]", 28, 1, 2, 72, NULL, }, - { "CR[IVA]", 28, 1, 2, 2, NULL, }, - { "CR[IVR]", 28, 1, 7, 65, "SC", }, - { "CR[LID]", 28, 1, 7, 64, "SC", }, + { "CR[ISR]", 29, 1, 2, 17, NULL, }, + { "CR[ITIR]", 29, 1, 2, 21, NULL, }, + { "CR[ITM]", 29, 1, 2, 1, NULL, }, + { "CR[ITV]", 29, 1, 2, 72, NULL, }, + { "CR[IVA]", 29, 1, 2, 2, NULL, }, + { "CR[IVR]", 29, 1, 7, 65, "SC", }, + { "CR[LID]", 29, 1, 7, 64, "SC", }, { "CR[LRR%], % in 0 - 1", 10, 1, 2, -1, NULL, }, - { "CR[PMV]", 28, 1, 2, 73, NULL, }, - { "CR[PTA]", 28, 1, 2, 8, NULL, }, - { "CR[TPR]", 28, 1, 2, 66, NULL, }, + { "CR[PMV]", 29, 1, 2, 73, NULL, }, + { "CR[PTA]", 29, 1, 2, 8, NULL, }, + { "CR[TPR]", 29, 1, 2, 66, NULL, }, { "CR%, % in 3-7, 10-15, 18, 28-63, 75-79, 82-127", 11, 1, 0, -1, NULL, }, - { "DBR#", 12, 1, 2, -1, NULL, }, + { "DAHR%, % in 0-7", 12, 1, 1, -1, NULL, }, + { "DBR#", 13, 1, 2, -1, NULL, }, { "DTC", 0, 1, 0, -1, NULL, }, { "DTC", 0, 1, 2, -1, NULL, }, { "DTC", 0, 1, 2, -1, NULL, }, @@ -335,12 +338,12 @@ dependencies[] = { { "DTR", 0, 1, 2, -1, NULL, }, { "DTR", 0, 1, 2, -1, NULL, }, { "DTR", 0, 1, 0, -1, NULL, }, - { "FR%, % in 0 - 1", 13, 1, 0, -1, NULL, }, - { "FR%, % in 2 - 127", 14, 1, 2, -1, NULL, }, - { "GR0", 15, 1, 0, -1, NULL, }, - { "GR%, % in 1 - 127", 16, 1, 2, -1, NULL, }, - { "IBR#", 17, 1, 2, -1, NULL, }, - { "InService*", 18, 1, 7, -1, "SC", }, + { "FR%, % in 0 - 1", 14, 1, 0, -1, NULL, }, + { "FR%, % in 2 - 127", 15, 1, 2, -1, NULL, }, + { "GR0", 16, 1, 0, -1, NULL, }, + { "GR%, % in 1 - 127", 17, 1, 2, -1, NULL, }, + { "IBR#", 18, 1, 2, -1, NULL, }, + { "InService*", 19, 1, 7, -1, "SC", }, { "IP", 0, 1, 0, -1, NULL, }, { "ITC", 0, 1, 0, -1, NULL, }, { "ITC", 0, 1, 2, -1, NULL, }, @@ -349,1419 +352,1440 @@ dependencies[] = { { "ITR", 0, 1, 2, -1, NULL, }, { "ITR", 0, 1, 0, -1, NULL, }, { "memory", 0, 1, 0, -1, NULL, }, - { "MSR#", 19, 1, 7, -1, "SC", }, - { "PKR#", 20, 1, 0, -1, NULL, }, - { "PKR#", 20, 1, 0, -1, NULL, }, - { "PKR#", 20, 1, 2, -1, NULL, }, - { "PMC#", 21, 1, 2, -1, NULL, }, - { "PMD#", 22, 1, 2, -1, NULL, }, + { "MSR#", 20, 1, 7, -1, "SC", }, + { "PKR#", 21, 1, 0, -1, NULL, }, + { "PKR#", 21, 1, 0, -1, NULL, }, + { "PKR#", 21, 1, 2, -1, NULL, }, + { "PMC#", 22, 1, 2, -1, NULL, }, + { "PMD#", 23, 1, 2, -1, NULL, }, { "PR0", 0, 1, 0, -1, NULL, }, - { "PR%, % in 1 - 15", 23, 1, 0, -1, NULL, }, - { "PR%, % in 1 - 15", 23, 1, 0, -1, NULL, }, - { "PR%, % in 1 - 15", 23, 1, 2, -1, NULL, }, - { "PR%, % in 1 - 15", 23, 1, 2, -1, NULL, }, - { "PR%, % in 16 - 62", 24, 1, 0, -1, NULL, }, - { "PR%, % in 16 - 62", 24, 1, 0, -1, NULL, }, - { "PR%, % in 16 - 62", 24, 1, 2, -1, NULL, }, - { "PR%, % in 16 - 62", 24, 1, 2, -1, NULL, }, - { "PR63", 25, 1, 0, -1, NULL, }, - { "PR63", 25, 1, 0, -1, NULL, }, - { "PR63", 25, 1, 2, -1, NULL, }, - { "PR63", 25, 1, 2, -1, NULL, }, - { "PSR.ac", 29, 1, 2, 3, NULL, }, - { "PSR.be", 29, 1, 2, 1, NULL, }, - { "PSR.bn", 29, 1, 2, 44, NULL, }, - { "PSR.cpl", 29, 1, 2, 32, NULL, }, - { "PSR.da", 29, 1, 2, 38, NULL, }, - { "PSR.db", 29, 1, 2, 24, NULL, }, - { "PSR.dd", 29, 1, 2, 39, NULL, }, - { "PSR.dfh", 29, 1, 2, 19, NULL, }, - { "PSR.dfl", 29, 1, 2, 18, NULL, }, - { "PSR.di", 29, 1, 2, 22, NULL, }, - { "PSR.dt", 29, 1, 2, 17, NULL, }, - { "PSR.ed", 29, 1, 2, 43, NULL, }, - { "PSR.i", 29, 1, 2, 14, NULL, }, - { "PSR.ia", 29, 1, 2, 14, NULL, }, - { "PSR.ic", 29, 1, 2, 13, NULL, }, - { "PSR.id", 29, 1, 2, 14, NULL, }, - { "PSR.is", 29, 1, 2, 14, NULL, }, - { "PSR.it", 29, 1, 2, 14, NULL, }, - { "PSR.lp", 29, 1, 2, 25, NULL, }, - { "PSR.mc", 29, 1, 2, 35, NULL, }, - { "PSR.mfh", 29, 1, 0, 5, NULL, }, - { "PSR.mfh", 29, 1, 2, 5, NULL, }, - { "PSR.mfh", 29, 1, 2, 5, NULL, }, - { "PSR.mfl", 29, 1, 0, 4, NULL, }, - { "PSR.mfl", 29, 1, 2, 4, NULL, }, - { "PSR.mfl", 29, 1, 2, 4, NULL, }, - { "PSR.pk", 29, 1, 2, 15, NULL, }, - { "PSR.pp", 29, 1, 2, 21, NULL, }, - { "PSR.ri", 29, 1, 2, 41, NULL, }, - { "PSR.rt", 29, 1, 2, 27, NULL, }, - { "PSR.si", 29, 1, 2, 23, NULL, }, - { "PSR.sp", 29, 1, 2, 20, NULL, }, - { "PSR.ss", 29, 1, 2, 40, NULL, }, - { "PSR.tb", 29, 1, 2, 26, NULL, }, - { "PSR.up", 29, 1, 2, 2, NULL, }, - { "PSR.vm", 29, 1, 2, 46, NULL, }, - { "RR#", 26, 1, 2, -1, NULL, }, - { "RSE", 30, 1, 2, -1, NULL, }, - { "PR63", 25, 2, 6, -1, NULL, }, + { "PR%, % in 1 - 15", 24, 1, 0, -1, NULL, }, + { "PR%, % in 1 - 15", 24, 1, 0, -1, NULL, }, + { "PR%, % in 1 - 15", 24, 1, 2, -1, NULL, }, + { "PR%, % in 1 - 15", 24, 1, 2, -1, NULL, }, + { "PR%, % in 16 - 62", 25, 1, 0, -1, NULL, }, + { "PR%, % in 16 - 62", 25, 1, 0, -1, NULL, }, + { "PR%, % in 16 - 62", 25, 1, 2, -1, NULL, }, + { "PR%, % in 16 - 62", 25, 1, 2, -1, NULL, }, + { "PR63", 26, 1, 0, -1, NULL, }, + { "PR63", 26, 1, 0, -1, NULL, }, + { "PR63", 26, 1, 2, -1, NULL, }, + { "PR63", 26, 1, 2, -1, NULL, }, + { "PSR.ac", 30, 1, 2, 3, NULL, }, + { "PSR.be", 30, 1, 2, 1, NULL, }, + { "PSR.bn", 30, 1, 2, 44, NULL, }, + { "PSR.cpl", 30, 1, 2, 32, NULL, }, + { "PSR.da", 30, 1, 2, 38, NULL, }, + { "PSR.db", 30, 1, 2, 24, NULL, }, + { "PSR.dd", 30, 1, 2, 39, NULL, }, + { "PSR.dfh", 30, 1, 2, 19, NULL, }, + { "PSR.dfl", 30, 1, 2, 18, NULL, }, + { "PSR.di", 30, 1, 2, 22, NULL, }, + { "PSR.dt", 30, 1, 2, 17, NULL, }, + { "PSR.ed", 30, 1, 2, 43, NULL, }, + { "PSR.i", 30, 1, 2, 14, NULL, }, + { "PSR.ia", 30, 1, 2, 14, NULL, }, + { "PSR.ic", 30, 1, 2, 13, NULL, }, + { "PSR.id", 30, 1, 2, 14, NULL, }, + { "PSR.is", 30, 1, 2, 14, NULL, }, + { "PSR.it", 30, 1, 2, 14, NULL, }, + { "PSR.lp", 30, 1, 2, 25, NULL, }, + { "PSR.mc", 30, 1, 2, 35, NULL, }, + { "PSR.mfh", 30, 1, 0, 5, NULL, }, + { "PSR.mfh", 30, 1, 2, 5, NULL, }, + { "PSR.mfh", 30, 1, 2, 5, NULL, }, + { "PSR.mfl", 30, 1, 0, 4, NULL, }, + { "PSR.mfl", 30, 1, 2, 4, NULL, }, + { "PSR.mfl", 30, 1, 2, 4, NULL, }, + { "PSR.pk", 30, 1, 2, 15, NULL, }, + { "PSR.pp", 30, 1, 2, 21, NULL, }, + { "PSR.ri", 30, 1, 2, 41, NULL, }, + { "PSR.rt", 30, 1, 2, 27, NULL, }, + { "PSR.si", 30, 1, 2, 23, NULL, }, + { "PSR.sp", 30, 1, 2, 20, NULL, }, + { "PSR.ss", 30, 1, 2, 40, NULL, }, + { "PSR.tb", 30, 1, 2, 26, NULL, }, + { "PSR.up", 30, 1, 2, 2, NULL, }, + { "PSR.vm", 30, 1, 2, 46, NULL, }, + { "RR#", 27, 1, 2, -1, NULL, }, + { "RSE", 31, 1, 2, -1, NULL, }, + { "PR63", 26, 2, 6, -1, NULL, }, }; static const unsigned short dep0[] = { - 99, 286, 2142, 2331, + 100, 288, 2143, 2333, }; static const unsigned short dep1[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, - 2331, 4136, 20618, + 41, 42, 100, 161, 165, 178, 188, 288, 2141, 2142, 2143, 2169, 2170, 2173, + 2176, 2333, 4136, 20619, }; static const unsigned short dep2[] = { - 99, 286, 2168, 2169, 2171, 2172, 2174, 2175, 2177, 2348, 2351, 2352, 2355, - 2356, 2359, 2360, + 100, 288, 2169, 2170, 2172, 2173, 2175, 2176, 2178, 2350, 2353, 2354, 2357, + 2358, 2361, 2362, }; static const unsigned short dep3[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, - 2348, 2351, 2352, 2355, 2356, 2359, 2360, 4136, 20618, + 41, 42, 100, 161, 165, 178, 188, 288, 2141, 2142, 2143, 2169, 2170, 2173, + 2176, 2350, 2353, 2354, 2357, 2358, 2361, 2362, 4136, 20619, }; static const unsigned short dep4[] = { - 99, 286, 22648, 22649, 22651, 22652, 22654, 22655, 22657, 22828, 22831, 22832, - 22835, 22836, 22839, 22840, + 100, 288, 22649, 22650, 22652, 22653, 22655, 22656, 22658, 22830, 22833, 22834, + 22837, 22838, 22841, 22842, }; static const unsigned short dep5[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, - 4136, 20618, 22828, 22831, 22832, 22835, 22836, 22839, 22840, + 41, 42, 100, 161, 165, 178, 188, 288, 2141, 2142, 2143, 2169, 2170, 2173, + 2176, 4136, 20619, 22830, 22833, 22834, 22837, 22838, 22841, 22842, }; static const unsigned short dep6[] = { - 99, 286, 2168, 2169, 2171, 2172, 2174, 2175, 2177, 2348, 2349, 2351, 2353, - 2355, 2357, 2359, + 100, 288, 2169, 2170, 2172, 2173, 2175, 2176, 2178, 2350, 2351, 2353, 2355, + 2357, 2359, 2361, }; static const unsigned short dep7[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, - 2348, 2349, 2352, 2353, 2356, 2357, 2360, 4136, 20618, + 41, 42, 100, 161, 165, 178, 188, 288, 2141, 2142, 2143, 2169, 2170, 2173, + 2176, 2350, 2351, 2354, 2355, 2358, 2359, 2362, 4136, 20619, }; static const unsigned short dep8[] = { - 99, 286, 2168, 2169, 2171, 2172, 2174, 2175, 2177, 2348, 2350, 2352, 2354, - 2356, 2358, 2360, + 100, 288, 2169, 2170, 2172, 2173, 2175, 2176, 2178, 2350, 2352, 2354, 2356, + 2358, 2360, 2362, }; static const unsigned short dep9[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, - 2348, 2350, 2351, 2354, 2355, 2358, 2359, 4136, 20618, + 41, 42, 100, 161, 165, 178, 188, 288, 2141, 2142, 2143, 2169, 2170, 2173, + 2176, 2350, 2352, 2353, 2356, 2357, 2360, 2361, 4136, 20619, }; static const unsigned short dep10[] = { - 99, 286, 2168, 2169, 2171, 2172, 2174, 2175, 2177, 2348, 2349, 2350, 2351, - 2352, 2353, 2354, 2355, 2356, 2357, 2358, 2359, 2360, + 100, 288, 2169, 2170, 2172, 2173, 2175, 2176, 2178, 2350, 2351, 2352, 2353, + 2354, 2355, 2356, 2357, 2358, 2359, 2360, 2361, 2362, }; static const unsigned short dep11[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, - 2348, 2349, 2350, 2351, 2352, 2353, 2354, 2355, 2356, 2357, 2358, 2359, 2360, - 4136, 20618, + 41, 42, 100, 161, 165, 178, 188, 288, 2141, 2142, 2143, 2169, 2170, 2173, + 2176, 2350, 2351, 2352, 2353, 2354, 2355, 2356, 2357, 2358, 2359, 2360, 2361, + 2362, 4136, 20619, }; static const unsigned short dep12[] = { - 99, 286, 2399, + 100, 288, 2401, }; static const unsigned short dep13[] = { - 41, 42, 99, 160, 164, 166, 177, 187, 188, 190, 286, 2083, 2084, 2168, 2170, - 2171, 2173, 2174, 2176, 2177, 4136, + 41, 42, 100, 161, 165, 167, 178, 188, 189, 191, 288, 2083, 2084, 2169, 2171, + 2172, 2174, 2175, 2177, 2178, 4136, }; static const unsigned short dep14[] = { - 99, 165, 286, 329, 2399, 28868, 29022, + 100, 166, 288, 331, 2401, 28869, 29024, }; static const unsigned short dep15[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, - 22, 23, 24, 25, 26, 28, 29, 30, 31, 32, 33, 34, 41, 42, 99, 152, 154, 160, - 164, 166, 177, 187, 188, 190, 286, 329, 2083, 2084, 2168, 2170, 2171, 2173, - 2174, 2176, 2177, 4136, 28868, 29022, + 22, 23, 24, 25, 26, 28, 29, 30, 31, 32, 33, 34, 41, 42, 100, 153, 155, 161, + 165, 167, 178, 188, 189, 191, 288, 331, 2083, 2084, 2169, 2171, 2172, 2174, + 2175, 2177, 2178, 4136, 28869, 29024, }; static const unsigned short dep16[] = { - 1, 6, 41, 99, 139, 198, 203, 244, 286, 316, 2399, 28868, 29022, + 1, 6, 41, 77, 100, 140, 199, 204, 245, 272, 288, 318, 2401, 28869, 29024, + }; static const unsigned short dep17[] = { - 1, 25, 27, 39, 41, 42, 99, 160, 164, 166, 168, 169, 177, 187, 188, 190, 198, - 203, 244, 286, 316, 2083, 2084, 2168, 2170, 2171, 2173, 2174, 2176, 2177, - 4136, 28868, 29022, + 1, 25, 27, 39, 41, 42, 100, 161, 165, 167, 169, 170, 178, 188, 189, 191, 199, + 204, 245, 272, 288, 318, 2083, 2084, 2169, 2171, 2172, 2174, 2175, 2177, 2178, + 4136, 28869, 29024, }; static const unsigned short dep18[] = { - 1, 41, 52, 99, 198, 244, 251, 286, 28868, 29022, + 1, 41, 52, 100, 199, 245, 252, 288, 28869, 29024, }; static const unsigned short dep19[] = { - 1, 39, 41, 42, 99, 160, 162, 163, 164, 177, 187, 192, 193, 198, 244, 251, - 286, 4136, 28868, 29022, + 1, 39, 41, 42, 100, 161, 163, 164, 165, 178, 188, 193, 194, 199, 245, 252, + 288, 4136, 28869, 29024, }; static const unsigned short dep20[] = { - 41, 99, 244, 286, + 41, 100, 245, 288, }; static const unsigned short dep21[] = { - 99, 160, 164, 177, 187, 244, 286, + 100, 161, 165, 178, 188, 245, 288, }; static const unsigned short dep22[] = { - 1, 41, 99, 133, 137, 138, 140, 141, 144, 145, 148, 151, 154, 157, 158, 159, - 160, 163, 164, 165, 166, 169, 170, 171, 172, 175, 176, 177, 180, 183, 186, - 187, 190, 191, 193, 198, 244, 286, 313, 314, 315, 316, 317, 318, 319, 320, - 321, 322, 323, 324, 325, 326, 327, 328, 329, 330, 331, 332, 334, 335, 337, - 338, 339, 340, 341, 342, 343, 344, 345, 346, 347, 348, 28868, 29022, + 1, 41, 100, 134, 138, 139, 141, 142, 145, 146, 149, 152, 155, 158, 159, 160, + 161, 164, 165, 166, 167, 170, 171, 172, 173, 176, 177, 178, 181, 184, 187, + 188, 191, 192, 194, 199, 245, 272, 288, 315, 316, 317, 318, 319, 320, 321, + 322, 323, 324, 325, 326, 327, 328, 329, 330, 331, 332, 333, 334, 336, 337, + 339, 340, 341, 342, 343, 344, 345, 346, 347, 348, 349, 350, 28869, 29024, + }; static const unsigned short dep23[] = { - 1, 39, 41, 42, 51, 52, 57, 60, 75, 99, 139, 140, 160, 164, 177, 187, 192, - 193, 198, 244, 286, 313, 314, 315, 316, 317, 318, 319, 320, 321, 322, 323, - 324, 325, 326, 327, 328, 329, 330, 331, 332, 334, 335, 337, 338, 339, 340, - 341, 342, 343, 344, 345, 346, 347, 348, 4136, 28868, 29022, + 1, 39, 41, 42, 51, 52, 57, 60, 75, 100, 140, 141, 161, 165, 178, 188, 193, + 194, 199, 245, 272, 288, 315, 316, 317, 318, 319, 320, 321, 322, 323, 324, + 325, 326, 327, 328, 329, 330, 331, 332, 333, 334, 336, 337, 339, 340, 341, + 342, 343, 344, 345, 346, 347, 348, 349, 350, 4136, 28869, 29024, }; static const unsigned short dep24[] = { - 99, 138, 286, 315, + 100, 139, 288, 317, }; static const unsigned short dep25[] = { - 99, 139, 140, 160, 164, 177, 187, 192, 193, 286, 315, + 100, 140, 141, 161, 165, 178, 188, 193, 194, 288, 317, }; static const unsigned short dep26[] = { - 99, 139, 286, 316, + 100, 140, 288, 318, }; static const unsigned short dep27[] = { - 25, 26, 99, 100, 103, 107, 110, 139, 140, 160, 164, 166, 177, 187, 286, 316, + 25, 26, 100, 101, 104, 108, 111, 140, 141, 161, 165, 167, 178, 188, 288, 318, }; static const unsigned short dep28[] = { - 99, 192, 286, 348, + 100, 193, 288, 350, }; static const unsigned short dep29[] = { - 99, 100, 103, 107, 110, 139, 140, 160, 164, 166, 177, 187, 286, 348, + 100, 101, 104, 108, 111, 140, 141, 161, 165, 167, 178, 188, 288, 350, }; static const unsigned short dep30[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2168, 2170, 2171, 2173, 2174, 2176, 2177, - 4136, + 41, 42, 100, 161, 165, 178, 188, 288, 2169, 2171, 2172, 2174, 2175, 2177, + 2178, 4136, }; static const unsigned short dep31[] = { - 1, 25, 41, 99, 198, 230, 231, 244, 286, 2083, 2288, 2291, 2399, 28868, 29022, - + 1, 25, 41, 77, 100, 199, 231, 232, 245, 272, 288, 2083, 2289, 2292, 2401, + 28869, 29024, }; static const unsigned short dep32[] = { - 1, 6, 39, 41, 42, 99, 139, 140, 160, 164, 166, 177, 187, 188, 190, 198, 230, - 232, 244, 286, 2083, 2084, 2168, 2170, 2171, 2173, 2174, 2176, 2177, 2289, - 2291, 4136, 28868, 29022, + 1, 6, 39, 41, 42, 77, 100, 140, 141, 161, 165, 167, 178, 188, 189, 191, 199, + 231, 233, 245, 272, 288, 2083, 2084, 2169, 2171, 2172, 2174, 2175, 2177, 2178, + 2290, 2292, 4136, 28869, 29024, }; static const unsigned short dep33[] = { - 99, 286, + 100, 288, }; static const unsigned short dep34[] = { - 99, 160, 164, 177, 187, 286, 2083, 2085, + 100, 161, 165, 178, 188, 288, 2083, 2085, }; static const unsigned short dep35[] = { - 41, 42, 99, 160, 164, 166, 177, 187, 188, 190, 286, 2168, 2170, 2171, 2173, - 2174, 2176, 2177, 4136, + 41, 42, 100, 161, 165, 167, 178, 188, 189, 191, 288, 2169, 2171, 2172, 2174, + 2175, 2177, 2178, 4136, }; static const unsigned short dep36[] = { - 6, 38, 39, 40, 99, 127, 128, 203, 244, 286, 311, 312, 2399, + 6, 38, 39, 40, 100, 128, 129, 204, 245, 288, 313, 314, 2401, }; static const unsigned short dep37[] = { - 6, 38, 41, 42, 99, 160, 164, 166, 177, 187, 188, 190, 203, 244, 286, 311, - 312, 351, 2168, 2170, 2171, 2173, 2174, 2176, 2177, 4136, + 6, 38, 41, 42, 100, 161, 165, 167, 178, 188, 189, 191, 204, 245, 288, 313, + 314, 353, 2169, 2171, 2172, 2174, 2175, 2177, 2178, 4136, }; static const unsigned short dep38[] = { - 24, 99, 229, 286, 2399, + 24, 100, 230, 288, 2401, }; static const unsigned short dep39[] = { - 24, 41, 42, 99, 160, 164, 166, 177, 187, 188, 190, 229, 286, 2168, 2170, 2171, - 2173, 2174, 2176, 2177, 4136, + 24, 41, 42, 100, 161, 165, 167, 178, 188, 189, 191, 230, 288, 2169, 2171, + 2172, 2174, 2175, 2177, 2178, 4136, }; static const unsigned short dep40[] = { - 6, 24, 38, 39, 40, 99, 127, 128, 203, 229, 244, 286, 311, 312, 2399, + 6, 24, 38, 39, 40, 100, 128, 129, 204, 230, 245, 288, 313, 314, 2401, }; static const unsigned short dep41[] = { - 6, 24, 38, 41, 42, 99, 160, 164, 166, 177, 187, 188, 190, 203, 229, 244, 286, - 311, 312, 351, 2168, 2170, 2171, 2173, 2174, 2176, 2177, 4136, + 6, 24, 38, 41, 42, 100, 161, 165, 167, 178, 188, 189, 191, 204, 230, 245, + 288, 313, 314, 353, 2169, 2171, 2172, 2174, 2175, 2177, 2178, 4136, }; static const unsigned short dep42[] = { - 1, 6, 39, 41, 42, 99, 139, 140, 160, 164, 166, 177, 187, 188, 190, 198, 230, - 232, 244, 286, 2168, 2170, 2171, 2173, 2174, 2176, 2177, 2289, 2291, 4136, - 28868, 29022, + 1, 6, 39, 41, 42, 77, 100, 140, 141, 161, 165, 167, 178, 188, 189, 191, 199, + 231, 233, 245, 272, 288, 2169, 2171, 2172, 2174, 2175, 2177, 2178, 2290, 2292, + 4136, 28869, 29024, }; static const unsigned short dep43[] = { - 99, 160, 164, 177, 187, 286, + 100, 161, 165, 178, 188, 288, }; static const unsigned short dep44[] = { - 15, 99, 212, 213, 286, 2138, 2329, 18603, 18604, 18765, 18766, 18768, 18769, - 22648, 22649, 22650, 22652, 22653, 22655, 22656, 22828, 22831, 22832, 22835, - 22836, 22839, 22840, + 15, 100, 213, 214, 288, 2139, 2331, 18604, 18605, 18767, 18768, 18770, 18771, + 22649, 22650, 22651, 22653, 22654, 22656, 22657, 22830, 22833, 22834, 22837, + 22838, 22841, 22842, }; static const unsigned short dep45[] = { - 11, 19, 20, 41, 42, 99, 160, 164, 177, 187, 212, 214, 286, 2137, 2138, 2139, - 2168, 2169, 2172, 2175, 2329, 4136, 16530, 16532, 16533, 16535, 18765, 18767, - 18768, 18770, 22828, 22831, 22832, 22835, 22836, 22839, 22840, + 11, 19, 20, 41, 42, 100, 161, 165, 178, 188, 213, 215, 288, 2138, 2139, 2140, + 2169, 2170, 2173, 2176, 2331, 4136, 16531, 16533, 16534, 16536, 18767, 18769, + 18770, 18772, 22830, 22833, 22834, 22837, 22838, 22841, 22842, }; static const unsigned short dep46[] = { - 15, 16, 17, 18, 99, 212, 213, 215, 216, 218, 219, 221, 222, 286, 2138, 2329, - 18603, 18604, 18765, 18766, 18768, 18769, 22648, 22649, 22650, 22652, 22653, - 22655, 22656, 22828, 22831, 22832, 22835, 22836, 22839, 22840, + 15, 16, 17, 18, 100, 213, 214, 216, 217, 219, 220, 222, 223, 288, 2139, 2331, + 18604, 18605, 18767, 18768, 18770, 18771, 22649, 22650, 22651, 22653, 22654, + 22656, 22657, 22830, 22833, 22834, 22837, 22838, 22841, 22842, }; static const unsigned short dep47[] = { - 11, 12, 13, 14, 19, 20, 41, 42, 99, 160, 164, 177, 187, 212, 214, 215, 217, - 218, 220, 221, 223, 286, 2137, 2138, 2139, 2168, 2169, 2172, 2175, 2329, 4136, - 16530, 16532, 16533, 16535, 18765, 18767, 18768, 18770, 22828, 22831, 22832, - 22835, 22836, 22839, 22840, + 11, 12, 13, 14, 19, 20, 41, 42, 100, 161, 165, 178, 188, 213, 215, 216, 218, + 219, 221, 222, 224, 288, 2138, 2139, 2140, 2169, 2170, 2173, 2176, 2331, 4136, + 16531, 16533, 16534, 16536, 18767, 18769, 18770, 18772, 22830, 22833, 22834, + 22837, 22838, 22841, 22842, }; static const unsigned short dep48[] = { - 16, 99, 215, 216, 286, 2138, 2329, 18603, 18604, 18765, 18766, 18768, 18769, - 22648, 22649, 22650, 22652, 22653, 22655, 22656, 22828, 22831, 22832, 22835, - 22836, 22839, 22840, + 16, 100, 216, 217, 288, 2139, 2331, 18604, 18605, 18767, 18768, 18770, 18771, + 22649, 22650, 22651, 22653, 22654, 22656, 22657, 22830, 22833, 22834, 22837, + 22838, 22841, 22842, }; static const unsigned short dep49[] = { - 12, 19, 20, 41, 42, 99, 160, 164, 177, 187, 215, 217, 286, 2137, 2138, 2139, - 2168, 2169, 2172, 2175, 2329, 4136, 16530, 16532, 16533, 16535, 18765, 18767, - 18768, 18770, 22828, 22831, 22832, 22835, 22836, 22839, 22840, + 12, 19, 20, 41, 42, 100, 161, 165, 178, 188, 216, 218, 288, 2138, 2139, 2140, + 2169, 2170, 2173, 2176, 2331, 4136, 16531, 16533, 16534, 16536, 18767, 18769, + 18770, 18772, 22830, 22833, 22834, 22837, 22838, 22841, 22842, }; static const unsigned short dep50[] = { - 17, 99, 218, 219, 286, 2138, 2329, 18603, 18604, 18765, 18766, 18768, 18769, - 22648, 22649, 22650, 22652, 22653, 22655, 22656, 22828, 22831, 22832, 22835, - 22836, 22839, 22840, + 17, 100, 219, 220, 288, 2139, 2331, 18604, 18605, 18767, 18768, 18770, 18771, + 22649, 22650, 22651, 22653, 22654, 22656, 22657, 22830, 22833, 22834, 22837, + 22838, 22841, 22842, }; static const unsigned short dep51[] = { - 13, 19, 20, 41, 42, 99, 160, 164, 177, 187, 218, 220, 286, 2137, 2138, 2139, - 2168, 2169, 2172, 2175, 2329, 4136, 16530, 16532, 16533, 16535, 18765, 18767, - 18768, 18770, 22828, 22831, 22832, 22835, 22836, 22839, 22840, + 13, 19, 20, 41, 42, 100, 161, 165, 178, 188, 219, 221, 288, 2138, 2139, 2140, + 2169, 2170, 2173, 2176, 2331, 4136, 16531, 16533, 16534, 16536, 18767, 18769, + 18770, 18772, 22830, 22833, 22834, 22837, 22838, 22841, 22842, }; static const unsigned short dep52[] = { - 18, 99, 221, 222, 286, 2138, 2329, 18603, 18604, 18765, 18766, 18768, 18769, - 22648, 22649, 22650, 22652, 22653, 22655, 22656, 22828, 22831, 22832, 22835, - 22836, 22839, 22840, + 18, 100, 222, 223, 288, 2139, 2331, 18604, 18605, 18767, 18768, 18770, 18771, + 22649, 22650, 22651, 22653, 22654, 22656, 22657, 22830, 22833, 22834, 22837, + 22838, 22841, 22842, }; static const unsigned short dep53[] = { - 14, 19, 20, 41, 42, 99, 160, 164, 177, 187, 221, 223, 286, 2137, 2138, 2139, - 2168, 2169, 2172, 2175, 2329, 4136, 16530, 16532, 16533, 16535, 18765, 18767, - 18768, 18770, 22828, 22831, 22832, 22835, 22836, 22839, 22840, + 14, 19, 20, 41, 42, 100, 161, 165, 178, 188, 222, 224, 288, 2138, 2139, 2140, + 2169, 2170, 2173, 2176, 2331, 4136, 16531, 16533, 16534, 16536, 18767, 18769, + 18770, 18772, 22830, 22833, 22834, 22837, 22838, 22841, 22842, }; static const unsigned short dep54[] = { - 15, 99, 212, 213, 286, 2138, 2329, 18603, 18604, 18765, 18766, 18768, 18769, + 15, 100, 213, 214, 288, 2139, 2331, 18604, 18605, 18767, 18768, 18770, 18771, }; static const unsigned short dep55[] = { - 11, 19, 20, 41, 42, 99, 160, 164, 177, 187, 212, 214, 286, 2137, 2138, 2139, - 2168, 2169, 2172, 2175, 2329, 4136, 16530, 16532, 16533, 16535, 18765, 18767, - 18768, 18770, + 11, 19, 20, 41, 42, 100, 161, 165, 178, 188, 213, 215, 288, 2138, 2139, 2140, + 2169, 2170, 2173, 2176, 2331, 4136, 16531, 16533, 16534, 16536, 18767, 18769, + 18770, 18772, }; static const unsigned short dep56[] = { - 15, 16, 17, 18, 99, 212, 213, 215, 216, 218, 219, 221, 222, 286, 2138, 2329, - 18603, 18604, 18765, 18766, 18768, 18769, + 15, 16, 17, 18, 100, 213, 214, 216, 217, 219, 220, 222, 223, 288, 2139, 2331, + 18604, 18605, 18767, 18768, 18770, 18771, }; static const unsigned short dep57[] = { - 11, 12, 13, 14, 19, 20, 41, 42, 99, 160, 164, 177, 187, 212, 214, 215, 217, - 218, 220, 221, 223, 286, 2137, 2138, 2139, 2168, 2169, 2172, 2175, 2329, 4136, - 16530, 16532, 16533, 16535, 18765, 18767, 18768, 18770, + 11, 12, 13, 14, 19, 20, 41, 42, 100, 161, 165, 178, 188, 213, 215, 216, 218, + 219, 221, 222, 224, 288, 2138, 2139, 2140, 2169, 2170, 2173, 2176, 2331, 4136, + 16531, 16533, 16534, 16536, 18767, 18769, 18770, 18772, }; static const unsigned short dep58[] = { - 16, 99, 215, 216, 286, 2138, 2329, 18603, 18604, 18765, 18766, 18768, 18769, + 16, 100, 216, 217, 288, 2139, 2331, 18604, 18605, 18767, 18768, 18770, 18771, }; static const unsigned short dep59[] = { - 12, 19, 20, 41, 42, 99, 160, 164, 177, 187, 215, 217, 286, 2137, 2138, 2139, - 2168, 2169, 2172, 2175, 2329, 4136, 16530, 16532, 16533, 16535, 18765, 18767, - 18768, 18770, + 12, 19, 20, 41, 42, 100, 161, 165, 178, 188, 216, 218, 288, 2138, 2139, 2140, + 2169, 2170, 2173, 2176, 2331, 4136, 16531, 16533, 16534, 16536, 18767, 18769, + 18770, 18772, }; static const unsigned short dep60[] = { - 17, 99, 218, 219, 286, 2138, 2329, 18603, 18604, 18765, 18766, 18768, 18769, + 17, 100, 219, 220, 288, 2139, 2331, 18604, 18605, 18767, 18768, 18770, 18771, }; static const unsigned short dep61[] = { - 13, 19, 20, 41, 42, 99, 160, 164, 177, 187, 218, 220, 286, 2137, 2138, 2139, - 2168, 2169, 2172, 2175, 2329, 4136, 16530, 16532, 16533, 16535, 18765, 18767, - 18768, 18770, + 13, 19, 20, 41, 42, 100, 161, 165, 178, 188, 219, 221, 288, 2138, 2139, 2140, + 2169, 2170, 2173, 2176, 2331, 4136, 16531, 16533, 16534, 16536, 18767, 18769, + 18770, 18772, }; static const unsigned short dep62[] = { - 18, 99, 221, 222, 286, 2138, 2329, 18603, 18604, 18765, 18766, 18768, 18769, + 18, 100, 222, 223, 288, 2139, 2331, 18604, 18605, 18767, 18768, 18770, 18771, }; static const unsigned short dep63[] = { - 14, 19, 20, 41, 42, 99, 160, 164, 177, 187, 221, 223, 286, 2137, 2138, 2139, - 2168, 2169, 2172, 2175, 2329, 4136, 16530, 16532, 16533, 16535, 18765, 18767, - 18768, 18770, + 14, 19, 20, 41, 42, 100, 161, 165, 178, 188, 222, 224, 288, 2138, 2139, 2140, + 2169, 2170, 2173, 2176, 2331, 4136, 16531, 16533, 16534, 16536, 18767, 18769, + 18770, 18772, }; static const unsigned short dep64[] = { - 99, 286, 2138, 2329, 18603, 18604, 18765, 18766, 18768, 18769, + 100, 288, 2139, 2331, 18604, 18605, 18767, 18768, 18770, 18771, }; static const unsigned short dep65[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2137, 2138, 2139, 2168, 2169, 2172, 2175, - 2329, 4136, 16530, 16532, 16533, 16535, 18765, 18767, 18768, 18770, + 41, 42, 100, 161, 165, 178, 188, 288, 2138, 2139, 2140, 2169, 2170, 2173, + 2176, 2331, 4136, 16531, 16533, 16534, 16536, 18767, 18769, 18770, 18772, + }; static const unsigned short dep66[] = { - 11, 99, 208, 286, + 11, 100, 209, 288, }; static const unsigned short dep67[] = { - 11, 41, 42, 99, 160, 164, 177, 187, 208, 286, 2168, 2169, 2172, 2175, 4136, + 11, 41, 42, 100, 161, 165, 178, 188, 209, 288, 2169, 2170, 2173, 2176, 4136, }; static const unsigned short dep68[] = { - 11, 41, 42, 99, 160, 164, 177, 187, 286, 2168, 2169, 2172, 2175, 4136, + 11, 41, 42, 100, 161, 165, 178, 188, 288, 2169, 2170, 2173, 2176, 4136, }; static const unsigned short dep69[] = { - 12, 99, 209, 286, + 12, 100, 210, 288, }; static const unsigned short dep70[] = { - 11, 41, 42, 99, 160, 164, 177, 187, 209, 286, 2168, 2169, 2172, 2175, 4136, + 11, 41, 42, 100, 161, 165, 178, 188, 210, 288, 2169, 2170, 2173, 2176, 4136, }; static const unsigned short dep71[] = { - 13, 99, 210, 286, + 13, 100, 211, 288, }; static const unsigned short dep72[] = { - 11, 41, 42, 99, 160, 164, 177, 187, 210, 286, 2168, 2169, 2172, 2175, 4136, + 11, 41, 42, 100, 161, 165, 178, 188, 211, 288, 2169, 2170, 2173, 2176, 4136, }; static const unsigned short dep73[] = { - 14, 99, 211, 286, + 14, 100, 212, 288, }; static const unsigned short dep74[] = { - 11, 41, 42, 99, 160, 164, 177, 187, 211, 286, 2168, 2169, 2172, 2175, 4136, + 11, 41, 42, 100, 161, 165, 178, 188, 212, 288, 2169, 2170, 2173, 2176, 4136, }; static const unsigned short dep75[] = { - 15, 99, 213, 214, 286, + 15, 100, 214, 215, 288, }; static const unsigned short dep76[] = { - 41, 42, 99, 160, 164, 177, 187, 213, 214, 286, 2168, 2169, 2172, 2175, 4136, + 41, 42, 100, 161, 165, 178, 188, 214, 215, 288, 2169, 2170, 2173, 2176, 4136, }; static const unsigned short dep77[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2168, 2169, 2172, 2175, 4136, + 41, 42, 100, 161, 165, 178, 188, 288, 2169, 2170, 2173, 2176, 4136, }; static const unsigned short dep78[] = { - 16, 99, 216, 217, 286, + 16, 100, 217, 218, 288, }; static const unsigned short dep79[] = { - 41, 42, 99, 160, 164, 177, 187, 216, 217, 286, 2168, 2169, 2172, 2175, 4136, + 41, 42, 100, 161, 165, 178, 188, 217, 218, 288, 2169, 2170, 2173, 2176, 4136, }; static const unsigned short dep80[] = { - 17, 99, 219, 220, 286, + 17, 100, 220, 221, 288, }; static const unsigned short dep81[] = { - 41, 42, 99, 160, 164, 177, 187, 219, 220, 286, 2168, 2169, 2172, 2175, 4136, + 41, 42, 100, 161, 165, 178, 188, 220, 221, 288, 2169, 2170, 2173, 2176, 4136, }; static const unsigned short dep82[] = { - 18, 99, 222, 223, 286, + 18, 100, 223, 224, 288, }; static const unsigned short dep83[] = { - 41, 42, 99, 160, 164, 177, 187, 222, 223, 286, 2168, 2169, 2172, 2175, 4136, + 41, 42, 100, 161, 165, 178, 188, 223, 224, 288, 2169, 2170, 2173, 2176, 4136, }; static const unsigned short dep84[] = { - 15, 19, 20, 41, 42, 99, 160, 164, 166, 177, 187, 188, 190, 286, 2168, 2169, - 2172, 2175, 4136, + 15, 19, 20, 41, 42, 100, 161, 165, 167, 178, 188, 189, 191, 288, 2169, 2170, + 2173, 2176, 4136, }; static const unsigned short dep85[] = { - 15, 16, 19, 20, 41, 42, 99, 160, 164, 166, 177, 187, 188, 190, 286, 2168, - 2169, 2172, 2175, 4136, + 15, 16, 19, 20, 41, 42, 100, 161, 165, 167, 178, 188, 189, 191, 288, 2169, + 2170, 2173, 2176, 4136, }; static const unsigned short dep86[] = { - 15, 17, 19, 20, 41, 42, 99, 160, 164, 166, 177, 187, 188, 190, 286, 2168, - 2169, 2172, 2175, 4136, + 15, 17, 19, 20, 41, 42, 100, 161, 165, 167, 178, 188, 189, 191, 288, 2169, + 2170, 2173, 2176, 4136, }; static const unsigned short dep87[] = { - 15, 18, 19, 20, 41, 42, 99, 160, 164, 166, 177, 187, 188, 190, 286, 2168, - 2169, 2172, 2175, 4136, + 15, 18, 19, 20, 41, 42, 100, 161, 165, 167, 178, 188, 189, 191, 288, 2169, + 2170, 2173, 2176, 4136, }; static const unsigned short dep88[] = { - 15, 99, 212, 213, 286, + 15, 100, 213, 214, 288, }; static const unsigned short dep89[] = { - 11, 19, 20, 41, 42, 99, 160, 164, 177, 187, 212, 214, 286, 2168, 2169, 2172, - 2175, 4136, + 11, 19, 20, 41, 42, 100, 161, 165, 178, 188, 213, 215, 288, 2169, 2170, 2173, + 2176, 4136, }; static const unsigned short dep90[] = { - 15, 16, 17, 18, 99, 212, 213, 215, 216, 218, 219, 221, 222, 286, + 15, 16, 17, 18, 100, 213, 214, 216, 217, 219, 220, 222, 223, 288, }; static const unsigned short dep91[] = { - 11, 12, 13, 14, 19, 20, 41, 42, 99, 160, 164, 177, 187, 212, 214, 215, 217, - 218, 220, 221, 223, 286, 2168, 2169, 2172, 2175, 4136, + 11, 12, 13, 14, 19, 20, 41, 42, 100, 161, 165, 178, 188, 213, 215, 216, 218, + 219, 221, 222, 224, 288, 2169, 2170, 2173, 2176, 4136, }; static const unsigned short dep92[] = { - 16, 99, 215, 216, 286, + 16, 100, 216, 217, 288, }; static const unsigned short dep93[] = { - 12, 19, 20, 41, 42, 99, 160, 164, 177, 187, 215, 217, 286, 2168, 2169, 2172, - 2175, 4136, + 12, 19, 20, 41, 42, 100, 161, 165, 178, 188, 216, 218, 288, 2169, 2170, 2173, + 2176, 4136, }; static const unsigned short dep94[] = { - 17, 99, 218, 219, 286, + 17, 100, 219, 220, 288, }; static const unsigned short dep95[] = { - 13, 19, 20, 41, 42, 99, 160, 164, 177, 187, 218, 220, 286, 2168, 2169, 2172, - 2175, 4136, + 13, 19, 20, 41, 42, 100, 161, 165, 178, 188, 219, 221, 288, 2169, 2170, 2173, + 2176, 4136, }; static const unsigned short dep96[] = { - 18, 99, 221, 222, 286, + 18, 100, 222, 223, 288, }; static const unsigned short dep97[] = { - 14, 19, 20, 41, 42, 99, 160, 164, 177, 187, 221, 223, 286, 2168, 2169, 2172, - 2175, 4136, + 14, 19, 20, 41, 42, 100, 161, 165, 178, 188, 222, 224, 288, 2169, 2170, 2173, + 2176, 4136, }; static const unsigned short dep98[] = { - 15, 99, 212, 213, 286, 2168, 2169, 2170, 2172, 2173, 2175, 2176, 2348, 2351, - 2352, 2355, 2356, 2359, 2360, + 15, 100, 213, 214, 288, 2169, 2170, 2171, 2173, 2174, 2176, 2177, 2350, 2353, + 2354, 2357, 2358, 2361, 2362, }; static const unsigned short dep99[] = { - 11, 19, 20, 41, 42, 99, 160, 164, 177, 187, 212, 214, 286, 2137, 2138, 2139, - 2168, 2169, 2172, 2175, 2348, 2351, 2352, 2355, 2356, 2359, 2360, 4136, 16530, - 16532, 16533, 16535, + 11, 19, 20, 41, 42, 100, 161, 165, 178, 188, 213, 215, 288, 2138, 2139, 2140, + 2169, 2170, 2173, 2176, 2350, 2353, 2354, 2357, 2358, 2361, 2362, 4136, 16531, + 16533, 16534, 16536, }; static const unsigned short dep100[] = { - 15, 16, 17, 18, 99, 212, 213, 215, 216, 218, 219, 221, 222, 286, 2168, 2169, - 2170, 2172, 2173, 2175, 2176, 2348, 2351, 2352, 2355, 2356, 2359, 2360, + 15, 16, 17, 18, 100, 213, 214, 216, 217, 219, 220, 222, 223, 288, 2169, 2170, + 2171, 2173, 2174, 2176, 2177, 2350, 2353, 2354, 2357, 2358, 2361, 2362, }; static const unsigned short dep101[] = { - 11, 12, 13, 14, 19, 20, 41, 42, 99, 160, 164, 177, 187, 212, 214, 215, 217, - 218, 220, 221, 223, 286, 2137, 2138, 2139, 2168, 2169, 2172, 2175, 2348, 2351, - 2352, 2355, 2356, 2359, 2360, 4136, 16530, 16532, 16533, 16535, + 11, 12, 13, 14, 19, 20, 41, 42, 100, 161, 165, 178, 188, 213, 215, 216, 218, + 219, 221, 222, 224, 288, 2138, 2139, 2140, 2169, 2170, 2173, 2176, 2350, 2353, + 2354, 2357, 2358, 2361, 2362, 4136, 16531, 16533, 16534, 16536, }; static const unsigned short dep102[] = { - 16, 99, 215, 216, 286, 2168, 2169, 2170, 2172, 2173, 2175, 2176, 2348, 2351, - 2352, 2355, 2356, 2359, 2360, + 16, 100, 216, 217, 288, 2169, 2170, 2171, 2173, 2174, 2176, 2177, 2350, 2353, + 2354, 2357, 2358, 2361, 2362, }; static const unsigned short dep103[] = { - 12, 19, 20, 41, 42, 99, 160, 164, 177, 187, 215, 217, 286, 2137, 2138, 2139, - 2168, 2169, 2172, 2175, 2348, 2351, 2352, 2355, 2356, 2359, 2360, 4136, 16530, - 16532, 16533, 16535, + 12, 19, 20, 41, 42, 100, 161, 165, 178, 188, 216, 218, 288, 2138, 2139, 2140, + 2169, 2170, 2173, 2176, 2350, 2353, 2354, 2357, 2358, 2361, 2362, 4136, 16531, + 16533, 16534, 16536, }; static const unsigned short dep104[] = { - 17, 99, 218, 219, 286, 2168, 2169, 2170, 2172, 2173, 2175, 2176, 2348, 2351, - 2352, 2355, 2356, 2359, 2360, + 17, 100, 219, 220, 288, 2169, 2170, 2171, 2173, 2174, 2176, 2177, 2350, 2353, + 2354, 2357, 2358, 2361, 2362, }; static const unsigned short dep105[] = { - 13, 19, 20, 41, 42, 99, 160, 164, 177, 187, 218, 220, 286, 2137, 2138, 2139, - 2168, 2169, 2172, 2175, 2348, 2351, 2352, 2355, 2356, 2359, 2360, 4136, 16530, - 16532, 16533, 16535, + 13, 19, 20, 41, 42, 100, 161, 165, 178, 188, 219, 221, 288, 2138, 2139, 2140, + 2169, 2170, 2173, 2176, 2350, 2353, 2354, 2357, 2358, 2361, 2362, 4136, 16531, + 16533, 16534, 16536, }; static const unsigned short dep106[] = { - 18, 99, 221, 222, 286, 2168, 2169, 2170, 2172, 2173, 2175, 2176, 2348, 2351, - 2352, 2355, 2356, 2359, 2360, + 18, 100, 222, 223, 288, 2169, 2170, 2171, 2173, 2174, 2176, 2177, 2350, 2353, + 2354, 2357, 2358, 2361, 2362, }; static const unsigned short dep107[] = { - 14, 19, 20, 41, 42, 99, 160, 164, 177, 187, 221, 223, 286, 2137, 2138, 2139, - 2168, 2169, 2172, 2175, 2348, 2351, 2352, 2355, 2356, 2359, 2360, 4136, 16530, - 16532, 16533, 16535, + 14, 19, 20, 41, 42, 100, 161, 165, 178, 188, 222, 224, 288, 2138, 2139, 2140, + 2169, 2170, 2173, 2176, 2350, 2353, 2354, 2357, 2358, 2361, 2362, 4136, 16531, + 16533, 16534, 16536, }; static const unsigned short dep108[] = { - 15, 99, 212, 213, 286, 22648, 22649, 22650, 22652, 22653, 22655, 22656, 22828, - 22831, 22832, 22835, 22836, 22839, 22840, + 15, 100, 213, 214, 288, 22649, 22650, 22651, 22653, 22654, 22656, 22657, 22830, + 22833, 22834, 22837, 22838, 22841, 22842, }; static const unsigned short dep109[] = { - 11, 19, 20, 41, 42, 99, 160, 164, 177, 187, 212, 214, 286, 2137, 2138, 2139, - 2168, 2169, 2172, 2175, 4136, 16530, 16532, 16533, 16535, 22828, 22831, 22832, - 22835, 22836, 22839, 22840, + 11, 19, 20, 41, 42, 100, 161, 165, 178, 188, 213, 215, 288, 2138, 2139, 2140, + 2169, 2170, 2173, 2176, 4136, 16531, 16533, 16534, 16536, 22830, 22833, 22834, + 22837, 22838, 22841, 22842, }; static const unsigned short dep110[] = { - 15, 16, 17, 18, 99, 212, 213, 215, 216, 218, 219, 221, 222, 286, 22648, 22649, - 22650, 22652, 22653, 22655, 22656, 22828, 22831, 22832, 22835, 22836, 22839, - 22840, + 15, 16, 17, 18, 100, 213, 214, 216, 217, 219, 220, 222, 223, 288, 22649, 22650, + 22651, 22653, 22654, 22656, 22657, 22830, 22833, 22834, 22837, 22838, 22841, + 22842, }; static const unsigned short dep111[] = { - 11, 12, 13, 14, 19, 20, 41, 42, 99, 160, 164, 177, 187, 212, 214, 215, 217, - 218, 220, 221, 223, 286, 2137, 2138, 2139, 2168, 2169, 2172, 2175, 4136, 16530, - 16532, 16533, 16535, 22828, 22831, 22832, 22835, 22836, 22839, 22840, + 11, 12, 13, 14, 19, 20, 41, 42, 100, 161, 165, 178, 188, 213, 215, 216, 218, + 219, 221, 222, 224, 288, 2138, 2139, 2140, 2169, 2170, 2173, 2176, 4136, 16531, + 16533, 16534, 16536, 22830, 22833, 22834, 22837, 22838, 22841, 22842, }; static const unsigned short dep112[] = { - 16, 99, 215, 216, 286, 22648, 22649, 22650, 22652, 22653, 22655, 22656, 22828, - 22831, 22832, 22835, 22836, 22839, 22840, + 16, 100, 216, 217, 288, 22649, 22650, 22651, 22653, 22654, 22656, 22657, 22830, + 22833, 22834, 22837, 22838, 22841, 22842, }; static const unsigned short dep113[] = { - 12, 19, 20, 41, 42, 99, 160, 164, 177, 187, 215, 217, 286, 2137, 2138, 2139, - 2168, 2169, 2172, 2175, 4136, 16530, 16532, 16533, 16535, 22828, 22831, 22832, - 22835, 22836, 22839, 22840, + 12, 19, 20, 41, 42, 100, 161, 165, 178, 188, 216, 218, 288, 2138, 2139, 2140, + 2169, 2170, 2173, 2176, 4136, 16531, 16533, 16534, 16536, 22830, 22833, 22834, + 22837, 22838, 22841, 22842, }; static const unsigned short dep114[] = { - 17, 99, 218, 219, 286, 22648, 22649, 22650, 22652, 22653, 22655, 22656, 22828, - 22831, 22832, 22835, 22836, 22839, 22840, + 17, 100, 219, 220, 288, 22649, 22650, 22651, 22653, 22654, 22656, 22657, 22830, + 22833, 22834, 22837, 22838, 22841, 22842, }; static const unsigned short dep115[] = { - 13, 19, 20, 41, 42, 99, 160, 164, 177, 187, 218, 220, 286, 2137, 2138, 2139, - 2168, 2169, 2172, 2175, 4136, 16530, 16532, 16533, 16535, 22828, 22831, 22832, - 22835, 22836, 22839, 22840, + 13, 19, 20, 41, 42, 100, 161, 165, 178, 188, 219, 221, 288, 2138, 2139, 2140, + 2169, 2170, 2173, 2176, 4136, 16531, 16533, 16534, 16536, 22830, 22833, 22834, + 22837, 22838, 22841, 22842, }; static const unsigned short dep116[] = { - 18, 99, 221, 222, 286, 22648, 22649, 22650, 22652, 22653, 22655, 22656, 22828, - 22831, 22832, 22835, 22836, 22839, 22840, + 18, 100, 222, 223, 288, 22649, 22650, 22651, 22653, 22654, 22656, 22657, 22830, + 22833, 22834, 22837, 22838, 22841, 22842, }; static const unsigned short dep117[] = { - 14, 19, 20, 41, 42, 99, 160, 164, 177, 187, 221, 223, 286, 2137, 2138, 2139, - 2168, 2169, 2172, 2175, 4136, 16530, 16532, 16533, 16535, 22828, 22831, 22832, - 22835, 22836, 22839, 22840, + 14, 19, 20, 41, 42, 100, 161, 165, 178, 188, 222, 224, 288, 2138, 2139, 2140, + 2169, 2170, 2173, 2176, 4136, 16531, 16533, 16534, 16536, 22830, 22833, 22834, + 22837, 22838, 22841, 22842, }; static const unsigned short dep118[] = { - 99, 286, 2168, 2169, 2170, 2172, 2173, 2175, 2176, 2348, 2351, 2352, 2355, - 2356, 2359, 2360, + 100, 288, 2169, 2170, 2171, 2173, 2174, 2176, 2177, 2350, 2353, 2354, 2357, + 2358, 2361, 2362, }; static const unsigned short dep119[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2137, 2138, 2139, 2168, 2169, 2172, 2175, - 2348, 2351, 2352, 2355, 2356, 2359, 2360, 4136, 16530, 16532, 16533, 16535, - + 41, 42, 100, 161, 165, 178, 188, 288, 2138, 2139, 2140, 2169, 2170, 2173, + 2176, 2350, 2353, 2354, 2357, 2358, 2361, 2362, 4136, 16531, 16533, 16534, + 16536, }; static const unsigned short dep120[] = { - 99, 286, 22648, 22649, 22650, 22652, 22653, 22655, 22656, 22828, 22831, 22832, - 22835, 22836, 22839, 22840, + 100, 288, 22649, 22650, 22651, 22653, 22654, 22656, 22657, 22830, 22833, 22834, + 22837, 22838, 22841, 22842, }; static const unsigned short dep121[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2137, 2138, 2139, 2168, 2169, 2172, 2175, - 4136, 16530, 16532, 16533, 16535, 22828, 22831, 22832, 22835, 22836, 22839, - 22840, + 41, 42, 100, 161, 165, 178, 188, 288, 2138, 2139, 2140, 2169, 2170, 2173, + 2176, 4136, 16531, 16533, 16534, 16536, 22830, 22833, 22834, 22837, 22838, + 22841, 22842, }; static const unsigned short dep122[] = { - 19, 20, 41, 42, 99, 160, 164, 177, 187, 286, 2137, 2138, 2139, 2168, 2169, - 2172, 2175, 2329, 4136, 16530, 16532, 16533, 16535, 18765, 18767, 18768, 18770, + 19, 20, 41, 42, 100, 161, 165, 178, 188, 288, 2138, 2139, 2140, 2169, 2170, + 2173, 2176, 2331, 4136, 16531, 16533, 16534, 16536, 18767, 18769, 18770, 18772, }; static const unsigned short dep123[] = { - 41, 42, 99, 160, 164, 166, 177, 187, 188, 190, 286, 2140, 2141, 2142, 2168, - 2169, 2172, 2175, 4136, 20618, + 41, 42, 100, 161, 165, 167, 178, 188, 189, 191, 288, 2141, 2142, 2143, 2169, + 2170, 2173, 2176, 4136, 20619, }; static const unsigned short dep124[] = { - 99, 286, 2084, 2085, 2289, 2290, + 100, 288, 2084, 2085, 2290, 2291, }; static const unsigned short dep125[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, - 2288, 2290, 4136, 20618, + 41, 42, 100, 161, 165, 178, 188, 288, 2141, 2142, 2143, 2169, 2170, 2173, + 2176, 2289, 2291, 4136, 20619, }; static const unsigned short dep126[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2083, 2085, 2168, 2169, 2172, 2175, 2331, - 4136, 20618, + 41, 42, 100, 161, 165, 178, 188, 288, 2083, 2085, 2169, 2170, 2173, 2176, + 2333, 4136, 20619, }; static const unsigned short dep127[] = { - 99, 286, 14457, 14459, 14460, 14462, 14463, 14465, 14639, 14640, 14643, 14644, - 14647, 14648, + 100, 288, 14458, 14460, 14461, 14463, 14464, 14466, 14641, 14642, 14645, 14646, + 14649, 14650, }; static const unsigned short dep128[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2140, 2141, 2142, 4136, 14639, 14640, - 14643, 14644, 14647, 14648, 20618, 24696, 24697, 24700, 24703, + 41, 42, 100, 161, 165, 178, 188, 288, 2141, 2142, 2143, 4136, 14641, 14642, + 14645, 14646, 14649, 14650, 20619, 24697, 24698, 24701, 24704, }; static const unsigned short dep129[] = { - 99, 124, 126, 127, 129, 286, 307, 308, 311, 312, + 100, 125, 127, 128, 130, 288, 309, 310, 313, 314, }; static const unsigned short dep130[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 307, 308, 311, 312, 4136, 24696, 24697, - 24700, 24703, + 41, 42, 100, 161, 165, 178, 188, 288, 309, 310, 313, 314, 4136, 24697, 24698, + 24701, 24704, }; static const unsigned short dep131[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2168, 2169, 2172, 2175, 2331, 4136, 20618, - + 41, 42, 100, 161, 165, 178, 188, 288, 2169, 2170, 2173, 2176, 2333, 4136, + 20619, }; static const unsigned short dep132[] = { - 41, 42, 99, 121, 124, 127, 160, 164, 177, 187, 286, 2331, 4136, 20618, 24696, + 41, 42, 100, 122, 125, 128, 161, 165, 178, 188, 288, 2333, 4136, 20619, 24697, }; static const unsigned short dep133[] = { - 6, 24, 26, 27, 99, 203, 229, 232, 286, 2082, 2287, + 6, 24, 26, 27, 100, 204, 230, 233, 288, 2082, 2288, }; static const unsigned short dep134[] = { - 41, 42, 99, 160, 164, 177, 187, 203, 229, 231, 286, 2140, 2141, 2142, 2168, - 2169, 2172, 2175, 2287, 4136, 20618, + 41, 42, 100, 161, 165, 178, 188, 204, 230, 232, 288, 2141, 2142, 2143, 2169, + 2170, 2173, 2176, 2288, 4136, 20619, }; static const unsigned short dep135[] = { - 6, 24, 25, 26, 41, 42, 99, 160, 164, 177, 187, 286, 2082, 2168, 2169, 2172, - 2175, 2331, 4136, 20618, + 6, 24, 25, 26, 41, 42, 100, 161, 165, 178, 188, 288, 2082, 2169, 2170, 2173, + 2176, 2333, 4136, 20619, }; static const unsigned short dep136[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2168, 2169, 2172, 2175, 2348, 2351, 2352, - 2355, 2356, 2359, 2360, 4136, + 41, 42, 100, 161, 165, 178, 188, 288, 2169, 2170, 2173, 2176, 2350, 2353, + 2354, 2357, 2358, 2361, 2362, 4136, }; static const unsigned short dep137[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2168, 2169, 2172, 2175, 4136, 22828, - 22831, 22832, 22835, 22836, 22839, 22840, + 41, 42, 100, 161, 165, 178, 188, 288, 2169, 2170, 2173, 2176, 4136, 22830, + 22833, 22834, 22837, 22838, 22841, 22842, }; static const unsigned short dep138[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2168, 2169, 2172, 2175, 2348, 2349, 2352, - 2353, 2356, 2357, 2360, 4136, + 41, 42, 100, 161, 165, 178, 188, 288, 2169, 2170, 2173, 2176, 2350, 2351, + 2354, 2355, 2358, 2359, 2362, 4136, }; static const unsigned short dep139[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2168, 2169, 2172, 2175, 2348, 2350, 2351, - 2354, 2355, 2358, 2359, 4136, + 41, 42, 100, 161, 165, 178, 188, 288, 2169, 2170, 2173, 2176, 2350, 2352, + 2353, 2356, 2357, 2360, 2361, 4136, }; static const unsigned short dep140[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2168, 2169, 2172, 2175, 2348, 2349, 2350, - 2351, 2352, 2353, 2354, 2355, 2356, 2357, 2358, 2359, 2360, 4136, + 41, 42, 100, 161, 165, 178, 188, 288, 2169, 2170, 2173, 2176, 2350, 2351, + 2352, 2353, 2354, 2355, 2356, 2357, 2358, 2359, 2360, 2361, 2362, 4136, }; static const unsigned short dep141[] = { - 0, 41, 42, 99, 160, 164, 166, 177, 187, 188, 190, 286, 2168, 2169, 2172, 2175, - 4136, + 0, 41, 42, 100, 161, 165, 167, 178, 188, 189, 191, 288, 2169, 2170, 2173, + 2176, 4136, }; static const unsigned short dep142[] = { - 0, 99, 197, 286, + 0, 100, 198, 288, }; static const unsigned short dep143[] = { - 0, 41, 42, 99, 160, 164, 166, 177, 187, 188, 190, 197, 286, 2168, 2169, 2172, - 2175, 4136, + 0, 41, 42, 100, 161, 165, 167, 178, 188, 189, 191, 198, 288, 2169, 2170, 2173, + 2176, 4136, }; static const unsigned short dep144[] = { - 41, 42, 99, 160, 164, 177, 187, 197, 286, 2168, 2169, 2172, 2175, 4136, + 41, 42, 100, 161, 165, 178, 188, 198, 288, 2169, 2170, 2173, 2176, 4136, }; static const unsigned short dep145[] = { - 2, 28, 99, 199, 233, 286, 28868, 29022, + 2, 28, 100, 200, 234, 288, 28869, 29024, }; static const unsigned short dep146[] = { - 1, 2, 28, 29, 99, 160, 164, 177, 179, 180, 187, 199, 233, 286, 28868, 29022, + 1, 2, 28, 29, 100, 161, 165, 178, 180, 181, 188, 200, 234, 288, 28869, 29024, }; static const unsigned short dep147[] = { - 1, 28, 29, 39, 41, 42, 99, 160, 164, 177, 179, 180, 187, 199, 233, 286, 4136, - 28868, 29022, + 1, 28, 29, 39, 41, 42, 100, 161, 165, 178, 180, 181, 188, 200, 234, 288, 4136, + 28869, 29024, }; static const unsigned short dep148[] = { - 0, 41, 42, 99, 160, 164, 177, 187, 197, 286, 2168, 2169, 2172, 2175, 4136, + 0, 41, 42, 100, 161, 165, 178, 188, 198, 288, 2169, 2170, 2173, 2176, 4136, }; static const unsigned short dep149[] = { 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, - 28, 29, 30, 31, 32, 99, 198, 199, 200, 201, 202, 204, 205, 206, 207, 208, - 209, 210, 211, 213, 214, 216, 217, 219, 220, 222, 223, 224, 225, 226, 227, - 233, 234, 235, 236, 237, 286, 2071, 2082, 2276, 2287, 28868, 29022, + 28, 29, 30, 31, 32, 100, 199, 200, 201, 202, 203, 205, 206, 207, 208, 209, + 210, 211, 212, 214, 215, 217, 218, 220, 221, 223, 224, 225, 226, 227, 228, + 234, 235, 236, 237, 238, 272, 288, 2071, 2082, 2277, 2288, 28869, 29024, }; static const unsigned short dep150[] = { - 29, 41, 42, 99, 139, 140, 160, 164, 177, 187, 192, 193, 198, 199, 200, 201, - 202, 204, 205, 206, 207, 208, 209, 210, 211, 213, 214, 216, 217, 219, 220, - 222, 223, 224, 225, 226, 227, 233, 234, 235, 236, 237, 286, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 2276, 2287, 4136, 20618, 28868, 29022, + 29, 41, 42, 100, 140, 141, 161, 165, 178, 188, 193, 194, 199, 200, 201, 202, + 203, 205, 206, 207, 208, 209, 210, 211, 212, 214, 215, 217, 218, 220, 221, + 223, 224, 225, 226, 227, 228, 234, 235, 236, 237, 238, 272, 288, 2141, 2142, + 2143, 2169, 2170, 2173, 2176, 2277, 2288, 4136, 20619, 28869, 29024, }; static const unsigned short dep151[] = { - 99, 286, 14466, 14468, 14470, 14472, 14507, 14508, 14527, 14649, 14650, 14670, - 14671, 14673, 14674, 14683, + 77, 272, }; static const unsigned short dep152[] = { - 41, 42, 99, 160, 164, 177, 185, 186, 187, 286, 2168, 2169, 2172, 2175, 4136, - 14649, 14650, 14670, 14671, 14673, 14674, 14683, + 272, }; static const unsigned short dep153[] = { - 14466, 14468, 14470, 14472, 14507, 14508, 14527, 14649, 14650, 14670, 14671, - 14673, 14674, 14683, + 100, 288, 14467, 14469, 14471, 14473, 14508, 14509, 14528, 14651, 14652, 14672, + 14673, 14675, 14676, 14685, }; static const unsigned short dep154[] = { - 185, 186, 14649, 14650, 14670, 14671, 14673, 14674, 14683, + 41, 42, 100, 161, 165, 178, 186, 187, 188, 288, 2169, 2170, 2173, 2176, 4136, + 14651, 14652, 14672, 14673, 14675, 14676, 14685, }; static const unsigned short dep155[] = { - 99, 286, 14467, 14468, 14471, 14472, 14482, 14483, 14485, 14486, 14488, 14489, - 14491, 14492, 14495, 14497, 14498, 14507, 14508, 14509, 14510, 14512, 14517, - 14518, 14520, 14521, 14527, 14649, 14650, 14656, 14657, 14658, 14659, 14661, - 14663, 14670, 14671, 14673, 14674, 14675, 14676, 14679, 14680, 14683, + 14467, 14469, 14471, 14473, 14508, 14509, 14528, 14651, 14652, 14672, 14673, + 14675, 14676, 14685, }; static const unsigned short dep156[] = { - 41, 42, 99, 139, 140, 160, 164, 177, 187, 192, 193, 286, 2168, 2169, 2172, - 2175, 4136, 14649, 14650, 14656, 14657, 14658, 14659, 14661, 14663, 14670, - 14671, 14673, 14674, 14675, 14676, 14679, 14680, 14683, 34890, + 186, 187, 14651, 14652, 14672, 14673, 14675, 14676, 14685, }; static const unsigned short dep157[] = { - 41, 42, 99, 139, 140, 160, 164, 177, 187, 192, 193, 286, 2168, 2169, 2172, - 2175, 4136, 14649, 14650, 14656, 14657, 14658, 14659, 14661, 14663, 14670, - 14671, 14673, 14674, 14675, 14676, 14679, 14680, 14683, + 100, 288, 14468, 14469, 14472, 14473, 14483, 14484, 14486, 14487, 14489, 14490, + 14492, 14493, 14496, 14498, 14499, 14508, 14509, 14510, 14511, 14513, 14518, + 14519, 14521, 14522, 14528, 14651, 14652, 14658, 14659, 14660, 14661, 14663, + 14665, 14672, 14673, 14675, 14676, 14677, 14678, 14681, 14682, 14685, }; static const unsigned short dep158[] = { - 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, - 28, 29, 30, 31, 32, 41, 42, 99, 139, 140, 160, 164, 177, 182, 183, 187, 192, - 193, 286, 2071, 2082, 2168, 2169, 2172, 2175, 2331, 4136, 20618, 28868, + 41, 42, 100, 140, 141, 161, 165, 178, 188, 193, 194, 288, 2169, 2170, 2173, + 2176, 4136, 14651, 14652, 14658, 14659, 14660, 14661, 14663, 14665, 14672, + 14673, 14675, 14676, 14677, 14678, 14681, 14682, 14685, 34890, }; static const unsigned short dep159[] = { - 44, 45, 46, 47, 48, 49, 50, 51, 53, 54, 55, 56, 57, 58, 59, 60, 62, 63, 64, - 65, 66, 67, 69, 71, 72, 73, 74, 75, 96, 98, 99, 246, 247, 248, 249, 250, 251, - 252, 253, 254, 255, 256, 257, 259, 260, 261, 262, 263, 265, 267, 268, 269, - 285, 286, 2118, 2314, + 41, 42, 100, 140, 141, 161, 165, 178, 188, 193, 194, 288, 2169, 2170, 2173, + 2176, 4136, 14651, 14652, 14658, 14659, 14660, 14661, 14663, 14665, 14672, + 14673, 14675, 14676, 14677, 14678, 14681, 14682, 14685, }; static const unsigned short dep160[] = { - 41, 42, 98, 99, 139, 140, 160, 162, 163, 164, 177, 187, 192, 193, 246, 247, - 248, 249, 250, 251, 252, 253, 254, 255, 256, 257, 259, 260, 261, 262, 263, - 265, 267, 268, 269, 285, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2314, - 4136, 20618, + 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, + 28, 29, 30, 31, 32, 41, 42, 100, 140, 141, 161, 165, 178, 183, 184, 188, 193, + 194, 288, 2071, 2082, 2169, 2170, 2173, 2176, 2333, 4136, 20619, 28869, }; static const unsigned short dep161[] = { - 61, 97, 99, 258, 285, 286, 2142, 2331, + 44, 45, 46, 47, 48, 49, 50, 51, 53, 54, 55, 56, 57, 58, 59, 60, 62, 63, 64, + 65, 66, 67, 69, 71, 72, 73, 74, 75, 97, 99, 100, 247, 248, 249, 250, 251, + 252, 253, 254, 255, 256, 257, 258, 260, 261, 262, 263, 264, 266, 268, 269, + 270, 287, 288, 2118, 2315, }; static const unsigned short dep162[] = { - 41, 42, 44, 45, 47, 49, 50, 52, 53, 54, 55, 56, 58, 59, 62, 63, 65, 66, 67, - 68, 69, 71, 72, 73, 96, 97, 99, 139, 140, 160, 162, 163, 164, 177, 187, 192, - 193, 258, 285, 286, 2109, 2118, 2168, 2169, 2172, 2175, 2331, 4136, 20618, - + 41, 42, 99, 100, 140, 141, 161, 163, 164, 165, 178, 188, 193, 194, 247, 248, + 249, 250, 251, 252, 253, 254, 255, 256, 257, 258, 260, 261, 262, 263, 264, + 266, 268, 269, 270, 287, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2315, + 4136, 20619, }; static const unsigned short dep163[] = { - 2, 28, 42, 99, 199, 233, 244, 286, 2142, 2331, 28868, 29022, + 61, 98, 100, 259, 287, 288, 2143, 2333, }; static const unsigned short dep164[] = { - 2, 25, 26, 28, 29, 39, 41, 42, 99, 160, 164, 177, 179, 180, 187, 199, 233, - 244, 286, 2331, 4136, 20618, 28868, 29022, + 41, 42, 44, 45, 47, 49, 50, 52, 53, 54, 55, 56, 58, 59, 62, 63, 65, 66, 67, + 68, 69, 71, 72, 73, 97, 98, 100, 140, 141, 161, 163, 164, 165, 178, 188, 193, + 194, 259, 287, 288, 2109, 2118, 2169, 2170, 2173, 2176, 2333, 4136, 20619, + }; static const unsigned short dep165[] = { - 99, 131, 132, 135, 136, 142, 143, 146, 147, 149, 150, 152, 153, 155, 156, - 159, 161, 162, 167, 168, 171, 172, 173, 174, 176, 178, 179, 181, 182, 184, - 185, 188, 189, 191, 286, 313, 314, 318, 320, 321, 322, 323, 325, 327, 331, - 334, 335, 337, 338, 339, 340, 342, 343, 344, 346, 347, + 2, 28, 42, 100, 200, 234, 245, 288, 2143, 2333, 28869, 29024, }; static const unsigned short dep166[] = { - 41, 42, 99, 139, 140, 160, 164, 177, 187, 192, 193, 286, 313, 314, 318, 320, - 321, 322, 323, 325, 327, 331, 334, 335, 337, 338, 339, 340, 342, 343, 344, - 346, 347, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 4136, 20618, 34890, + 2, 25, 26, 28, 29, 39, 41, 42, 100, 161, 165, 178, 180, 181, 188, 200, 234, + 245, 288, 2333, 4136, 20619, 28869, 29024, }; static const unsigned short dep167[] = { - 99, 130, 132, 134, 136, 171, 172, 191, 286, 313, 314, 334, 335, 337, 338, - 347, + 100, 132, 133, 136, 137, 143, 144, 147, 148, 150, 151, 153, 154, 156, 157, + 160, 162, 163, 168, 169, 172, 173, 174, 175, 177, 179, 180, 182, 183, 185, + 186, 189, 190, 192, 288, 315, 316, 320, 322, 323, 324, 325, 327, 329, 333, + 336, 337, 339, 340, 341, 342, 344, 345, 346, 348, 349, }; static const unsigned short dep168[] = { - 41, 42, 99, 160, 164, 177, 185, 186, 187, 286, 313, 314, 334, 335, 337, 338, - 347, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 4136, 20618, + 41, 42, 100, 140, 141, 161, 165, 178, 188, 193, 194, 288, 315, 316, 320, 322, + 323, 324, 325, 327, 329, 333, 336, 337, 339, 340, 341, 342, 344, 345, 346, + 348, 349, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 4136, 20619, 34890, }; static const unsigned short dep169[] = { - 41, 42, 99, 132, 133, 136, 137, 139, 140, 143, 144, 147, 148, 150, 151, 153, - 154, 156, 157, 159, 160, 161, 163, 164, 166, 167, 169, 170, 171, 172, 174, - 175, 176, 177, 178, 180, 181, 183, 184, 186, 187, 189, 190, 191, 192, 193, - 286, 2168, 2169, 2172, 2175, 2331, 4136, 20618, + 100, 131, 133, 135, 137, 172, 173, 192, 288, 315, 316, 336, 337, 339, 340, + 349, }; static const unsigned short dep170[] = { - 41, 42, 99, 132, 133, 136, 137, 160, 164, 171, 172, 177, 187, 191, 286, 2168, - 2169, 2172, 2175, 2331, 4136, 20618, + 41, 42, 100, 161, 165, 178, 186, 187, 188, 288, 315, 316, 336, 337, 339, 340, + 349, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 4136, 20619, }; static const unsigned short dep171[] = { - 41, 42, 72, 78, 79, 84, 86, 99, 113, 139, 140, 155, 157, 160, 164, 173, 175, - 177, 187, 194, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2331, 4136, - 20618, + 41, 42, 100, 133, 134, 137, 138, 140, 141, 144, 145, 148, 149, 151, 152, 154, + 155, 157, 158, 160, 161, 162, 164, 165, 167, 168, 170, 171, 172, 173, 175, + 176, 177, 178, 179, 181, 182, 184, 185, 187, 188, 190, 191, 192, 193, 194, + 288, 2169, 2170, 2173, 2176, 2333, 4136, 20619, }; static const unsigned short dep172[] = { - 41, 42, 72, 78, 79, 84, 86, 99, 113, 139, 140, 141, 142, 144, 145, 155, 157, - 160, 164, 173, 175, 177, 187, 194, 286, 2140, 2141, 2142, 2168, 2169, 2172, - 2175, 4136, 20618, + 41, 42, 100, 133, 134, 137, 138, 161, 165, 172, 173, 178, 188, 192, 288, 2169, + 2170, 2173, 2176, 2333, 4136, 20619, }; static const unsigned short dep173[] = { - 79, 80, 99, 103, 104, 273, 274, 286, 288, 289, + 41, 42, 72, 79, 80, 85, 87, 100, 114, 140, 141, 156, 158, 161, 165, 174, 176, + 178, 188, 195, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2333, 4136, + 20619, }; static const unsigned short dep174[] = { - 41, 42, 48, 64, 80, 82, 88, 99, 101, 104, 139, 140, 160, 162, 163, 164, 177, - 187, 192, 193, 194, 273, 274, 286, 288, 289, 2140, 2141, 2142, 2168, 2169, - 2172, 2175, 4136, 20618, + 41, 42, 72, 79, 80, 85, 87, 100, 114, 140, 141, 142, 143, 145, 146, 156, 158, + 161, 165, 174, 176, 178, 188, 195, 288, 2141, 2142, 2143, 2169, 2170, 2173, + 2176, 4136, 20619, }; static const unsigned short dep175[] = { - 41, 42, 48, 64, 80, 82, 99, 101, 104, 106, 108, 139, 140, 160, 162, 163, 164, - 177, 187, 192, 193, 194, 273, 274, 286, 288, 289, 2140, 2141, 2142, 2168, - 2169, 2172, 2175, 4136, 20618, + 80, 81, 100, 104, 105, 275, 276, 288, 290, 291, }; static const unsigned short dep176[] = { - 99, 286, 12482, 12483, 12637, + 41, 42, 48, 64, 81, 83, 89, 100, 102, 105, 140, 141, 161, 163, 164, 165, 178, + 188, 193, 194, 195, 275, 276, 288, 290, 291, 2141, 2142, 2143, 2169, 2170, + 2173, 2176, 4136, 20619, }; static const unsigned short dep177[] = { - 41, 42, 99, 139, 140, 160, 164, 177, 187, 192, 193, 286, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 4136, 12637, 20618, + 41, 42, 48, 64, 81, 83, 100, 102, 105, 107, 109, 140, 141, 161, 163, 164, + 165, 178, 188, 193, 194, 195, 275, 276, 288, 290, 291, 2141, 2142, 2143, 2169, + 2170, 2173, 2176, 4136, 20619, }; static const unsigned short dep178[] = { - 99, 286, 6221, 6222, 6415, + 100, 288, 12483, 12484, 12639, }; static const unsigned short dep179[] = { - 41, 42, 99, 139, 140, 160, 164, 177, 187, 192, 193, 286, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 4136, 6415, 20618, + 41, 42, 100, 140, 141, 161, 165, 178, 188, 193, 194, 288, 2141, 2142, 2143, + 2169, 2170, 2173, 2176, 4136, 12639, 20619, }; static const unsigned short dep180[] = { - 99, 286, 6239, 6428, + 100, 288, 6222, 6223, 6417, }; static const unsigned short dep181[] = { - 41, 42, 99, 139, 140, 160, 164, 177, 187, 192, 193, 286, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 4136, 6428, 20618, + 41, 42, 100, 140, 141, 161, 165, 178, 188, 193, 194, 288, 2141, 2142, 2143, + 2169, 2170, 2173, 2176, 4136, 6417, 20619, }; static const unsigned short dep182[] = { - 99, 286, 6257, 6258, 6259, 6260, 6439, 6441, 8488, + 100, 288, 6240, 6430, }; static const unsigned short dep183[] = { - 41, 42, 99, 139, 140, 160, 164, 177, 187, 192, 193, 286, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 4136, 6260, 6440, 6441, 8306, 8487, 20618, + 41, 42, 100, 140, 141, 161, 165, 178, 188, 193, 194, 288, 2141, 2142, 2143, + 2169, 2170, 2173, 2176, 4136, 6430, 20619, }; static const unsigned short dep184[] = { - 99, 286, 6261, 6262, 6442, + 100, 288, 6258, 6259, 6260, 6261, 6441, 6443, 8490, }; static const unsigned short dep185[] = { - 41, 42, 99, 139, 140, 160, 164, 177, 187, 192, 193, 286, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 4136, 6442, 20618, + 41, 42, 100, 140, 141, 161, 165, 178, 188, 193, 194, 288, 2141, 2142, 2143, + 2169, 2170, 2173, 2176, 4136, 6261, 6442, 6443, 8307, 8489, 20619, }; static const unsigned short dep186[] = { - 99, 286, 6263, 6443, + 100, 288, 6262, 6263, 6444, }; static const unsigned short dep187[] = { - 41, 42, 99, 139, 140, 160, 164, 177, 187, 192, 193, 286, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 4136, 6443, 20618, + 41, 42, 100, 140, 141, 161, 165, 178, 188, 193, 194, 288, 2141, 2142, 2143, + 2169, 2170, 2173, 2176, 4136, 6444, 20619, }; static const unsigned short dep188[] = { - 99, 286, 10352, 10534, + 100, 288, 6264, 6445, }; static const unsigned short dep189[] = { - 41, 42, 99, 139, 140, 160, 164, 177, 187, 192, 193, 286, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 4136, 10534, 20618, + 41, 42, 100, 140, 141, 161, 165, 178, 188, 193, 194, 288, 2141, 2142, 2143, + 2169, 2170, 2173, 2176, 4136, 6445, 20619, }; static const unsigned short dep190[] = { - 79, 80, 84, 85, 99, 103, 104, 273, 274, 276, 277, 286, 288, 289, + 100, 288, 10353, 10536, }; static const unsigned short dep191[] = { - 41, 42, 48, 64, 80, 82, 85, 88, 99, 101, 104, 139, 140, 160, 162, 163, 164, - 177, 187, 192, 193, 194, 273, 274, 276, 278, 286, 288, 289, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 4136, 20618, + 41, 42, 100, 140, 141, 161, 165, 178, 188, 193, 194, 288, 2141, 2142, 2143, + 2169, 2170, 2173, 2176, 4136, 10536, 20619, }; static const unsigned short dep192[] = { - 79, 80, 99, 103, 104, 106, 107, 273, 274, 286, 288, 289, 290, 291, + 80, 81, 85, 86, 100, 104, 105, 275, 276, 278, 279, 288, 290, 291, }; static const unsigned short dep193[] = { - 41, 42, 48, 64, 80, 82, 99, 101, 104, 106, 108, 139, 140, 160, 162, 163, 164, - 177, 187, 192, 193, 194, 273, 274, 286, 288, 289, 290, 291, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 4136, 20618, + 41, 42, 48, 64, 81, 83, 86, 89, 100, 102, 105, 140, 141, 161, 163, 164, 165, + 178, 188, 193, 194, 195, 275, 276, 278, 280, 288, 290, 291, 2141, 2142, 2143, + 2169, 2170, 2173, 2176, 4136, 20619, }; static const unsigned short dep194[] = { - 41, 42, 99, 139, 140, 160, 164, 177, 187, 192, 193, 286, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 2331, 4136, 12483, 20618, + 80, 81, 100, 104, 105, 107, 108, 275, 276, 288, 290, 291, 292, 293, }; static const unsigned short dep195[] = { - 41, 42, 99, 139, 140, 160, 164, 177, 187, 192, 193, 286, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 2331, 4136, 6221, 20618, + 41, 42, 48, 64, 81, 83, 100, 102, 105, 107, 109, 140, 141, 161, 163, 164, + 165, 178, 188, 193, 194, 195, 275, 276, 288, 290, 291, 292, 293, 2141, 2142, + 2143, 2169, 2170, 2173, 2176, 4136, 20619, }; static const unsigned short dep196[] = { - 41, 42, 99, 139, 140, 160, 164, 177, 187, 192, 193, 286, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 2331, 4136, 6239, 20618, + 41, 42, 100, 140, 141, 161, 165, 178, 188, 193, 194, 288, 2141, 2142, 2143, + 2169, 2170, 2173, 2176, 2333, 4136, 12484, 20619, }; static const unsigned short dep197[] = { - 41, 42, 99, 139, 140, 160, 164, 177, 187, 192, 193, 286, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 2331, 4136, 6259, 8305, 20618, + 41, 42, 100, 140, 141, 161, 165, 178, 188, 193, 194, 288, 2141, 2142, 2143, + 2169, 2170, 2173, 2176, 2333, 4136, 6222, 20619, }; static const unsigned short dep198[] = { - 41, 42, 99, 139, 140, 160, 164, 177, 187, 192, 193, 286, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 2331, 4136, 6261, 20618, + 41, 42, 100, 140, 141, 161, 165, 178, 188, 193, 194, 288, 2141, 2142, 2143, + 2169, 2170, 2173, 2176, 2333, 4136, 6240, 20619, }; static const unsigned short dep199[] = { - 41, 42, 99, 139, 140, 160, 164, 177, 185, 186, 187, 286, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 2331, 4136, 6262, 6263, 20618, + 41, 42, 100, 140, 141, 161, 165, 178, 188, 193, 194, 288, 2141, 2142, 2143, + 2169, 2170, 2173, 2176, 2333, 4136, 6260, 8306, 20619, }; static const unsigned short dep200[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, - 2331, 4136, 10352, 20618, + 41, 42, 100, 140, 141, 161, 165, 178, 188, 193, 194, 288, 2141, 2142, 2143, + 2169, 2170, 2173, 2176, 2333, 4136, 6262, 20619, }; static const unsigned short dep201[] = { - 41, 42, 99, 160, 164, 177, 187, 192, 193, 286, 2140, 2141, 2142, 2168, 2169, - 2172, 2175, 2331, 4136, 6187, 20618, + 41, 42, 100, 140, 141, 161, 165, 178, 186, 187, 188, 288, 2141, 2142, 2143, + 2169, 2170, 2173, 2176, 2333, 4136, 6263, 6264, 20619, }; static const unsigned short dep202[] = { - 79, 81, 82, 99, 100, 101, 102, 272, 273, 286, 287, 288, + 41, 42, 100, 161, 165, 178, 188, 288, 2141, 2142, 2143, 2169, 2170, 2173, + 2176, 2333, 4136, 10353, 20619, }; static const unsigned short dep203[] = { - 41, 42, 80, 81, 85, 87, 99, 102, 104, 106, 109, 139, 140, 160, 164, 177, 187, - 192, 193, 194, 272, 274, 286, 287, 289, 2140, 2141, 2142, 2168, 2169, 2172, - 2175, 4136, 20618, + 41, 42, 100, 161, 165, 178, 188, 193, 194, 288, 2141, 2142, 2143, 2169, 2170, + 2173, 2176, 2333, 4136, 6187, 20619, }; static const unsigned short dep204[] = { - 79, 81, 82, 83, 99, 100, 101, 102, 105, 272, 273, 275, 286, 287, 288, + 80, 82, 83, 100, 101, 102, 103, 274, 275, 288, 289, 290, }; static const unsigned short dep205[] = { - 41, 42, 80, 81, 83, 85, 87, 99, 102, 104, 105, 106, 109, 139, 140, 160, 164, - 177, 187, 192, 193, 194, 272, 274, 275, 286, 287, 289, 2140, 2141, 2142, 2168, - 2169, 2172, 2175, 4136, 20618, + 41, 42, 81, 82, 86, 88, 100, 103, 105, 107, 110, 140, 141, 161, 165, 178, + 188, 193, 194, 195, 274, 276, 288, 289, 291, 2141, 2142, 2143, 2169, 2170, + 2173, 2176, 4136, 20619, }; static const unsigned short dep206[] = { - 79, 81, 82, 86, 87, 88, 99, 100, 101, 102, 272, 273, 278, 279, 286, 287, 288, - + 80, 82, 83, 84, 100, 101, 102, 103, 106, 274, 275, 277, 288, 289, 290, }; static const unsigned short dep207[] = { - 41, 42, 80, 81, 85, 87, 99, 102, 104, 139, 140, 160, 164, 177, 187, 192, 193, - 194, 272, 274, 277, 279, 286, 287, 289, 2140, 2141, 2142, 2168, 2169, 2172, - 2175, 4136, 20618, + 41, 42, 81, 82, 84, 86, 88, 100, 103, 105, 106, 107, 110, 140, 141, 161, 165, + 178, 188, 193, 194, 195, 274, 276, 277, 288, 289, 291, 2141, 2142, 2143, 2169, + 2170, 2173, 2176, 4136, 20619, }; static const unsigned short dep208[] = { - 79, 81, 82, 99, 100, 101, 102, 108, 109, 110, 272, 273, 286, 287, 288, 291, - 292, + 80, 82, 83, 87, 88, 89, 100, 101, 102, 103, 274, 275, 280, 281, 288, 289, + 290, }; static const unsigned short dep209[] = { - 41, 42, 80, 81, 99, 102, 104, 106, 109, 139, 140, 160, 164, 177, 187, 192, - 193, 194, 272, 274, 286, 287, 289, 290, 292, 2140, 2141, 2142, 2168, 2169, - 2172, 2175, 4136, 20618, + 41, 42, 81, 82, 86, 88, 100, 103, 105, 140, 141, 161, 165, 178, 188, 193, + 194, 195, 274, 276, 279, 281, 288, 289, 291, 2141, 2142, 2143, 2169, 2170, + 2173, 2176, 4136, 20619, }; static const unsigned short dep210[] = { - 41, 42, 47, 72, 99, 160, 164, 177, 187, 192, 193, 194, 286, 2140, 2141, 2142, - 2168, 2169, 2172, 2175, 2331, 4136, 20618, + 80, 82, 83, 100, 101, 102, 103, 109, 110, 111, 274, 275, 288, 289, 290, 293, + 294, }; static const unsigned short dep211[] = { - 41, 42, 99, 160, 164, 177, 187, 192, 193, 194, 286, 2140, 2141, 2142, 2168, - 2169, 2172, 2175, 2331, 4136, 20618, + 41, 42, 81, 82, 100, 103, 105, 107, 110, 140, 141, 161, 165, 178, 188, 193, + 194, 195, 274, 276, 288, 289, 291, 292, 294, 2141, 2142, 2143, 2169, 2170, + 2173, 2176, 4136, 20619, }; static const unsigned short dep212[] = { - 41, 42, 72, 79, 84, 86, 99, 139, 140, 155, 157, 160, 164, 177, 187, 192, 193, - 194, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2331, 4136, 20618, + 41, 42, 47, 72, 100, 161, 165, 178, 188, 193, 194, 195, 288, 2141, 2142, 2143, + 2169, 2170, 2173, 2176, 2333, 4136, 20619, }; static const unsigned short dep213[] = { - 41, 42, 99, 160, 164, 166, 177, 187, 188, 190, 286, 2137, 2138, 2139, 2140, - 2141, 2142, 2168, 2169, 2172, 2175, 4136, 16530, 16532, 16533, 16535, 20618, - + 41, 42, 100, 161, 165, 178, 188, 193, 194, 195, 288, 2141, 2142, 2143, 2169, + 2170, 2173, 2176, 2333, 4136, 20619, }; static const unsigned short dep214[] = { - 41, 42, 72, 79, 84, 86, 99, 155, 157, 160, 164, 177, 187, 194, 286, 2140, - 2141, 2142, 2168, 2169, 2172, 2175, 4136, 20618, + 41, 42, 72, 80, 85, 87, 100, 140, 141, 156, 158, 161, 165, 178, 188, 193, + 194, 195, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2333, 4136, 20619, + }; static const unsigned short dep215[] = { - 41, 42, 80, 81, 99, 102, 139, 140, 160, 164, 177, 187, 192, 193, 272, 274, - 286, 287, 289, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 4136, 20618, + 41, 42, 100, 161, 165, 167, 178, 188, 189, 191, 288, 2138, 2139, 2140, 2141, + 2142, 2143, 2169, 2170, 2173, 2176, 4136, 16531, 16533, 16534, 16536, 20619, + }; static const unsigned short dep216[] = { - 41, 42, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, 137, 139, - 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, 193, - 194, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2331, 4136, 20618, + 41, 42, 72, 80, 85, 87, 100, 156, 158, 161, 165, 178, 188, 195, 288, 2141, + 2142, 2143, 2169, 2170, 2173, 2176, 4136, 20619, }; static const unsigned short dep217[] = { - 5, 99, 202, 286, 2142, 2331, + 41, 42, 81, 82, 100, 103, 140, 141, 161, 165, 178, 188, 193, 194, 274, 276, + 288, 289, 291, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 4136, 20619, }; static const unsigned short dep218[] = { - 41, 42, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, 137, 139, - 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, 193, - 194, 202, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2331, 4136, 20618, + 41, 42, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, 136, 138, + 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, 193, + 194, 195, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2333, 4136, 20619, }; static const unsigned short dep219[] = { - 41, 42, 45, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, 137, - 139, 140, 141, 142, 144, 145, 155, 157, 158, 160, 164, 173, 175, 177, 187, - 192, 193, 194, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2331, 4136, - 20618, + 41, 42, 45, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, 136, + 138, 140, 141, 142, 143, 145, 146, 156, 158, 159, 161, 165, 174, 176, 178, + 188, 193, 194, 195, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2333, 4136, + 20619, }; static const unsigned short dep220[] = { - 0, 99, 197, 286, 2142, 2331, + 0, 100, 198, 288, 2143, 2333, }; static const unsigned short dep221[] = { - 0, 41, 42, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, 137, - 139, 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, - 193, 194, 197, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2331, 4136, - 20618, + 0, 41, 42, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, 136, + 138, 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, + 193, 194, 195, 198, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2333, 4136, + 20619, }; static const unsigned short dep222[] = { - 0, 41, 42, 45, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, - 137, 139, 140, 141, 142, 144, 145, 155, 157, 158, 160, 164, 173, 175, 177, - 187, 192, 193, 194, 197, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2331, - 4136, 20618, + 0, 41, 42, 45, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, + 136, 138, 140, 141, 142, 143, 145, 146, 156, 158, 159, 161, 165, 174, 176, + 178, 188, 193, 194, 195, 198, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, + 2333, 4136, 20619, }; static const unsigned short dep223[] = { - 32, 41, 42, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, 137, - 139, 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, - 193, 194, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2331, 4136, 20618, - + 32, 41, 42, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, 136, + 138, 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, + 193, 194, 195, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2333, 4136, + 20619, }; static const unsigned short dep224[] = { - 0, 99, 197, 286, 2331, 26717, + 0, 100, 198, 288, 2333, 26718, }; static const unsigned short dep225[] = { - 0, 99, 111, 197, 286, 293, + 5, 100, 203, 288, 2143, 2333, }; static const unsigned short dep226[] = { - 0, 41, 42, 72, 78, 79, 84, 86, 99, 113, 130, 131, 133, 134, 135, 137, 139, - 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, 193, - 194, 197, 286, 293, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 4136, 20618, - + 41, 42, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, 136, 138, + 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, 193, + 194, 195, 203, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2333, 4136, + 20619, }; static const unsigned short dep227[] = { - 0, 5, 41, 42, 72, 78, 79, 84, 86, 99, 113, 130, 131, 133, 134, 135, 137, 139, - 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, 193, - 194, 197, 286, 293, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 4136, 20618, - + 0, 100, 112, 198, 288, 295, }; static const unsigned short dep228[] = { - 0, 32, 99, 111, 197, 237, 286, 293, + 0, 41, 42, 72, 77, 79, 80, 85, 87, 100, 114, 131, 132, 134, 135, 136, 138, + 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, 193, + 194, 195, 198, 288, 295, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 4136, 20619, + }; static const unsigned short dep229[] = { - 0, 41, 42, 72, 78, 79, 84, 86, 99, 113, 130, 131, 133, 134, 135, 137, 139, - 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, 193, - 194, 197, 237, 286, 293, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 4136, 20618, + 0, 5, 41, 42, 72, 77, 79, 80, 85, 87, 100, 114, 131, 132, 134, 135, 136, 138, + 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, 193, + 194, 195, 198, 288, 295, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 4136, 20619, }; static const unsigned short dep230[] = { - 0, 99, 111, 197, 286, 293, 2142, 2331, + 0, 32, 100, 112, 198, 238, 288, 295, }; static const unsigned short dep231[] = { - 0, 3, 41, 42, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, 137, - 139, 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, - 193, 194, 197, 286, 293, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2331, 4136, - 20618, + 0, 41, 42, 72, 77, 79, 80, 85, 87, 100, 114, 131, 132, 134, 135, 136, 138, + 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, 193, + 194, 195, 198, 238, 288, 295, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 4136, + 20619, }; static const unsigned short dep232[] = { - 0, 3, 5, 41, 42, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, - 137, 139, 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, - 192, 193, 194, 197, 286, 293, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2331, - 4136, 20618, + 0, 100, 112, 198, 288, 295, 2143, 2333, }; static const unsigned short dep233[] = { - 0, 41, 42, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, 137, - 139, 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, - 193, 194, 197, 286, 293, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2331, 4136, - 20618, + 0, 3, 41, 42, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, 136, + 138, 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, + 193, 194, 195, 198, 288, 295, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2333, + 4136, 20619, }; static const unsigned short dep234[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2137, 2138, 2139, 2168, 2169, 2172, 2175, - 2331, 4136, 16530, 16532, 16533, 16535, 20618, + 0, 3, 5, 41, 42, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, + 136, 138, 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, + 188, 193, 194, 195, 198, 288, 295, 2141, 2142, 2143, 2169, 2170, 2173, 2176, + 2333, 4136, 20619, }; static const unsigned short dep235[] = { - 0, 41, 42, 72, 78, 79, 84, 86, 99, 113, 130, 131, 133, 134, 135, 137, 139, - 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, 193, - 194, 197, 286, 293, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2331, 4136, - 20618, + 0, 41, 42, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, 136, + 138, 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, + 193, 194, 195, 198, 288, 295, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2333, + 4136, 20619, }; static const unsigned short dep236[] = { - 0, 32, 99, 111, 197, 237, 286, 293, 2142, 2331, + 41, 42, 100, 161, 165, 178, 188, 288, 2138, 2139, 2140, 2169, 2170, 2173, + 2176, 2333, 4136, 16531, 16533, 16534, 16536, 20619, }; static const unsigned short dep237[] = { - 0, 41, 42, 72, 78, 79, 84, 86, 99, 113, 130, 131, 133, 134, 135, 137, 139, - 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, 193, - 194, 197, 237, 286, 293, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2331, 4136, - 20618, + 0, 41, 42, 72, 77, 79, 80, 85, 87, 100, 114, 131, 132, 134, 135, 136, 138, + 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, 193, + 194, 195, 198, 288, 295, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2333, 4136, + 20619, }; static const unsigned short dep238[] = { - 41, 42, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, 137, 139, - 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, 193, - 194, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2329, 4136, 16530, 16532, - 16533, 16535, 18765, 18767, 18768, 18770, 20618, + 0, 32, 100, 112, 198, 238, 288, 295, 2143, 2333, }; static const unsigned short dep239[] = { - 41, 42, 45, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, 137, - 139, 140, 141, 142, 144, 145, 155, 157, 158, 160, 164, 173, 175, 177, 187, - 192, 193, 194, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2329, 4136, - 16530, 16532, 16533, 16535, 18765, 18767, 18768, 18770, 20618, + 0, 41, 42, 72, 77, 79, 80, 85, 87, 100, 114, 131, 132, 134, 135, 136, 138, + 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, 193, + 194, 195, 198, 238, 288, 295, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2333, + 4136, 20619, }; static const unsigned short dep240[] = { - 0, 99, 197, 286, 2138, 2329, 18603, 18604, 18765, 18766, 18768, 18769, + 41, 42, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, 136, 138, + 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, 193, + 194, 195, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2331, 4136, 16531, + 16533, 16534, 16536, 18767, 18769, 18770, 18772, 20619, }; static const unsigned short dep241[] = { - 0, 41, 42, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, 137, - 139, 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, - 193, 194, 197, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2329, 4136, - 16530, 16532, 16533, 16535, 18765, 18767, 18768, 18770, 20618, + 41, 42, 45, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, 136, + 138, 140, 141, 142, 143, 145, 146, 156, 158, 159, 161, 165, 174, 176, 178, + 188, 193, 194, 195, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2331, 4136, + 16531, 16533, 16534, 16536, 18767, 18769, 18770, 18772, 20619, }; static const unsigned short dep242[] = { - 0, 41, 42, 45, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, - 137, 139, 140, 141, 142, 144, 145, 155, 157, 158, 160, 164, 173, 175, 177, - 187, 192, 193, 194, 197, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2329, - 4136, 16530, 16532, 16533, 16535, 18765, 18767, 18768, 18770, 20618, + 0, 100, 198, 288, 2139, 2331, 18604, 18605, 18767, 18768, 18770, 18771, }; static const unsigned short dep243[] = { - 0, 99, 197, 286, 2139, 2329, 18603, 18604, 18765, 18766, 18768, 18769, + 0, 41, 42, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, 136, + 138, 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, + 193, 194, 195, 198, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2331, 4136, + 16531, 16533, 16534, 16536, 18767, 18769, 18770, 18772, 20619, }; static const unsigned short dep244[] = { - 99, 286, 2138, 2142, 2329, 2331, 18603, 18604, 18765, 18766, 18768, 18769, + 0, 41, 42, 45, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, + 136, 138, 140, 141, 142, 143, 145, 146, 156, 158, 159, 161, 165, 174, 176, + 178, 188, 193, 194, 195, 198, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, + 2331, 4136, 16531, 16533, 16534, 16536, 18767, 18769, 18770, 18772, 20619, }; static const unsigned short dep245[] = { - 41, 42, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, 137, 139, - 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, 193, - 194, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2329, 2331, 4136, 16530, - 16532, 16533, 16535, 18765, 18767, 18768, 18770, 20618, + 0, 100, 198, 288, 2140, 2331, 18604, 18605, 18767, 18768, 18770, 18771, }; static const unsigned short dep246[] = { - 41, 42, 45, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, 137, - 139, 140, 141, 142, 144, 145, 155, 157, 158, 160, 164, 173, 175, 177, 187, - 192, 193, 194, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2329, 2331, - 4136, 16530, 16532, 16533, 16535, 18765, 18767, 18768, 18770, 20618, + 100, 288, 2139, 2143, 2331, 2333, 18604, 18605, 18767, 18768, 18770, 18771, + }; static const unsigned short dep247[] = { - 0, 99, 197, 286, 2138, 2142, 2329, 2331, 18603, 18604, 18765, 18766, 18768, - 18769, + 41, 42, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, 136, 138, + 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, 193, + 194, 195, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2331, 2333, 4136, + 16531, 16533, 16534, 16536, 18767, 18769, 18770, 18772, 20619, }; static const unsigned short dep248[] = { - 0, 41, 42, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, 137, - 139, 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, - 193, 194, 197, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2329, 2331, - 4136, 16530, 16532, 16533, 16535, 18765, 18767, 18768, 18770, 20618, + 41, 42, 45, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, 136, + 138, 140, 141, 142, 143, 145, 146, 156, 158, 159, 161, 165, 174, 176, 178, + 188, 193, 194, 195, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2331, 2333, + 4136, 16531, 16533, 16534, 16536, 18767, 18769, 18770, 18772, 20619, }; static const unsigned short dep249[] = { - 0, 41, 42, 45, 72, 78, 79, 84, 86, 99, 111, 113, 130, 131, 133, 134, 135, - 137, 139, 140, 141, 142, 144, 145, 155, 157, 158, 160, 164, 173, 175, 177, - 187, 192, 193, 194, 197, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, 2329, - 2331, 4136, 16530, 16532, 16533, 16535, 18765, 18767, 18768, 18770, 20618, - + 0, 100, 198, 288, 2139, 2143, 2331, 2333, 18604, 18605, 18767, 18768, 18770, + 18771, }; static const unsigned short dep250[] = { - 0, 99, 197, 286, 2139, 2142, 2329, 2331, 18603, 18604, 18765, 18766, 18768, - 18769, + 0, 41, 42, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, 136, + 138, 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, + 193, 194, 195, 198, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, 2331, 2333, + 4136, 16531, 16533, 16534, 16536, 18767, 18769, 18770, 18772, 20619, }; static const unsigned short dep251[] = { - 0, 41, 42, 72, 78, 79, 84, 86, 99, 113, 130, 131, 133, 134, 135, 137, 139, - 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, 193, - 194, 197, 286, 293, 2137, 2138, 2139, 2140, 2141, 2142, 2168, 2169, 2172, - 2175, 4136, 16530, 16532, 16533, 16535, 20618, + 0, 41, 42, 45, 72, 77, 79, 80, 85, 87, 100, 112, 114, 131, 132, 134, 135, + 136, 138, 140, 141, 142, 143, 145, 146, 156, 158, 159, 161, 165, 174, 176, + 178, 188, 193, 194, 195, 198, 288, 2141, 2142, 2143, 2169, 2170, 2173, 2176, + 2331, 2333, 4136, 16531, 16533, 16534, 16536, 18767, 18769, 18770, 18772, + 20619, }; static const unsigned short dep252[] = { - 41, 42, 72, 78, 79, 84, 86, 99, 139, 140, 141, 142, 144, 145, 155, 157, 158, - 160, 164, 173, 175, 177, 187, 194, 286, 2168, 2169, 2172, 2175, 4136, + 0, 100, 198, 288, 2140, 2143, 2331, 2333, 18604, 18605, 18767, 18768, 18770, + 18771, }; static const unsigned short dep253[] = { - 41, 42, 72, 78, 79, 84, 86, 99, 139, 140, 141, 142, 144, 145, 155, 157, 158, - 160, 164, 173, 175, 177, 187, 194, 286, 2140, 2141, 2142, 2168, 2169, 2172, - 2175, 2331, 4136, 20618, + 0, 41, 42, 72, 77, 79, 80, 85, 87, 100, 114, 131, 132, 134, 135, 136, 138, + 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, 193, + 194, 195, 198, 288, 295, 2138, 2139, 2140, 2141, 2142, 2143, 2169, 2170, 2173, + 2176, 4136, 16531, 16533, 16534, 16536, 20619, }; static const unsigned short dep254[] = { - 41, 42, 99, 160, 164, 177, 187, 286, 2140, 2141, 2142, 2168, 2169, 2172, 2175, - 2329, 4136, 16530, 16532, 16533, 16535, 18765, 18767, 18768, 18770, 20618, - + 41, 42, 72, 79, 80, 85, 87, 100, 140, 141, 142, 143, 145, 146, 156, 158, 159, + 161, 165, 174, 176, 178, 188, 195, 288, 2169, 2170, 2173, 2176, 4136, }; static const unsigned short dep255[] = { - 0, 41, 42, 72, 78, 79, 84, 86, 99, 113, 130, 131, 133, 134, 135, 137, 139, - 140, 141, 142, 144, 145, 155, 157, 160, 164, 173, 175, 177, 187, 192, 193, - 194, 197, 286, 293, 2137, 2138, 2139, 2140, 2141, 2142, 2168, 2169, 2172, - 2175, 2331, 4136, 16530, 16532, 16533, 16535, 20618, + 41, 42, 72, 79, 80, 85, 87, 100, 140, 141, 142, 143, 145, 146, 156, 158, 159, + 161, 165, 174, 176, 178, 188, 195, 288, 2141, 2142, 2143, 2169, 2170, 2173, + 2176, 2333, 4136, 20619, }; static const unsigned short dep256[] = { - 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, - 22, 24, 26, 27, 28, 29, 30, 31, 32, 99, 198, 199, 200, 201, 202, 203, 204, - 205, 206, 207, 208, 209, 210, 211, 213, 214, 216, 217, 219, 220, 222, 223, - 224, 225, 226, 227, 229, 232, 233, 234, 235, 236, 237, 286, 2071, 2082, 2142, - 2276, 2287, 2331, 28868, 29022, + 41, 42, 100, 161, 165, 178, 188, 288, 2141, 2142, 2143, 2169, 2170, 2173, + 2176, 2331, 4136, 16531, 16533, 16534, 16536, 18767, 18769, 18770, 18772, + 20619, }; static const unsigned short dep257[] = { + 0, 41, 42, 72, 77, 79, 80, 85, 87, 100, 114, 131, 132, 134, 135, 136, 138, + 140, 141, 142, 143, 145, 146, 156, 158, 161, 165, 174, 176, 178, 188, 193, + 194, 195, 198, 288, 295, 2138, 2139, 2140, 2141, 2142, 2143, 2169, 2170, 2173, + 2176, 2333, 4136, 16531, 16533, 16534, 16536, 20619, +}; + +static const unsigned short dep258[] = { + 1, 6, 39, 41, 42, 100, 140, 141, 161, 165, 167, 178, 188, 189, 191, 199, 231, + 233, 245, 272, 288, 2169, 2171, 2172, 2174, 2175, 2177, 2178, 2290, 2292, + 4136, 28869, 29024, +}; + +static const unsigned short dep259[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, - 22, 24, 25, 26, 28, 29, 30, 31, 32, 41, 42, 99, 139, 140, 160, 164, 177, 182, - 183, 187, 192, 193, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208, - 209, 210, 211, 213, 214, 216, 217, 219, 220, 222, 223, 224, 225, 226, 227, - 229, 231, 233, 234, 235, 236, 237, 286, 2071, 2082, 2140, 2141, 2142, 2168, - 2169, 2172, 2175, 2276, 2287, 2331, 4136, 20618, 28868, 29022, + 22, 24, 26, 27, 28, 29, 30, 31, 32, 100, 199, 200, 201, 202, 203, 204, 205, + 206, 207, 208, 209, 210, 211, 212, 214, 215, 217, 218, 220, 221, 223, 224, + 225, 226, 227, 228, 230, 233, 234, 235, 236, 237, 238, 272, 288, 2071, 2082, + 2143, 2277, 2288, 2333, 28869, 29024, +}; + +static const unsigned short dep260[] = { + 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, + 22, 24, 25, 26, 28, 29, 30, 31, 32, 41, 42, 100, 140, 141, 161, 165, 178, + 183, 184, 188, 193, 194, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208, + 209, 210, 211, 212, 214, 215, 217, 218, 220, 221, 223, 224, 225, 226, 227, + 228, 230, 232, 234, 235, 236, 237, 238, 272, 288, 2071, 2082, 2141, 2142, + 2143, 2169, 2170, 2173, 2176, 2277, 2288, 2333, 4136, 20619, 28869, 29024, + }; #define NELS(X) (sizeof(X)/sizeof(X[0])) @@ -1848,6 +1872,7 @@ op_dependencies[] = { { NELS(dep138), dep138, NELS(dep6), dep6, }, { NELS(dep139), dep139, NELS(dep8), dep8, }, { NELS(dep140), dep140, NELS(dep10), dep10, }, + { 0, NULL, 0, NULL, }, { NELS(dep141), dep141, NELS(dep33), dep33, }, { NELS(dep143), dep143, NELS(dep142), dep142, }, { NELS(dep144), dep144, NELS(dep142), dep142, }, @@ -1858,20 +1883,20 @@ op_dependencies[] = { { NELS(dep152), dep152, NELS(dep151), dep151, }, { NELS(dep154), dep154, NELS(dep153), dep153, }, { NELS(dep156), dep156, NELS(dep155), dep155, }, - { NELS(dep157), dep157, NELS(dep155), dep155, }, - { NELS(dep158), dep158, NELS(dep0), dep0, }, - { NELS(dep160), dep160, NELS(dep159), dep159, }, + { NELS(dep158), dep158, NELS(dep157), dep157, }, + { NELS(dep159), dep159, NELS(dep157), dep157, }, + { NELS(dep160), dep160, NELS(dep0), dep0, }, { NELS(dep162), dep162, NELS(dep161), dep161, }, { NELS(dep164), dep164, NELS(dep163), dep163, }, { NELS(dep166), dep166, NELS(dep165), dep165, }, { NELS(dep168), dep168, NELS(dep167), dep167, }, - { NELS(dep169), dep169, NELS(dep0), dep0, }, - { NELS(dep170), dep170, NELS(dep0), dep0, }, + { NELS(dep170), dep170, NELS(dep169), dep169, }, { NELS(dep171), dep171, NELS(dep0), dep0, }, - { NELS(dep172), dep172, NELS(dep33), dep33, }, - { NELS(dep174), dep174, NELS(dep173), dep173, }, - { NELS(dep175), dep175, NELS(dep173), dep173, }, - { NELS(dep177), dep177, NELS(dep176), dep176, }, + { NELS(dep172), dep172, NELS(dep0), dep0, }, + { NELS(dep173), dep173, NELS(dep0), dep0, }, + { NELS(dep174), dep174, NELS(dep33), dep33, }, + { NELS(dep176), dep176, NELS(dep175), dep175, }, + { NELS(dep177), dep177, NELS(dep175), dep175, }, { NELS(dep179), dep179, NELS(dep178), dep178, }, { NELS(dep181), dep181, NELS(dep180), dep180, }, { NELS(dep183), dep183, NELS(dep182), dep182, }, @@ -1880,57 +1905,58 @@ op_dependencies[] = { { NELS(dep189), dep189, NELS(dep188), dep188, }, { NELS(dep191), dep191, NELS(dep190), dep190, }, { NELS(dep193), dep193, NELS(dep192), dep192, }, - { NELS(dep194), dep194, NELS(dep0), dep0, }, - { NELS(dep195), dep195, NELS(dep0), dep0, }, + { NELS(dep195), dep195, NELS(dep194), dep194, }, { NELS(dep196), dep196, NELS(dep0), dep0, }, { NELS(dep197), dep197, NELS(dep0), dep0, }, { NELS(dep198), dep198, NELS(dep0), dep0, }, { NELS(dep199), dep199, NELS(dep0), dep0, }, { NELS(dep200), dep200, NELS(dep0), dep0, }, { NELS(dep201), dep201, NELS(dep0), dep0, }, - { NELS(dep203), dep203, NELS(dep202), dep202, }, + { NELS(dep202), dep202, NELS(dep0), dep0, }, + { NELS(dep203), dep203, NELS(dep0), dep0, }, { NELS(dep205), dep205, NELS(dep204), dep204, }, { NELS(dep207), dep207, NELS(dep206), dep206, }, { NELS(dep209), dep209, NELS(dep208), dep208, }, - { NELS(dep210), dep210, NELS(dep0), dep0, }, - { NELS(dep211), dep211, NELS(dep0), dep0, }, + { NELS(dep211), dep211, NELS(dep210), dep210, }, { NELS(dep212), dep212, NELS(dep0), dep0, }, - { NELS(dep213), dep213, NELS(dep33), dep33, }, - { NELS(dep214), dep214, NELS(dep33), dep33, }, - { NELS(dep215), dep215, NELS(dep202), dep202, }, - { NELS(dep216), dep216, NELS(dep0), dep0, }, - { NELS(dep218), dep218, NELS(dep217), dep217, }, + { NELS(dep213), dep213, NELS(dep0), dep0, }, + { NELS(dep214), dep214, NELS(dep0), dep0, }, + { NELS(dep215), dep215, NELS(dep33), dep33, }, + { NELS(dep216), dep216, NELS(dep33), dep33, }, + { NELS(dep217), dep217, NELS(dep204), dep204, }, + { NELS(dep218), dep218, NELS(dep0), dep0, }, { NELS(dep219), dep219, NELS(dep0), dep0, }, { NELS(dep221), dep221, NELS(dep220), dep220, }, { NELS(dep222), dep222, NELS(dep220), dep220, }, { NELS(dep223), dep223, NELS(dep0), dep0, }, { NELS(dep221), dep221, NELS(dep224), dep224, }, { NELS(dep226), dep226, NELS(dep225), dep225, }, - { NELS(dep227), dep227, NELS(dep225), dep225, }, - { NELS(dep229), dep229, NELS(dep228), dep228, }, + { NELS(dep228), dep228, NELS(dep227), dep227, }, + { NELS(dep229), dep229, NELS(dep227), dep227, }, { NELS(dep231), dep231, NELS(dep230), dep230, }, - { NELS(dep232), dep232, NELS(dep230), dep230, }, - { NELS(dep233), dep233, NELS(dep230), dep230, }, - { NELS(dep234), dep234, NELS(dep0), dep0, }, - { NELS(dep235), dep235, NELS(dep230), dep230, }, - { NELS(dep237), dep237, NELS(dep236), dep236, }, - { NELS(dep238), dep238, NELS(dep64), dep64, }, - { NELS(dep239), dep239, NELS(dep64), dep64, }, - { NELS(dep241), dep241, NELS(dep240), dep240, }, - { NELS(dep242), dep242, NELS(dep240), dep240, }, - { NELS(dep241), dep241, NELS(dep243), dep243, }, - { NELS(dep245), dep245, NELS(dep244), dep244, }, - { NELS(dep246), dep246, NELS(dep244), dep244, }, - { NELS(dep248), dep248, NELS(dep247), dep247, }, - { NELS(dep249), dep249, NELS(dep247), dep247, }, - { NELS(dep248), dep248, NELS(dep250), dep250, }, - { NELS(dep251), dep251, NELS(dep225), dep225, }, - { NELS(dep252), dep252, NELS(dep33), dep33, }, - { NELS(dep253), dep253, NELS(dep0), dep0, }, - { NELS(dep254), dep254, NELS(dep64), dep64, }, - { NELS(dep255), dep255, NELS(dep230), dep230, }, - { 0, NULL, 0, NULL, }, - { NELS(dep257), dep257, NELS(dep256), dep256, }, + { NELS(dep233), dep233, NELS(dep232), dep232, }, + { NELS(dep234), dep234, NELS(dep232), dep232, }, + { NELS(dep235), dep235, NELS(dep232), dep232, }, + { NELS(dep236), dep236, NELS(dep0), dep0, }, + { NELS(dep237), dep237, NELS(dep232), dep232, }, + { NELS(dep239), dep239, NELS(dep238), dep238, }, + { NELS(dep240), dep240, NELS(dep64), dep64, }, + { NELS(dep241), dep241, NELS(dep64), dep64, }, + { NELS(dep243), dep243, NELS(dep242), dep242, }, + { NELS(dep244), dep244, NELS(dep242), dep242, }, + { NELS(dep243), dep243, NELS(dep245), dep245, }, + { NELS(dep247), dep247, NELS(dep246), dep246, }, + { NELS(dep248), dep248, NELS(dep246), dep246, }, + { NELS(dep250), dep250, NELS(dep249), dep249, }, + { NELS(dep251), dep251, NELS(dep249), dep249, }, + { NELS(dep250), dep250, NELS(dep252), dep252, }, + { NELS(dep253), dep253, NELS(dep227), dep227, }, + { NELS(dep254), dep254, NELS(dep33), dep33, }, + { NELS(dep255), dep255, NELS(dep0), dep0, }, + { NELS(dep256), dep256, NELS(dep64), dep64, }, + { NELS(dep257), dep257, NELS(dep232), dep232, }, + { NELS(dep258), dep258, NELS(dep31), dep31, }, + { NELS(dep260), dep260, NELS(dep259), dep259, }, }; static const struct ia64_completer_table @@ -1943,42 +1969,43 @@ completer_table[] = { { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 95 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 95 }, + { 0x0, 0x0, 0, -1, -1, 0, 1, 97 }, + { 0x0, 0x0, 0, -1, -1, 0, 1, 97 }, + { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, + { 0x0, 0x0, 0, 628, -1, 0, 1, 6 }, + { 0x0, 0x0, 0, 691, -1, 0, 1, 18 }, + { 0x0, 0x0, 0, -1, -1, 0, 1, 81 }, + { 0x0, 0x0, 0, 790, -1, 0, 1, 18 }, + { 0x0, 0x0, 0, 3058, -1, 0, 1, 10 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 594, -1, 0, 1, 6 }, - { 0x0, 0x0, 0, 657, -1, 0, 1, 18 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 162 }, - { 0x0, 0x0, 0, 756, -1, 0, 1, 18 }, - { 0x0, 0x0, 0, 2198, -1, 0, 1, 10 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 9 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 13 }, { 0x1, 0x1, 0, -1, -1, 13, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, 2406, -1, 0, 1, 30 }, + { 0x0, 0x0, 0, 3279, -1, 0, 1, 30 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, 1140, -1, 0, 1, 129 }, + { 0x0, 0x0, 0, 1887, -1, 0, 1, 131 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 45 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 41 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 84 }, - { 0x0, 0x0, 0, 2246, -1, 0, 1, 30 }, + { 0x0, 0x0, 0, -1, -1, 0, 1, 85 }, + { 0x0, 0x0, 0, 3111, -1, 0, 1, 30 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, 2473, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, 2250, -1, 0, 1, 30 }, + { 0x0, 0x0, 0, 3346, -1, 0, 1, 30 }, + { 0x0, 0x0, 0, 3115, -1, 0, 1, 30 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, 2252, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, 2482, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, 2485, -1, 0, 1, 30 }, + { 0x0, 0x0, 0, 3117, -1, 0, 1, 30 }, + { 0x0, 0x0, 0, 3355, -1, 0, 1, 30 }, + { 0x0, 0x0, 0, 3358, -1, 0, 1, 30 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, @@ -1987,112 +2014,116 @@ completer_table[] = { { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, 2507, -1, 0, 1, 30 }, + { 0x0, 0x0, 0, 3380, -1, 0, 1, 30 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, 2510, -1, 0, 1, 30 }, + { 0x0, 0x0, 0, 3383, -1, 0, 1, 30 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 25 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 25 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 25 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 25 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 36 }, - { 0x0, 0x0, 0, 2518, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, 1409, -1, 0, 1, 34 }, + { 0x0, 0x0, 0, 3391, -1, 0, 1, 30 }, + { 0x0, 0x0, 0, 2164, -1, 0, 1, 34 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 41 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 162 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 83 }, - { 0x0, 0x0, 0, 1457, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1466, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1475, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1477, -1, 0, 1, 132 }, - { 0x0, 0x0, 0, 1479, -1, 0, 1, 132 }, - { 0x0, 0x0, 0, 1488, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1497, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1506, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1515, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1524, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1533, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1543, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1553, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1563, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1572, -1, 0, 1, 147 }, - { 0x0, 0x0, 0, 1578, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1584, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1590, -1, 0, 1, 147 }, - { 0x0, 0x0, 0, 1596, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1602, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1608, -1, 0, 1, 147 }, - { 0x0, 0x0, 0, 1614, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1620, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1626, -1, 0, 1, 147 }, - { 0x0, 0x0, 0, 1632, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1638, -1, 0, 1, 147 }, - { 0x0, 0x0, 0, 1644, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1650, -1, 0, 1, 147 }, - { 0x0, 0x0, 0, 1656, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1662, -1, 0, 1, 147 }, - { 0x0, 0x0, 0, 1668, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1674, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1678, -1, 0, 1, 158 }, - { 0x0, 0x0, 0, 1682, -1, 0, 1, 159 }, - { 0x0, 0x0, 0, 1686, -1, 0, 1, 159 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 85 }, - { 0x0, 0x0, 0, 258, -1, 0, 1, 41 }, + { 0x0, 0x0, 0, -1, -1, 0, 1, 81 }, + { 0x0, 0x0, 0, -1, -1, 0, 1, 84 }, + { 0x0, 0x0, 0, 2212, -1, 0, 1, 133 }, + { 0x0, 0x0, 0, 2221, -1, 0, 1, 133 }, + { 0x0, 0x0, 0, 2230, -1, 0, 1, 133 }, + { 0x0, 0x0, 0, 2232, -1, 0, 1, 139 }, + { 0x0, 0x0, 0, 2234, -1, 0, 1, 139 }, + { 0x0, 0x0, 0, 2243, -1, 0, 1, 133 }, + { 0x0, 0x0, 0, 2252, -1, 0, 1, 133 }, + { 0x0, 0x0, 0, 2261, -1, 0, 1, 133 }, + { 0x0, 0x0, 0, 2270, -1, 0, 1, 133 }, + { 0x0, 0x0, 0, 2279, -1, 0, 1, 133 }, + { 0x0, 0x0, 0, 2288, -1, 0, 1, 133 }, + { 0x0, 0x0, 0, 2298, -1, 0, 1, 133 }, + { 0x0, 0x0, 0, 2308, -1, 0, 1, 133 }, + { 0x0, 0x0, 0, 2318, -1, 0, 1, 133 }, + { 0x0, 0x0, 0, 2327, -1, 0, 1, 149 }, + { 0x0, 0x0, 0, 2333, -1, 0, 1, 154 }, + { 0x0, 0x0, 0, 2339, -1, 0, 1, 154 }, + { 0x0, 0x0, 0, 2345, -1, 0, 1, 149 }, + { 0x0, 0x0, 0, 2351, -1, 0, 1, 154 }, + { 0x0, 0x0, 0, 2357, -1, 0, 1, 154 }, + { 0x0, 0x0, 0, 2363, -1, 0, 1, 149 }, + { 0x0, 0x0, 0, 2369, -1, 0, 1, 154 }, + { 0x0, 0x0, 0, 2375, -1, 0, 1, 154 }, + { 0x0, 0x0, 0, 2381, -1, 0, 1, 149 }, + { 0x0, 0x0, 0, 2387, -1, 0, 1, 154 }, + { 0x0, 0x0, 0, 2393, -1, 0, 1, 149 }, + { 0x0, 0x0, 0, 2399, -1, 0, 1, 154 }, + { 0x0, 0x0, 0, 2405, -1, 0, 1, 149 }, + { 0x0, 0x0, 0, 2411, -1, 0, 1, 154 }, + { 0x0, 0x0, 0, 2417, -1, 0, 1, 149 }, + { 0x0, 0x0, 0, 2423, -1, 0, 1, 154 }, + { 0x0, 0x0, 0, 2429, -1, 0, 1, 154 }, + { 0x0, 0x0, 0, 2430, -1, 0, 1, 160 }, + { 0x0, 0x0, 0, 2438, -1, 0, 1, 161 }, + { 0x0, 0x0, 0, 2442, -1, 0, 1, 161 }, + { 0x0, 0x0, 0, -1, -1, 0, 1, 86 }, + { 0x0, 0x0, 0, 271, -1, 0, 1, 41 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 68 }, - { 0x1, 0x1, 0, 1166, -1, 20, 1, 68 }, + { 0x1, 0x1, 0, 1913, -1, 20, 1, 68 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 69 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 70 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 70 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 71 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 72 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 73 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 93 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35, 1, 6 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 6 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 6 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 6 }, @@ -2592,7 +2652,7 @@ completer_table[] = { { 0x1, 0x1, 24, -1, -1, 35, 1, 16 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 18 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 18 }, - { 0x1, 0x1, 24, 1293, -1, 35, 1, 18 }, + { 0x1, 0x1, 24, 2040, -1, 35, 1, 18 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 18 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 18 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 18 }, @@ -2691,7 +2751,7 @@ completer_table[] = { { 0x1, 0x1, 24, -1, -1, 35, 1, 22 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 18 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 18 }, - { 0x1, 0x1, 24, 1326, -1, 35, 1, 18 }, + { 0x1, 0x1, 24, 2073, -1, 35, 1, 18 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 18 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 18 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 18 }, @@ -2716,3383 +2776,4421 @@ completer_table[] = { { 0x1, 0x1, 24, -1, -1, 35, 1, 18 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 18 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 18 }, - { 0x1, 0x1, 24, -1, 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2493, -1, 27, 1, 49 }, - { 0x3, 0x3, 220, 2494, -1, 28, 1, 49 }, - { 0x7, 0x7, 220, 2495, -1, 27, 1, 49 }, - { 0x0, 0x0, 220, 2496, -1, 0, 1, 49 }, - { 0x0, 0x0, 220, 2497, -1, 0, 1, 49 }, - { 0x0, 0x0, 220, 2498, -1, 0, 1, 49 }, - { 0x0, 0x0, 220, 2499, -1, 0, 1, 49 }, - { 0x1, 0x1, 220, 2500, -1, 28, 1, 29 }, - { 0x0, 0x0, 220, 2501, -1, 0, 1, 29 }, - { 0x3, 0x3, 220, 2502, -1, 27, 1, 29 }, - { 0x1, 0x1, 220, 2503, -1, 27, 1, 29 }, - { 0x0, 0x0, 220, 2504, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2505, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2506, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 52, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2508, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2509, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 57, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2511, -1, 0, 1, 24 }, - { 0x0, 0x0, 220, 2512, -1, 0, 1, 24 }, - { 0x0, 0x0, 220, 2513, -1, 0, 1, 24 }, - { 0x0, 0x0, 220, 2514, -1, 0, 1, 24 }, - { 0x0, 0x0, 220, 2515, -1, 0, 1, 35 }, - { 0x0, 0x0, 220, 2516, -1, 0, 1, 66 }, - { 0x0, 0x0, 220, 2517, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 64, -1, 0, 1, 29 }, - { 0x1, 0x1, 221, 2519, -1, 34, 1, 66 }, - { 0x1, 0x1, 221, 2520, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2521, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2522, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2523, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2524, -1, 34, 1, 46 }, - { 0x1, 0x1, 221, 2525, -1, 34, 1, 42 }, - { 0x400001, 0x400001, 221, 2526, -1, 12, 1, 61 }, - { 0x1, 0x1, 221, 2527, -1, 34, 1, 56 }, - { 0x1400001, 0x1400001, 221, 2528, -1, 12, 1, 61 }, - { 0x5, 0x5, 221, 2529, -1, 34, 1, 56 }, - { 0x600001, 0x600001, 221, 2530, -1, 12, 1, 61 }, - { 0x3, 0x3, 221, 2531, -1, 33, 1, 56 }, - { 0x1600001, 0x1600001, 221, 2532, -1, 12, 1, 51 }, - { 0xb, 0xb, 221, 2533, -1, 33, 1, 51 }, - { 0x1, 0x1, 221, 2534, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2535, -1, 34, 1, 56 }, - { 0x1, 0x1, 221, 2536, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2537, -1, 34, 1, 56 }, - { 0x1, 0x1, 221, 2538, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2539, -1, 34, 1, 56 }, - { 0x1, 0x1, 221, 2540, -1, 34, 1, 51 }, - { 0x1, 0x1, 221, 2541, -1, 34, 1, 51 }, - { 0x400001, 0x400001, 221, 2542, -1, 12, 1, 61 }, - { 0x1, 0x1, 221, 2543, -1, 34, 1, 56 }, - { 0x600001, 0x1600001, 221, 2544, -1, 12, 1, 61 }, - { 0x3, 0xb, 221, 2545, -1, 33, 1, 56 }, - { 0x1, 0x1, 221, 2546, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2547, -1, 34, 1, 56 }, - { 0x1, 0x1, 221, 2548, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2549, -1, 34, 1, 56 }, - { 0x400001, 0x400001, 221, 2550, -1, 12, 1, 61 }, - { 0x1, 0x1, 221, 2551, -1, 34, 1, 56 }, - { 0x1400001, 0x1400001, 221, 2552, -1, 12, 1, 61 }, - { 0x5, 0x5, 221, 2553, -1, 34, 1, 56 }, - { 0x600001, 0x600001, 221, 2554, -1, 12, 1, 61 }, - { 0x3, 0x3, 221, 2555, -1, 33, 1, 56 }, - { 0x1600001, 0x1600001, 221, 2556, -1, 12, 1, 51 }, - { 0xb, 0xb, 221, 2557, -1, 33, 1, 51 }, - { 0x1, 0x1, 221, 2558, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2559, -1, 34, 1, 56 }, - { 0x1, 0x1, 221, 2560, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2561, -1, 34, 1, 56 }, - { 0x1, 0x1, 221, 2562, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2563, -1, 34, 1, 56 }, - { 0x1, 0x1, 221, 2564, -1, 34, 1, 51 }, - { 0x1, 0x1, 221, 2565, -1, 34, 1, 51 }, - { 0x400001, 0x400001, 221, 2566, -1, 12, 1, 61 }, - { 0x1, 0x1, 221, 2567, -1, 34, 1, 56 }, - { 0x600001, 0x1600001, 221, 2568, -1, 12, 1, 61 }, - { 0x3, 0xb, 221, 2569, -1, 33, 1, 56 }, - { 0x1, 0x1, 221, 2570, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2571, -1, 34, 1, 56 }, - { 0x1, 0x1, 221, 2572, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2573, -1, 34, 1, 56 }, - { 0x41, 0x41, 221, 2574, -1, 28, 1, 31 }, - { 0x1, 0x1, 221, 2575, -1, 34, 1, 31 }, - { 0x83, 0x83, 221, 2576, -1, 27, 1, 31 }, - { 0x81, 0x81, 221, 2577, -1, 27, 1, 31 }, - { 0x1, 0x1, 221, 2578, -1, 34, 1, 66 }, - { 0x1, 0x1, 221, 2579, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2580, -1, 34, 1, 31 }, - { 0x5, 0x5, 221, 2581, -1, 34, 1, 66 }, - { 0x9, 0x9, 221, 2582, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2583, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2584, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2585, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2586, -1, 34, 1, 66 }, - { 0x1, 0x1, 221, 2587, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2588, -1, 34, 1, 31 }, - { 0x5, 0x5, 221, 2589, -1, 34, 1, 66 }, - { 0x9, 0x9, 221, 2590, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2591, -1, 34, 1, 31 }, - { 0x5, 0x5, 221, 2592, -1, 34, 1, 66 }, - { 0x9, 0x9, 221, 2593, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2594, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2595, -1, 34, 1, 66 }, - { 0x1, 0x1, 221, 2596, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2597, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2598, -1, 34, 1, 66 }, - { 0x1, 0x1, 221, 2599, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2600, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2601, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2602, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2603, -1, 34, 1, 51 }, - { 0x81, 0x81, 221, 2604, -1, 27, 1, 51 }, - { 0x41, 0x41, 221, 2605, -1, 28, 1, 51 }, - { 0x83, 0x83, 221, 2606, -1, 27, 1, 51 }, - { 0x21, 0x21, 221, 2607, -1, 29, 1, 51 }, - { 0x85, 0x85, 221, 2608, -1, 27, 1, 51 }, - { 0x43, 0x43, 221, 2609, -1, 28, 1, 51 }, - { 0x87, 0x87, 221, 2610, -1, 27, 1, 51 }, - { 0x1, 0x1, 221, 2611, -1, 34, 1, 51 }, - { 0x1, 0x1, 221, 2612, -1, 34, 1, 51 }, - { 0x1, 0x1, 221, 2613, -1, 34, 1, 51 }, - { 0x1, 0x1, 221, 2614, -1, 34, 1, 51 }, - { 0x41, 0x41, 221, 2615, -1, 28, 1, 31 }, - { 0x1, 0x1, 221, 2616, -1, 34, 1, 31 }, - { 0x83, 0x83, 221, 2617, -1, 27, 1, 31 }, - { 0x81, 0x81, 221, 2618, -1, 27, 1, 31 }, - { 0x1, 0x1, 221, 2619, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2620, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2621, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2622, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2623, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2624, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2625, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2626, -1, 34, 1, 26 }, - { 0x1, 0x1, 221, 2627, -1, 34, 1, 26 }, - { 0x1, 0x1, 221, 2628, -1, 34, 1, 26 }, - { 0x1, 0x1, 221, 2629, -1, 34, 1, 26 }, - { 0x1, 0x1, 221, 2630, -1, 34, 1, 37 }, - { 0x1, 0x1, 221, 2631, -1, 34, 1, 66 }, - { 0x1, 0x1, 221, 2632, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2633, -1, 34, 1, 31 }, - { 0x1, 0x1, 222, 2634, -1, 35, 1, 66 }, - { 0x1, 0x1, 222, 2635, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2636, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2637, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2638, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2639, -1, 35, 1, 47 }, - { 0x1, 0x1, 222, 2640, -1, 35, 1, 43 }, - { 0x800001, 0x800001, 222, 2641, -1, 12, 1, 62 }, - { 0x1, 0x1, 222, 2642, -1, 35, 1, 57 }, - { 0x1800001, 0x1800001, 222, 2643, -1, 12, 1, 62 }, - { 0x3, 0x3, 222, 2644, -1, 35, 1, 57 }, - { 0xa00001, 0xa00001, 222, 2645, -1, 12, 1, 62 }, - { 0x5, 0x5, 222, 2646, -1, 33, 1, 57 }, - { 0x1a00001, 0x1a00001, 222, 2647, -1, 12, 1, 52 }, - { 0xd, 0xd, 222, 2648, -1, 33, 1, 52 }, - { 0x1, 0x1, 222, 2649, -1, 35, 1, 62 }, - { 0x1, 0x1, 222, 2650, -1, 35, 1, 57 }, - { 0x1, 0x1, 222, 2651, -1, 35, 1, 62 }, - { 0x1, 0x1, 222, 2652, -1, 35, 1, 57 }, - { 0x1, 0x1, 222, 2653, -1, 35, 1, 62 }, - { 0x1, 0x1, 222, 2654, -1, 35, 1, 57 }, - { 0x1, 0x1, 222, 2655, -1, 35, 1, 52 }, - { 0x1, 0x1, 222, 2656, -1, 35, 1, 52 }, - { 0x800001, 0x800001, 222, 2657, -1, 12, 1, 62 }, - { 0x1, 0x1, 222, 2658, -1, 35, 1, 57 }, - { 0xa00001, 0x1a00001, 222, 2659, -1, 12, 1, 62 }, - { 0x5, 0xd, 222, 2660, -1, 33, 1, 57 }, - { 0x1, 0x1, 222, 2661, -1, 35, 1, 62 }, - { 0x1, 0x1, 222, 2662, -1, 35, 1, 57 }, - { 0x1, 0x1, 222, 2663, -1, 35, 1, 62 }, - { 0x1, 0x1, 222, 2664, -1, 35, 1, 57 }, - { 0x800001, 0x800001, 222, 2665, -1, 12, 1, 62 }, - { 0x1, 0x1, 222, 2666, -1, 35, 1, 57 }, - { 0x1800001, 0x1800001, 222, 2667, -1, 12, 1, 62 }, - { 0x3, 0x3, 222, 2668, -1, 35, 1, 57 }, - { 0xa00001, 0xa00001, 222, 2669, -1, 12, 1, 62 }, - { 0x5, 0x5, 222, 2670, -1, 33, 1, 57 }, - { 0x1a00001, 0x1a00001, 222, 2671, -1, 12, 1, 52 }, - { 0xd, 0xd, 222, 2672, -1, 33, 1, 52 }, - { 0x1, 0x1, 222, 2673, -1, 35, 1, 62 }, - { 0x1, 0x1, 222, 2674, -1, 35, 1, 57 }, - { 0x1, 0x1, 222, 2675, -1, 35, 1, 62 }, - { 0x1, 0x1, 222, 2676, -1, 35, 1, 57 }, - { 0x1, 0x1, 222, 2677, -1, 35, 1, 62 }, - { 0x1, 0x1, 222, 2678, -1, 35, 1, 57 }, - { 0x1, 0x1, 222, 2679, -1, 35, 1, 52 }, - { 0x1, 0x1, 222, 2680, -1, 35, 1, 52 }, - { 0x800001, 0x800001, 222, 2681, -1, 12, 1, 62 }, - { 0x1, 0x1, 222, 2682, -1, 35, 1, 57 }, - { 0xa00001, 0x1a00001, 222, 2683, -1, 12, 1, 62 }, - { 0x5, 0xd, 222, 2684, -1, 33, 1, 57 }, - { 0x1, 0x1, 222, 2685, -1, 35, 1, 62 }, - { 0x1, 0x1, 222, 2686, -1, 35, 1, 57 }, - { 0x1, 0x1, 222, 2687, -1, 35, 1, 62 }, - { 0x1, 0x1, 222, 2688, -1, 35, 1, 57 }, - { 0x81, 0x81, 222, 2689, -1, 28, 1, 32 }, - { 0x1, 0x1, 222, 2690, -1, 35, 1, 32 }, - { 0x103, 0x103, 222, 2691, -1, 27, 1, 32 }, - { 0x101, 0x101, 222, 2692, -1, 27, 1, 32 }, - { 0x1, 0x1, 222, 2693, -1, 35, 1, 66 }, - { 0x1, 0x1, 222, 2694, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2695, -1, 35, 1, 32 }, - { 0x3, 0x3, 222, 2696, -1, 35, 1, 66 }, - { 0x5, 0x5, 222, 2697, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2698, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2699, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2700, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2701, -1, 35, 1, 66 }, - { 0x1, 0x1, 222, 2702, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2703, -1, 35, 1, 32 }, - { 0x3, 0x3, 222, 2704, -1, 35, 1, 66 }, - { 0x5, 0x5, 222, 2705, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2706, -1, 35, 1, 32 }, - { 0x3, 0x3, 222, 2707, -1, 35, 1, 66 }, - { 0x5, 0x5, 222, 2708, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2709, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2710, -1, 35, 1, 66 }, - { 0x1, 0x1, 222, 2711, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2712, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2713, -1, 35, 1, 66 }, - { 0x1, 0x1, 222, 2714, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2715, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2716, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2717, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2718, -1, 35, 1, 52 }, - { 0x101, 0x101, 222, 2719, -1, 27, 1, 52 }, - { 0x81, 0x81, 222, 2720, -1, 28, 1, 52 }, - { 0x103, 0x103, 222, 2721, -1, 27, 1, 52 }, - { 0x41, 0x41, 222, 2722, -1, 29, 1, 52 }, - { 0x105, 0x105, 222, 2723, -1, 27, 1, 52 }, - { 0x83, 0x83, 222, 2724, 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3701, 823, 0, 1, 164 }, + { 0x1, 0x1, 247, 1651, 1902, 27, 1, 17 }, + { 0x0, 0x0, 247, 1652, 1900, 0, 1, 17 }, + { 0x0, 0x0, 247, 1967, 1904, 0, 1, 23 }, + { 0x0, 0x1, 247, 1912, 1910, 20, 1, 68 }, + { 0x0, 0x0, 247, 112, 1908, 0, 1, 68 }, + { 0x1, 0x1, 250, -1, -1, 29, 1, 0 }, + { 0x0, 0x0, 250, -1, -1, 0, 1, 0 }, + { 0x1, 0x1, 250, 3905, -1, 27, 1, 0 }, + { 0x1, 0x1, 250, 3906, -1, 27, 1, 0 }, + { 0x1, 0x1, 250, 3907, -1, 27, 1, 0 }, + { 0x1, 0x1, 250, 3908, -1, 27, 1, 0 }, + { 0x0, 0x0, 273, -1, 3217, 0, 0, -1 }, + { 0x0, 0x0, 273, -1, 3219, 0, 0, -1 }, + { 0x1, 0x1, 273, -1, -1, 28, 1, 30 }, + { 0x1, 0x1, 273, -1, -1, 28, 1, 30 }, + { 0x0, 0x0, 273, -1, 3258, 0, 0, -1 }, + { 0x0, 0x0, 273, -1, 3260, 0, 0, -1 }, + { 0x1, 0x1, 273, -1, -1, 28, 1, 30 }, + { 0x1, 0x1, 273, -1, -1, 28, 1, 30 }, + { 0x0, 0x0, 275, 24, -1, 0, 1, 0 }, + { 0x0, 0x0, 275, -1, -1, 0, 1, 0 }, + { 0x0, 0x0, 275, -1, -1, 0, 1, 0 }, + { 0x0, 0x1, 275, -1, -1, 29, 1, 0 }, + { 0x0, 0x1, 275, -1, -1, 29, 1, 0 }, + { 0x0, 0x1, 275, -1, -1, 29, 1, 0 }, + { 0x0, 0x1, 275, -1, -1, 29, 1, 0 }, + { 0x0, 0x1, 275, -1, -1, 29, 1, 0 }, + { 0x0, 0x0, 275, 185, -1, 0, 1, 0 }, + { 0x0, 0x1, 275, -1, -1, 29, 1, 0 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, 323, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, 345, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, 371, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, 393, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 65 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 65 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 65 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 65 }, + { 0x0, 0x0, 276, -1, 3169, 0, 0, -1 }, + { 0x0, 0x0, 276, -1, 3171, 0, 0, -1 }, + { 0x0, 0x0, 276, -1, 3173, 0, 0, -1 }, + { 0x0, 0x0, 276, -1, 3175, 0, 0, -1 }, + { 0x1, 0x1, 276, -1, 3177, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, 3179, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, 3181, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, 3183, 12, 1, 50 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 50 }, + { 0x0, 0x0, 276, -1, 3185, 0, 0, -1 }, + { 0x0, 0x0, 276, -1, 3187, 0, 0, -1 }, + { 0x1, 0x1, 276, -1, 3189, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, 3191, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 60 }, + { 0x0, 0x0, 276, -1, 3193, 0, 0, -1 }, + { 0x0, 0x0, 276, -1, 3195, 0, 0, -1 }, + { 0x0, 0x0, 276, -1, 3197, 0, 0, -1 }, + { 0x0, 0x0, 276, -1, 3199, 0, 0, -1 }, + { 0x1, 0x1, 276, -1, 3201, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, 3203, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, 3205, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, 3207, 12, 1, 50 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 50 }, + { 0x0, 0x0, 276, -1, 3209, 0, 0, -1 }, + { 0x0, 0x0, 276, -1, 3211, 0, 0, -1 }, + { 0x1, 0x1, 276, -1, 3213, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, 3215, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 60 }, + { 0x1, 0x1, 276, -1, -1, 12, 1, 60 }, + { 0x1, 0x1, 276, 415, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, 417, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, 539, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, 541, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, 423, -1, 12, 1, 77 }, + { 0x1, 0x1, 276, 425, -1, 12, 1, 77 }, + { 0x1, 0x1, 276, 547, -1, 12, 1, 77 }, + { 0x1, 0x1, 276, 549, -1, 12, 1, 77 }, + { 0x1, 0x1, 276, 431, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, 433, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, 555, -1, 12, 1, 2 }, + { 0x1, 0x1, 276, 557, -1, 12, 1, 2 }, + { 0x0, 0x0, 277, -1, 3176, 0, 0, -1 }, + { 0x9, 0x9, 277, -1, 3184, 33, 1, 50 }, + { 0x9, 0x9, 277, -1, 3858, 33, 1, 50 }, + { 0x0, 0x0, 277, 2154, 3249, 0, 0, -1 }, + { 0x3, 0x3, 277, 2155, -1, 27, 1, 50 }, + { 0x0, 0x0, 281, 3739, -1, 0, 1, 0 }, + { 0x3, 0x3, 282, -1, -1, 27, 1, 0 }, + { 0x3, 0x3, 282, -1, -1, 27, 1, 0 }, + { 0x3, 0x3, 282, -1, -1, 27, 1, 0 }, + { 0x3, 0x3, 282, -1, -1, 27, 1, 0 }, + { 0x1, 0x1, 283, 3901, -1, 28, 1, 0 }, + { 0x1, 0x1, 283, 3902, -1, 28, 1, 0 }, + { 0x1, 0x1, 283, 3903, -1, 28, 1, 0 }, + { 0x1, 0x1, 283, 3904, -1, 28, 1, 0 }, + { 0x1, 0x1, 285, -1, -1, 27, 1, 102 }, + { 0x1, 0x1, 285, -1, -1, 27, 1, 102 }, + { 0x0, 0x0, 285, -1, 1713, 0, 0, -1 }, + { 0x0, 0x0, 286, 3914, 3716, 0, 0, -1 }, + { 0x0, 0x0, 286, 3915, 3718, 0, 0, -1 }, + { 0x0, 0x0, 287, -1, 3717, 0, 0, -1 }, + { 0x0, 0x0, 287, -1, 3719, 0, 0, -1 }, + { 0x0, 0x0, 288, -1, -1, 0, 1, 41 }, + { 0x0, 0x0, 288, -1, -1, 0, 1, 41 }, + { 0x0, 0x0, 288, -1, -1, 0, 1, 41 }, + { 0x0, 0x0, 293, -1, -1, 0, 1, 34 }, + { 0x0, 0x0, 297, -1, 3223, 0, 1, 30 }, + { 0x0, 0x0, 298, -1, -1, 0, 1, 0 }, + { 0x0, 0x0, 298, -1, -1, 0, 1, 72 }, + { 0x0, 0x0, 298, 2861, 3883, 0, 1, 1 }, + { 0x0, 0x0, 298, 2862, 3884, 0, 1, 1 }, + { 0x0, 0x0, 298, -1, 540, 0, 0, -1 }, + { 0x0, 0x0, 298, -1, 542, 0, 0, -1 }, + { 0x0, 0x0, 298, 2865, 3887, 0, 1, 76 }, + { 0x0, 0x0, 298, 2866, 3888, 0, 1, 76 }, + { 0x0, 0x0, 298, -1, 548, 0, 0, -1 }, + { 0x0, 0x0, 298, -1, 550, 0, 0, -1 }, + { 0x0, 0x0, 298, 2869, 3891, 0, 1, 1 }, + { 0x0, 0x0, 298, 2870, 3892, 0, 1, 1 }, + { 0x0, 0x0, 298, -1, 556, 0, 0, -1 }, + { 0x0, 0x0, 298, -1, 558, 0, 0, -1 }, }; static const struct ia64_main_table main_table[] = { { 5, 1, 1, 0x0000010000000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 0, }, { 5, 1, 1, 0x0000010008000000ull, 0x000001eff8000000ull, { 24, 25, 26, 4, 0 }, 0x0, 1, }, - { 5, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 24, 67, 27, 0, 0 }, 0x0, 2, }, - { 5, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 24, 64, 26, 0, 0 }, 0x0, 3, }, - { 6, 1, 1, 0x0000012000000000ull, 0x000001e000000000ull, { 24, 67, 27, 0, 0 }, 0x0, 4, }, + { 5, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 24, 71, 27, 0, 0 }, 0x0, 2, }, + { 5, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 24, 66, 26, 0, 0 }, 0x0, 3, }, + { 6, 1, 1, 0x0000012000000000ull, 0x000001e000000000ull, { 24, 71, 27, 0, 0 }, 0x0, 4, }, { 7, 1, 1, 0x0000010040000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 5, }, - { 7, 1, 1, 0x0000010c00000000ull, 0x000001ee00000000ull, { 24, 64, 26, 0, 0 }, 0x0, 6, }, - { 8, 1, 1, 0x0000010800000000ull, 0x000001ee00000000ull, { 24, 64, 26, 0, 0 }, 0x0, 7, }, - { 9, 3, 1, 0x0000002c00000000ull, 0x000001ee00000000ull, { 24, 3, 53, 54, 55 }, 0x221, 8, }, - { 9, 3, 1, 0x0000002c00000000ull, 0x000001ee00000000ull, { 24, 53, 54, 55, 0 }, 0x261, 9, }, + { 7, 1, 1, 0x0000010c00000000ull, 0x000001ee00000000ull, { 24, 66, 26, 0, 0 }, 0x0, 6, }, + { 8, 1, 1, 0x0000010800000000ull, 0x000001ee00000000ull, { 24, 66, 26, 0, 0 }, 0x0, 7, }, + { 9, 3, 1, 0x0000002c00000000ull, 0x000001ee00000000ull, { 24, 3, 55, 56, 57 }, 0x221, 8, }, + { 9, 3, 1, 0x0000002c00000000ull, 0x000001ee00000000ull, { 24, 55, 56, 57, 0 }, 0x261, 9, }, { 10, 1, 1, 0x0000010060000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 10, }, - { 10, 1, 1, 0x0000010160000000ull, 0x000001eff8000000ull, { 24, 56, 26, 0, 0 }, 0x0, 11, }, + { 10, 1, 1, 0x0000010160000000ull, 0x000001eff8000000ull, { 24, 58, 26, 0, 0 }, 0x0, 11, }, { 11, 1, 1, 0x0000010068000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 12, }, - { 11, 1, 1, 0x0000010168000000ull, 0x000001eff8000000ull, { 24, 56, 26, 0, 0 }, 0x0, 13, }, - { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011ffull, { 16, 0, 0, 0, 0 }, 0x40, 969, }, - { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x0, 825, }, - { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x40, 826, }, - { 14, 4, 0, 0x0000000108000100ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x200, 2234, }, - { 14, 4, 0, 0x0000000108000100ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x240, 2235, }, - { 14, 4, 1, 0x0000002100000000ull, 0x000001ef00001000ull, { 15, 16, 0, 0, 0 }, 0x0, 582, }, - { 14, 4, 1, 0x0000002100000000ull, 0x000001ef00001000ull, { 15, 16, 0, 0, 0 }, 0x40, 583, }, - { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011ffull, { 82, 0, 0, 0, 0 }, 0x40, 990, }, - { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x0, 827, }, - { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x40, 828, }, - { 14, 4, 0, 0x0000008000000080ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x210, 3029, }, - { 14, 4, 0, 0x0000008000000080ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x250, 3030, }, - { 14, 4, 0, 0x0000008000000140ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x30, 590, }, - { 14, 4, 0, 0x0000008000000140ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x70, 591, }, - { 14, 4, 0, 0x0000008000000180ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x230, 588, }, - { 14, 4, 0, 0x0000008000000180ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x270, 589, }, - { 14, 4, 1, 0x000000a000000000ull, 0x000001ee00001000ull, { 15, 82, 0, 0, 0 }, 0x0, 584, }, - { 14, 4, 1, 0x000000a000000000ull, 0x000001ee00001000ull, { 15, 82, 0, 0, 0 }, 0x40, 585, }, - { 15, 4, 0, 0x0000000000000000ull, 0x000001e1f8000000ull, { 66, 0, 0, 0, 0 }, 0x0, 537, }, - { 15, 5, 0, 0x0000000000000000ull, 0x000001e3f8000000ull, { 66, 0, 0, 0, 0 }, 0x0, 960, }, - { 15, 2, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 66, 0, 0, 0, 0 }, 0x2, 1138, }, - { 15, 3, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 66, 0, 0, 0, 0 }, 0x0, 1263, }, - { 15, 6, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 70, 0, 0, 0, 0 }, 0x0, 3033, }, - { 15, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 66, 0, 0, 0, 0 }, 0x0, 16, }, - { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011ffull, { 83, 0, 0, 0, 0 }, 0x40, 1023, }, - { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011c0ull, { 83, 0, 0, 0, 0 }, 0x0, 829, }, - { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011c0ull, { 83, 0, 0, 0, 0 }, 0x40, 830, }, - { 16, 6, 1, 0x000001a000000000ull, 0x000001ee00001000ull, { 15, 83, 0, 0, 0 }, 0x0, 586, }, - { 16, 6, 1, 0x000001a000000000ull, 0x000001ee00001000ull, { 15, 83, 0, 0, 0 }, 0x40, 587, }, - { 17, 4, 0, 0x0000004080000000ull, 0x000001e9f8000018ull, { 16, 78, 0, 0, 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0x000001eff0000000ull, { 29, 19, 64, 0, 0 }, 0x400, 204, }, + { 260, 3, 1, 0x000000cc80000000ull, 0x000001fff8001000ull, { 29, 19, 0, 0, 0 }, 0x0, 205, }, + { 260, 3, 1, 0x000000cc90000000ull, 0x000001fff8001000ull, { 29, 19, 0, 0, 0 }, 0x40, 2460, }, + { 260, 3, 1, 0x000000ec80000000ull, 0x000001eff0000000ull, { 29, 19, 64, 0, 0 }, 0x400, 206, }, + { 261, 1, 1, 0x0000010028000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 207, }, + { 261, 1, 1, 0x0000010020000000ull, 0x000001eff8000000ull, { 24, 25, 26, 4, 0 }, 0x0, 208, }, + { 261, 1, 1, 0x0000010128000000ull, 0x000001eff8000000ull, { 24, 58, 26, 0, 0 }, 0x0, 209, }, + { 262, 3, 0, 0x0000000020000000ull, 0x000001ee78000000ull, { 72, 0, 0, 0, 0 }, 0x0, 210, }, + { 263, 2, 1, 0x00000000a0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 211, }, + { 264, 2, 1, 0x00000000a8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 212, }, + { 265, 2, 1, 0x00000000b0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 213, }, + { 266, 3, 0, 0x0000000198000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 1897, }, + { 267, 3, 1, 0x00000020f8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x8, 214, }, + { 268, 2, 2, 0x000000a000000000ull, 0x000001fe00003000ull, { 22, 23, 26, 81, 0 }, 0x0, 3923, }, + { 268, 2, 1, 0x000000a000000000ull, 0x000001fe00003000ull, { 22, 26, 81, 0, 0 }, 0x40, 3924, }, + { 268, 2, 2, 0x000000a000000000ull, 0x000001fe00003000ull, { 23, 22, 26, 81, 0 }, 0x40, 2863, }, + { 268, 2, 1, 0x000000a000000000ull, 0x000001fe00003000ull, { 23, 26, 81, 0, 0 }, 0x40, 2864, }, + { 269, 2, 2, 0x000000a000082000ull, 0x000001fe00083000ull, { 22, 23, 52, 0, 0 }, 0x0, 3927, }, + { 269, 2, 1, 0x000000a000082000ull, 0x000001fe00083000ull, { 22, 52, 0, 0, 0 }, 0x40, 3928, }, + { 269, 2, 2, 0x000000a000082000ull, 0x000001fe00083000ull, { 23, 22, 52, 0, 0 }, 0x40, 2867, }, + { 269, 2, 1, 0x000000a000082000ull, 0x000001fe00083000ull, { 23, 52, 0, 0, 0 }, 0x40, 2868, }, + { 270, 3, 1, 0x00000020d0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 215, }, + { 271, 2, 2, 0x000000a000002000ull, 0x000001fe00003000ull, { 22, 23, 26, 0, 0 }, 0x0, 3931, }, + { 271, 2, 1, 0x000000a000002000ull, 0x000001fe00003000ull, { 22, 26, 0, 0, 0 }, 0x40, 3932, }, + { 271, 2, 2, 0x000000a000002000ull, 0x000001fe00003000ull, { 23, 22, 26, 0, 0 }, 0x40, 2871, }, + { 271, 2, 1, 0x000000a000002000ull, 0x000001fe00003000ull, { 23, 26, 0, 0, 0 }, 0x40, 2872, }, + { 272, 3, 1, 0x00000020f0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x8, 216, }, + { 274, 3, 1, 0x00000020d8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 217, }, + { 278, 2, 1, 0x000000e840000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1878, }, + { 279, 2, 1, 0x000000ea40000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1879, }, + { 280, 2, 1, 0x000000f840000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1880, }, + { 284, 4, 0, 0x00000000c0000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x28, 228, }, + { 289, 3, 1, 0x0000008208000000ull, 0x000001fff8000000ull, { 24, 29, 25, 0, 0 }, 0x0, 218, }, + { 290, 3, 1, 0x0000008248000000ull, 0x000001fff8000000ull, { 24, 29, 25, 0, 0 }, 0x0, 219, }, + { 291, 3, 1, 0x0000008288000000ull, 0x000001fff8000000ull, { 24, 29, 25, 0, 0 }, 0x0, 220, }, + { 292, 3, 1, 0x00000082c8000000ull, 0x000001fff8000000ull, { 24, 29, 25, 0, 0 }, 0x0, 221, }, + { 294, 5, 1, 0x000001d000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 1926, }, + { 294, 5, 1, 0x000001d000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x40, 2008, }, + { 295, 5, 1, 0x000001d000000000ull, 0x000001fc000fe000ull, { 18, 20, 21, 0, 0 }, 0x40, 1927, }, + { 296, 1, 1, 0x0000010078000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 222, }, + { 296, 1, 1, 0x0000010178000000ull, 0x000001eff8000000ull, { 24, 58, 26, 0, 0 }, 0x0, 223, }, + { 299, 2, 1, 0x0000000080000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 224, }, + { 300, 2, 1, 0x0000000088000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 225, }, + { 301, 2, 1, 0x0000000090000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 226, }, }; static const char dis_table[] = { -0xa0, 0xc7, 0xc8, 0xa0, 0x2e, 0xd8, 0xa0, 0x2c, 0xc0, 0xa0, 0x1c, 0x00, -0x98, 0xb0, 0x02, 0x50, 0x90, 0x50, 0x90, 0x28, 0x24, 0x39, 0x28, 0x24, -0x39, 0x20, 0x90, 0x28, 0x24, 0x39, 0x18, 0x24, 0x39, 0x10, 0x91, 0x60, -0x90, 0x28, 0x24, 0x39, 0x00, 0x10, 0x10, 0x58, 0x41, 0x61, 0xc7, 0xc0, +0xa1, 0x02, 0x78, 0xa0, 0x2f, 0x28, 0xa0, 0x2d, 0x10, 0xa0, 0x1c, 0x40, +0x98, 0xb0, 0x02, 0x50, 0x90, 0x50, 0x90, 0x28, 0x24, 0x52, 0x40, 0x24, +0x52, 0x38, 0x90, 0x28, 0x24, 0x52, 0x30, 0x24, 0x52, 0x28, 0x91, 0x60, +0x90, 0x28, 0x24, 0x52, 0x18, 0x10, 0x10, 0x58, 0x41, 0x62, 0x90, 0x80, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x52, 0xc0, 0xc0, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, -0x10, 0x10, 0x10, 0x24, 0x24, 0x70, 0x90, 0x28, 0x24, 0x38, 0xf0, 0x24, -0x38, 0xe8, 0xa8, 0x0b, 0x48, 0x15, 0x20, 0x97, 0x20, 0x95, 0xc8, 0x9a, -0xb8, 0x05, 0x38, 0x91, 0x18, 0x90, 0xa0, 0x90, 0x60, 0x80, 0x90, 0x20, -0x34, 0xa6, 0xa4, 0x25, 0x00, 0x34, 0xa3, 0x80, 0xa4, 0x36, 0xa0, 0x36, -0xd9, 0x90, 0x50, 0x90, 0x28, 0x80, 0x36, 0xcf, 0x80, 0x34, 0x86, 0x81, -0x33, 0xe2, 0x90, 0xe0, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x24, 0x10, 0x34, -0x83, 0xa4, 0x1f, 0x08, 0x34, 0x80, 0x90, 0x38, 0xa4, 0x38, 0xa0, 0x37, -0x1a, 0xa4, 0x38, 0x48, 0x37, 0x0e, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x37, -0x20, 0x36, 0xef, 0xa4, 0x36, 0xf8, 0x36, 0xea, 0x80, 0xa4, 0x23, 0xf0, -0x34, 0x7f, 0x92, 0x18, 0x91, 0xc0, 0x80, 0x91, 0x80, 0x90, 0xf8, 0xdb, -0x84, 0x60, 0xf9, 0x40, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x68, 0x8c, 0x43, -0xc8, 0x84, 0x38, 0x83, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x58, 0x8c, 0x43, -0xa8, 0x84, 0x38, 0x81, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38, -0x35, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x33, 0xa4, 0x1f, 0x18, 0x33, 0xe4, -0x80, 0x90, 0x28, 0x80, 0x33, 0xe0, 0x80, 0x34, 0x88, 0x81, 0x90, 0x38, -0xa4, 0x24, 0x80, 0x34, 0x8b, 0xa4, 0x24, 0x48, 0x34, 0x85, 0xc0, 0x40, -0x10, 0x10, 0x90, 0x38, 0xa4, 0x1e, 0xf0, 0x33, 0xdf, 0xa4, 0x1e, 0xe0, -0x33, 0xdd, 0x18, 0x24, 0x24, 0xf8, 0x83, 0x90, 0xa8, 0xd3, 0x82, 0xc0, -0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x38, 0x38, 0x6d, 0xc0, 0xc0, 0x80, 0xa4, -0x42, 0x28, 0x38, 0x69, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38, -0x2f, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x2d, 0x92, 0xb8, 0x99, 0x84, 0x24, -0x68, 0x90, 0x78, 0x90, 0x50, 0x10, 0x10, 0x80, 0xa4, 0x36, 0x98, 0x36, -0xd8, 0x82, 0x36, 0xce, 0x90, 0x80, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x38, -0x98, 0x37, 0x19, 0xa4, 0x38, 0x40, 0x37, 0x0d, 0x80, 0x90, 0x38, 0xa4, -0x37, 0x18, 0x36, 0xee, 0xa4, 0x36, 0xf0, 0x36, 0xe9, 0x83, 0x90, 0xa8, -0xd3, 0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x08, 0x38, 0x61, 0xc0, -0xc0, 0x80, 0xa4, 0x41, 0xf8, 0x38, 0x5d, 0xd3, 0x82, 0x40, 0x50, 0xc0, -0xc0, 0x81, 0x38, 0x29, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x27, 0x18, 0x24, -0x24, 0x78, 0x83, 0x90, 0xa8, 0xd3, 0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4, -0x41, 0xd8, 0x38, 0x55, 0xc0, 0xc0, 0x80, 0xa4, 0x41, 0xc8, 0x38, 0x51, -0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x23, 0x50, 0xc0, 0xc0, -0x81, 0x38, 0x21, 0x94, 0x50, 0x92, 0xf8, 0x99, 0x84, 0x1f, 0x48, 0x90, -0x78, 0x90, 0x50, 0x10, 0x10, 0x80, 0xa4, 0x36, 0x90, 0x36, 0xd7, 0x82, -0x36, 0xcd, 0x90, 0x80, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x38, 0x90, 0x37, -0x18, 0xa4, 0x38, 0x38, 0x37, 0x0c, 0x80, 0x90, 0x38, 0xa4, 0x37, 0x10, -0x36, 0xed, 0xa4, 0x36, 0xe8, 0x36, 0xe8, 0x83, 0x90, 0xe8, 0xd3, 0x83, -0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x78, 0x8c, 0x43, 0xe8, 0x84, 0x38, -0x85, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x60, 0x8c, 0x43, 0xb8, 0x84, 0x38, -0x82, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x37, 0x50, 0xc0, -0xc0, 0x81, 0x38, 0x34, 0x18, 0x24, 0x1f, 0x40, 0x83, 0x90, 0xa8, 0xd3, -0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x48, 0x38, 0x71, 0xc0, 0xc0, -0x80, 0xa4, 0x42, 0x30, 0x38, 0x6b, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, -0x81, 0x38, 0x31, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x2e, 0x92, 0xb8, 0x99, -0x84, 0x1f, 0x38, 0x90, 0x78, 0x90, 0x50, 0x10, 0x10, 0x80, 0xa4, 0x36, -0x88, 0x36, 0xd6, 0x82, 0x36, 0xcc, 0x90, 0x80, 0x10, 0x10, 0x90, 0x38, -0xa4, 0x38, 0x88, 0x37, 0x17, 0xa4, 0x38, 0x30, 0x37, 0x0b, 0x80, 0x90, -0x38, 0xa4, 0x37, 0x08, 0x36, 0xec, 0xa4, 0x36, 0xe0, 0x36, 0xe7, 0x83, -0x90, 0xa8, 0xd3, 0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x18, 0x38, -0x65, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x00, 0x38, 0x5f, 0xd3, 0x82, 0x40, -0x50, 0xc0, 0xc0, 0x81, 0x38, 0x2b, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x28, -0x18, 0x20, 0x01, 0x48, 0x83, 0x90, 0xa8, 0xd3, 0x82, 0xc0, 0xc0, 0xc0, -0x80, 0xa4, 0x41, 0xe8, 0x38, 0x59, 0xc0, 0xc0, 0x80, 0xa4, 0x41, 0xd0, -0x38, 0x53, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x25, 0x50, -0xc0, 0xc0, 0x81, 0x38, 0x22, 0xda, 0x06, 0xe0, 0xf9, 0x80, 0x90, 0x60, -0x90, 0x38, 0xa4, 0x24, 0xe8, 0x34, 0x9b, 0x80, 0x34, 0x98, 0x90, 0x38, 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0x48, 0x8c, 0x40, 0x18, 0x84, 0x24, 0x40, +0x90, 0x8c, 0x40, 0x10, 0x84, 0x24, 0x40, 0x88, 0x90, 0x38, 0xa4, 0x3f, +0xf8, 0x38, 0x00, 0xa4, 0x3f, 0xe8, 0x37, 0xfe, 0xa0, 0x0f, 0x50, 0xa0, +0x09, 0x08, 0x9a, 0x30, 0x04, 0x40, 0x91, 0x90, 0x90, 0xc8, 0x98, 0x50, +0x00, 0x80, 0xe5, 0x23, 0x5b, 0x80, 0x3d, 0x66, 0xe5, 0x23, 0x53, 0x80, +0x3d, 0x62, 0xcb, 0x61, 0xfb, 0x00, 0x85, 0x37, 0xfb, 0x98, 0x50, 0x00, +0x80, 0xe5, 0x23, 0x4b, 0x80, 0x3d, 0x26, 0xe5, 0x23, 0x43, 0x80, 0x3d, +0x22, 0xcb, 0x61, 0xfa, 0xc0, 0x85, 0x37, 0xfa, 0x90, 0x48, 0xcb, 0xa1, +0xfa, 0x80, 0x85, 0x37, 0xf9, 0xcb, 0xa1, 0xfa, 0x40, 0x85, 0x37, 0xf8, +0x91, 0x90, 0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x23, 0x35, 0x80, +0x3c, 0xee, 0xe5, 0x23, 0x29, 0x80, 0x3c, 0xbe, 0xcb, 0x61, 0xf9, 0xc0, +0x85, 0x37, 0xf6, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x23, 0x1d, 0x80, 0x3c, +0x8e, 0xe5, 0x23, 0x11, 0x80, 0x3c, 0x5e, 0xcb, 0x61, 0xf9, 0x80, 0x85, +0x37, 0xf5, 0x90, 0x48, 0xcb, 0xa1, 0xf9, 0x40, 0x85, 0x37, 0xf4, 0xcb, +0xa1, 0xf9, 0x00, 0x85, 0x37, 0xf3, 0x92, 0x20, 0x91, 0x30, 0x90, 0xb8, +0xd5, 0x03, 0x00, 0xc0, 0xc0, 0x81, 0x8c, 0x01, 0xa0, 0x84, 0x30, 0x3e, +0xc0, 0xc0, 0x81, 0x8c, 0x01, 0x80, 0x84, 0x30, 0x3c, 0xd5, 0x02, 0x00, +0xc0, 0xc0, 0x81, 0x30, 0x28, 0xc0, 0xc0, 0x81, 0x30, 0x24, 0x90, 0x78, +0xd5, 0x02, 0x00, 0xc0, 0xc0, 0x81, 0x30, 0x1c, 0xc0, 0xc0, 0x81, 0x30, +0x18, 0xd5, 0x02, 0x00, 0xc0, 0xc0, 0x81, 0x30, 0x10, 0xc0, 0xc0, 0x81, +0x30, 0x0c, 0x91, 0x70, 0x90, 0xd8, 0xd5, 0x03, 0x80, 0xc8, 0xe3, 0x09, +0x80, 0x81, 0x8c, 0x01, 0xc0, 0x84, 0x30, 0x40, 0xc8, 0xe3, 0x0b, 0x80, +0x81, 0x8c, 0x01, 0x90, 0x84, 0x30, 0x3d, 0xd5, 0x02, 0x80, 0xc8, 0xe3, +0x08, 0x80, 0x81, 0x30, 0x2c, 0xc8, 0xe3, 0x03, 0x00, 0x81, 0x30, 0x26, +0x90, 0x98, 0xd5, 0x02, 0x80, 0xc8, 0xe2, 0xf8, 0x00, 0x81, 0x30, 0x20, +0xc8, 0xe2, 0xfa, 0x00, 0x81, 0x30, 0x1a, 0xd5, 0x02, 0x80, 0xc8, 0xe2, +0xf7, 0x00, 0x81, 0x30, 0x14, 0xc8, 0xe2, 0xf1, 0x80, 0x81, 0x30, 0x0e, +0x9a, 0x30, 0x04, 0x40, 0x91, 0x90, 0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, +0xe5, 0x23, 0x4f, 0x80, 0x3d, 0x36, 0xe5, 0x23, 0x51, 0x80, 0x3d, 0x5a, +0xcb, 0x61, 0xf8, 0x80, 0x85, 0x37, 0xf1, 0x98, 0x50, 0x00, 0x80, 0xe5, +0x23, 0x3f, 0x80, 0x3c, 0xf6, 0xe5, 0x23, 0x41, 0x80, 0x3d, 0x1a, 0xcb, +0x61, 0xf8, 0x40, 0x85, 0x37, 0xf0, 0x90, 0x48, 0xcb, 0xa1, 0xf8, 0x00, +0x85, 0x37, 0xef, 0xcb, 0xa1, 0xf7, 0xc0, 0x85, 0x37, 0xee, 0x91, 0x90, +0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x23, 0x31, 0x80, 0x3c, 0xde, +0xe5, 0x23, 0x25, 0x80, 0x3c, 0xae, 0xcb, 0x61, 0xf6, 0x00, 0x85, 0x37, +0xdd, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x23, 0x19, 0x80, 0x3c, 0x7e, 0xe5, +0x23, 0x0d, 0x80, 0x3c, 0x4e, 0xcb, 0x61, 0xf5, 0xc0, 0x85, 0x37, 0xdc, +0x90, 0x48, 0xcb, 0xa1, 0xf5, 0x80, 0x85, 0x37, 0xdb, 0xcb, 0xa1, 0xf5, +0x40, 0x85, 0x37, 0xda, 0x91, 0x00, 0x90, 0x80, 0x90, 0x40, 0xe5, 0x20, +0x02, 0x40, 0x30, 0x0a, 0xe5, 0x20, 0x01, 0x80, 0x30, 0x07, 0x90, 0x40, +0xe5, 0x20, 0x00, 0xc0, 0x30, 0x04, 0xe5, 0x20, 0x00, 0x00, 0x30, 0x01, +0x90, 0x80, 0x90, 0x40, 0xe5, 0x22, 0xfe, 0x80, 0x3b, 0xf0, 0xe5, 0x23, +0x00, 0xc0, 0x3c, 0x18, 0x90, 0x40, 0xe5, 0x22, 0xed, 0x00, 0x3b, 0xaa, +0xe5, 0x22, 0xef, 0x40, 0x3b, 0xd2, 0x80, 0x99, 0x28, 0x02, 0xf0, 0x8c, +0x3e, 0x60, 0x90, 0x80, 0x90, 0x40, 0xe5, 0x23, 0x55, 0x80, 0x3d, 0x52, +0xe5, 0x23, 0x52, 0x80, 0x3d, 0x5e, 0x90, 0x40, 0xe5, 0x23, 0x45, 0x80, +0x3d, 0x12, 0xe5, 0x23, 0x42, 0x80, 0x3d, 0x1e, 0x91, 0x48, 0x90, 0xc8, +0x98, 0x50, 0x00, 0x80, 0xe5, 0x23, 0x33, 0x80, 0x3c, 0xe6, 0xe5, 0x23, +0x27, 0x80, 0x3c, 0xb6, 0xcb, 0x61, 0xf3, 0xc0, 0x85, 0x37, 0xd3, 0x90, +0x40, 0xe5, 0x23, 0x1b, 0x80, 0x3c, 0x86, 0xe5, 0x23, 0x0f, 0x80, 0x3c, +0x56, 0x90, 0x48, 0xcb, 0xa1, 0xf3, 0x40, 0x85, 0x37, 0xd1, 0xcb, 0xa1, +0xf3, 0x80, 0x85, 0x37, 0xd2, 0x10, 0x10, 0x90, 0x80, 0x90, 0x40, 0xe5, +0x23, 0x05, 0x00, 0x3c, 0x10, 0xe5, 0x23, 0x02, 0x00, 0x3c, 0x1e, 0x90, +0x40, 0xe5, 0x22, 0xf3, 0x80, 0x3b, 0xca, 0xe5, 0x22, 0xf0, 0x80, 0x3b, +0xd8, }; static const struct ia64_dis_names ia64_dis_names[] = { @@ -6162,2636 +7260,3439 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x2, 38, 0, 85 }, { 0x3, 38, 1, 84 }, { 0x4, 38, 0, 83 }, -{ 0x1, 336, 0, 87 }, -{ 0x20, 289, 0, 98 }, -{ 0x220, 289, 0, 94 }, -{ 0x1220, 289, 0, 91 }, -{ 0xa20, 289, 0, 92 }, -{ 0x620, 289, 0, 93 }, -{ 0x120, 289, 0, 95 }, -{ 0xa0, 289, 0, 96 }, -{ 0x60, 289, 0, 97 }, -{ 0x10, 289, 0, 102 }, -{ 0x90, 289, 0, 99 }, -{ 0x50, 289, 0, 100 }, -{ 0x30, 289, 0, 101 }, -{ 0x8, 289, 0, 103 }, -{ 0x4, 289, 0, 104 }, -{ 0x2, 289, 0, 105 }, -{ 0x1, 289, 0, 106 }, -{ 0x1, 411, 0, 108 }, -{ 0x3, 411, 0, 107 }, -{ 0x2, 417, 0, 109 }, -{ 0x1, 417, 0, 110 }, -{ 0x2, 413, 0, 111 }, -{ 0x1, 413, 0, 112 }, -{ 0x2, 415, 0, 113 }, -{ 0x1, 415, 0, 114 }, -{ 0x2, 419, 0, 115 }, -{ 0x1, 419, 0, 116 }, -{ 0x1, 268, 0, 143 }, -{ 0x5, 268, 0, 141 }, -{ 0x3, 268, 0, 142 }, -{ 0x140, 277, 0, 119 }, -{ 0x540, 277, 0, 117 }, -{ 0x340, 277, 0, 118 }, -{ 0xc0, 277, 0, 131 }, -{ 0x2c0, 277, 0, 129 }, -{ 0x1c0, 277, 0, 130 }, -{ 0x20, 277, 0, 146 }, -{ 0xa0, 277, 0, 144 }, -{ 0x60, 277, 0, 145 }, -{ 0x10, 277, 0, 158 }, -{ 0x50, 277, 0, 156 }, -{ 0x30, 277, 0, 157 }, -{ 0x8, 277, 0, 170 }, -{ 0x28, 277, 0, 168 }, -{ 0x18, 277, 0, 169 }, -{ 0x4, 277, 0, 180 }, -{ 0x2, 277, 0, 181 }, -{ 0x1, 277, 0, 182 }, -{ 0x140, 271, 0, 122 }, -{ 0x540, 271, 0, 120 }, -{ 0x340, 271, 0, 121 }, -{ 0xc0, 271, 0, 134 }, -{ 0x2c0, 271, 0, 132 }, -{ 0x1c0, 271, 0, 133 }, -{ 0x20, 271, 0, 149 }, -{ 0xa0, 271, 0, 147 }, -{ 0x60, 271, 0, 148 }, -{ 0x10, 271, 0, 161 }, -{ 0x50, 271, 0, 159 }, -{ 0x30, 271, 0, 160 }, -{ 0x8, 271, 0, 173 }, -{ 0x28, 271, 0, 171 }, -{ 0x18, 271, 0, 172 }, -{ 0x4, 271, 0, 183 }, -{ 0x2, 271, 0, 184 }, -{ 0x1, 271, 0, 185 }, -{ 0x140, 274, 0, 125 }, -{ 0x540, 274, 0, 123 }, -{ 0x340, 274, 0, 124 }, -{ 0xc0, 274, 0, 137 }, -{ 0x2c0, 274, 0, 135 }, -{ 0x1c0, 274, 0, 136 }, -{ 0x20, 274, 0, 152 }, -{ 0xa0, 274, 0, 150 }, -{ 0x60, 274, 0, 151 }, -{ 0x10, 274, 0, 164 }, -{ 0x50, 274, 0, 162 }, -{ 0x30, 274, 0, 163 }, -{ 0x8, 274, 0, 176 }, -{ 0x28, 274, 0, 174 }, -{ 0x18, 274, 0, 175 }, -{ 0x4, 274, 0, 186 }, -{ 0x2, 274, 0, 187 }, -{ 0x1, 274, 0, 188 }, -{ 0x140, 286, 0, 128 }, -{ 0x540, 286, 0, 126 }, -{ 0x340, 286, 0, 127 }, -{ 0xc0, 286, 0, 140 }, -{ 0x2c0, 286, 0, 138 }, -{ 0x1c0, 286, 0, 139 }, -{ 0x20, 286, 0, 155 }, -{ 0xa0, 286, 0, 153 }, -{ 0x60, 286, 0, 154 }, -{ 0x10, 286, 0, 167 }, -{ 0x50, 286, 0, 165 }, -{ 0x30, 286, 0, 166 }, -{ 0x8, 286, 0, 179 }, -{ 0x28, 286, 0, 177 }, -{ 0x18, 286, 0, 178 }, -{ 0x4, 286, 0, 189 }, -{ 0x2, 286, 0, 190 }, -{ 0x1, 286, 0, 191 }, -{ 0x8, 390, 0, 192 }, -{ 0x4, 390, 0, 193 }, -{ 0x2, 390, 0, 194 }, -{ 0x1, 390, 0, 195 }, -{ 0x20, 288, 0, 203 }, -{ 0x220, 288, 0, 199 }, -{ 0x1220, 288, 0, 196 }, -{ 0xa20, 288, 0, 197 }, -{ 0x620, 288, 0, 198 }, -{ 0x120, 288, 0, 200 }, -{ 0xa0, 288, 0, 201 }, -{ 0x60, 288, 0, 202 }, -{ 0x10, 288, 0, 207 }, -{ 0x90, 288, 0, 204 }, -{ 0x50, 288, 0, 205 }, -{ 0x30, 288, 0, 206 }, -{ 0x8, 288, 0, 208 }, -{ 0x4, 288, 0, 209 }, -{ 0x2, 288, 0, 210 }, -{ 0x1, 288, 0, 211 }, -{ 0x20, 287, 0, 219 }, -{ 0x220, 287, 0, 215 }, -{ 0x1220, 287, 0, 212 }, -{ 0xa20, 287, 0, 213 }, -{ 0x620, 287, 0, 214 }, -{ 0x120, 287, 0, 216 }, -{ 0xa0, 287, 0, 217 }, -{ 0x60, 287, 0, 218 }, -{ 0x10, 287, 0, 223 }, -{ 0x90, 287, 0, 220 }, -{ 0x50, 287, 0, 221 }, -{ 0x30, 287, 0, 222 }, -{ 0x8, 287, 0, 224 }, -{ 0x4, 287, 0, 225 }, -{ 0x2, 287, 0, 226 }, -{ 0x1, 287, 0, 227 }, -{ 0x140, 279, 0, 230 }, -{ 0x540, 279, 0, 228 }, -{ 0x340, 279, 0, 229 }, -{ 0xc0, 279, 0, 239 }, -{ 0x2c0, 279, 0, 237 }, -{ 0x1c0, 279, 0, 238 }, -{ 0x20, 279, 0, 248 }, -{ 0xa0, 279, 0, 246 }, -{ 0x60, 279, 0, 247 }, -{ 0x10, 279, 0, 257 }, -{ 0x50, 279, 0, 255 }, -{ 0x30, 279, 0, 256 }, -{ 0x8, 279, 0, 266 }, -{ 0x28, 279, 0, 264 }, -{ 0x18, 279, 0, 265 }, -{ 0x4, 279, 0, 273 }, -{ 0x2, 279, 0, 274 }, -{ 0x1, 279, 0, 275 }, -{ 0x140, 281, 0, 233 }, -{ 0x540, 281, 0, 231 }, -{ 0x340, 281, 0, 232 }, -{ 0xc0, 281, 0, 242 }, -{ 0x2c0, 281, 0, 240 }, -{ 0x1c0, 281, 0, 241 }, -{ 0x20, 281, 0, 251 }, -{ 0xa0, 281, 0, 249 }, -{ 0x60, 281, 0, 250 }, -{ 0x10, 281, 0, 260 }, -{ 0x50, 281, 0, 258 }, -{ 0x30, 281, 0, 259 }, -{ 0x8, 281, 0, 269 }, -{ 0x28, 281, 0, 267 }, -{ 0x18, 281, 0, 268 }, -{ 0x4, 281, 0, 276 }, -{ 0x2, 281, 0, 277 }, -{ 0x1, 281, 0, 278 }, -{ 0x140, 283, 0, 236 }, -{ 0x540, 283, 0, 234 }, -{ 0x340, 283, 0, 235 }, -{ 0xc0, 283, 0, 245 }, -{ 0x2c0, 283, 0, 243 }, -{ 0x1c0, 283, 0, 244 }, -{ 0x20, 283, 0, 254 }, -{ 0xa0, 283, 0, 252 }, -{ 0x60, 283, 0, 253 }, -{ 0x10, 283, 0, 263 }, -{ 0x50, 283, 0, 261 }, -{ 0x30, 283, 0, 262 }, -{ 0x8, 283, 0, 272 }, -{ 0x28, 283, 0, 270 }, -{ 0x18, 283, 0, 271 }, -{ 0x4, 283, 0, 279 }, -{ 0x2, 283, 0, 280 }, -{ 0x1, 283, 0, 281 }, -{ 0x140, 278, 0, 284 }, -{ 0x540, 278, 0, 282 }, -{ 0x340, 278, 0, 283 }, -{ 0xc0, 278, 0, 293 }, -{ 0x2c0, 278, 0, 291 }, -{ 0x1c0, 278, 0, 292 }, -{ 0x20, 278, 0, 302 }, -{ 0xa0, 278, 0, 300 }, -{ 0x60, 278, 0, 301 }, -{ 0x10, 278, 0, 311 }, -{ 0x50, 278, 0, 309 }, -{ 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2451 }, -{ 0x24, 87, 1, 2449 }, -{ 0x5, 94, 0, 2450 }, -{ 0x1a, 86, 1, 2308 }, -{ 0x32, 87, 1, 2307 }, -{ 0x34, 93, 1, 2305 }, -{ 0x7, 117, 0, 2306 }, -{ 0x6, 86, 1, 2612 }, -{ 0x6, 87, 1, 2611 }, -{ 0xc, 87, 1, 2609 }, -{ 0x3, 94, 0, 2610 }, -{ 0x1, 86, 1, 2628 }, -{ 0x1, 87, 1, 2627 }, -{ 0x1, 88, 1, 2626 }, -{ 0x1, 89, 1, 2625 }, -{ 0x1, 90, 1, 2624 }, -{ 0x1, 91, 1, 2623 }, -{ 0x1, 92, 1, 2622 }, -{ 0x1, 93, 0, 2621 }, -{ 0x3, 86, 1, 2620 }, -{ 0x3, 87, 1, 2619 }, -{ 0x3, 88, 1, 2618 }, -{ 0x3, 89, 1, 2617 }, -{ 0x3, 90, 1, 2616 }, -{ 0x3, 91, 1, 2615 }, -{ 0x3, 92, 1, 2614 }, -{ 0x3, 93, 0, 2613 }, -{ 0x8, 53, 1, 2492 }, -{ 0x8, 54, 1, 2491 }, -{ 0x2, 55, 1, 2490 }, -{ 0x2, 56, 1, 2489 }, -{ 0x2, 57, 1, 2488 }, -{ 0x2, 58, 1, 2487 }, -{ 0x2, 59, 1, 2486 }, -{ 0x2, 60, 0, 2485 }, -{ 0x18, 53, 1, 2484 }, -{ 0x18, 54, 1, 2483 }, -{ 0x6, 55, 1, 2482 }, -{ 0x6, 56, 1, 2481 }, -{ 0x6, 57, 1, 2480 }, -{ 0x6, 58, 1, 2479 }, -{ 0x6, 59, 1, 2478 }, -{ 0x6, 60, 0, 2477 }, -{ 0x14, 53, 1, 2472 }, -{ 0x22, 54, 1, 2469 }, -{ 0x44, 54, 1, 2471 }, -{ 0xa, 61, 0, 2470 }, -{ 0x34, 53, 1, 2320 }, -{ 0xc4, 54, 1, 2319 }, -{ 0x38, 60, 1, 2317 }, -{ 0xe, 80, 0, 2318 }, -{ 0xc, 53, 1, 2632 }, -{ 0xa, 54, 1, 2629 }, -{ 0x14, 54, 1, 2631 }, -{ 0x6, 61, 0, 2630 }, -{ 0x2, 53, 1, 2332 }, -{ 0x2, 54, 1, 2331 }, -{ 0x4, 59, 1, 2330 }, -{ 0x4, 60, 0, 2329 }, -{ 0x12, 53, 1, 2328 }, -{ 0x42, 54, 1, 2327 }, -{ 0xc, 59, 1, 2326 }, -{ 0xc, 60, 0, 2325 }, -{ 0xa, 53, 1, 2476 }, -{ 0x12, 54, 1, 2475 }, -{ 0x24, 54, 1, 2473 }, -{ 0x5, 61, 0, 2474 }, -{ 0x1a, 53, 1, 2324 }, -{ 0x32, 54, 1, 2323 }, -{ 0x34, 60, 1, 2321 }, -{ 0x7, 80, 0, 2322 }, -{ 0x6, 53, 1, 2636 }, -{ 0x6, 54, 1, 2635 }, -{ 0xc, 54, 1, 2633 }, -{ 0x3, 61, 0, 2634 }, -{ 0x1, 53, 1, 2652 }, -{ 0x1, 54, 1, 2651 }, -{ 0x1, 55, 1, 2650 }, -{ 0x1, 56, 1, 2649 }, -{ 0x1, 57, 1, 2648 }, -{ 0x1, 58, 1, 2647 }, -{ 0x1, 59, 1, 2646 }, -{ 0x1, 60, 0, 2645 }, -{ 0x3, 53, 1, 2644 }, -{ 0x3, 54, 1, 2643 }, -{ 0x3, 55, 1, 2642 }, -{ 0x3, 56, 1, 2641 }, -{ 0x3, 57, 1, 2640 }, -{ 0x3, 58, 1, 2639 }, -{ 0x3, 59, 1, 2638 }, -{ 0x3, 60, 0, 2637 }, -{ 0x1, 4, 0, 2653 }, -{ 0x1, 296, 0, 2654 }, -{ 0x1, 379, 0, 2655 }, -{ 0x1, 374, 0, 2656 }, -{ 0x2, 358, 0, 2657 }, -{ 0x1, 358, 0, 2660 }, -{ 0x2, 357, 0, 2658 }, -{ 0x1, 357, 0, 2661 }, -{ 0x2, 356, 0, 2659 }, -{ 0x1, 356, 0, 2662 }, -{ 0x1, 355, 0, 2663 }, -{ 0x1, 354, 0, 2664 }, -{ 0x2, 353, 0, 2665 }, -{ 0x1, 353, 0, 2667 }, -{ 0x2, 352, 0, 2666 }, -{ 0x1, 352, 0, 2668 }, -{ 0x1, 382, 0, 2675 }, -{ 0x8, 381, 0, 2669 }, -{ 0x4, 381, 0, 2671 }, -{ 0x2, 381, 0, 2673 }, -{ 0x1, 381, 0, 2676 }, -{ 0x8, 380, 0, 2670 }, -{ 0x4, 380, 0, 2672 }, -{ 0x2, 380, 0, 2674 }, -{ 0x1, 380, 0, 2677 }, -{ 0x1, 351, 0, 2684 }, -{ 0x8, 350, 0, 2678 }, -{ 0x4, 350, 0, 2680 }, -{ 0x2, 350, 0, 2682 }, -{ 0x1, 350, 0, 2685 }, -{ 0x8, 349, 0, 2679 }, -{ 0x4, 349, 0, 2681 }, -{ 0x2, 349, 1, 2683 }, -{ 0x4, 143, 0, 1377 }, -{ 0x1, 349, 0, 2686 }, -{ 0x1, 6, 0, 2687 }, -{ 0x1, 7, 0, 2688 }, -{ 0x1, 295, 0, 2689 }, -{ 0x1, 456, 0, 2690 }, -{ 0x1, 346, 0, 2691 }, -{ 0x1, 13, 0, 2692 }, -{ 0x1, 11, 0, 2693 }, -{ 0x1, 422, 0, 2694 }, -{ 0x1, 394, 0, 2695 }, -{ 0x1, 393, 0, 2696 }, -{ 0x1, 455, 0, 2697 }, -{ 0x1, 345, 0, 2698 }, -{ 0x1, 12, 0, 2699 }, -{ 0x1, 10, 0, 2700 }, -{ 0x1, 5, 0, 2701 }, -{ 0x1, 421, 0, 2702 }, -{ 0x1, 420, 0, 2703 }, -{ 0x1, 1, 0, 2704 }, -{ 0x1, 0, 0, 2705 }, +{ 0x1a, 68, 1, 3031 }, +{ 0x32, 69, 1, 3030 }, +{ 0x34, 75, 1, 3028 }, +{ 0x7, 86, 0, 3029 }, +{ 0x6, 68, 1, 3327 }, +{ 0x6, 69, 1, 3326 }, +{ 0xc, 69, 1, 3324 }, +{ 0x3, 76, 0, 3325 }, +{ 0x1, 68, 1, 3343 }, +{ 0x1, 69, 1, 3342 }, +{ 0x1, 70, 1, 3341 }, +{ 0x1, 71, 1, 3340 }, +{ 0x1, 72, 1, 3339 }, +{ 0x1, 73, 1, 3338 }, +{ 0x1, 74, 1, 3337 }, +{ 0x1, 75, 0, 3336 }, +{ 0x3, 68, 1, 3335 }, +{ 0x3, 69, 1, 3334 }, +{ 0x3, 70, 1, 3333 }, +{ 0x3, 71, 1, 3332 }, +{ 0x3, 72, 1, 3331 }, +{ 0x3, 73, 1, 3330 }, +{ 0x3, 74, 1, 3329 }, +{ 0x3, 75, 0, 3328 }, +{ 0x28, 96, 1, 3191 }, +{ 0x44, 97, 1, 3186 }, +{ 0x88, 97, 1, 3190 }, +{ 0x44, 98, 1, 3185 }, +{ 0x88, 98, 1, 3189 }, +{ 0x44, 99, 1, 3184 }, +{ 0x88, 99, 1, 3188 }, +{ 0x28, 100, 0, 3187 }, +{ 0x68, 96, 1, 3047 }, +{ 0x188, 97, 1, 3046 }, +{ 0x188, 98, 1, 3045 }, +{ 0x188, 99, 1, 3044 }, +{ 0x38, 119, 1, 3043 }, +{ 0x38, 120, 1, 3042 }, +{ 0x38, 121, 1, 3041 }, +{ 0x38, 122, 0, 3040 }, +{ 0x18, 96, 1, 3351 }, +{ 0x14, 97, 1, 3346 }, +{ 0x28, 97, 1, 3350 }, +{ 0x14, 98, 1, 3345 }, +{ 0x28, 98, 1, 3349 }, +{ 0x14, 99, 1, 3344 }, +{ 0x28, 99, 1, 3348 }, +{ 0x18, 100, 0, 3347 }, +{ 0x14, 96, 1, 3199 }, +{ 0x24, 97, 1, 3198 }, +{ 0x48, 97, 1, 3194 }, +{ 0x24, 98, 1, 3197 }, +{ 0x48, 98, 1, 3193 }, +{ 0x24, 99, 1, 3196 }, +{ 0x48, 99, 1, 3192 }, +{ 0x14, 100, 0, 3195 }, +{ 0x34, 96, 1, 3055 }, +{ 0x64, 97, 1, 3054 }, +{ 0x64, 98, 1, 3053 }, +{ 0x64, 99, 1, 3052 }, +{ 0x1c, 119, 1, 3051 }, +{ 0x1c, 120, 1, 3050 }, +{ 0x1c, 121, 1, 3049 }, +{ 0x1c, 122, 0, 3048 }, +{ 0xc, 96, 1, 3359 }, +{ 0xc, 97, 1, 3358 }, +{ 0x18, 97, 1, 3354 }, +{ 0xc, 98, 1, 3357 }, +{ 0x18, 98, 1, 3353 }, +{ 0xc, 99, 1, 3356 }, +{ 0x18, 99, 1, 3352 }, +{ 0xc, 100, 0, 3355 }, +{ 0xa, 96, 1, 3207 }, +{ 0x11, 97, 1, 3202 }, +{ 0x22, 97, 1, 3206 }, +{ 0x11, 98, 1, 3201 }, +{ 0x22, 98, 1, 3205 }, +{ 0x11, 99, 1, 3200 }, +{ 0x22, 99, 1, 3204 }, +{ 0xa, 100, 0, 3203 }, +{ 0x1a, 96, 1, 3063 }, +{ 0x62, 97, 1, 3062 }, +{ 0x62, 98, 1, 3061 }, +{ 0x62, 99, 1, 3060 }, +{ 0xe, 119, 1, 3059 }, +{ 0xe, 120, 1, 3058 }, +{ 0xe, 121, 1, 3057 }, +{ 0xe, 122, 0, 3056 }, +{ 0x6, 96, 1, 3367 }, +{ 0x5, 97, 1, 3362 }, +{ 0xa, 97, 1, 3366 }, +{ 0x5, 98, 1, 3361 }, +{ 0xa, 98, 1, 3365 }, +{ 0x5, 99, 1, 3360 }, +{ 0xa, 99, 1, 3364 }, +{ 0x6, 100, 0, 3363 }, +{ 0x5, 96, 1, 3215 }, +{ 0x9, 97, 1, 3214 }, +{ 0x12, 97, 1, 3210 }, +{ 0x9, 98, 1, 3213 }, +{ 0x12, 98, 1, 3209 }, +{ 0x9, 99, 1, 3212 }, +{ 0x12, 99, 1, 3208 }, +{ 0x5, 100, 0, 3211 }, +{ 0xd, 96, 1, 3071 }, +{ 0x19, 97, 1, 3070 }, +{ 0x19, 98, 1, 3069 }, +{ 0x19, 99, 1, 3068 }, +{ 0x7, 119, 1, 3067 }, +{ 0x7, 120, 1, 3066 }, +{ 0x7, 121, 1, 3065 }, +{ 0x7, 122, 0, 3064 }, +{ 0x3, 96, 1, 3375 }, +{ 0x3, 97, 1, 3374 }, +{ 0x6, 97, 1, 3370 }, +{ 0x3, 98, 1, 3373 }, +{ 0x6, 98, 1, 3369 }, +{ 0x3, 99, 1, 3372 }, +{ 0x6, 99, 1, 3368 }, +{ 0x3, 100, 0, 3371 }, +{ 0x28, 63, 1, 3223 }, +{ 0x44, 64, 1, 3218 }, +{ 0x88, 64, 1, 3222 }, +{ 0x44, 65, 1, 3217 }, +{ 0x88, 65, 1, 3221 }, +{ 0x44, 66, 1, 3216 }, +{ 0x88, 66, 1, 3220 }, +{ 0x28, 67, 0, 3219 }, +{ 0x68, 63, 1, 3079 }, +{ 0x188, 64, 1, 3078 }, +{ 0x188, 65, 1, 3077 }, +{ 0x188, 66, 1, 3076 }, +{ 0x38, 82, 1, 3075 }, +{ 0x38, 83, 1, 3074 }, +{ 0x38, 84, 1, 3073 }, +{ 0x38, 85, 0, 3072 }, +{ 0x18, 63, 1, 3383 }, +{ 0x14, 64, 1, 3378 }, +{ 0x28, 64, 1, 3382 }, +{ 0x14, 65, 1, 3377 }, +{ 0x28, 65, 1, 3381 }, +{ 0x14, 66, 1, 3376 }, +{ 0x28, 66, 1, 3380 }, +{ 0x18, 67, 0, 3379 }, +{ 0x14, 63, 1, 3231 }, +{ 0x24, 64, 1, 3230 }, +{ 0x48, 64, 1, 3226 }, +{ 0x24, 65, 1, 3229 }, +{ 0x48, 65, 1, 3225 }, +{ 0x24, 66, 1, 3228 }, +{ 0x48, 66, 1, 3224 }, +{ 0x14, 67, 0, 3227 }, +{ 0x34, 63, 1, 3087 }, +{ 0x64, 64, 1, 3086 }, +{ 0x64, 65, 1, 3085 }, +{ 0x64, 66, 1, 3084 }, +{ 0x1c, 82, 1, 3083 }, +{ 0x1c, 83, 1, 3082 }, +{ 0x1c, 84, 1, 3081 }, +{ 0x1c, 85, 0, 3080 }, +{ 0xc, 63, 1, 3391 }, +{ 0xc, 64, 1, 3390 }, +{ 0x18, 64, 1, 3386 }, +{ 0xc, 65, 1, 3389 }, +{ 0x18, 65, 1, 3385 }, +{ 0xc, 66, 1, 3388 }, +{ 0x18, 66, 1, 3384 }, +{ 0xc, 67, 0, 3387 }, +{ 0xa, 63, 1, 3239 }, +{ 0x11, 64, 1, 3234 }, +{ 0x22, 64, 1, 3238 }, +{ 0x11, 65, 1, 3233 }, +{ 0x22, 65, 1, 3237 }, +{ 0x11, 66, 1, 3232 }, +{ 0x22, 66, 1, 3236 }, +{ 0xa, 67, 0, 3235 }, +{ 0x1a, 63, 1, 3095 }, +{ 0x62, 64, 1, 3094 }, +{ 0x62, 65, 1, 3093 }, +{ 0x62, 66, 1, 3092 }, +{ 0xe, 82, 1, 3091 }, +{ 0xe, 83, 1, 3090 }, +{ 0xe, 84, 1, 3089 }, +{ 0xe, 85, 0, 3088 }, +{ 0x6, 63, 1, 3399 }, +{ 0x5, 64, 1, 3394 }, +{ 0xa, 64, 1, 3398 }, +{ 0x5, 65, 1, 3393 }, +{ 0xa, 65, 1, 3397 }, +{ 0x5, 66, 1, 3392 }, +{ 0xa, 66, 1, 3396 }, +{ 0x6, 67, 0, 3395 }, +{ 0x5, 63, 1, 3247 }, +{ 0x9, 64, 1, 3246 }, +{ 0x12, 64, 1, 3242 }, +{ 0x9, 65, 1, 3245 }, +{ 0x12, 65, 1, 3241 }, +{ 0x9, 66, 1, 3244 }, +{ 0x12, 66, 1, 3240 }, +{ 0x5, 67, 0, 3243 }, +{ 0xd, 63, 1, 3103 }, +{ 0x19, 64, 1, 3102 }, +{ 0x19, 65, 1, 3101 }, +{ 0x19, 66, 1, 3100 }, +{ 0x7, 82, 1, 3099 }, +{ 0x7, 83, 1, 3098 }, +{ 0x7, 84, 1, 3097 }, +{ 0x7, 85, 0, 3096 }, +{ 0x3, 63, 1, 3407 }, +{ 0x3, 64, 1, 3406 }, +{ 0x6, 64, 1, 3402 }, +{ 0x3, 65, 1, 3405 }, +{ 0x6, 65, 1, 3401 }, +{ 0x3, 66, 1, 3404 }, +{ 0x6, 66, 1, 3400 }, +{ 0x3, 67, 0, 3403 }, +{ 0x8, 87, 1, 3271 }, +{ 0x8, 88, 1, 3270 }, +{ 0x2, 89, 1, 3269 }, +{ 0x2, 90, 1, 3268 }, +{ 0x2, 91, 1, 3267 }, +{ 0x2, 92, 1, 3266 }, +{ 0x2, 93, 1, 3265 }, +{ 0x2, 94, 0, 3264 }, +{ 0x18, 87, 1, 3263 }, +{ 0x18, 88, 1, 3262 }, +{ 0x6, 89, 1, 3261 }, +{ 0x6, 90, 1, 3260 }, +{ 0x6, 91, 1, 3259 }, +{ 0x6, 92, 1, 3258 }, +{ 0x6, 93, 1, 3257 }, +{ 0x6, 94, 0, 3256 }, +{ 0x14, 87, 1, 3251 }, +{ 0x22, 88, 1, 3248 }, +{ 0x44, 88, 1, 3250 }, +{ 0xa, 95, 0, 3249 }, +{ 0x34, 87, 1, 3107 }, +{ 0xc4, 88, 1, 3106 }, +{ 0x38, 94, 1, 3104 }, +{ 0xe, 118, 0, 3105 }, +{ 0xc, 87, 1, 3411 }, +{ 0xa, 88, 1, 3408 }, +{ 0x14, 88, 1, 3410 }, +{ 0x6, 95, 0, 3409 }, +{ 0x2, 87, 1, 3119 }, +{ 0x2, 88, 1, 3118 }, +{ 0x4, 93, 1, 3117 }, +{ 0x4, 94, 0, 3116 }, +{ 0x12, 87, 1, 3115 }, +{ 0x42, 88, 1, 3114 }, +{ 0xc, 93, 1, 3113 }, +{ 0xc, 94, 0, 3112 }, +{ 0xa, 87, 1, 3255 }, +{ 0x12, 88, 1, 3254 }, +{ 0x24, 88, 1, 3252 }, +{ 0x5, 95, 0, 3253 }, +{ 0x1a, 87, 1, 3111 }, +{ 0x32, 88, 1, 3110 }, +{ 0x34, 94, 1, 3108 }, +{ 0x7, 118, 0, 3109 }, +{ 0x6, 87, 1, 3415 }, +{ 0x6, 88, 1, 3414 }, +{ 0xc, 88, 1, 3412 }, +{ 0x3, 95, 0, 3413 }, +{ 0x1, 87, 1, 3431 }, +{ 0x1, 88, 1, 3430 }, +{ 0x1, 89, 1, 3429 }, +{ 0x1, 90, 1, 3428 }, +{ 0x1, 91, 1, 3427 }, +{ 0x1, 92, 1, 3426 }, +{ 0x1, 93, 1, 3425 }, +{ 0x1, 94, 0, 3424 }, +{ 0x3, 87, 1, 3423 }, +{ 0x3, 88, 1, 3422 }, +{ 0x3, 89, 1, 3421 }, +{ 0x3, 90, 1, 3420 }, +{ 0x3, 91, 1, 3419 }, +{ 0x3, 92, 1, 3418 }, +{ 0x3, 93, 1, 3417 }, +{ 0x3, 94, 0, 3416 }, +{ 0x8, 54, 1, 3295 }, +{ 0x8, 55, 1, 3294 }, +{ 0x2, 56, 1, 3293 }, +{ 0x2, 57, 1, 3292 }, +{ 0x2, 58, 1, 3291 }, +{ 0x2, 59, 1, 3290 }, +{ 0x2, 60, 1, 3289 }, +{ 0x2, 61, 0, 3288 }, +{ 0x18, 54, 1, 3287 }, +{ 0x18, 55, 1, 3286 }, +{ 0x6, 56, 1, 3285 }, +{ 0x6, 57, 1, 3284 }, +{ 0x6, 58, 1, 3283 }, +{ 0x6, 59, 1, 3282 }, +{ 0x6, 60, 1, 3281 }, +{ 0x6, 61, 0, 3280 }, +{ 0x14, 54, 1, 3275 }, +{ 0x22, 55, 1, 3272 }, +{ 0x44, 55, 1, 3274 }, +{ 0xa, 62, 0, 3273 }, +{ 0x34, 54, 1, 3123 }, +{ 0xc4, 55, 1, 3122 }, +{ 0x38, 61, 1, 3120 }, +{ 0xe, 81, 0, 3121 }, +{ 0xc, 54, 1, 3435 }, +{ 0xa, 55, 1, 3432 }, +{ 0x14, 55, 1, 3434 }, +{ 0x6, 62, 0, 3433 }, +{ 0x2, 54, 1, 3135 }, +{ 0x2, 55, 1, 3134 }, +{ 0x4, 60, 1, 3133 }, +{ 0x4, 61, 0, 3132 }, +{ 0x12, 54, 1, 3131 }, +{ 0x42, 55, 1, 3130 }, +{ 0xc, 60, 1, 3129 }, +{ 0xc, 61, 0, 3128 }, +{ 0xa, 54, 1, 3279 }, +{ 0x12, 55, 1, 3278 }, +{ 0x24, 55, 1, 3276 }, +{ 0x5, 62, 0, 3277 }, +{ 0x1a, 54, 1, 3127 }, +{ 0x32, 55, 1, 3126 }, +{ 0x34, 61, 1, 3124 }, +{ 0x7, 81, 0, 3125 }, +{ 0x6, 54, 1, 3439 }, +{ 0x6, 55, 1, 3438 }, +{ 0xc, 55, 1, 3436 }, +{ 0x3, 62, 0, 3437 }, +{ 0x1, 54, 1, 3455 }, +{ 0x1, 55, 1, 3454 }, +{ 0x1, 56, 1, 3453 }, +{ 0x1, 57, 1, 3452 }, +{ 0x1, 58, 1, 3451 }, +{ 0x1, 59, 1, 3450 }, +{ 0x1, 60, 1, 3449 }, +{ 0x1, 61, 0, 3448 }, +{ 0x3, 54, 1, 3447 }, +{ 0x3, 55, 1, 3446 }, +{ 0x3, 56, 1, 3445 }, +{ 0x3, 57, 1, 3444 }, +{ 0x3, 58, 1, 3443 }, +{ 0x3, 59, 1, 3442 }, +{ 0x3, 60, 1, 3441 }, +{ 0x3, 61, 0, 3440 }, +{ 0x1, 4, 0, 3456 }, +{ 0x1, 314, 0, 3457 }, +{ 0x1, 401, 0, 3458 }, +{ 0x1, 396, 0, 3459 }, +{ 0x2, 380, 0, 3460 }, +{ 0x1, 380, 0, 3463 }, +{ 0x2, 379, 0, 3461 }, +{ 0x1, 379, 0, 3464 }, +{ 0x2, 378, 0, 3462 }, +{ 0x1, 378, 0, 3465 }, +{ 0x1, 377, 0, 3466 }, +{ 0x1, 376, 0, 3467 }, +{ 0x2, 375, 0, 3468 }, +{ 0x1, 375, 0, 3470 }, +{ 0x2, 374, 0, 3469 }, +{ 0x1, 374, 0, 3471 }, +{ 0x1, 404, 0, 3478 }, +{ 0x8, 403, 0, 3472 }, +{ 0x4, 403, 0, 3474 }, +{ 0x2, 403, 0, 3476 }, +{ 0x1, 403, 0, 3479 }, +{ 0x8, 402, 0, 3473 }, +{ 0x4, 402, 0, 3475 }, +{ 0x2, 402, 0, 3477 }, +{ 0x1, 402, 0, 3480 }, +{ 0x1, 373, 0, 3487 }, +{ 0x8, 372, 0, 3481 }, +{ 0x4, 372, 0, 3483 }, +{ 0x2, 372, 0, 3485 }, +{ 0x1, 372, 0, 3488 }, +{ 0x8, 371, 0, 3482 }, +{ 0x4, 371, 0, 3484 }, +{ 0x2, 371, 1, 3486 }, +{ 0x4, 144, 0, 2180 }, +{ 0x1, 371, 0, 3489 }, +{ 0x1, 6, 0, 3490 }, +{ 0x1, 7, 0, 3491 }, +{ 0x1, 313, 0, 3492 }, +{ 0x1, 488, 0, 3493 }, +{ 0x1, 368, 0, 3494 }, +{ 0x1, 13, 0, 3495 }, +{ 0x1, 11, 0, 3496 }, +{ 0x1, 454, 0, 3497 }, +{ 0x1, 416, 0, 3498 }, +{ 0x1, 415, 0, 3499 }, +{ 0x1, 487, 0, 3500 }, +{ 0x1, 367, 0, 3501 }, +{ 0x1, 12, 0, 3502 }, +{ 0x1, 10, 0, 3503 }, +{ 0x1, 5, 0, 3504 }, +{ 0x1, 453, 0, 3505 }, +{ 0x1, 452, 0, 3506 }, +{ 0x1, 1, 0, 3507 }, +{ 0x1, 0, 0, 3508 }, }; diff --git a/opcodes/ia64-asmtab.h b/opcodes/ia64-asmtab.h index fbca883..757daca 100644 --- a/opcodes/ia64-asmtab.h +++ b/opcodes/ia64-asmtab.h @@ -131,7 +131,7 @@ struct ia64_dis_names bits. There is always at least one 1 bit. */ - unsigned int completer_index : 20; + unsigned int completer_index ; /* The index in the main_table[] array for the instruction. */ unsigned short insn_index : 11; diff --git a/opcodes/ia64-gen.c b/opcodes/ia64-gen.c index f6deca1..042c0fd 100644 --- a/opcodes/ia64-gen.c +++ b/opcodes/ia64-gen.c @@ -69,6 +69,7 @@ int debug = 0; #define NELEMS(a) (sizeof (a) / sizeof ((a)[0])) #define tmalloc(X) (X *) xmalloc (sizeof (X)) +typedef unsigned long long ci_t; /* The main opcode table entry. Each entry is a unique combination of name and flags (no two entries in the table compare as being equal via opcodes_eq). */ @@ -146,7 +147,7 @@ struct disent int priority; /* The completer_index value for this entry. */ - int completer_index; + ci_t completer_index; /* How many other entries share this decode. */ int nextcnt; @@ -290,11 +291,11 @@ static void shrink (struct ia64_opcode *); static void print_version (void); static void usage (FILE *, int); static void finish_distable (void); -static void insert_bit_table_ent (struct bittree *, int, ia64_insn, ia64_insn, int, int, int); -static void add_dis_entry (struct bittree *, ia64_insn, ia64_insn, int, struct completer_entry *, int); +static void insert_bit_table_ent (struct bittree *, int, ia64_insn, ia64_insn, int, int, ci_t); +static void add_dis_entry (struct bittree *, ia64_insn, ia64_insn, int, struct completer_entry *, ci_t); static void compact_distree (struct bittree *); static struct bittree * make_bittree_entry (void); -static struct disent * add_dis_table_ent (struct disent *, int, int, int); +static struct disent * add_dis_table_ent (struct disent *, int, int, ci_t); static void @@ -902,12 +903,13 @@ irf_operand (int op, const char *field) || (op == IA64_OPND_PMC_R3 && strstr (field, "pmc")) || (op == IA64_OPND_PMD_R3 && strstr (field, "pmd")) || (op == IA64_OPND_MSR_R3 && strstr (field, "msr")) - || (op == IA64_OPND_CPUID_R3 && strstr (field, "cpuid"))); + || (op == IA64_OPND_CPUID_R3 && strstr (field, "cpuid")) + || (op == IA64_OPND_DAHR_R3 && strstr (field, "dahr"))); } } -/* Handle mov_ar, mov_br, mov_cr, mov_indirect, mov_ip, mov_pr, mov_psr, and - mov_um insn classes. */ +/* Handle mov_ar, mov_br, mov_cr, move_dahr, mov_indirect, mov_ip, mov_pr, + * mov_psr, and mov_um insn classes. */ static int in_iclass_mov_x (struct ia64_opcode *idesc, struct iclass *ic, const char *format, const char *field) @@ -965,6 +967,13 @@ in_iclass_mov_x (struct ia64_opcode *idesc, struct iclass *ic, return strstr (format, "M33") != NULL; } break; + case 'd': + { + int m50 = plain_mov && idesc->operands[0] == IA64_OPND_DAHR3; + if (m50) + return strstr (format, "M50") != NULL; + } + break; case 'i': if (ic->name[5] == 'n') { @@ -1441,6 +1450,8 @@ lookup_specifier (const char *name) return IA64_RS_CR_LRR; if (strstr (name, "CR%") != NULL) return IA64_RS_CR; + if (strstr (name, "DAHR%, % in 0") != NULL) + return IA64_RS_DAHR; if (strstr (name, "FR%, % in 0") != NULL) return IA64_RS_FR; if (strstr (name, "FR%, % in 2") != NULL) @@ -1723,7 +1734,7 @@ make_bittree_entry (void) static struct disent * add_dis_table_ent (struct disent *which, int insn, int order, - int completer_index) + ci_t completer_index) { int ci = 0; struct disent *ent; @@ -1776,7 +1787,7 @@ finish_distable (void) static void insert_bit_table_ent (struct bittree *curr_ent, int bit, ia64_insn opcode, ia64_insn mask, int opcodenum, int order, - int completer_index) + ci_t completer_index) { ia64_insn m; int b; @@ -1810,9 +1821,9 @@ insert_bit_table_ent (struct bittree *curr_ent, int bit, ia64_insn opcode, static void add_dis_entry (struct bittree *first, ia64_insn opcode, ia64_insn mask, - int opcodenum, struct completer_entry *ent, int completer_index) + int opcodenum, struct completer_entry *ent, ci_t completer_index) { - if (completer_index & (1 << 20)) + if (completer_index & ((ci_t)1 << 32) ) abort (); while (ent != NULL) @@ -2131,7 +2142,7 @@ print_dis_table (void) while (ent != NULL) { - printf ("{ 0x%x, %d, %d, %d },\n", ent->completer_index, + printf ("{ 0x%lx, %d, %d, %d },\n", ( long ) ent->completer_index, ent->insn, (ent->nexte != NULL ? 1 : 0), ent->priority); ent = ent->nexte; diff --git a/opcodes/ia64-ic.tbl b/opcodes/ia64-ic.tbl index 015a088..14fe7de 100644 --- a/opcodes/ia64-ic.tbl +++ b/opcodes/ia64-ic.tbl @@ -189,6 +189,7 @@ mov-to-CR-LRR; IC:mov-to-CR[Field(cr3) in {LRR0 LRR1}] mov-to-CR-PMV; IC:mov-to-CR[Field(cr3) == PMV] mov-to-CR-PTA; IC:mov-to-CR[Field(cr3) == PTA] mov-to-CR-TPR; IC:mov-to-CR[Field(cr3) == TPR] +mov-to-DAHR; mov_dahr[Format in {M50}] mov-to-IND; mov_indirect[Format in {M42}] mov-to-IND-CPUID; IC:mov-to-IND[Field(ireg) == cpuid] mov-to-IND-DBR; IC:mov-to-IND[Field(ireg) == dbr] diff --git a/opcodes/ia64-opc-i.c b/opcodes/ia64-opc-i.c index 1db6f66..e50610a 100644 --- a/opcodes/ia64-opc-i.c +++ b/opcodes/ia64-opc-i.c @@ -261,8 +261,8 @@ struct ia64_opcode ia64_opcodes_i[] = {"pmin2", I, OpZaZbVeX2aX2bX2c (7, 0, 1, 0, 2, 3, 0), {R1, R2, R3}, EMPTY}, {"pmax2", I, OpZaZbVeX2aX2bX2c (7, 0, 1, 0, 2, 3, 1), {R1, R2, R3}, EMPTY}, {"psad1", I, OpZaZbVeX2aX2bX2c (7, 0, 0, 0, 2, 3, 2), {R1, R2, R3}, EMPTY}, - {"mux1", I, OpZaZbVeX2aX2bX2c (7, 0, 0, 0, 3, 2, 2), {R1, R2, MBTYPE4}, EMPTY}, - {"mux2", I, OpZaZbVeX2aX2bX2c (7, 0, 1, 0, 3, 2, 2), {R1, R2, MHTYPE8}, EMPTY}, + {"mux1", I, OpZaZbVeX2aX2bX2c (7, 0, 0, 0, 3, 2, 2), {R1, R2, MBTYPE4}, EMPTY}, + {"mux2", I, OpZaZbVeX2aX2bX2c (7, 0, 1, 0, 3, 2, 2), {R1, R2, MHTYPE8}, EMPTY}, {"pshr2", I, OpZaZbVeX2aX2bX2c (7, 0, 1, 0, 0, 2, 0), {R1, R3, R2}, EMPTY}, {"pshr4", I, OpZaZbVeX2aX2bX2c (7, 1, 0, 0, 0, 2, 0), {R1, R3, R2}, EMPTY}, {"shr", I, OpZaZbVeX2aX2bX2c (7, 1, 1, 0, 0, 2, 0), {R1, R3, R2}, EMPTY}, @@ -276,9 +276,12 @@ struct ia64_opcode ia64_opcodes_i[] = {"pshl2", I, OpZaZbVeX2aX2bX2c (7, 0, 1, 0, 0, 0, 1), {R1, R2, R3}, EMPTY}, {"pshl4", I, OpZaZbVeX2aX2bX2c (7, 1, 0, 0, 0, 0, 1), {R1, R2, R3}, EMPTY}, {"shl", I, OpZaZbVeX2aX2bX2c (7, 1, 1, 0, 0, 0, 1), {R1, R2, R3}, EMPTY}, + {"mpy4", I, OpZaZbVeX2aX2bX2c (7, 1, 0, 0, 0, 1, 3), {R1, R2, R3}, EMPTY}, + {"mpyshl4", I, OpZaZbVeX2aX2bX2c (7, 1, 0, 0, 0, 3, 3), {R1, R2, R3}, EMPTY}, {"pshl2", I, OpZaZbVeX2aX2bX2c (7, 0, 1, 0, 3, 1, 1), {R1, R2, CCNT5}, EMPTY}, {"pshl4", I, OpZaZbVeX2aX2bX2c (7, 1, 0, 0, 3, 1, 1), {R1, R2, CCNT5}, EMPTY}, {"popcnt", I, OpZaZbVeX2aX2bX2c (7, 0, 1, 0, 1, 1, 2), {R1, R3}, EMPTY}, + {"clz", I, OpZaZbVeX2aX2bX2c (7, 0, 1, 0, 1, 1, 3), {R1, R3}, EMPTY}, {NULL, 0, 0, 0, 0, {0}, 0, 0, NULL} }; diff --git a/opcodes/ia64-opc-m.c b/opcodes/ia64-opc-m.c index 4764c71..f27ab95 100644 --- a/opcodes/ia64-opc-m.c +++ b/opcodes/ia64-opc-m.c @@ -36,7 +36,11 @@ #define bX6b(x) (((ia64_insn) ((x) & 0x3f)) << 27) #define bX7(x) (((ia64_insn) ((x) & 0x1)) << 36) /* note: alias for bM() */ #define bY(x) (((ia64_insn) ((x) & 0x1)) << 26) +#define bY1(x) (((ia64_insn) ((x) & 0x1)) << 19) +#define bZ(x) (((ia64_insn) ((x) & 0x3)) << 10) #define bHint(x) (((ia64_insn) ((x) & 0x3)) << 28) +#define bHlf(x) (((ia64_insn) ((x) & 0x1)) << 12) +#define bHlfa(x) (((ia64_insn) ((x) & 0x1)) << 19) #define mM bM (-1) #define mX bX (-1) @@ -46,8 +50,12 @@ #define mX6a bX6a (-1) #define mX6b bX6b (-1) #define mX7 bX7 (-1) -#define mY bY (-1) +#define mY bY (-1) +#define mY1 bY1 (-1) +#define mZ bZ (-1) #define mHint bHint (-1) +#define mHlf bHlf (-1) +#define mHlfa bHlfa(-1) #define OpX3(a,b) (bOp (a) | bX3 (b)), (mOp | mX3) #define OpX3X6b(a,b,c) (bOp (a) | bX3 (b) | bX6b (c)), \ @@ -58,10 +66,14 @@ (mOp | mX3 | mX4) #define OpX3X4X2(a,b,c,d) (bOp (a) | bX3 (b) | bX4 (c) | bX2 (d)), \ (mOp | mX3 | mX4 | mX2) -#define OpX3X4X2Y(a,b,c,d,e) (bOp (a) | bX3 (b) | bX4 (c) | bX2 (d) | bY (e)), \ +#define OpX3X4X2Y(a,b,c,d,e) (bOp (a) | bX3 (b) | bX4 (c) | bX2 (d) | bY (e)), \ (mOp | mX3 | mX4 | mX2 | mY) +#define OpX3X4X2YZ(a,b,c,d,e,f) (bOp (a) | bX3 (b) | bX4 (c) | bX2 (d) | bY (e) | bZ(f)), \ + (mOp | mX3 | mX4 | mX2 | mY | mZ ) #define OpX6aHint(a,b,c) (bOp (a) | bX6a (b) | bHint (c)), \ (mOp | mX6a | mHint) +#define OpX6aHintHlf(a,b,c,d) (bOp (a) | bX6a (b) | bHint (c) | bHlf(d)), \ + (mOp | mX6a | mHint | mHlf) #define OpXX6aHint(a,b,c,d) (bOp (a) | bX (b) | bX6a (c) | bHint (d)), \ (mOp | mX | mX6a | mHint) #define OpMXX6a(a,b,c,d) \ @@ -69,6 +81,18 @@ #define OpMXX6aHint(a,b,c,d,e) \ (bOp (a) | bM (b) | bX (c) | bX6a (d) | bHint (e)), \ (mOp | mM | mX | mX6a | mHint) +#define OpMXX6aHintHlf(a,b,c,d,e,f) \ + (bOp (a) | bM (b) | bX (c) | bX6a (d) | bHint (e) | bHlf(f)), \ + (mOp | mM | mX | mX6a | mHint | mHlf) +#define OpMXX6aHintHlfa(a,b,c,d,e,f) \ + (bOp (a) | bM (b) | bX (c) | bX6a (d) | bHint (e) | bHlfa(f)), \ + (mOp | mM | mX | mX6a | mHint | mHlfa) +#define OpMXY1X6aHintHlf(a,b,c, cY, d,e,f) \ + (bOp (a) | bM (b) | bX (c) | bY1(cY) | bX6a (d) | bHint (e) | bHlf(f)), \ + (mOp | mM | mX | mY1 | mX6a | mHint | mHlf) +#define OpX6aHintHlf(a,b,c,d) \ + (bOp (a) | bX6a (b) | bHint (c) | bHlf(d)), \ + (mOp | mX6a | mHint | mHlf) /* Used to initialise unused fields in ia64_opcode struct, in order to stop gcc from complaining. */ @@ -98,7 +122,8 @@ struct ia64_opcode ia64_opcodes_m[] = {"break.m", M0, OpX3X4X2 (0, 0, 0, 0), {IMMU21}, EMPTY}, {"nop.m", M0, OpX3X4X2Y (0, 0, 1, 0, 0), {IMMU21}, EMPTY}, - {"hint.m", M0, OpX3X4X2Y (0, 0, 1, 0, 1), {IMMU21}, EMPTY}, + {"hint.m", M0, OpX3X4X2YZ(0, 0, 1, 0, 1, 0), {IMMU19}, EMPTY}, + {"mov", M, OpX3X4X2YZ(0, 0, 1, 0, 1, 1), {DAHR, IMMU16}, EMPTY}, {"sum", M0, OpX3X4 (0, 0, 4), {IMMU24}, EMPTY}, {"rum", M0, OpX3X4 (0, 0, 5), {IMMU24}, EMPTY}, @@ -145,6 +170,7 @@ struct ia64_opcode ia64_opcodes_m[] = {"mov", M, OpX3X6b (1, 0, 0x15), {R1, PMD_R3}, EMPTY}, {"mov", M, OpX3X6b (1, 0, 0x16), {R1, MSR_R3}, PRIV, 0, NULL}, {"mov", M, OpX3X6b (1, 0, 0x17), {R1, CPUID_R3}, EMPTY}, + {"mov", M, OpX3X6b (1, 0, 0x20), {R1, DAHR_R3}, EMPTY}, {"ptc.l", M0, OpX3X6b (1, 0, 0x09), {R3, R2}, PRIV, 0, NULL}, {"ptc.g", M0, OpX3X6b (1, 0, 0x0a), {R3, R2}, LAST | PRIV, 0, NULL}, @@ -164,6 +190,9 @@ struct ia64_opcode ia64_opcodes_m[] = {"fc.i", M0, OpX3X6bX7 (1, 0, 0x30, 1), {R3}, EMPTY}, {"ptc.e", M0, OpX3X6b (1, 0, 0x34), {R3}, PRIV, 0, NULL}, +#if 0 +// old pre-psn variant with 2-bit hints; +// saved for reference /* integer load */ {"ld1", M, OpMXX6aHint (4, 0, 0, 0x00, 0), {R1, MR3}, EMPTY}, {"ld1.nt1", M, OpMXX6aHint (4, 0, 0, 0x00, 1), {R1, MR3}, EMPTY}, @@ -288,10 +317,466 @@ struct ia64_opcode ia64_opcodes_m[] = {"ld8.c.clr.acq", M, OpMXX6aHint (4, 0, 0, 0x2b, 0), {R1, MR3}, EMPTY}, {"ld8.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x2b, 1), {R1, MR3}, EMPTY}, {"ld8.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x2b, 3), {R1, MR3}, EMPTY}, +#endif + +#if 1 + /* integer load */ + {"ld1", M, OpMXX6aHintHlfa (4, 0, 0, 0x00, 0, 0), {R1, MR3}, EMPTY}, + {"ld1.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x00, 1, 0), {R1, MR3}, EMPTY}, + {"ld1.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x00, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x00, 2, 0), {R1, MR3}, EMPTY}, + {"ld1.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x00, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x00, 3, 0), {R1, MR3}, EMPTY}, + {"ld1.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x00, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x00, 0, 1), {R1, MR3}, EMPTY}, + {"ld1.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x00, 1, 1), {R1, MR3}, EMPTY}, + {"ld1.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x00, 2, 1), {R1, MR3}, EMPTY}, + {"ld1.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x00, 3, 1), {R1, MR3}, EMPTY}, + {"ld2", M, OpMXX6aHintHlfa (4, 0, 0, 0x01, 0, 0), {R1, MR3}, EMPTY}, + {"ld2.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x01, 1, 0), {R1, MR3}, EMPTY}, + {"ld2.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x01, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x01, 2, 0), {R1, MR3}, EMPTY}, + {"ld2.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x01, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x01, 3, 0), {R1, MR3}, EMPTY}, + {"ld2.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x01, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x01, 0, 1), {R1, MR3}, EMPTY}, + {"ld2.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x01, 1, 1), {R1, MR3}, EMPTY}, + {"ld2.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x01, 2, 1), {R1, MR3}, EMPTY}, + {"ld2.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x01, 3, 1), {R1, MR3}, EMPTY}, + {"ld4", M, OpMXX6aHintHlfa (4, 0, 0, 0x02, 0, 0), {R1, MR3}, EMPTY}, + {"ld4.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x02, 1, 0), {R1, MR3}, EMPTY}, + {"ld4.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x02, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x02, 2, 0), {R1, MR3}, EMPTY}, + {"ld4.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x02, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x02, 3, 0), {R1, MR3}, EMPTY}, + {"ld4.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x02, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x02, 0, 1), {R1, MR3}, EMPTY}, + {"ld4.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x02, 1, 1), {R1, MR3}, EMPTY}, + {"ld4.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x02, 2, 1), {R1, MR3}, EMPTY}, + {"ld4.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x02, 3, 1), {R1, MR3}, EMPTY}, + {"ld8", M, OpMXX6aHintHlfa (4, 0, 0, 0x03, 0, 0), {R1, MR3}, EMPTY}, + {"ld8.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x03, 1, 0), {R1, MR3}, EMPTY}, + {"ld8.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x03, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x03, 2, 0), {R1, MR3}, EMPTY}, + {"ld8.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x03, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x03, 3, 0), {R1, MR3}, EMPTY}, + {"ld8.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x03, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x03, 0, 1), {R1, MR3}, EMPTY}, + {"ld8.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x03, 1, 1), {R1, MR3}, EMPTY}, + {"ld8.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x03, 2, 1), {R1, MR3}, EMPTY}, + {"ld8.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x03, 3, 1), {R1, MR3}, EMPTY}, + {"ld1.s", M, OpMXX6aHintHlfa (4, 0, 0, 0x04, 0, 0), {R1, MR3}, EMPTY}, + {"ld1.s.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x04, 1, 0), {R1, MR3}, EMPTY}, + {"ld1.s.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x04, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.s.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x04, 2, 0), {R1, MR3}, EMPTY}, + {"ld1.s.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x04, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.s.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x04, 3, 0), {R1, MR3}, EMPTY}, + {"ld1.s.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x04, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.s.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x04, 0, 1), {R1, MR3}, EMPTY}, + {"ld1.s.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x04, 1, 1), {R1, MR3}, EMPTY}, + {"ld1.s.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x04, 2, 1), {R1, MR3}, EMPTY}, + {"ld1.s.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x04, 3, 1), {R1, MR3}, EMPTY}, + {"ld2.s", M, OpMXX6aHintHlfa (4, 0, 0, 0x05, 0, 0), {R1, MR3}, EMPTY}, + {"ld2.s.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x05, 1, 0), {R1, MR3}, EMPTY}, + {"ld2.s.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x05, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.s.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x05, 2, 0), {R1, MR3}, EMPTY}, + {"ld2.s.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x05, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.s.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x05, 3, 0), {R1, MR3}, EMPTY}, + {"ld2.s.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x05, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.s.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x05, 0, 1), {R1, MR3}, EMPTY}, + {"ld2.s.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x05, 1, 1), {R1, MR3}, EMPTY}, + {"ld2.s.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x05, 2, 1), {R1, MR3}, EMPTY}, + {"ld2.s.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x05, 3, 1), {R1, MR3}, EMPTY}, + {"ld4.s", M, OpMXX6aHintHlfa (4, 0, 0, 0x06, 0, 0), {R1, MR3}, EMPTY}, + {"ld4.s.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x06, 1, 0), {R1, MR3}, EMPTY}, + {"ld4.s.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x06, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.s.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x06, 2, 0), {R1, MR3}, EMPTY}, + {"ld4.s.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x06, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.s.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x06, 3, 0), {R1, MR3}, EMPTY}, + {"ld4.s.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x06, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.s.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x06, 0, 1), {R1, MR3}, EMPTY}, + {"ld4.s.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x06, 1, 1), {R1, MR3}, EMPTY}, + {"ld4.s.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x06, 2, 1), {R1, MR3}, EMPTY}, + {"ld4.s.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x06, 3, 1), {R1, MR3}, EMPTY}, + {"ld8.s", M, OpMXX6aHintHlfa (4, 0, 0, 0x07, 0, 0), {R1, MR3}, EMPTY}, + {"ld8.s.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x07, 1, 0), {R1, MR3}, EMPTY}, + {"ld8.s.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x07, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.s.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x07, 2, 0), {R1, MR3}, EMPTY}, + {"ld8.s.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x07, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.s.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x07, 3, 0), {R1, MR3}, EMPTY}, + {"ld8.s.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x07, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.s.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x07, 0, 1), {R1, MR3}, EMPTY}, + {"ld8.s.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x07, 1, 1), {R1, MR3}, EMPTY}, + {"ld8.s.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x07, 2, 1), {R1, MR3}, EMPTY}, + {"ld8.s.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x07, 3, 1), {R1, MR3}, EMPTY}, + {"ld1.a", M, OpMXX6aHintHlfa (4, 0, 0, 0x08, 0, 0), {R1, MR3}, EMPTY}, + {"ld1.a.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x08, 1, 0), {R1, MR3}, EMPTY}, + {"ld1.a.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x08, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.a.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x08, 2, 0), {R1, MR3}, EMPTY}, + {"ld1.a.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x08, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.a.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x08, 3, 0), {R1, MR3}, EMPTY}, + {"ld1.a.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x08, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.a.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x08, 0, 1), {R1, MR3}, EMPTY}, + {"ld1.a.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x08, 1, 1), {R1, MR3}, EMPTY}, + {"ld1.a.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x08, 2, 1), {R1, MR3}, EMPTY}, + {"ld1.a.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x08, 3, 1), {R1, MR3}, EMPTY}, + {"ld2.a", M, OpMXX6aHintHlfa (4, 0, 0, 0x09, 0, 0), {R1, MR3}, EMPTY}, + {"ld2.a.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x09, 1, 0), {R1, MR3}, EMPTY}, + {"ld2.a.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x09, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.a.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x09, 2, 0), {R1, MR3}, EMPTY}, + {"ld2.a.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x09, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.a.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x09, 3, 0), {R1, MR3}, EMPTY}, + {"ld2.a.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x09, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.a.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x09, 0, 1), {R1, MR3}, EMPTY}, + {"ld2.a.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x09, 1, 1), {R1, MR3}, EMPTY}, + {"ld2.a.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x09, 2, 1), {R1, MR3}, EMPTY}, + {"ld2.a.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x09, 3, 1), {R1, MR3}, EMPTY}, + {"ld4.a", M, OpMXX6aHintHlfa (4, 0, 0, 0x0a, 0, 0), {R1, MR3}, EMPTY}, + {"ld4.a.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x0a, 1, 0), {R1, MR3}, EMPTY}, + {"ld4.a.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x0a, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.a.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x0a, 2, 0), {R1, MR3}, EMPTY}, + {"ld4.a.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x0a, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.a.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x0a, 3, 0), {R1, MR3}, EMPTY}, + {"ld4.a.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x0a, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.a.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x0a, 0, 1), {R1, MR3}, EMPTY}, + {"ld4.a.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x0a, 1, 1), {R1, MR3}, EMPTY}, + {"ld4.a.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x0a, 2, 1), {R1, MR3}, EMPTY}, + {"ld4.a.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x0a, 3, 1), {R1, MR3}, EMPTY}, + {"ld8.a", M, OpMXX6aHintHlfa (4, 0, 0, 0x0b, 0, 0), {R1, MR3}, EMPTY}, + {"ld8.a.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x0b, 1, 0), {R1, MR3}, EMPTY}, + {"ld8.a.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x0b, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.a.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x0b, 2, 0), {R1, MR3}, EMPTY}, + {"ld8.a.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x0b, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.a.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x0b, 3, 0), {R1, MR3}, EMPTY}, + {"ld8.a.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x0b, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.a.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x0b, 0, 1), {R1, MR3}, EMPTY}, + {"ld8.a.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x0b, 1, 1), {R1, MR3}, EMPTY}, + {"ld8.a.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x0b, 2, 1), {R1, MR3}, EMPTY}, + {"ld8.a.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x0b, 3, 1), {R1, MR3}, EMPTY}, + {"ld1.sa", M, OpMXX6aHintHlfa (4, 0, 0, 0x0c, 0, 0), {R1, MR3}, EMPTY}, + {"ld1.sa.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x0c, 1, 0), {R1, MR3}, EMPTY}, + {"ld1.sa.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x0c, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.sa.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x0c, 2, 0), {R1, MR3}, EMPTY}, + {"ld1.sa.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x0c, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.sa.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x0c, 3, 0), {R1, MR3}, EMPTY}, + {"ld1.sa.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x0c, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.sa.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x0c, 0, 1), {R1, MR3}, EMPTY}, + {"ld1.sa.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x0c, 1, 1), {R1, MR3}, EMPTY}, + {"ld1.sa.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x0c, 2, 1), {R1, MR3}, EMPTY}, + {"ld1.sa.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x0c, 3, 1), {R1, MR3}, EMPTY}, + {"ld2.sa", M, OpMXX6aHintHlfa (4, 0, 0, 0x0d, 0, 0), {R1, MR3}, EMPTY}, + {"ld2.sa.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x0d, 1, 0), {R1, MR3}, EMPTY}, + {"ld2.sa.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x0d, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.sa.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x0d, 2, 0), {R1, MR3}, EMPTY}, + {"ld2.sa.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x0d, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.sa.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x0d, 3, 0), {R1, MR3}, EMPTY}, + {"ld2.sa.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x0d, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.sa.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x0d, 0, 1), {R1, MR3}, EMPTY}, + {"ld2.sa.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x0d, 1, 1), {R1, MR3}, EMPTY}, + {"ld2.sa.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x0d, 2, 1), {R1, MR3}, EMPTY}, + {"ld2.sa.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x0d, 3, 1), {R1, MR3}, EMPTY}, + {"ld4.sa", M, OpMXX6aHintHlfa (4, 0, 0, 0x0e, 0, 0), {R1, MR3}, EMPTY}, + {"ld4.sa.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x0e, 1, 0), {R1, MR3}, EMPTY}, + {"ld4.sa.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x0e, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.sa.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x0e, 2, 0), {R1, MR3}, EMPTY}, + {"ld4.sa.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x0e, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.sa.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x0e, 3, 0), {R1, MR3}, EMPTY}, + {"ld4.sa.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x0e, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.sa.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x0e, 0, 1), {R1, MR3}, EMPTY}, + {"ld4.sa.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x0e, 1, 1), {R1, MR3}, EMPTY}, + {"ld4.sa.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x0e, 2, 1), {R1, MR3}, EMPTY}, + {"ld4.sa.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x0e, 3, 1), {R1, MR3}, EMPTY}, + {"ld8.sa", M, OpMXX6aHintHlfa (4, 0, 0, 0x0f, 0, 0), {R1, MR3}, EMPTY}, + {"ld8.sa.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x0f, 1, 0), {R1, MR3}, EMPTY}, + {"ld8.sa.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x0f, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.sa.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x0f, 2, 0), {R1, MR3}, EMPTY}, + {"ld8.sa.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x0f, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.sa.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x0f, 3, 0), {R1, MR3}, EMPTY}, + {"ld8.sa.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x0f, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.sa.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x0f, 0, 1), {R1, MR3}, EMPTY}, + {"ld8.sa.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x0f, 1, 1), {R1, MR3}, EMPTY}, + {"ld8.sa.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x0f, 2, 1), {R1, MR3}, EMPTY}, + {"ld8.sa.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x0f, 3, 1), {R1, MR3}, EMPTY}, + {"ld1.bias", M, OpMXX6aHintHlfa (4, 0, 0, 0x10, 0, 0), {R1, MR3}, EMPTY}, + {"ld1.bias.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x10, 1, 0), {R1, MR3}, EMPTY}, + {"ld1.bias.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x10, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.bias.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x10, 2, 0), {R1, MR3}, EMPTY}, + {"ld1.bias.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x10, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.bias.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x10, 3, 0), {R1, MR3}, EMPTY}, + {"ld1.bias.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x10, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.bias.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x10, 0, 1), {R1, MR3}, EMPTY}, + {"ld1.bias.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x10, 1, 1), {R1, MR3}, EMPTY}, + {"ld1.bias.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x10, 2, 1), {R1, MR3}, EMPTY}, + {"ld1.bias.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x10, 3, 1), {R1, MR3}, EMPTY}, + {"ld2.bias", M, OpMXX6aHintHlfa (4, 0, 0, 0x11, 0, 0), {R1, MR3}, EMPTY}, + {"ld2.bias.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x11, 1, 0), {R1, MR3}, EMPTY}, + {"ld2.bias.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x11, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.bias.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x11, 2, 0), {R1, MR3}, EMPTY}, + {"ld2.bias.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x11, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.bias.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x11, 3, 0), {R1, MR3}, EMPTY}, + {"ld2.bias.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x11, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.bias.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x11, 0, 1), {R1, MR3}, EMPTY}, + {"ld2.bias.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x11, 1, 1), {R1, MR3}, EMPTY}, + {"ld2.bias.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x11, 2, 1), {R1, MR3}, EMPTY}, + {"ld2.bias.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x11, 3, 1), {R1, MR3}, EMPTY}, + {"ld4.bias", M, OpMXX6aHintHlfa (4, 0, 0, 0x12, 0, 0), {R1, MR3}, EMPTY}, + {"ld4.bias.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x12, 1, 0), {R1, MR3}, EMPTY}, + {"ld4.bias.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x12, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.bias.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x12, 2, 0), {R1, MR3}, EMPTY}, + {"ld4.bias.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x12, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.bias.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x12, 3, 0), {R1, MR3}, EMPTY}, + {"ld4.bias.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x12, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.bias.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x12, 0, 1), {R1, MR3}, EMPTY}, + {"ld4.bias.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x12, 1, 1), {R1, MR3}, EMPTY}, + {"ld4.bias.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x12, 2, 1), {R1, MR3}, EMPTY}, + {"ld4.bias.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x12, 3, 1), {R1, MR3}, EMPTY}, + {"ld8.bias", M, OpMXX6aHintHlfa (4, 0, 0, 0x13, 0, 0), {R1, MR3}, EMPTY}, + {"ld8.bias.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x13, 1, 0), {R1, MR3}, EMPTY}, + {"ld8.bias.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x13, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.bias.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x13, 2, 0), {R1, MR3}, EMPTY}, + {"ld8.bias.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x13, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.bias.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x13, 3, 0), {R1, MR3}, EMPTY}, + {"ld8.bias.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x13, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.bias.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x13, 0, 1), {R1, MR3}, EMPTY}, + {"ld8.bias.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x13, 1, 1), {R1, MR3}, EMPTY}, + {"ld8.bias.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x13, 2, 1), {R1, MR3}, EMPTY}, + {"ld8.bias.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x13, 3, 1), {R1, MR3}, EMPTY}, + {"ld1.acq", M, OpMXX6aHintHlfa (4, 0, 0, 0x14, 0, 0), {R1, MR3}, EMPTY}, + {"ld1.acq.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x14, 1, 0), {R1, MR3}, EMPTY}, + {"ld1.acq.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x14, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.acq.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x14, 2, 0), {R1, MR3}, EMPTY}, + {"ld1.acq.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x14, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.acq.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x14, 3, 0), {R1, MR3}, EMPTY}, + {"ld1.acq.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x14, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.acq.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x14, 0, 1), {R1, MR3}, EMPTY}, + {"ld1.acq.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x14, 1, 1), {R1, MR3}, EMPTY}, + {"ld1.acq.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x14, 2, 1), {R1, MR3}, EMPTY}, + {"ld1.acq.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x14, 3, 1), {R1, MR3}, EMPTY}, + {"ld2.acq", M, OpMXX6aHintHlfa (4, 0, 0, 0x15, 0, 0), {R1, MR3}, EMPTY}, + {"ld2.acq.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x15, 1, 0), {R1, MR3}, EMPTY}, + {"ld2.acq.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x15, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.acq.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x15, 2, 0), {R1, MR3}, EMPTY}, + {"ld2.acq.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x15, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.acq.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x15, 3, 0), {R1, MR3}, EMPTY}, + {"ld2.acq.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x15, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.acq.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x15, 0, 1), {R1, MR3}, EMPTY}, + {"ld2.acq.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x15, 1, 1), {R1, MR3}, EMPTY}, + {"ld2.acq.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x15, 2, 1), {R1, MR3}, EMPTY}, + {"ld2.acq.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x15, 3, 1), {R1, MR3}, EMPTY}, + {"ld4.acq", M, OpMXX6aHintHlfa (4, 0, 0, 0x16, 0, 0), {R1, MR3}, EMPTY}, + {"ld4.acq.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x16, 1, 0), {R1, MR3}, EMPTY}, + {"ld4.acq.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x16, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.acq.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x16, 2, 0), {R1, MR3}, EMPTY}, + {"ld4.acq.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x16, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.acq.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x16, 3, 0), {R1, MR3}, EMPTY}, + {"ld4.acq.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x16, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.acq.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x16, 0, 1), {R1, MR3}, EMPTY}, + {"ld4.acq.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x16, 1, 1), {R1, MR3}, EMPTY}, + {"ld4.acq.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x16, 2, 1), {R1, MR3}, EMPTY}, + {"ld4.acq.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x16, 3, 1), {R1, MR3}, EMPTY}, + {"ld8.acq", M, OpMXX6aHintHlfa (4, 0, 0, 0x17, 0, 0), {R1, MR3}, EMPTY}, + {"ld8.acq.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x17, 1, 0), {R1, MR3}, EMPTY}, + {"ld8.acq.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x17, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.acq.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x17, 2, 0), {R1, MR3}, EMPTY}, + {"ld8.acq.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x17, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.acq.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x17, 3, 0), {R1, MR3}, EMPTY}, + {"ld8.acq.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x17, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.acq.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x17, 0, 1), {R1, MR3}, EMPTY}, + {"ld8.acq.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x17, 1, 1), {R1, MR3}, EMPTY}, + {"ld8.acq.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x17, 2, 1), {R1, MR3}, EMPTY}, + {"ld8.acq.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x17, 3, 1), {R1, MR3}, EMPTY}, + {"ld8.fill", M, OpMXX6aHintHlfa (4, 0, 0, 0x1b, 0, 0), {R1, MR3}, EMPTY}, + {"ld8.fill.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x1b, 1, 0), {R1, MR3}, EMPTY}, + {"ld8.fill.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x1b, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.fill.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x1b, 2, 0), {R1, MR3}, EMPTY}, + {"ld8.fill.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x1b, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.fill.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x1b, 3, 0), {R1, MR3}, EMPTY}, + {"ld8.fill.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x1b, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.fill.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x1b, 0, 1), {R1, MR3}, EMPTY}, + {"ld8.fill.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x1b, 1, 1), {R1, MR3}, EMPTY}, + {"ld8.fill.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x1b, 2, 1), {R1, MR3}, EMPTY}, + {"ld8.fill.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x1b, 3, 1), {R1, MR3}, EMPTY}, + {"ld1.c.clr", M, OpMXX6aHintHlfa (4, 0, 0, 0x20, 0, 0), {R1, MR3}, EMPTY}, + {"ld1.c.clr.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x20, 1, 0), {R1, MR3}, EMPTY}, + {"ld1.c.clr.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x20, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.c.clr.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x20, 2, 0), {R1, MR3}, EMPTY}, + {"ld1.c.clr.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x20, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.c.clr.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x20, 3, 0), {R1, MR3}, EMPTY}, + {"ld1.c.clr.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x20, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.c.clr.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x20, 0, 1), {R1, MR3}, EMPTY}, + {"ld1.c.clr.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x20, 1, 1), {R1, MR3}, EMPTY}, + {"ld1.c.clr.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x20, 2, 1), {R1, MR3}, EMPTY}, + {"ld1.c.clr.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x20, 3, 1), {R1, MR3}, EMPTY}, + {"ld2.c.clr", M, OpMXX6aHintHlfa (4, 0, 0, 0x21, 0, 0), {R1, MR3}, EMPTY}, + {"ld2.c.clr.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x21, 1, 0), {R1, MR3}, EMPTY}, + {"ld2.c.clr.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x21, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.c.clr.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x21, 2, 0), {R1, MR3}, EMPTY}, + {"ld2.c.clr.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x21, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.c.clr.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x21, 3, 0), {R1, MR3}, EMPTY}, + {"ld2.c.clr.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x21, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.c.clr.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x21, 0, 1), {R1, MR3}, EMPTY}, + {"ld2.c.clr.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x21, 1, 1), {R1, MR3}, EMPTY}, + {"ld2.c.clr.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x21, 2, 1), {R1, MR3}, EMPTY}, + {"ld2.c.clr.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x21, 3, 1), {R1, MR3}, EMPTY}, + {"ld4.c.clr", M, OpMXX6aHintHlfa (4, 0, 0, 0x22, 0, 0), {R1, MR3}, EMPTY}, + {"ld4.c.clr.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x22, 1, 0), {R1, MR3}, EMPTY}, + {"ld4.c.clr.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x22, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.c.clr.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x22, 2, 0), {R1, MR3}, EMPTY}, + {"ld4.c.clr.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x22, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.c.clr.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x22, 3, 0), {R1, MR3}, EMPTY}, + {"ld4.c.clr.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x22, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.c.clr.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x22, 0, 1), {R1, MR3}, EMPTY}, + {"ld4.c.clr.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x22, 1, 1), {R1, MR3}, EMPTY}, + {"ld4.c.clr.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x22, 2, 1), {R1, MR3}, EMPTY}, + {"ld4.c.clr.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x22, 3, 1), {R1, MR3}, EMPTY}, + {"ld8.c.clr", M, OpMXX6aHintHlfa (4, 0, 0, 0x23, 0, 0), {R1, MR3}, EMPTY}, + {"ld8.c.clr.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x23, 1, 0), {R1, MR3}, EMPTY}, + {"ld8.c.clr.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x23, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.c.clr.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x23, 2, 0), {R1, MR3}, EMPTY}, + {"ld8.c.clr.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x23, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.c.clr.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x23, 3, 0), {R1, MR3}, EMPTY}, + {"ld8.c.clr.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x23, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.c.clr.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x23, 0, 1), {R1, MR3}, EMPTY}, + {"ld8.c.clr.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x23, 1, 1), {R1, MR3}, EMPTY}, + {"ld8.c.clr.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x23, 2, 1), {R1, MR3}, EMPTY}, + {"ld8.c.clr.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x23, 3, 1), {R1, MR3}, EMPTY}, + {"ld1.c.nc", M, OpMXX6aHintHlfa (4, 0, 0, 0x24, 0, 0), {R1, MR3}, EMPTY}, + {"ld1.c.nc.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x24, 1, 0), {R1, MR3}, EMPTY}, + {"ld1.c.nc.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x24, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.c.nc.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x24, 2, 0), {R1, MR3}, EMPTY}, + {"ld1.c.nc.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x24, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.c.nc.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x24, 3, 0), {R1, MR3}, EMPTY}, + {"ld1.c.nc.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x24, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.c.nc.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x24, 0, 1), {R1, MR3}, EMPTY}, + {"ld1.c.nc.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x24, 1, 1), {R1, MR3}, EMPTY}, + {"ld1.c.nc.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x24, 2, 1), {R1, MR3}, EMPTY}, + {"ld1.c.nc.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x24, 3, 1), {R1, MR3}, EMPTY}, + {"ld2.c.nc", M, OpMXX6aHintHlfa (4, 0, 0, 0x25, 0, 0), {R1, MR3}, EMPTY}, + {"ld2.c.nc.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x25, 1, 0), {R1, MR3}, EMPTY}, + {"ld2.c.nc.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x25, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.c.nc.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x25, 2, 0), {R1, MR3}, EMPTY}, + {"ld2.c.nc.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x25, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.c.nc.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x25, 3, 0), {R1, MR3}, EMPTY}, + {"ld2.c.nc.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x25, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.c.nc.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x25, 0, 1), {R1, MR3}, EMPTY}, + {"ld2.c.nc.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x25, 1, 1), {R1, MR3}, EMPTY}, + {"ld2.c.nc.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x25, 2, 1), {R1, MR3}, EMPTY}, + {"ld2.c.nc.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x25, 3, 1), {R1, MR3}, EMPTY}, + {"ld4.c.nc", M, OpMXX6aHintHlfa (4, 0, 0, 0x26, 0, 0), {R1, MR3}, EMPTY}, + {"ld4.c.nc.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x26, 1, 0), {R1, MR3}, EMPTY}, + {"ld4.c.nc.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x26, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.c.nc.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x26, 2, 0), {R1, MR3}, EMPTY}, + {"ld4.c.nc.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x26, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.c.nc.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x26, 3, 0), {R1, MR3}, EMPTY}, + {"ld4.c.nc.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x26, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.c.nc.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x26, 0, 1), {R1, MR3}, EMPTY}, + {"ld4.c.nc.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x26, 1, 1), {R1, MR3}, EMPTY}, + {"ld4.c.nc.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x26, 2, 1), {R1, MR3}, EMPTY}, + {"ld4.c.nc.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x26, 3, 1), {R1, MR3}, EMPTY}, + {"ld8.c.nc", M, OpMXX6aHintHlfa (4, 0, 0, 0x27, 0, 0), {R1, MR3}, EMPTY}, + {"ld8.c.nc.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x27, 1, 0), {R1, MR3}, EMPTY}, + {"ld8.c.nc.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x27, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.c.nc.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x27, 2, 0), {R1, MR3}, EMPTY}, + {"ld8.c.nc.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x27, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.c.nc.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x27, 3, 0), {R1, MR3}, EMPTY}, + {"ld8.c.nc.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x27, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.c.nc.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x27, 0, 1), {R1, MR3}, EMPTY}, + {"ld8.c.nc.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x27, 1, 1), {R1, MR3}, EMPTY}, + {"ld8.c.nc.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x27, 2, 1), {R1, MR3}, EMPTY}, + {"ld8.c.nc.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x27, 3, 1), {R1, MR3}, EMPTY}, + {"ld1.c.clr.acq", M, OpMXX6aHintHlfa (4, 0, 0, 0x28, 0, 0), {R1, MR3}, EMPTY}, + {"ld1.c.clr.acq.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x28, 1, 0), {R1, MR3}, EMPTY}, + {"ld1.c.clr.acq.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x28, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.c.clr.acq.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x28, 2, 0), {R1, MR3}, EMPTY}, + {"ld1.c.clr.acq.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x28, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.c.clr.acq.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x28, 3, 0), {R1, MR3}, EMPTY}, + {"ld1.c.clr.acq.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x28, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld1.c.clr.acq.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x28, 0, 1), {R1, MR3}, EMPTY}, + {"ld1.c.clr.acq.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x28, 1, 1), {R1, MR3}, EMPTY}, + {"ld1.c.clr.acq.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x28, 2, 1), {R1, MR3}, EMPTY}, + {"ld1.c.clr.acq.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x28, 3, 1), {R1, MR3}, EMPTY}, + {"ld2.c.clr.acq", M, OpMXX6aHintHlfa (4, 0, 0, 0x29, 0, 0), {R1, MR3}, EMPTY}, + {"ld2.c.clr.acq.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x29, 1, 0), {R1, MR3}, EMPTY}, + {"ld2.c.clr.acq.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x29, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.c.clr.acq.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x29, 2, 0), {R1, MR3}, EMPTY}, + {"ld2.c.clr.acq.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x29, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.c.clr.acq.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x29, 3, 0), {R1, MR3}, EMPTY}, + {"ld2.c.clr.acq.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x29, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld2.c.clr.acq.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x29, 0, 1), {R1, MR3}, EMPTY}, + {"ld2.c.clr.acq.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x29, 1, 1), {R1, MR3}, EMPTY}, + {"ld2.c.clr.acq.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x29, 2, 1), {R1, MR3}, EMPTY}, + {"ld2.c.clr.acq.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x29, 3, 1), {R1, MR3}, EMPTY}, + {"ld4.c.clr.acq", M, OpMXX6aHintHlfa (4, 0, 0, 0x2a, 0, 0), {R1, MR3}, EMPTY}, + {"ld4.c.clr.acq.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x2a, 1, 0), {R1, MR3}, EMPTY}, + {"ld4.c.clr.acq.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x2a, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.c.clr.acq.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x2a, 2, 0), {R1, MR3}, EMPTY}, + {"ld4.c.clr.acq.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x2a, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.c.clr.acq.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x2a, 3, 0), {R1, MR3}, EMPTY}, + {"ld4.c.clr.acq.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x2a, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld4.c.clr.acq.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x2a, 0, 1), {R1, MR3}, EMPTY}, + {"ld4.c.clr.acq.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x2a, 1, 1), {R1, MR3}, EMPTY}, + {"ld4.c.clr.acq.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x2a, 2, 1), {R1, MR3}, EMPTY}, + {"ld4.c.clr.acq.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x2a, 3, 1), {R1, MR3}, EMPTY}, + {"ld8.c.clr.acq", M, OpMXX6aHintHlfa (4, 0, 0, 0x2b, 0, 0), {R1, MR3}, EMPTY}, + {"ld8.c.clr.acq.nt1", M, OpMXX6aHintHlfa (4, 0, 0, 0x2b, 1, 0), {R1, MR3}, EMPTY}, + {"ld8.c.clr.acq.d1", M, OpMXX6aHintHlfa (4, 0, 0, 0x2b, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.c.clr.acq.d2", M, OpMXX6aHintHlfa (4, 0, 0, 0x2b, 2, 0), {R1, MR3}, EMPTY}, + {"ld8.c.clr.acq.nt2", M, OpMXX6aHintHlfa (4, 0, 0, 0x2b, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.c.clr.acq.nta", M, OpMXX6aHintHlfa (4, 0, 0, 0x2b, 3, 0), {R1, MR3}, EMPTY}, + {"ld8.c.clr.acq.d3", M, OpMXX6aHintHlfa (4, 0, 0, 0x2b, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld8.c.clr.acq.d4", M, OpMXX6aHintHlfa (4, 0, 0, 0x2b, 0, 1), {R1, MR3}, EMPTY}, + {"ld8.c.clr.acq.d5", M, OpMXX6aHintHlfa (4, 0, 0, 0x2b, 1, 1), {R1, MR3}, EMPTY}, + {"ld8.c.clr.acq.d6", M, OpMXX6aHintHlfa (4, 0, 0, 0x2b, 2, 1), {R1, MR3}, EMPTY}, + {"ld8.c.clr.acq.d7", M, OpMXX6aHintHlfa (4, 0, 0, 0x2b, 3, 1), {R1, MR3}, EMPTY}, + {"ld16", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 0, 0), {R1, AR_CSD, MR3}, EMPTY}, + {"ld16", M, OpMXX6aHintHlfa (4, 0, 1, 0x28, 0, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.nt1", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 1, 0), {R1, AR_CSD, MR3}, EMPTY}, + {"ld16.d1", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 1, 0), {R1, AR_CSD, MR3}, PSEUDO, 0, NULL}, + {"ld16.d2", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 2, 0), {R1, AR_CSD, MR3}, EMPTY}, + {"ld16.nt2", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 2, 0), {R1, AR_CSD, MR3}, PSEUDO, 0, NULL}, + {"ld16.nt1", M, OpMXX6aHintHlfa (4, 0, 1, 0x28, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.d1", M, OpMXX6aHintHlfa (4, 0, 1, 0x28, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.d2", M, OpMXX6aHintHlfa (4, 0, 1, 0x28, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.nt2", M, OpMXX6aHintHlfa (4, 0, 1, 0x28, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.nta", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 3, 0), {R1, AR_CSD, MR3}, EMPTY}, + {"ld16.d3", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 3, 0), {R1, AR_CSD, MR3}, PSEUDO, 0, NULL}, + {"ld16.d4", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 0, 1), {R1, AR_CSD, MR3}, EMPTY}, + {"ld16.d5", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 1, 1), {R1, AR_CSD, MR3}, EMPTY}, + {"ld16.d6", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 2, 1), {R1, AR_CSD, MR3}, EMPTY}, + {"ld16.d7", M2, OpMXX6aHintHlfa (4, 0, 1, 0x28, 3, 1), {R1, AR_CSD, MR3}, EMPTY}, + {"ld16.nta", M, OpMXX6aHintHlfa (4, 0, 1, 0x28, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.d3", M, OpMXX6aHintHlfa (4, 0, 1, 0x28, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.d4", M, OpMXX6aHintHlfa (4, 0, 1, 0x28, 0, 1), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.d5", M, OpMXX6aHintHlfa (4, 0, 1, 0x28, 1, 1), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.d6", M, OpMXX6aHintHlfa (4, 0, 1, 0x28, 2, 1), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.d7", M, OpMXX6aHintHlfa (4, 0, 1, 0x28, 3, 1), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.acq", M2, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 0, 0), {R1, AR_CSD, MR3}, EMPTY}, + {"ld16.acq", M, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 0, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.acq.nt1", M2, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 1, 0), {R1, AR_CSD, MR3}, EMPTY}, + {"ld16.acq.d1", M2, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 1, 0), {R1, AR_CSD, MR3}, PSEUDO, 0, NULL}, + {"ld16.acq.d2", M2, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 2, 0), {R1, AR_CSD, MR3}, EMPTY}, + {"ld16.acq.nt2", M2, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 2, 0), {R1, AR_CSD, MR3}, PSEUDO, 0, NULL}, + {"ld16.acq.nt1", M, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.acq.d1", M, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 1, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.acq.d2", M, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.acq.nt2", M, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 2, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.acq.nta", M2, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 3, 0), {R1, AR_CSD, MR3}, EMPTY}, + {"ld16.acq.d3", M2, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 3, 0), {R1, AR_CSD, MR3}, PSEUDO, 0, NULL}, + {"ld16.acq.d4", M2, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 0, 1), {R1, AR_CSD, MR3}, EMPTY}, + {"ld16.acq.d5", M2, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 1, 1), {R1, AR_CSD, MR3}, EMPTY}, + {"ld16.acq.d6", M2, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 2, 1), {R1, AR_CSD, MR3}, EMPTY}, + {"ld16.acq.d7", M2, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 3, 1), {R1, AR_CSD, MR3}, EMPTY}, + {"ld16.acq.nta", M, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.acq.d3", M, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 3, 0), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.acq.d4", M, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 0, 1), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.acq.d5", M, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 1, 1), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.acq.d6", M, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 2, 1), {R1, MR3}, PSEUDO, 0, NULL}, + {"ld16.acq.d7", M, OpMXX6aHintHlfa (4, 0, 1, 0x2c, 3, 1), {R1, MR3}, PSEUDO, 0, NULL}, /* Pseudo-op that generates ldxmov relocation. */ {"ld8.mov", M, OpMXX6aHint (4, 0, 0, 0x03, 0), {R1, MR3, IA64_OPND_LDXMOV}, EMPTY}, +#endif /* Integer load w/increment by register. */ #define LDINCREG(c,h) M, OpMXX6aHint (4, 1, 0, c, h), {R1, MR3, R2}, POSTINC, 0, NULL @@ -408,6 +893,10 @@ struct ia64_opcode ia64_opcodes_m[] = {"ld8.c.clr.acq.nta", LDINCREG (0x2b, 3)}, #undef LDINCREG +#if 0 +// old pre-psn variant with 2-bit hints; +// saved for reference + {"st1", M, OpMXX6aHint (4, 0, 0, 0x30, 0), {MR3, R2}, EMPTY}, {"st1.nta", M, OpMXX6aHint (4, 0, 0, 0x30, 3), {MR3, R2}, EMPTY}, {"st2", M, OpMXX6aHint (4, 0, 0, 0x31, 0), {MR3, R2}, EMPTY}, @@ -434,6 +923,151 @@ struct ia64_opcode ia64_opcodes_m[] = {"st16.rel.nta", M, OpMXX6aHint (4, 0, 1, 0x34, 3), {MR3, R2}, PSEUDO, 0, NULL}, {"st8.spill", M, OpMXX6aHint (4, 0, 0, 0x3b, 0), {MR3, R2}, EMPTY}, {"st8.spill.nta", M, OpMXX6aHint (4, 0, 0, 0x3b, 3), {MR3, R2}, EMPTY}, +#endif + + {"st1", M, OpMXX6aHintHlf (4, 0, 0, 0x30, 0, 0), {MR3, R2}, EMPTY}, + {"st1.d1", M, OpMXX6aHintHlf (4, 0, 0, 0x30, 1, 0), {MR3, R2}, EMPTY}, + {"st1.nt1", M, OpMXX6aHintHlf (4, 0, 0, 0x30, 1, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st1.d2", M, OpMXX6aHintHlf (4, 0, 0, 0x30, 2, 0), {MR3, R2}, EMPTY}, + {"st1.nt2", M, OpMXX6aHintHlf (4, 0, 0, 0x30, 2, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st1.nta", M, OpMXX6aHintHlf (4, 0, 0, 0x30, 3, 0), {MR3, R2}, EMPTY}, + {"st1.d3", M, OpMXX6aHintHlf (4, 0, 0, 0x30, 3, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st1.d4", M, OpMXX6aHintHlf (4, 0, 0, 0x30, 0, 1), {MR3, R2}, EMPTY}, + {"st1.d5", M, OpMXX6aHintHlf (4, 0, 0, 0x30, 1, 1), {MR3, R2}, EMPTY}, + {"st1.d6", M, OpMXX6aHintHlf (4, 0, 0, 0x30, 2, 1), {MR3, R2}, EMPTY}, + {"st1.d7", M, OpMXX6aHintHlf (4, 0, 0, 0x30, 3, 1), {MR3, R2}, EMPTY}, + {"st2", M, OpMXX6aHintHlf (4, 0, 0, 0x31, 0, 0), {MR3, R2}, EMPTY}, + {"st2.d1", M, OpMXX6aHintHlf (4, 0, 0, 0x31, 1, 0), {MR3, R2}, EMPTY}, + {"st2.nt1", M, OpMXX6aHintHlf (4, 0, 0, 0x31, 1, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st2.d2", M, OpMXX6aHintHlf (4, 0, 0, 0x31, 2, 0), {MR3, R2}, EMPTY}, + {"st2.nt2", M, OpMXX6aHintHlf (4, 0, 0, 0x31, 2, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st2.nta", M, OpMXX6aHintHlf (4, 0, 0, 0x31, 3, 0), {MR3, R2}, EMPTY}, + {"st2.d3", M, OpMXX6aHintHlf (4, 0, 0, 0x31, 3, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st2.d4", M, OpMXX6aHintHlf (4, 0, 0, 0x31, 0, 1), {MR3, R2}, EMPTY}, + {"st2.d5", M, OpMXX6aHintHlf (4, 0, 0, 0x31, 1, 1), {MR3, R2}, EMPTY}, + {"st2.d6", M, OpMXX6aHintHlf (4, 0, 0, 0x31, 2, 1), {MR3, R2}, EMPTY}, + {"st2.d7", M, OpMXX6aHintHlf (4, 0, 0, 0x31, 3, 1), {MR3, R2}, EMPTY}, + {"st4", M, OpMXX6aHintHlf (4, 0, 0, 0x32, 0, 0), {MR3, R2}, EMPTY}, + {"st4.d1", M, OpMXX6aHintHlf (4, 0, 0, 0x32, 1, 0), {MR3, R2}, EMPTY}, + {"st4.nt1", M, OpMXX6aHintHlf (4, 0, 0, 0x32, 1, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st4.d2", M, OpMXX6aHintHlf (4, 0, 0, 0x32, 2, 0), {MR3, R2}, EMPTY}, + {"st4.nt2", M, OpMXX6aHintHlf (4, 0, 0, 0x32, 2, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st4.nta", M, OpMXX6aHintHlf (4, 0, 0, 0x32, 3, 0), {MR3, R2}, EMPTY}, + {"st4.d3", M, OpMXX6aHintHlf (4, 0, 0, 0x32, 3, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st4.d4", M, OpMXX6aHintHlf (4, 0, 0, 0x32, 0, 1), {MR3, R2}, EMPTY}, + {"st4.d5", M, OpMXX6aHintHlf (4, 0, 0, 0x32, 1, 1), {MR3, R2}, EMPTY}, + {"st4.d6", M, OpMXX6aHintHlf (4, 0, 0, 0x32, 2, 1), {MR3, R2}, EMPTY}, + {"st4.d7", M, OpMXX6aHintHlf (4, 0, 0, 0x32, 3, 1), {MR3, R2}, EMPTY}, + {"st8", M, OpMXX6aHintHlf (4, 0, 0, 0x33, 0, 0), {MR3, R2}, EMPTY}, + {"st8.d1", M, OpMXX6aHintHlf (4, 0, 0, 0x33, 1, 0), {MR3, R2}, EMPTY}, + {"st8.nt1", M, OpMXX6aHintHlf (4, 0, 0, 0x33, 1, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st8.d2", M, OpMXX6aHintHlf (4, 0, 0, 0x33, 2, 0), {MR3, R2}, EMPTY}, + {"st8.nt2", M, OpMXX6aHintHlf (4, 0, 0, 0x33, 2, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st8.nta", M, OpMXX6aHintHlf (4, 0, 0, 0x33, 3, 0), {MR3, R2}, EMPTY}, + {"st8.d3", M, OpMXX6aHintHlf (4, 0, 0, 0x33, 3, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st8.d4", M, OpMXX6aHintHlf (4, 0, 0, 0x33, 0, 1), {MR3, R2}, EMPTY}, + {"st8.d5", M, OpMXX6aHintHlf (4, 0, 0, 0x33, 1, 1), {MR3, R2}, EMPTY}, + {"st8.d6", M, OpMXX6aHintHlf (4, 0, 0, 0x33, 2, 1), {MR3, R2}, EMPTY}, + {"st8.d7", M, OpMXX6aHintHlf (4, 0, 0, 0x33, 3, 1), {MR3, R2}, EMPTY}, + {"st16", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 0, 0), {MR3, R2, AR_CSD}, EMPTY}, + {"st16", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 0, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.d1", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 1, 0), {MR3, R2, AR_CSD}, EMPTY}, + {"st16.d1", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 1, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.nt1", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 1, 0), {MR3, R2, AR_CSD}, PSEUDO, 0, NULL}, + {"st16.nt1", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 1, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.d2", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 2, 0), {MR3, R2, AR_CSD}, EMPTY}, + {"st16.d2", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 2, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.nt2", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 2, 0), {MR3, R2, AR_CSD}, PSEUDO, 0, NULL}, + {"st16.nt2", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 2, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.nta", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 3, 0), {MR3, R2, AR_CSD}, EMPTY}, + {"st16.d3", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 3, 0), {MR3, R2, AR_CSD}, PSEUDO, 0, NULL}, + {"st16.d4", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 0, 1), {MR3, R2, AR_CSD}, EMPTY}, + {"st16.d5", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 1, 1), {MR3, R2, AR_CSD}, EMPTY}, + {"st16.d6", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 2, 1), {MR3, R2, AR_CSD}, EMPTY}, + {"st16.d7", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 3, 1), {MR3, R2, AR_CSD}, EMPTY}, + {"st16.nta", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 3, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.d3", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 3, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.d4", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 0, 1), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.d5", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 1, 1), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.d6", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 2, 1), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.d7", M, OpMXX6aHintHlf (4, 0, 1, 0x30, 3, 1), {MR3, R2}, PSEUDO, 0, NULL}, + {"st1.rel", M, OpMXX6aHintHlf (4, 0, 0, 0x34, 0, 0), {MR3, R2}, EMPTY}, + {"st1.rel.d1", M, OpMXX6aHintHlf (4, 0, 0, 0x34, 1, 0), {MR3, R2}, EMPTY}, + {"st1.rel.nt1", M, OpMXX6aHintHlf (4, 0, 0, 0x34, 1, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st1.rel.d2", M, OpMXX6aHintHlf (4, 0, 0, 0x34, 2, 0), {MR3, R2}, EMPTY}, + {"st1.rel.nt2", M, OpMXX6aHintHlf (4, 0, 0, 0x34, 2, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st1.rel.nta", M, OpMXX6aHintHlf (4, 0, 0, 0x34, 3, 0), {MR3, R2}, EMPTY}, + {"st1.rel.d3", M, OpMXX6aHintHlf (4, 0, 0, 0x34, 3, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st1.rel.d4", M, OpMXX6aHintHlf (4, 0, 0, 0x34, 0, 1), {MR3, R2}, EMPTY}, + {"st1.rel.d5", M, OpMXX6aHintHlf (4, 0, 0, 0x34, 1, 1), {MR3, R2}, EMPTY}, + {"st1.rel.d6", M, OpMXX6aHintHlf (4, 0, 0, 0x34, 2, 1), {MR3, R2}, EMPTY}, + {"st1.rel.d7", M, OpMXX6aHintHlf (4, 0, 0, 0x34, 3, 1), {MR3, R2}, EMPTY}, + {"st2.rel", M, OpMXX6aHintHlf (4, 0, 0, 0x35, 0, 0), {MR3, R2}, EMPTY}, + {"st2.rel.d1", M, OpMXX6aHintHlf (4, 0, 0, 0x35, 1, 0), {MR3, R2}, EMPTY}, + {"st2.rel.nt1", M, OpMXX6aHintHlf (4, 0, 0, 0x35, 1, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st2.rel.d2", M, OpMXX6aHintHlf (4, 0, 0, 0x35, 2, 0), {MR3, R2}, EMPTY}, + {"st2.rel.nt2", M, OpMXX6aHintHlf (4, 0, 0, 0x35, 2, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st2.rel.nta", M, OpMXX6aHintHlf (4, 0, 0, 0x35, 3, 0), {MR3, R2}, EMPTY}, + {"st2.rel.d3", M, OpMXX6aHintHlf (4, 0, 0, 0x35, 3, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st2.rel.d4", M, OpMXX6aHintHlf (4, 0, 0, 0x35, 0, 1), {MR3, R2}, EMPTY}, + {"st2.rel.d5", M, OpMXX6aHintHlf (4, 0, 0, 0x35, 1, 1), {MR3, R2}, EMPTY}, + {"st2.rel.d6", M, OpMXX6aHintHlf (4, 0, 0, 0x35, 2, 1), {MR3, R2}, EMPTY}, + {"st2.rel.d7", M, OpMXX6aHintHlf (4, 0, 0, 0x35, 3, 1), {MR3, R2}, EMPTY}, + {"st4.rel", M, OpMXX6aHintHlf (4, 0, 0, 0x36, 0, 0), {MR3, R2}, EMPTY}, + {"st4.rel.d1", M, OpMXX6aHintHlf (4, 0, 0, 0x36, 1, 0), {MR3, R2}, EMPTY}, + {"st4.rel.nt1", M, OpMXX6aHintHlf (4, 0, 0, 0x36, 1, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st4.rel.d2", M, OpMXX6aHintHlf (4, 0, 0, 0x36, 2, 0), {MR3, R2}, EMPTY}, + {"st4.rel.nt2", M, OpMXX6aHintHlf (4, 0, 0, 0x36, 2, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st4.rel.nta", M, OpMXX6aHintHlf (4, 0, 0, 0x36, 3, 0), {MR3, R2}, EMPTY}, + {"st4.rel.d3", M, OpMXX6aHintHlf (4, 0, 0, 0x36, 3, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st4.rel.d4", M, OpMXX6aHintHlf (4, 0, 0, 0x36, 0, 1), {MR3, R2}, EMPTY}, + {"st4.rel.d5", M, OpMXX6aHintHlf (4, 0, 0, 0x36, 1, 1), {MR3, R2}, EMPTY}, + {"st4.rel.d6", M, OpMXX6aHintHlf (4, 0, 0, 0x36, 2, 1), {MR3, R2}, EMPTY}, + {"st4.rel.d7", M, OpMXX6aHintHlf (4, 0, 0, 0x36, 3, 1), {MR3, R2}, EMPTY}, + {"st8.rel", M, OpMXX6aHintHlf (4, 0, 0, 0x37, 0, 0), {MR3, R2}, EMPTY}, + {"st8.rel.d1", M, OpMXX6aHintHlf (4, 0, 0, 0x37, 1, 0), {MR3, R2}, EMPTY}, + {"st8.rel.nt1", M, OpMXX6aHintHlf (4, 0, 0, 0x37, 1, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st8.rel.d2", M, OpMXX6aHintHlf (4, 0, 0, 0x37, 2, 0), {MR3, R2}, EMPTY}, + {"st8.rel.nt2", M, OpMXX6aHintHlf (4, 0, 0, 0x37, 2, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st8.rel.nta", M, OpMXX6aHintHlf (4, 0, 0, 0x37, 3, 0), {MR3, R2}, EMPTY}, + {"st8.rel.d3", M, OpMXX6aHintHlf (4, 0, 0, 0x37, 3, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st8.rel.d4", M, OpMXX6aHintHlf (4, 0, 0, 0x37, 0, 1), {MR3, R2}, EMPTY}, + {"st8.rel.d5", M, OpMXX6aHintHlf (4, 0, 0, 0x37, 1, 1), {MR3, R2}, EMPTY}, + {"st8.rel.d6", M, OpMXX6aHintHlf (4, 0, 0, 0x37, 2, 1), {MR3, R2}, EMPTY}, + {"st8.rel.d7", M, OpMXX6aHintHlf (4, 0, 0, 0x37, 3, 1), {MR3, R2}, EMPTY}, + {"st16.rel", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 0, 0), {MR3, R2, AR_CSD}, EMPTY}, + {"st16.rel", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 0, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.rel.d1", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 1, 0), {MR3, R2, AR_CSD}, EMPTY}, + {"st16.rel.d1", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 1, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.rel.nt1", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 1, 0), {MR3, R2, AR_CSD}, PSEUDO, 0, NULL}, + {"st16.rel.nt1", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 1, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.rel.d2", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 2, 0), {MR3, R2, AR_CSD}, EMPTY}, + {"st16.rel.d2", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 2, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.rel.nt2", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 2, 0), {MR3, R2, AR_CSD}, PSEUDO, 0, NULL}, + {"st16.rel.nt2", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 2, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.rel.nta", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 3, 0), {MR3, R2, AR_CSD}, EMPTY}, + {"st16.rel.d3", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 3, 0), {MR3, R2, AR_CSD}, PSEUDO, 0, NULL}, + {"st16.rel.d4", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 0, 1), {MR3, R2, AR_CSD}, EMPTY}, + {"st16.rel.d5", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 1, 1), {MR3, R2, AR_CSD}, EMPTY}, + {"st16.rel.d6", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 2, 1), {MR3, R2, AR_CSD}, EMPTY}, + {"st16.rel.d7", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 3, 1), {MR3, R2, AR_CSD}, EMPTY}, + {"st16.rel.nta", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 3, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.rel.d3", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 3, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.rel.d4", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 0, 1), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.rel.d5", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 1, 1), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.rel.d6", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 2, 1), {MR3, R2}, PSEUDO, 0, NULL}, + {"st16.rel.d7", M, OpMXX6aHintHlf (4, 0, 1, 0x34, 3, 1), {MR3, R2}, PSEUDO, 0, NULL}, + {"st8.spill", M, OpMXX6aHintHlf (4, 0, 0, 0x3b, 0, 0), {MR3, R2}, EMPTY}, + {"st8.spill.d1", M, OpMXX6aHintHlf (4, 0, 0, 0x3b, 1, 0), {MR3, R2}, EMPTY}, + {"st8.spill.nt1", M, OpMXX6aHintHlf (4, 0, 0, 0x3b, 1, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st8.spill.d2", M, OpMXX6aHintHlf (4, 0, 0, 0x3b, 2, 0), {MR3, R2}, EMPTY}, + {"st8.spill.nt2", M, OpMXX6aHintHlf (4, 0, 0, 0x3b, 2, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st8.spill.nta", M, OpMXX6aHintHlf (4, 0, 0, 0x3b, 3, 0), {MR3, R2}, EMPTY}, + {"st8.spill.d3", M, OpMXX6aHintHlf (4, 0, 0, 0x3b, 3, 0), {MR3, R2}, PSEUDO, 0, NULL}, + {"st8.spill.d4", M, OpMXX6aHintHlf (4, 0, 0, 0x3b, 0, 1), {MR3, R2}, EMPTY}, + {"st8.spill.d5", M, OpMXX6aHintHlf (4, 0, 0, 0x3b, 1, 1), {MR3, R2}, EMPTY}, + {"st8.spill.d6", M, OpMXX6aHintHlf (4, 0, 0, 0x3b, 2, 1), {MR3, R2}, EMPTY}, + {"st8.spill.d7", M, OpMXX6aHintHlf (4, 0, 0, 0x3b, 3, 1), {MR3, R2}, EMPTY}, #define CMPXCHG(c,h) M, OpMXX6aHint (4, 0, 1, c, h), {R1, MR3, R2, AR_CCV}, EMPTY #define CMPXCHG_P(c,h) M, OpMXX6aHint (4, 0, 1, c, h), {R1, MR3, R2}, PSEUDO, 0, NULL @@ -647,6 +1281,9 @@ struct ia64_opcode ia64_opcodes_m[] = {"st8.spill.nta", STINCIMMED (0x3b, 3)}, #undef STINCIMMED +#if 0 +// old pre-psn variant with 2-bit hints; +// saved for reference /* Floating-point load. */ {"ldfs", M, OpMXX6aHint (6, 0, 0, 0x02, 0), {F1, MR3}, EMPTY}, {"ldfs.nt1", M, OpMXX6aHint (6, 0, 0, 0x02, 1), {F1, MR3}, EMPTY}, @@ -723,6 +1360,284 @@ struct ia64_opcode ia64_opcodes_m[] = {"ldfe.c.nc", M, OpMXX6aHint (6, 0, 0, 0x24, 0), {F1, MR3}, EMPTY}, {"ldfe.c.nc.nt1", M, OpMXX6aHint (6, 0, 0, 0x24, 1), {F1, MR3}, EMPTY}, {"ldfe.c.nc.nta", M, OpMXX6aHint (6, 0, 0, 0x24, 3), {F1, MR3}, EMPTY}, +#endif + + /* Floating-point load. */ + {"ldfs", M, OpMXX6aHintHlfa (6, 0, 0, 0x02, 0, 0), {F1, MR3}, EMPTY}, + {"ldfs.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x02, 1, 0), {F1, MR3}, EMPTY}, + {"ldfs.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x02, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x02, 2, 0), {F1, MR3}, EMPTY}, + {"ldfs.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x02, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x02, 3, 0), {F1, MR3}, EMPTY}, + {"ldfs.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x02, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x02, 0, 1), {F1, MR3}, EMPTY}, + {"ldfs.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x02, 1, 1), {F1, MR3}, EMPTY}, + {"ldfs.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x02, 2, 1), {F1, MR3}, EMPTY}, + {"ldfs.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x02, 3, 1), {F1, MR3}, EMPTY}, + {"ldfd", M, OpMXX6aHintHlfa (6, 0, 0, 0x03, 0, 0), {F1, MR3}, EMPTY}, + {"ldfd.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x03, 1, 0), {F1, MR3}, EMPTY}, + {"ldfd.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x03, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x03, 2, 0), {F1, MR3}, EMPTY}, + {"ldfd.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x03, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x03, 3, 0), {F1, MR3}, EMPTY}, + {"ldfd.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x03, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x03, 0, 1), {F1, MR3}, EMPTY}, + {"ldfd.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x03, 1, 1), {F1, MR3}, EMPTY}, + {"ldfd.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x03, 2, 1), {F1, MR3}, EMPTY}, + {"ldfd.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x03, 3, 1), {F1, MR3}, EMPTY}, + {"ldf8", M, OpMXX6aHintHlfa (6, 0, 0, 0x01, 0, 0), {F1, MR3}, EMPTY}, + {"ldf8.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x01, 1, 0), {F1, MR3}, EMPTY}, + {"ldf8.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x01, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x01, 2, 0), {F1, MR3}, EMPTY}, + {"ldf8.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x01, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x01, 3, 0), {F1, MR3}, EMPTY}, + {"ldf8.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x01, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x01, 0, 1), {F1, MR3}, EMPTY}, + {"ldf8.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x01, 1, 1), {F1, MR3}, EMPTY}, + {"ldf8.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x01, 2, 1), {F1, MR3}, EMPTY}, + {"ldf8.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x01, 3, 1), {F1, MR3}, EMPTY}, + {"ldfe", M, OpMXX6aHintHlfa (6, 0, 0, 0x00, 0, 0), {F1, MR3}, EMPTY}, + {"ldfe.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x00, 1, 0), {F1, MR3}, EMPTY}, + {"ldfe.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x00, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x00, 2, 0), {F1, MR3}, EMPTY}, + {"ldfe.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x00, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x00, 3, 0), {F1, MR3}, EMPTY}, + {"ldfe.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x00, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x00, 0, 1), {F1, MR3}, EMPTY}, + {"ldfe.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x00, 1, 1), {F1, MR3}, EMPTY}, + {"ldfe.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x00, 2, 1), {F1, MR3}, EMPTY}, + {"ldfe.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x00, 3, 1), {F1, MR3}, EMPTY}, + {"ldfs.s", M, OpMXX6aHintHlfa (6, 0, 0, 0x06, 0, 0), {F1, MR3}, EMPTY}, + {"ldfs.s.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x06, 1, 0), {F1, MR3}, EMPTY}, + {"ldfs.s.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x06, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.s.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x06, 2, 0), {F1, MR3}, EMPTY}, + {"ldfs.s.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x06, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.s.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x06, 3, 0), {F1, MR3}, EMPTY}, + {"ldfs.s.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x06, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.s.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x06, 0, 1), {F1, MR3}, EMPTY}, + {"ldfs.s.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x06, 1, 1), {F1, MR3}, EMPTY}, + {"ldfs.s.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x06, 2, 1), {F1, MR3}, EMPTY}, + {"ldfs.s.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x06, 3, 1), {F1, MR3}, EMPTY}, + {"ldfd.s", M, OpMXX6aHintHlfa (6, 0, 0, 0x07, 0, 0), {F1, MR3}, EMPTY}, + {"ldfd.s.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x07, 1, 0), {F1, MR3}, EMPTY}, + {"ldfd.s.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x07, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.s.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x07, 2, 0), {F1, MR3}, EMPTY}, + {"ldfd.s.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x07, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.s.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x07, 3, 0), {F1, MR3}, EMPTY}, + {"ldfd.s.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x07, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.s.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x07, 0, 1), {F1, MR3}, EMPTY}, + {"ldfd.s.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x07, 1, 1), {F1, MR3}, EMPTY}, + {"ldfd.s.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x07, 2, 1), {F1, MR3}, EMPTY}, + {"ldfd.s.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x07, 3, 1), {F1, MR3}, EMPTY}, + {"ldf8.s", M, OpMXX6aHintHlfa (6, 0, 0, 0x05, 0, 0), {F1, MR3}, EMPTY}, + {"ldf8.s.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x05, 1, 0), {F1, MR3}, EMPTY}, + {"ldf8.s.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x05, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.s.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x05, 2, 0), {F1, MR3}, EMPTY}, + {"ldf8.s.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x05, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.s.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x05, 3, 0), {F1, MR3}, EMPTY}, + {"ldf8.s.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x05, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.s.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x05, 0, 1), {F1, MR3}, EMPTY}, + {"ldf8.s.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x05, 1, 1), {F1, MR3}, EMPTY}, + {"ldf8.s.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x05, 2, 1), {F1, MR3}, EMPTY}, + {"ldf8.s.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x05, 3, 1), {F1, MR3}, EMPTY}, + {"ldfe.s", M, OpMXX6aHintHlfa (6, 0, 0, 0x04, 0, 0), {F1, MR3}, EMPTY}, + {"ldfe.s.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x04, 1, 0), {F1, MR3}, EMPTY}, + {"ldfe.s.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x04, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.s.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x04, 2, 0), {F1, MR3}, EMPTY}, + {"ldfe.s.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x04, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.s.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x04, 3, 0), {F1, MR3}, EMPTY}, + {"ldfe.s.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x04, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.s.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x04, 0, 1), {F1, MR3}, EMPTY}, + {"ldfe.s.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x04, 1, 1), {F1, MR3}, EMPTY}, + {"ldfe.s.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x04, 2, 1), {F1, MR3}, EMPTY}, + {"ldfe.s.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x04, 3, 1), {F1, MR3}, EMPTY}, + {"ldfs.a", M, OpMXX6aHintHlfa (6, 0, 0, 0x0a, 0, 0), {F1, MR3}, EMPTY}, + {"ldfs.a.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x0a, 1, 0), {F1, MR3}, EMPTY}, + {"ldfs.a.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x0a, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.a.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x0a, 2, 0), {F1, MR3}, EMPTY}, + {"ldfs.a.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x0a, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.a.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x0a, 3, 0), {F1, MR3}, EMPTY}, + {"ldfs.a.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x0a, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.a.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x0a, 0, 1), {F1, MR3}, EMPTY}, + {"ldfs.a.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x0a, 1, 1), {F1, MR3}, EMPTY}, + {"ldfs.a.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x0a, 2, 1), {F1, MR3}, EMPTY}, + {"ldfs.a.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x0a, 3, 1), {F1, MR3}, EMPTY}, + {"ldfd.a", M, OpMXX6aHintHlfa (6, 0, 0, 0x0b, 0, 0), {F1, MR3}, EMPTY}, + {"ldfd.a.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x0b, 1, 0), {F1, MR3}, EMPTY}, + {"ldfd.a.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x0b, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.a.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x0b, 2, 0), {F1, MR3}, EMPTY}, + {"ldfd.a.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x0b, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.a.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x0b, 3, 0), {F1, MR3}, EMPTY}, + {"ldfd.a.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x0b, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.a.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x0b, 0, 1), {F1, MR3}, EMPTY}, + {"ldfd.a.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x0b, 1, 1), {F1, MR3}, EMPTY}, + {"ldfd.a.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x0b, 2, 1), {F1, MR3}, EMPTY}, + {"ldfd.a.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x0b, 3, 1), {F1, MR3}, EMPTY}, + {"ldf8.a", M, OpMXX6aHintHlfa (6, 0, 0, 0x09, 0, 0), {F1, MR3}, EMPTY}, + {"ldf8.a.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x09, 1, 0), {F1, MR3}, EMPTY}, + {"ldf8.a.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x09, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.a.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x09, 2, 0), {F1, MR3}, EMPTY}, + {"ldf8.a.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x09, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.a.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x09, 3, 0), {F1, MR3}, EMPTY}, + {"ldf8.a.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x09, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.a.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x09, 0, 1), {F1, MR3}, EMPTY}, + {"ldf8.a.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x09, 1, 1), {F1, MR3}, EMPTY}, + {"ldf8.a.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x09, 2, 1), {F1, MR3}, EMPTY}, + {"ldf8.a.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x09, 3, 1), {F1, MR3}, EMPTY}, + {"ldfe.a", M, OpMXX6aHintHlfa (6, 0, 0, 0x08, 0, 0), {F1, MR3}, EMPTY}, + {"ldfe.a.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x08, 1, 0), {F1, MR3}, EMPTY}, + {"ldfe.a.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x08, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.a.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x08, 2, 0), {F1, MR3}, EMPTY}, + {"ldfe.a.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x08, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.a.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x08, 3, 0), {F1, MR3}, EMPTY}, + {"ldfe.a.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x08, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.a.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x08, 0, 1), {F1, MR3}, EMPTY}, + {"ldfe.a.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x08, 1, 1), {F1, MR3}, EMPTY}, + {"ldfe.a.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x08, 2, 1), {F1, MR3}, EMPTY}, + {"ldfe.a.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x08, 3, 1), {F1, MR3}, EMPTY}, + {"ldfs.sa", M, OpMXX6aHintHlfa (6, 0, 0, 0x0e, 0, 0), {F1, MR3}, EMPTY}, + {"ldfs.sa.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x0e, 1, 0), {F1, MR3}, EMPTY}, + {"ldfs.sa.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x0e, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.sa.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x0e, 2, 0), {F1, MR3}, EMPTY}, + {"ldfs.sa.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x0e, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.sa.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x0e, 3, 0), {F1, MR3}, EMPTY}, + {"ldfs.sa.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x0e, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.sa.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x0e, 0, 1), {F1, MR3}, EMPTY}, + {"ldfs.sa.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x0e, 1, 1), {F1, MR3}, EMPTY}, + {"ldfs.sa.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x0e, 2, 1), {F1, MR3}, EMPTY}, + {"ldfs.sa.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x0e, 3, 1), {F1, MR3}, EMPTY}, + {"ldfd.sa", M, OpMXX6aHintHlfa (6, 0, 0, 0x0f, 0, 0), {F1, MR3}, EMPTY}, + {"ldfd.sa.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x0f, 1, 0), {F1, MR3}, EMPTY}, + {"ldfd.sa.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x0f, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.sa.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x0f, 2, 0), {F1, MR3}, EMPTY}, + {"ldfd.sa.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x0f, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.sa.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x0f, 3, 0), {F1, MR3}, EMPTY}, + {"ldfd.sa.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x0f, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.sa.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x0f, 0, 1), {F1, MR3}, EMPTY}, + {"ldfd.sa.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x0f, 1, 1), {F1, MR3}, EMPTY}, + {"ldfd.sa.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x0f, 2, 1), {F1, MR3}, EMPTY}, + {"ldfd.sa.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x0f, 3, 1), {F1, MR3}, EMPTY}, + {"ldf8.sa", M, OpMXX6aHintHlfa (6, 0, 0, 0x0d, 0, 0), {F1, MR3}, EMPTY}, + {"ldf8.sa.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x0d, 1, 0), {F1, MR3}, EMPTY}, + {"ldf8.sa.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x0d, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.sa.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x0d, 2, 0), {F1, MR3}, EMPTY}, + {"ldf8.sa.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x0d, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.sa.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x0d, 3, 0), {F1, MR3}, EMPTY}, + {"ldf8.sa.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x0d, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.sa.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x0d, 0, 1), {F1, MR3}, EMPTY}, + {"ldf8.sa.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x0d, 1, 1), {F1, MR3}, EMPTY}, + {"ldf8.sa.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x0d, 2, 1), {F1, MR3}, EMPTY}, + {"ldf8.sa.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x0d, 3, 1), {F1, MR3}, EMPTY}, + {"ldfe.sa", M, OpMXX6aHintHlfa (6, 0, 0, 0x0c, 0, 0), {F1, MR3}, EMPTY}, + {"ldfe.sa.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x0c, 1, 0), {F1, MR3}, EMPTY}, + {"ldfe.sa.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x0c, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.sa.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x0c, 2, 0), {F1, MR3}, EMPTY}, + {"ldfe.sa.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x0c, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.sa.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x0c, 3, 0), {F1, MR3}, EMPTY}, + {"ldfe.sa.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x0c, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.sa.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x0c, 0, 1), {F1, MR3}, EMPTY}, + {"ldfe.sa.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x0c, 1, 1), {F1, MR3}, EMPTY}, + {"ldfe.sa.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x0c, 2, 1), {F1, MR3}, EMPTY}, + {"ldfe.sa.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x0c, 3, 1), {F1, MR3}, EMPTY}, + {"ldf.fill", M, OpMXX6aHintHlfa (6, 0, 0, 0x1b, 0, 0), {F1, MR3}, EMPTY}, + {"ldf.fill.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x1b, 1, 0), {F1, MR3}, EMPTY}, + {"ldf.fill.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x1b, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf.fill.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x1b, 2, 0), {F1, MR3}, EMPTY}, + {"ldf.fill.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x1b, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf.fill.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x1b, 3, 0), {F1, MR3}, EMPTY}, + {"ldf.fill.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x1b, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf.fill.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x1b, 0, 1), {F1, MR3}, EMPTY}, + {"ldf.fill.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x1b, 1, 1), {F1, MR3}, EMPTY}, + {"ldf.fill.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x1b, 2, 1), {F1, MR3}, EMPTY}, + {"ldf.fill.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x1b, 3, 1), {F1, MR3}, EMPTY}, + {"ldfs.c.clr", M, OpMXX6aHintHlfa (6, 0, 0, 0x22, 0, 0), {F1, MR3}, EMPTY}, + {"ldfs.c.clr.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x22, 1, 0), {F1, MR3}, EMPTY}, + {"ldfs.c.clr.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x22, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.c.clr.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x22, 2, 0), {F1, MR3}, EMPTY}, + {"ldfs.c.clr.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x22, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.c.clr.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x22, 3, 0), {F1, MR3}, EMPTY}, + {"ldfs.c.clr.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x22, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.c.clr.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x22, 0, 1), {F1, MR3}, EMPTY}, + {"ldfs.c.clr.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x22, 1, 1), {F1, MR3}, EMPTY}, + {"ldfs.c.clr.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x22, 2, 1), {F1, MR3}, EMPTY}, + {"ldfs.c.clr.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x22, 3, 1), {F1, MR3}, EMPTY}, + {"ldfd.c.clr", M, OpMXX6aHintHlfa (6, 0, 0, 0x23, 0, 0), {F1, MR3}, EMPTY}, + {"ldfd.c.clr.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x23, 1, 0), {F1, MR3}, EMPTY}, + {"ldfd.c.clr.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x23, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.c.clr.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x23, 2, 0), {F1, MR3}, EMPTY}, + {"ldfd.c.clr.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x23, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.c.clr.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x23, 3, 0), {F1, MR3}, EMPTY}, + {"ldfd.c.clr.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x23, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.c.clr.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x23, 0, 1), {F1, MR3}, EMPTY}, + {"ldfd.c.clr.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x23, 1, 1), {F1, MR3}, EMPTY}, + {"ldfd.c.clr.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x23, 2, 1), {F1, MR3}, EMPTY}, + {"ldfd.c.clr.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x23, 3, 1), {F1, MR3}, EMPTY}, + {"ldf8.c.clr", M, OpMXX6aHintHlfa (6, 0, 0, 0x21, 0, 0), {F1, MR3}, EMPTY}, + {"ldf8.c.clr.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x21, 1, 0), {F1, MR3}, EMPTY}, + {"ldf8.c.clr.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x21, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.c.clr.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x21, 2, 0), {F1, MR3}, EMPTY}, + {"ldf8.c.clr.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x21, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.c.clr.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x21, 3, 0), {F1, MR3}, EMPTY}, + {"ldf8.c.clr.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x21, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.c.clr.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x21, 0, 1), {F1, MR3}, EMPTY}, + {"ldf8.c.clr.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x21, 1, 1), {F1, MR3}, EMPTY}, + {"ldf8.c.clr.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x21, 2, 1), {F1, MR3}, EMPTY}, + {"ldf8.c.clr.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x21, 3, 1), {F1, MR3}, EMPTY}, + {"ldfe.c.clr", M, OpMXX6aHintHlfa (6, 0, 0, 0x20, 0, 0), {F1, MR3}, EMPTY}, + {"ldfe.c.clr.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x20, 1, 0), {F1, MR3}, EMPTY}, + {"ldfe.c.clr.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x20, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.c.clr.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x20, 2, 0), {F1, MR3}, EMPTY}, + {"ldfe.c.clr.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x20, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.c.clr.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x20, 3, 0), {F1, MR3}, EMPTY}, + {"ldfe.c.clr.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x20, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.c.clr.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x20, 0, 1), {F1, MR3}, EMPTY}, + {"ldfe.c.clr.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x20, 1, 1), {F1, MR3}, EMPTY}, + {"ldfe.c.clr.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x20, 2, 1), {F1, MR3}, EMPTY}, + {"ldfe.c.clr.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x20, 3, 1), {F1, MR3}, EMPTY}, + {"ldfs.c.nc", M, OpMXX6aHintHlfa (6, 0, 0, 0x26, 0, 0), {F1, MR3}, EMPTY}, + {"ldfs.c.nc.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x26, 1, 0), {F1, MR3}, EMPTY}, + {"ldfs.c.nc.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x26, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.c.nc.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x26, 2, 0), {F1, MR3}, EMPTY}, + {"ldfs.c.nc.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x26, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.c.nc.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x26, 3, 0), {F1, MR3}, EMPTY}, + {"ldfs.c.nc.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x26, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfs.c.nc.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x26, 0, 1), {F1, MR3}, EMPTY}, + {"ldfs.c.nc.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x26, 1, 1), {F1, MR3}, EMPTY}, + {"ldfs.c.nc.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x26, 2, 1), {F1, MR3}, EMPTY}, + {"ldfs.c.nc.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x26, 3, 1), {F1, MR3}, EMPTY}, + {"ldfd.c.nc", M, OpMXX6aHintHlfa (6, 0, 0, 0x27, 0, 0), {F1, MR3}, EMPTY}, + {"ldfd.c.nc.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x27, 1, 0), {F1, MR3}, EMPTY}, + {"ldfd.c.nc.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x27, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.c.nc.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x27, 2, 0), {F1, MR3}, EMPTY}, + {"ldfd.c.nc.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x27, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.c.nc.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x27, 3, 0), {F1, MR3}, EMPTY}, + {"ldfd.c.nc.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x27, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfd.c.nc.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x27, 0, 1), {F1, MR3}, EMPTY}, + {"ldfd.c.nc.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x27, 1, 1), {F1, MR3}, EMPTY}, + {"ldfd.c.nc.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x27, 2, 1), {F1, MR3}, EMPTY}, + {"ldfd.c.nc.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x27, 3, 1), {F1, MR3}, EMPTY}, + {"ldf8.c.nc", M, OpMXX6aHintHlfa (6, 0, 0, 0x25, 0, 0), {F1, MR3}, EMPTY}, + {"ldf8.c.nc.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x25, 1, 0), {F1, MR3}, EMPTY}, + {"ldf8.c.nc.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x25, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.c.nc.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x25, 2, 0), {F1, MR3}, EMPTY}, + {"ldf8.c.nc.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x25, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.c.nc.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x25, 3, 0), {F1, MR3}, EMPTY}, + {"ldf8.c.nc.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x25, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldf8.c.nc.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x25, 0, 1), {F1, MR3}, EMPTY}, + {"ldf8.c.nc.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x25, 1, 1), {F1, MR3}, EMPTY}, + {"ldf8.c.nc.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x25, 2, 1), {F1, MR3}, EMPTY}, + {"ldf8.c.nc.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x25, 3, 1), {F1, MR3}, EMPTY}, + {"ldfe.c.nc", M, OpMXX6aHintHlfa (6, 0, 0, 0x24, 0, 0), {F1, MR3}, EMPTY}, + {"ldfe.c.nc.nt1", M, OpMXX6aHintHlfa (6, 0, 0, 0x24, 1, 0), {F1, MR3}, EMPTY}, + {"ldfe.c.nc.d1", M, OpMXX6aHintHlfa (6, 0, 0, 0x24, 1, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.c.nc.d2", M, OpMXX6aHintHlfa (6, 0, 0, 0x24, 2, 0), {F1, MR3}, EMPTY}, + {"ldfe.c.nc.nt2", M, OpMXX6aHintHlfa (6, 0, 0, 0x24, 2, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.c.nc.nta", M, OpMXX6aHintHlfa (6, 0, 0, 0x24, 3, 0), {F1, MR3}, EMPTY}, + {"ldfe.c.nc.d3", M, OpMXX6aHintHlfa (6, 0, 0, 0x24, 3, 0), {F1, MR3}, PSEUDO, 0, NULL}, + {"ldfe.c.nc.d4", M, OpMXX6aHintHlfa (6, 0, 0, 0x24, 0, 1), {F1, MR3}, EMPTY}, + {"ldfe.c.nc.d5", M, OpMXX6aHintHlfa (6, 0, 0, 0x24, 1, 1), {F1, MR3}, EMPTY}, + {"ldfe.c.nc.d6", M, OpMXX6aHintHlfa (6, 0, 0, 0x24, 2, 1), {F1, MR3}, EMPTY}, + {"ldfe.c.nc.d7", M, OpMXX6aHintHlfa (6, 0, 0, 0x24, 3, 1), {F1, MR3}, EMPTY}, /* Floating-point load w/increment by register. */ #define FLDINCREG(c,h) M, OpMXX6aHint (6, 1, 0, c, h), {F1, MR3, R2}, POSTINC, 0, NULL @@ -803,6 +1718,9 @@ struct ia64_opcode ia64_opcodes_m[] = {"ldfe.c.nc.nta", FLDINCREG (0x24, 3)}, #undef FLDINCREG +#if 0 +// old pre-psn variant with 2-bit hints; +// saved for reference /* Floating-point store. */ {"stfs", M, OpMXX6aHint (6, 0, 0, 0x32, 0), {MR3, F2}, EMPTY}, {"stfs.nta", M, OpMXX6aHint (6, 0, 0, 0x32, 3), {MR3, F2}, EMPTY}, @@ -814,6 +1732,64 @@ struct ia64_opcode ia64_opcodes_m[] = {"stfe.nta", M, OpMXX6aHint (6, 0, 0, 0x30, 3), {MR3, F2}, EMPTY}, {"stf.spill", M, OpMXX6aHint (6, 0, 0, 0x3b, 0), {MR3, F2}, EMPTY}, {"stf.spill.nta", M, OpMXX6aHint (6, 0, 0, 0x3b, 3), {MR3, F2}, EMPTY}, +#endif + + /* Floating-point store. */ + {"stfs", M, OpMXX6aHintHlf (6, 0, 0, 0x32, 0, 0), {MR3, F2}, EMPTY}, + {"stfs.d1", M, OpMXX6aHintHlf (6, 0, 0, 0x32, 1, 0), {MR3, F2}, EMPTY}, + {"stfs.nt1", M, OpMXX6aHintHlf (6, 0, 0, 0x32, 1, 0), {MR3, F2}, PSEUDO, 0, NULL}, + {"stfs.d2", M, OpMXX6aHintHlf (6, 0, 0, 0x32, 2, 0), {MR3, F2}, EMPTY}, + {"stfs.nt2", M, OpMXX6aHintHlf (6, 0, 0, 0x32, 2, 0), {MR3, F2}, PSEUDO, 0, NULL}, + {"stfs.nta", M, OpMXX6aHintHlf (6, 0, 0, 0x32, 3, 0), {MR3, F2}, EMPTY}, + {"stfs.d3", M, OpMXX6aHintHlf (6, 0, 0, 0x32, 3, 0), {MR3, F2}, PSEUDO, 0, NULL}, + {"stfs.d4", M, OpMXX6aHintHlf (6, 0, 0, 0x32, 0, 1), {MR3, F2}, EMPTY}, + {"stfs.d5", M, OpMXX6aHintHlf (6, 0, 0, 0x32, 1, 1), {MR3, F2}, EMPTY}, + {"stfs.d6", M, OpMXX6aHintHlf (6, 0, 0, 0x32, 2, 1), {MR3, F2}, EMPTY}, + {"stfs.d7", M, OpMXX6aHintHlf (6, 0, 0, 0x32, 3, 1), {MR3, F2}, EMPTY}, + {"stfd", M, OpMXX6aHintHlf (6, 0, 0, 0x33, 0, 0), {MR3, F2}, EMPTY}, + {"stfd.d1", M, OpMXX6aHintHlf (6, 0, 0, 0x33, 1, 0), {MR3, F2}, EMPTY}, + {"stfd.nt1", M, OpMXX6aHintHlf (6, 0, 0, 0x33, 1, 0), {MR3, F2}, PSEUDO, 0, NULL}, + {"stfd.d2", M, OpMXX6aHintHlf (6, 0, 0, 0x33, 2, 0), {MR3, F2}, EMPTY}, + {"stfd.nt2", M, OpMXX6aHintHlf (6, 0, 0, 0x33, 2, 0), {MR3, F2}, PSEUDO, 0, NULL}, + {"stfd.nta", M, OpMXX6aHintHlf (6, 0, 0, 0x33, 3, 0), {MR3, F2}, EMPTY}, + {"stfd.d3", M, OpMXX6aHintHlf (6, 0, 0, 0x33, 3, 0), {MR3, F2}, PSEUDO, 0, NULL}, + {"stfd.d4", M, OpMXX6aHintHlf (6, 0, 0, 0x33, 0, 1), {MR3, F2}, EMPTY}, + {"stfd.d5", M, OpMXX6aHintHlf (6, 0, 0, 0x33, 1, 1), {MR3, F2}, EMPTY}, + {"stfd.d6", M, OpMXX6aHintHlf (6, 0, 0, 0x33, 2, 1), {MR3, F2}, EMPTY}, + {"stfd.d7", M, OpMXX6aHintHlf (6, 0, 0, 0x33, 3, 1), {MR3, F2}, EMPTY}, + {"stf8", M, OpMXX6aHintHlf (6, 0, 0, 0x31, 0, 0), {MR3, F2}, EMPTY}, + {"stf8.d1", M, OpMXX6aHintHlf (6, 0, 0, 0x31, 1, 0), {MR3, F2}, EMPTY}, + {"stf8.nt1", M, OpMXX6aHintHlf (6, 0, 0, 0x31, 1, 0), {MR3, F2}, PSEUDO, 0, NULL}, + {"stf8.d2", M, OpMXX6aHintHlf (6, 0, 0, 0x31, 2, 0), {MR3, F2}, EMPTY}, + {"stf8.nt2", M, OpMXX6aHintHlf (6, 0, 0, 0x31, 2, 0), {MR3, F2}, PSEUDO, 0, NULL}, + {"stf8.nta", M, OpMXX6aHintHlf (6, 0, 0, 0x31, 3, 0), {MR3, F2}, EMPTY}, + {"stf8.d3", M, OpMXX6aHintHlf (6, 0, 0, 0x31, 3, 0), {MR3, F2}, PSEUDO, 0, NULL}, + {"stf8.d4", M, OpMXX6aHintHlf (6, 0, 0, 0x31, 0, 1), {MR3, F2}, EMPTY}, + {"stf8.d5", M, OpMXX6aHintHlf (6, 0, 0, 0x31, 1, 1), {MR3, F2}, EMPTY}, + {"stf8.d6", M, OpMXX6aHintHlf (6, 0, 0, 0x31, 2, 1), {MR3, F2}, EMPTY}, + {"stf8.d7", M, OpMXX6aHintHlf (6, 0, 0, 0x31, 3, 1), {MR3, F2}, EMPTY}, + {"stfe", M, OpMXX6aHintHlf (6, 0, 0, 0x30, 0, 0), {MR3, F2}, EMPTY}, + {"stfe.d1", M, OpMXX6aHintHlf (6, 0, 0, 0x30, 1, 0), {MR3, F2}, EMPTY}, + {"stfe.nt1", M, OpMXX6aHintHlf (6, 0, 0, 0x30, 1, 0), {MR3, F2}, PSEUDO, 0, NULL}, + {"stfe.d2", M, OpMXX6aHintHlf (6, 0, 0, 0x30, 2, 0), {MR3, F2}, EMPTY}, + {"stfe.nt2", M, OpMXX6aHintHlf (6, 0, 0, 0x30, 2, 0), {MR3, F2}, PSEUDO, 0, NULL}, + {"stfe.nta", M, OpMXX6aHintHlf (6, 0, 0, 0x30, 3, 0), {MR3, F2}, EMPTY}, + {"stfe.d3", M, OpMXX6aHintHlf (6, 0, 0, 0x30, 3, 0), {MR3, F2}, PSEUDO, 0, NULL}, + {"stfe.d4", M, OpMXX6aHintHlf (6, 0, 0, 0x30, 0, 1), {MR3, F2}, EMPTY}, + {"stfe.d5", M, OpMXX6aHintHlf (6, 0, 0, 0x30, 1, 1), {MR3, F2}, EMPTY}, + {"stfe.d6", M, OpMXX6aHintHlf (6, 0, 0, 0x30, 2, 1), {MR3, F2}, EMPTY}, + {"stfe.d7", M, OpMXX6aHintHlf (6, 0, 0, 0x30, 3, 1), {MR3, F2}, EMPTY}, + {"stf.spill", M, OpMXX6aHintHlf (6, 0, 0, 0x3b, 0, 0), {MR3, F2}, EMPTY}, + {"stf.spill.d1", M, OpMXX6aHintHlf (6, 0, 0, 0x3b, 1, 0), {MR3, F2}, EMPTY}, + {"stf.spill.nt1", M, OpMXX6aHintHlf (6, 0, 0, 0x3b, 1, 0), {MR3, F2}, PSEUDO, 0, NULL}, + {"stf.spill.d2", M, OpMXX6aHintHlf (6, 0, 0, 0x3b, 2, 0), {MR3, F2}, EMPTY}, + {"stf.spill.nt2", M, OpMXX6aHintHlf (6, 0, 0, 0x3b, 2, 0), {MR3, F2}, PSEUDO, 0, NULL}, + {"stf.spill.nta", M, OpMXX6aHintHlf (6, 0, 0, 0x3b, 3, 0), {MR3, F2}, EMPTY}, + {"stf.spill.d3", M, OpMXX6aHintHlf (6, 0, 0, 0x3b, 3, 0), {MR3, F2}, PSEUDO, 0, NULL}, + {"stf.spill.d4", M, OpMXX6aHintHlf (6, 0, 0, 0x3b, 0, 1), {MR3, F2}, EMPTY}, + {"stf.spill.d5", M, OpMXX6aHintHlf (6, 0, 0, 0x3b, 1, 1), {MR3, F2}, EMPTY}, + {"stf.spill.d6", M, OpMXX6aHintHlf (6, 0, 0, 0x3b, 2, 1), {MR3, F2}, EMPTY}, + {"stf.spill.d7", M, OpMXX6aHintHlf (6, 0, 0, 0x3b, 3, 1), {MR3, F2}, EMPTY}, /* Floating-point load pair. */ {"ldfps", M2, OpMXX6aHint (6, 0, 1, 0x02, 0), {F1, F2, MR3}, EMPTY}, @@ -930,42 +1906,133 @@ struct ia64_opcode ia64_opcodes_m[] = #undef LD /* Line prefetch. */ - {"lfetch", M0, OpMXX6aHint (6, 0, 0, 0x2c, 0), {MR3}, EMPTY}, - {"lfetch.nt1", M0, OpMXX6aHint (6, 0, 0, 0x2c, 1), {MR3}, EMPTY}, - {"lfetch.nt2", M0, OpMXX6aHint (6, 0, 0, 0x2c, 2), {MR3}, EMPTY}, - {"lfetch.nta", M0, OpMXX6aHint (6, 0, 0, 0x2c, 3), {MR3}, EMPTY}, - {"lfetch.excl", M0, OpMXX6aHint (6, 0, 0, 0x2d, 0), {MR3}, EMPTY}, - {"lfetch.excl.nt1", M0, OpMXX6aHint (6, 0, 0, 0x2d, 1), {MR3}, EMPTY}, - {"lfetch.excl.nt2", M0, OpMXX6aHint (6, 0, 0, 0x2d, 2), {MR3}, EMPTY}, - {"lfetch.excl.nta", M0, OpMXX6aHint (6, 0, 0, 0x2d, 3), {MR3}, EMPTY}, - {"lfetch.fault", M0, OpMXX6aHint (6, 0, 0, 0x2e, 0), {MR3}, EMPTY}, - {"lfetch.fault.nt1", M0, OpMXX6aHint (6, 0, 0, 0x2e, 1), {MR3}, EMPTY}, - {"lfetch.fault.nt2", M0, OpMXX6aHint (6, 0, 0, 0x2e, 2), {MR3}, EMPTY}, - {"lfetch.fault.nta", M0, OpMXX6aHint (6, 0, 0, 0x2e, 3), {MR3}, EMPTY}, - {"lfetch.fault.excl", M0, OpMXX6aHint (6, 0, 0, 0x2f, 0), {MR3}, EMPTY}, - {"lfetch.fault.excl.nt1", M0, OpMXX6aHint (6, 0, 0, 0x2f, 1), {MR3}, EMPTY}, - {"lfetch.fault.excl.nt2", M0, OpMXX6aHint (6, 0, 0, 0x2f, 2), {MR3}, EMPTY}, - {"lfetch.fault.excl.nta", M0, OpMXX6aHint (6, 0, 0, 0x2f, 3), {MR3}, EMPTY}, + /* Please note that X6 == 2C and 2D, 2E and 2E are not uniform : + * 2C implies additional 1-b field "y" in the opcode while 2D - 2E don't + */ + + /* M51 -- X6 == 0x2C ==> additional Y = 0 is used */ + {"lfetch", M0, OpMXY1X6aHintHlf (6, 0, 0, 0, 0x2c, 0, 0), {MR3}, EMPTY}, + {"lfetch.d0", M0, OpMXY1X6aHintHlf (6, 0, 0, 0, 0x2c, 0, 0), {MR3}, PSEUDO, 0, NULL}, + {"lfetch.nt1", M0, OpMXY1X6aHintHlf (6, 0, 0, 0, 0x2c, 1, 0), {MR3}, EMPTY}, + {"lfetch.d1", M0, OpMXY1X6aHintHlf (6, 0, 0, 0, 0x2c, 1, 0), {MR3}, PSEUDO, 0, NULL}, + {"lfetch.nt2", M0, OpMXY1X6aHintHlf (6, 0, 0, 0, 0x2c, 2, 0), {MR3}, EMPTY}, + {"lfetch.d2", M0, OpMXY1X6aHintHlf (6, 0, 0, 0, 0x2c, 2, 0), {MR3}, PSEUDO, 0, NULL}, + {"lfetch.nta", M0, OpMXY1X6aHintHlf (6, 0, 0, 0, 0x2c, 3, 0), {MR3}, EMPTY}, + {"lfetch.d3", M0, OpMXY1X6aHintHlf (6, 0, 0, 0, 0x2c, 3, 0), {MR3}, PSEUDO, 0, NULL}, + {"lfetch.d4", M0, OpMXY1X6aHintHlf (6, 0, 0, 0, 0x2c, 0, 1), {MR3}, EMPTY}, + {"lfetch.d5", M0, OpMXY1X6aHintHlf (6, 0, 0, 0, 0x2c, 1, 1), {MR3}, EMPTY}, + {"lfetch.d6", M0, OpMXY1X6aHintHlf (6, 0, 0, 0, 0x2c, 2, 1), {MR3}, EMPTY}, + {"lfetch.d7", M0, OpMXY1X6aHintHlf (6, 0, 0, 0, 0x2c, 3, 1), {MR3}, EMPTY}, + + /* M13 */ + {"lfetch.excl", M0, OpMXX6aHintHlf (6, 0, 0, 0x2d, 0, 0), {MR3}, EMPTY}, + {"lfetch.excl.d0", M0, OpMXX6aHintHlf (6, 0, 0, 0x2d, 0, 0), {MR3}, PSEUDO, 0, NULL}, + {"lfetch.excl.nt1", M0, OpMXX6aHintHlf (6, 0, 0, 0x2d, 1, 0), {MR3}, EMPTY}, + {"lfetch.excl.d1", M0, OpMXX6aHintHlf (6, 0, 0, 0x2d, 1, 0), {MR3}, PSEUDO, 0, NULL}, + {"lfetch.excl.nt2", M0, OpMXX6aHintHlf (6, 0, 0, 0x2d, 2, 0), {MR3}, EMPTY}, + {"lfetch.excl.d2", M0, OpMXX6aHintHlf (6, 0, 0, 0x2d, 2, 0), {MR3}, PSEUDO, 0, NULL}, + {"lfetch.excl.nta", M0, OpMXX6aHintHlf (6, 0, 0, 0x2d, 3, 0), {MR3}, EMPTY}, + {"lfetch.excl.d3", M0, OpMXX6aHintHlf (6, 0, 0, 0x2d, 3, 0), {MR3}, PSEUDO, 0, NULL}, + {"lfetch.excl.d4", M0, OpMXX6aHintHlf (6, 0, 0, 0x2d, 0, 1), {MR3}, EMPTY}, + {"lfetch.excl.d5", M0, OpMXX6aHintHlf (6, 0, 0, 0x2d, 1, 1), {MR3}, EMPTY}, + {"lfetch.excl.d6", M0, OpMXX6aHintHlf (6, 0, 0, 0x2d, 2, 1), {MR3}, EMPTY}, + {"lfetch.excl.d7", M0, OpMXX6aHintHlf (6, 0, 0, 0x2d, 3, 1), {MR3}, EMPTY}, + {"lfetch.fault", M0, OpMXX6aHintHlf (6, 0, 0, 0x2e, 0, 0), {MR3}, EMPTY}, + {"lfetch.fault.d0", M0, OpMXX6aHintHlf (6, 0, 0, 0x2e, 0, 0), {MR3}, PSEUDO, 0, NULL}, + {"lfetch.fault.nt1", M0, OpMXX6aHintHlf (6, 0, 0, 0x2e, 1, 0), {MR3}, EMPTY}, + {"lfetch.fault.d1", M0, OpMXX6aHintHlf (6, 0, 0, 0x2e, 1, 0), {MR3}, PSEUDO, 0, NULL}, + {"lfetch.fault.nt2", M0, OpMXX6aHintHlf (6, 0, 0, 0x2e, 2, 0), {MR3}, EMPTY}, + {"lfetch.fault.d2", M0, OpMXX6aHintHlf (6, 0, 0, 0x2e, 2, 0), {MR3}, PSEUDO, 0, NULL}, + {"lfetch.fault.nta", M0, OpMXX6aHintHlf (6, 0, 0, 0x2e, 3, 0), {MR3}, EMPTY}, + {"lfetch.fault.d3", M0, OpMXX6aHintHlf (6, 0, 0, 0x2e, 3, 0), {MR3}, PSEUDO, 0, NULL}, + {"lfetch.fault.d4", M0, OpMXX6aHintHlf (6, 0, 0, 0x2e, 0, 1), {MR3}, EMPTY}, + {"lfetch.fault.d5", M0, OpMXX6aHintHlf (6, 0, 0, 0x2e, 1, 1), {MR3}, EMPTY}, + {"lfetch.fault.d6", M0, OpMXX6aHintHlf (6, 0, 0, 0x2e, 2, 1), {MR3}, EMPTY}, + {"lfetch.fault.d7", M0, OpMXX6aHintHlf (6, 0, 0, 0x2e, 3, 1), {MR3}, EMPTY}, + {"lfetch.fault.excl", M0, OpMXX6aHintHlf (6, 0, 0, 0x2f, 0, 0), {MR3}, EMPTY}, + {"lfetch.fault.excl.d0", M0, OpMXX6aHintHlf (6, 0, 0, 0x2f, 0, 0), {MR3}, PSEUDO, 0, NULL}, + {"lfetch.fault.excl.nt1", M0, OpMXX6aHintHlf (6, 0, 0, 0x2f, 1, 0), {MR3}, EMPTY}, + {"lfetch.fault.excl.d1", M0, OpMXX6aHintHlf (6, 0, 0, 0x2f, 1, 0), {MR3}, PSEUDO, 0, NULL}, + {"lfetch.fault.excl.nt2", M0, OpMXX6aHintHlf (6, 0, 0, 0x2f, 2, 0), {MR3}, EMPTY}, + {"lfetch.fault.excl.d2", M0, OpMXX6aHintHlf (6, 0, 0, 0x2f, 2, 0), {MR3}, PSEUDO, 0, NULL}, + {"lfetch.fault.excl.nta", M0, OpMXX6aHintHlf (6, 0, 0, 0x2f, 3, 0), {MR3}, EMPTY}, + {"lfetch.fault.excl.d3", M0, OpMXX6aHintHlf (6, 0, 0, 0x2f, 3, 0), {MR3}, PSEUDO, 0, NULL}, + {"lfetch.fault.excl.d4", M0, OpMXX6aHintHlf (6, 0, 0, 0x2f, 0, 1), {MR3}, EMPTY}, + {"lfetch.fault.excl.d5", M0, OpMXX6aHintHlf (6, 0, 0, 0x2f, 1, 1), {MR3}, EMPTY}, + {"lfetch.fault.excl.d6", M0, OpMXX6aHintHlf (6, 0, 0, 0x2f, 2, 1), {MR3}, EMPTY}, + {"lfetch.fault.excl.d7", M0, OpMXX6aHintHlf (6, 0, 0, 0x2f, 3, 1), {MR3}, EMPTY}, + + /* M52 -- X6 == 0x2C ==> additional Y = 1 is used */ + {"lfetch.count", M0, OpMXY1X6aHintHlf (6, 0, 0, 1, 0x2c, 0, 0), {MR3, CNT6a, STRD5b}, EMPTY}, + {"lfetch.count.d0", M0, OpMXY1X6aHintHlf (6, 0, 0, 1, 0x2c, 0, 0), {MR3, CNT6a, STRD5b}, PSEUDO, 0, NULL}, + {"lfetch.count.nt1", M0, OpMXY1X6aHintHlf (6, 0, 0, 1, 0x2c, 1, 0), {MR3, CNT6a, STRD5b}, EMPTY}, + {"lfetch.count.d1", M0, OpMXY1X6aHintHlf (6, 0, 0, 1, 0x2c, 1, 0), {MR3, CNT6a, STRD5b}, PSEUDO, 0, NULL}, + {"lfetch.count.nt2", M0, OpMXY1X6aHintHlf (6, 0, 0, 1, 0x2c, 2, 0), {MR3, CNT6a, STRD5b}, EMPTY}, + {"lfetch.count.d2", M0, OpMXY1X6aHintHlf (6, 0, 0, 1, 0x2c, 2, 0), {MR3, CNT6a, STRD5b}, PSEUDO, 0, NULL}, + {"lfetch.count.nta", M0, OpMXY1X6aHintHlf (6, 0, 0, 1, 0x2c, 3, 0), {MR3, CNT6a, STRD5b}, EMPTY}, + {"lfetch.count.d3", M0, OpMXY1X6aHintHlf (6, 0, 0, 1, 0x2c, 3, 0), {MR3, CNT6a, STRD5b}, PSEUDO, 0, NULL}, + {"lfetch.count.d4", M0, OpMXY1X6aHintHlf (6, 0, 0, 1, 0x2c, 0, 1), {MR3, CNT6a, STRD5b}, EMPTY}, + {"lfetch.count.d5", M0, OpMXY1X6aHintHlf (6, 0, 0, 1, 0x2c, 1, 1), {MR3, CNT6a, STRD5b}, EMPTY}, + {"lfetch.count.d6", M0, OpMXY1X6aHintHlf (6, 0, 0, 1, 0x2c, 2, 1), {MR3, CNT6a, STRD5b}, EMPTY}, + {"lfetch.count.d7", M0, OpMXY1X6aHintHlf (6, 0, 0, 1, 0x2c, 3, 1), {MR3, CNT6a, STRD5b}, EMPTY}, + /* Line prefetch w/increment by register. */ -#define LFETCHINCREG(c,h) M0, OpMXX6aHint (6, 1, 0, c, h), {MR3, R2}, POSTINC, 0, NULL - {"lfetch", LFETCHINCREG (0x2c, 0)}, - {"lfetch.nt1", LFETCHINCREG (0x2c, 1)}, - {"lfetch.nt2", LFETCHINCREG (0x2c, 2)}, - {"lfetch.nta", LFETCHINCREG (0x2c, 3)}, - {"lfetch.excl", LFETCHINCREG (0x2d, 0)}, - {"lfetch.excl.nt1", LFETCHINCREG (0x2d, 1)}, - {"lfetch.excl.nt2", LFETCHINCREG (0x2d, 2)}, - {"lfetch.excl.nta", LFETCHINCREG (0x2d, 3)}, - {"lfetch.fault", LFETCHINCREG (0x2e, 0)}, - {"lfetch.fault.nt1", LFETCHINCREG (0x2e, 1)}, - {"lfetch.fault.nt2", LFETCHINCREG (0x2e, 2)}, - {"lfetch.fault.nta", LFETCHINCREG (0x2e, 3)}, - {"lfetch.fault.excl", LFETCHINCREG (0x2f, 0)}, - {"lfetch.fault.excl.nt1", LFETCHINCREG (0x2f, 1)}, - {"lfetch.fault.excl.nt2", LFETCHINCREG (0x2f, 2)}, - {"lfetch.fault.excl.nta", LFETCHINCREG (0x2f, 3)}, + /* M14 -- all four X6 ( 2C .. 2F ) are used uniformly; no additional opcode bits */ +#define LFETCHINCREG(x6,hnt,h) M0, OpMXX6aHintHlf (6, 1, 0, x6, hnt, h), {MR3, R2}, POSTINC, 0, NULL +#define LFETCHINCREG_SYN(x6,hnt,h) M0, OpMXX6aHintHlf (6, 1, 0, x6, hnt, h), {MR3, R2}, POSTINC|PSEUDO, 0, NULL + + {"lfetch", LFETCHINCREG (0x2c, 0, 0)}, + {"lfetch.d0", LFETCHINCREG_SYN (0x2c, 0, 0)}, + {"lfetch.nt1", LFETCHINCREG (0x2c, 1, 0)}, + {"lfetch.d1", LFETCHINCREG_SYN (0x2c, 1, 0)}, + {"lfetch.nt2", LFETCHINCREG (0x2c, 2, 0)}, + {"lfetch.d2", LFETCHINCREG_SYN (0x2c, 2, 0)}, + {"lfetch.nta", LFETCHINCREG (0x2c, 3, 0)}, + {"lfetch.d3", LFETCHINCREG_SYN (0x2c, 3, 0)}, + {"lfetch.d4", LFETCHINCREG (0x2c, 0, 1)}, + {"lfetch.d5", LFETCHINCREG (0x2c, 1, 1)}, + {"lfetch.d6", LFETCHINCREG (0x2c, 2, 1)}, + {"lfetch.d7", LFETCHINCREG (0x2c, 3, 1)}, + {"lfetch.excl", LFETCHINCREG (0x2d, 0, 0)}, + {"lfetch.excl.d0", LFETCHINCREG_SYN (0x2d, 0, 0)}, + {"lfetch.excl.nt1", LFETCHINCREG (0x2d, 1, 0)}, + {"lfetch.excl.d1", LFETCHINCREG_SYN (0x2d, 1, 0)}, + {"lfetch.excl.nt2", LFETCHINCREG (0x2d, 2, 0)}, + {"lfetch.excl.d2", LFETCHINCREG_SYN (0x2d, 2, 0)}, + {"lfetch.excl.nta", LFETCHINCREG (0x2d, 3, 0)}, + {"lfetch.excl.d3", LFETCHINCREG_SYN (0x2d, 3, 0)}, + {"lfetch.excl.d4", LFETCHINCREG (0x2d, 0, 1)}, + {"lfetch.excl.d5", LFETCHINCREG (0x2d, 1, 1)}, + {"lfetch.excl.d6", LFETCHINCREG (0x2d, 2, 1)}, + {"lfetch.excl.d7", LFETCHINCREG (0x2d, 3, 1)}, + {"lfetch.fault", LFETCHINCREG (0x2e, 0, 0)}, + {"lfetch.fault.d0", LFETCHINCREG_SYN (0x2e, 0, 0)}, + {"lfetch.fault.nt1", LFETCHINCREG (0x2e, 1, 0)}, + {"lfetch.fault.d1", LFETCHINCREG_SYN (0x2e, 1, 0)}, + {"lfetch.fault.nt2", LFETCHINCREG (0x2e, 2, 0)}, + {"lfetch.fault.d2", LFETCHINCREG_SYN (0x2e, 2, 0)}, + {"lfetch.fault.nta", LFETCHINCREG (0x2e, 3, 0)}, + {"lfetch.fault.d3", LFETCHINCREG_SYN (0x2e, 3, 0)}, + {"lfetch.fault.d4", LFETCHINCREG (0x2e, 0, 1)}, + {"lfetch.fault.d5", LFETCHINCREG (0x2e, 1, 1)}, + {"lfetch.fault.d6", LFETCHINCREG (0x2e, 2, 1)}, + {"lfetch.fault.d7", LFETCHINCREG (0x2e, 3, 1)}, + {"lfetch.fault.excl", LFETCHINCREG (0x2f, 0, 0)}, + {"lfetch.fault.excl.d0", LFETCHINCREG_SYN (0x2f, 0, 0)}, + {"lfetch.fault.excl.nt1", LFETCHINCREG (0x2f, 1, 0)}, + {"lfetch.fault.excl.d1", LFETCHINCREG_SYN (0x2f, 1, 0)}, + {"lfetch.fault.excl.nt2", LFETCHINCREG (0x2f, 2, 0)}, + {"lfetch.fault.excl.d2", LFETCHINCREG_SYN (0x2f, 2, 0)}, + {"lfetch.fault.excl.nta", LFETCHINCREG (0x2f, 3, 0)}, + {"lfetch.fault.excl.d3", LFETCHINCREG_SYN (0x2f, 3, 0)}, + {"lfetch.fault.excl.d4", LFETCHINCREG (0x2f, 0, 1)}, + {"lfetch.fault.excl.d5", LFETCHINCREG (0x2f, 1, 1)}, + {"lfetch.fault.excl.d6", LFETCHINCREG (0x2f, 2, 1)}, + {"lfetch.fault.excl.d7", LFETCHINCREG (0x2f, 3, 1)}, + #undef LFETCHINCREG +#undef LFETCHINCREG_SYN /* Semaphore operations. */ {"setf.sig", M, OpMXX6a (6, 0, 1, 0x1c), {F1, R2}, EMPTY}, @@ -1066,25 +2133,64 @@ struct ia64_opcode ia64_opcodes_m[] = {"stf.spill.nta", FSTINCIMMED (0x3b, 3)}, #undef FSTINCIMMED + /* Line prefetch w/increment by immediate. */ -#define LFETCHINCIMMED(c,h) M0, OpX6aHint (7, c, h), {MR3, IMM9b}, POSTINC, 0, NULL - {"lfetch", LFETCHINCIMMED (0x2c, 0)}, - {"lfetch.nt1", LFETCHINCIMMED (0x2c, 1)}, - {"lfetch.nt2", LFETCHINCIMMED (0x2c, 2)}, - {"lfetch.nta", LFETCHINCIMMED (0x2c, 3)}, - {"lfetch.excl", LFETCHINCIMMED (0x2d, 0)}, - {"lfetch.excl.nt1", LFETCHINCIMMED (0x2d, 1)}, - {"lfetch.excl.nt2", LFETCHINCIMMED (0x2d, 2)}, - {"lfetch.excl.nta", LFETCHINCIMMED (0x2d, 3)}, - {"lfetch.fault", LFETCHINCIMMED (0x2e, 0)}, - {"lfetch.fault.nt1", LFETCHINCIMMED (0x2e, 1)}, - {"lfetch.fault.nt2", LFETCHINCIMMED (0x2e, 2)}, - {"lfetch.fault.nta", LFETCHINCIMMED (0x2e, 3)}, - {"lfetch.fault.excl", LFETCHINCIMMED (0x2f, 0)}, - {"lfetch.fault.excl.nt1", LFETCHINCIMMED (0x2f, 1)}, - {"lfetch.fault.excl.nt2", LFETCHINCIMMED (0x2f, 2)}, - {"lfetch.fault.excl.nta", LFETCHINCIMMED (0x2f, 3)}, + /* M15 -- all four X6 ( 2C .. 2F ) are used uniformly; no additional opcode bits */ +#define LFETCHINCIMMED(x6,hnt,h) M0, OpX6aHintHlf (7, x6, hnt, h), {MR3, IMM9b}, POSTINC, 0, NULL +#define LFETCHINCIMMED_SYN(x6,hnt,h) M0, OpX6aHintHlf (7, x6, hnt, h), {MR3, IMM9b}, POSTINC|PSEUDO, 0, NULL + + + {"lfetch", LFETCHINCIMMED (0x2c, 0, 0)}, + {"lfetch.d0", LFETCHINCIMMED_SYN (0x2c, 0, 0)}, + {"lfetch.nt1", LFETCHINCIMMED (0x2c, 1, 0)}, + {"lfetch.d1", LFETCHINCIMMED_SYN (0x2c, 1, 0)}, + {"lfetch.nt2", LFETCHINCIMMED (0x2c, 2, 0)}, + {"lfetch.d2", LFETCHINCIMMED_SYN (0x2c, 2, 0)}, + {"lfetch.nta", LFETCHINCIMMED (0x2c, 3, 0)}, + {"lfetch.d3", LFETCHINCIMMED_SYN (0x2c, 3, 0)}, + {"lfetch.d4", LFETCHINCIMMED (0x2c, 0, 1)}, + {"lfetch.d5", LFETCHINCIMMED (0x2c, 1, 1)}, + {"lfetch.d6", LFETCHINCIMMED (0x2c, 2, 1)}, + {"lfetch.d7", LFETCHINCIMMED (0x2c, 3, 1)}, + {"lfetch.excl", LFETCHINCIMMED (0x2d, 0, 0)}, + {"lfetch.excl.d0", LFETCHINCIMMED_SYN (0x2d, 0, 0)}, + {"lfetch.excl.nt1", LFETCHINCIMMED (0x2d, 1, 0)}, + {"lfetch.excl.d1", LFETCHINCIMMED_SYN (0x2d, 1, 0)}, + {"lfetch.excl.nt2", LFETCHINCIMMED (0x2d, 2, 0)}, + {"lfetch.excl.d2", LFETCHINCIMMED_SYN (0x2d, 2, 0)}, + {"lfetch.excl.nta", LFETCHINCIMMED (0x2d, 3, 0)}, + {"lfetch.excl.d3", LFETCHINCIMMED_SYN (0x2d, 3, 0)}, + {"lfetch.excl.d4", LFETCHINCIMMED (0x2d, 0, 1)}, + {"lfetch.excl.d5", LFETCHINCIMMED (0x2d, 1, 1)}, + {"lfetch.excl.d6", LFETCHINCIMMED (0x2d, 2, 1)}, + {"lfetch.excl.d7", LFETCHINCIMMED (0x2d, 3, 1)}, + {"lfetch.fault", LFETCHINCIMMED (0x2e, 0, 0)}, + {"lfetch.fault.d0", LFETCHINCIMMED_SYN (0x2e, 0, 0)}, + {"lfetch.fault.nt1", LFETCHINCIMMED (0x2e, 1, 0)}, + {"lfetch.fault.d1", LFETCHINCIMMED_SYN (0x2e, 1, 0)}, + {"lfetch.fault.nt2", LFETCHINCIMMED (0x2e, 2, 0)}, + {"lfetch.fault.d2", LFETCHINCIMMED_SYN (0x2e, 2, 0)}, + {"lfetch.fault.nta", LFETCHINCIMMED (0x2e, 3, 0)}, + {"lfetch.fault.d3", LFETCHINCIMMED_SYN (0x2e, 3, 0)}, + {"lfetch.fault.d4", LFETCHINCIMMED (0x2e, 0, 1)}, + {"lfetch.fault.d5", LFETCHINCIMMED (0x2e, 1, 1)}, + {"lfetch.fault.d6", LFETCHINCIMMED (0x2e, 2, 1)}, + {"lfetch.fault.d7", LFETCHINCIMMED (0x2e, 3, 1)}, + {"lfetch.fault.excl", LFETCHINCIMMED (0x2f, 0, 0)}, + {"lfetch.fault.excl.d0", LFETCHINCIMMED_SYN (0x2f, 0, 0)}, + {"lfetch.fault.excl.nt1", LFETCHINCIMMED (0x2f, 1, 0)}, + {"lfetch.fault.excl.d1", LFETCHINCIMMED_SYN (0x2f, 1, 0)}, + {"lfetch.fault.excl.nt2", LFETCHINCIMMED (0x2f, 2, 0)}, + {"lfetch.fault.excl.d2", LFETCHINCIMMED_SYN (0x2f, 2, 0)}, + {"lfetch.fault.excl.nta", LFETCHINCIMMED (0x2f, 3, 0)}, + {"lfetch.fault.excl.d3", LFETCHINCIMMED_SYN (0x2f, 3, 0)}, + {"lfetch.fault.excl.d4", LFETCHINCIMMED (0x2f, 0, 1)}, + {"lfetch.fault.excl.d5", LFETCHINCIMMED (0x2f, 1, 1)}, + {"lfetch.fault.excl.d6", LFETCHINCIMMED (0x2f, 2, 1)}, + {"lfetch.fault.excl.d7", LFETCHINCIMMED (0x2f, 3, 1)}, + #undef LFETCHINCIMMED +#undef LFETCHINCIMMED_SYN {NULL, 0, 0, 0, 0, {0}, 0, 0, NULL} }; @@ -1099,7 +2205,11 @@ struct ia64_opcode ia64_opcodes_m[] = #undef bX4 #undef bX6a #undef bX6b +#undef bY +#undef bY1 #undef bHint +#undef bHlf +#undef bHlfa #undef mM #undef mX #undef mX2 @@ -1107,7 +2217,11 @@ struct ia64_opcode ia64_opcodes_m[] = #undef mX4 #undef mX6a #undef mX6b +#undef mY +#undef mY1 #undef mHint +#undef mHlf +#undef mHlfa #undef OpX3 #undef OpX3X6b #undef OpX3X4 @@ -1116,4 +2230,7 @@ struct ia64_opcode ia64_opcodes_m[] = #undef OpXX6aHint #undef OpMXX6a #undef OpMXX6aHint +#undef OpMXX6aHintHlfa +#undef OpMXX6aHintHlf +#undef OpMXY1X6aHintHlf #undef EMPTY diff --git a/opcodes/ia64-opc.h b/opcodes/ia64-opc.h index 0724219..1a243d1 100644 --- a/opcodes/ia64-opc.h +++ b/opcodes/ia64-opc.h @@ -71,6 +71,7 @@ #define R2 IA64_OPND_R2 #define R3 IA64_OPND_R3 #define R3_2 IA64_OPND_R3_2 +#define DAHR IA64_OPND_DAHR3 #define CPUID_R3 IA64_OPND_CPUID_R3 #define DBR_R3 IA64_OPND_DBR_R3 @@ -82,6 +83,7 @@ #define PKR_R3 IA64_OPND_PKR_R3 #define PMC_R3 IA64_OPND_PMC_R3 #define PMD_R3 IA64_OPND_PMD_R3 +#define DAHR_R3 IA64_OPND_DAHR_R3 #define RR_R3 IA64_OPND_RR_R3 #define CCNT5 IA64_OPND_CCNT5 @@ -109,6 +111,8 @@ #define IMM9a IA64_OPND_IMM9a #define IMM9b IA64_OPND_IMM9b #define IMMU2 IA64_OPND_IMMU2 +#define IMMU16 IA64_OPND_IMMU16 +#define IMMU19 IA64_OPND_IMMU19 #define IMMU21 IA64_OPND_IMMU21 #define IMMU24 IA64_OPND_IMMU24 #define IMMU62 IA64_OPND_IMMU62 @@ -129,5 +133,7 @@ #define TGT25b IA64_OPND_TGT25b #define TGT25c IA64_OPND_TGT25c #define TGT64 IA64_OPND_TGT64 +#define CNT6a IA64_OPND_CNT6a +#define STRD5b IA64_OPND_STRD5b #endif diff --git a/opcodes/ia64-raw.tbl b/opcodes/ia64-raw.tbl index 7eca3e3..88d6ec5 100644 --- a/opcodes/ia64-raw.tbl +++ b/opcodes/ia64-raw.tbl @@ -76,6 +76,7 @@ CR[TPR]; IC:mov-to-CR-TPR; IC:mov-from-CR-TPR, IC:mov-from-CR-IVR; data CR[TPR]; IC:mov-to-CR-TPR; IC:mov-to-PSR-l+17, ssm+17; SC Section 5.8.3.3, "Task Priority Register (TPR Ð CR66)" on page 2:119 CR[TPR]; IC:mov-to-CR-TPR; rfi; implied CR%, % in 3-7, 10-15, 18, 28-63, 75-79, 82-127; IC:none; IC:mov-from-CR-rv+1; none +DAHR%, % in 0-7; br.call, brl.call, br.ret, IC:mov-to-DAHR; br.call, IC:mem-readers, IC:mem-writers, IC:mov-from-DAHR; implied DBR#; IC:mov-to-IND-DBR+3; IC:mov-from-IND-DBR+3; impliedF DBR#; IC:mov-to-IND-DBR+3; IC:probe-all, IC:lfetch-all, IC:mem-readers, IC:mem-writers; data DTC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, itc.i, itc.d, itr.i, itr.d; IC:mem-readers, IC:mem-writers, IC:non-access; data diff --git a/opcodes/ia64-waw.tbl b/opcodes/ia64-waw.tbl index 82b9e83..44efaa8 100644 --- a/opcodes/ia64-waw.tbl +++ b/opcodes/ia64-waw.tbl @@ -67,6 +67,7 @@ CR[PMV]; IC:mov-to-CR-PMV; IC:mov-to-CR-PMV; impliedF CR[PTA]; IC:mov-to-CR-PTA; IC:mov-to-CR-PTA; impliedF CR[TPR]; IC:mov-to-CR-TPR; IC:mov-to-CR-TPR; impliedF CR%, % in 3-7, 10-15, 18, 28-63, 75-79, 82-127; IC:none; IC:none; none +DAHR%, % in 0-7; IC:br.call, brl.call, br.ret, IC:mov-to-AR-BSPSTORE, IC:mov-to-DAHR, rfi; IC:br.call, brl.call, br.ret, IC:mov-to-AR-BSPSTORE, IC:mov-to-DAHR, rfi; implied DBR#; IC:mov-to-IND-DBR+3; IC:mov-to-IND-DBR+3; impliedF DTC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d; none DTC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, itc.i, itc.d, itr.i, itr.d; itc.i, itc.d, itr.i, itr.d; impliedF |