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| author | Chao-ying Fu <fu@mips.com> | 2008-11-06 19:32:42 +0000 |
|---|---|---|
| committer | Chao-ying Fu <fu@mips.com> | 2008-11-06 19:32:42 +0000 |
| commit | de9a3e5195524b2aa19b5b1d0af1dce353569970 (patch) | |
| tree | 191c83ae9d48181142d5e7038083179b57aad851 | |
| parent | 48fb2d97d449042775ecd7c909c87b16c21d5322 (diff) | |
| download | gdb-de9a3e5195524b2aa19b5b1d0af1dce353569970.zip gdb-de9a3e5195524b2aa19b5b1d0af1dce353569970.tar.gz gdb-de9a3e5195524b2aa19b5b1d0af1dce353569970.tar.bz2 | |
2008-11-06 Chao-ying Fu <fu@mips.com>
* mips.h: Doucument '1' for 5-bit sync type.
| -rw-r--r-- | include/opcode/ChangeLog | 4 | ||||
| -rw-r--r-- | include/opcode/mips.h | 3 |
2 files changed, 6 insertions, 1 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 9a97ab6..33719b5 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +2008-11-06 Chao-ying Fu <fu@mips.com> + + * mips.h: Doucument '1' for 5-bit sync type. + 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 8d201f6..9af9ea1 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -262,6 +262,7 @@ struct mips_opcode Each of these characters corresponds to a mask field defined above. + "1" 5 bit sync type (OP_*_SHAMT) "<" 5 bit shift amount (OP_*_SHAMT) ">" shift amount between 32 and 63, stored after subtracting 32 (OP_*_SHAMT) "a" 26 bit target address (OP_*_TARGET) @@ -401,7 +402,7 @@ struct mips_opcode "+" Start of extension sequence. Characters used so far, for quick reference when adding more: - "234567890" + "1234567890" "%[]<>(),+:'@!$*&" "ABCDEFGHIJKLMNOPQRSTUVWXYZ" "abcdefghijklopqrstuvwxz" |