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authorH.J. Lu <hjl.tools@gmail.com>2005-07-06 19:11:01 +0000
committerH.J. Lu <hjl.tools@gmail.com>2005-07-06 19:11:01 +0000
commitbf50992e53161e113648b821e349d94e9d9642cf (patch)
tree52a225e3366a2a7c7f863247e470fc3032812d46
parent3cb3b8dfd1975f480bec3ebd8023f1cc8351606d (diff)
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2005-07-06 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add sse3. * config/tc-i386.h (CpuSSE3): Renamed from ... (CpuPNI): This. Defined as CpuSSE3. * doc/c-i386.texi: Document .sse3.
-rw-r--r--gas/ChangeLog9
-rw-r--r--gas/config/tc-i386.c1
-rw-r--r--gas/config/tc-i386.h3
-rw-r--r--gas/doc/c-i386.texi2
4 files changed, 13 insertions, 2 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 68874ba..bc81e20 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2005-07-06 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add sse3.
+
+ * config/tc-i386.h (CpuSSE3): Renamed from ...
+ (CpuPNI): This. Defined as CpuSSE3.
+
+ * doc/c-i386.texi: Document .sse3.
+
2005-07-06 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (nop): Use zero for L-unit pseudo-nop.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 9f9b23a..4b57194 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -433,6 +433,7 @@ static const arch_entry cpu_arch[] = {
{".mmx", CpuMMX },
{".sse", CpuMMX|CpuMMX2|CpuSSE },
{".sse2", CpuMMX|CpuMMX2|CpuSSE|CpuSSE2 },
+ {".sse3", CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3 },
{".3dnow", CpuMMX|Cpu3dnow },
{".3dnowa", CpuMMX|CpuMMX2|Cpu3dnow|Cpu3dnowA },
{".padlock", CpuPadLock },
diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h
index e4359fe..e545397 100644
--- a/gas/config/tc-i386.h
+++ b/gas/config/tc-i386.h
@@ -182,7 +182,8 @@ typedef struct
#define CpuSSE2 0x4000 /* Streaming SIMD extensions 2 required */
#define Cpu3dnow 0x8000 /* 3dnow! support required */
#define Cpu3dnowA 0x10000 /* 3dnow!Extensions support required */
-#define CpuPNI 0x20000 /* Prescott New Instructions required */
+#define CpuSSE3 0x20000 /* Streaming SIMD extensions 3 required */
+#define CpuPNI CpuSSE3 /* Prescott New Instructions required */
#define CpuPadLock 0x40000 /* VIA PadLock required */
#define CpuSVME 0x80000 /* AMD Secure Virtual Machine Ext-s required */
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 0442184..678dfe3 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -701,7 +701,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
@item @samp{i486} @tab @samp{i586} @tab @samp{i686} @tab @samp{pentium}
@item @samp{pentiumpro} @tab @samp{pentiumii} @tab @samp{pentiumiii} @tab @samp{pentium4}
@item @samp{k6} @tab @samp{athlon} @samp{sledgehammer}
-@item @samp{.mmx} @samp{.sse} @samp{.sse2} @samp{.3dnow}
+@item @samp{.mmx} @samp{.sse} @samp{.sse2} @samp{.sse3} @samp{.3dnow}
@end multitable
Apart from the warning, there are only two other effects on