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author | Antoine Tremblay <antoine.tremblay@ericsson.com> | 2017-01-09 12:39:07 -0500 |
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committer | Antoine Tremblay <antoine.tremblay@ericsson.com> | 2017-01-09 12:39:07 -0500 |
commit | 694b382c67a4fc656f30acbc74776c5e9cb53622 (patch) | |
tree | a63f5ac75142be9315e6f9adc52807fa9ba4b039 | |
parent | a5ec5e3fe1b8fe1395c79ff29052edad91266a76 (diff) | |
download | gdb-694b382c67a4fc656f30acbc74776c5e9cb53622.zip gdb-694b382c67a4fc656f30acbc74776c5e9cb53622.tar.gz gdb-694b382c67a4fc656f30acbc74776c5e9cb53622.tar.bz2 |
Fix inferior memory reading in GDBServer for arm/aarch32
Before this patch, some functions would read the inferior memory with
(*the_target)->read_memory, which returns the raw memory, rather than the
shadowed memory.
This is wrong since these functions do not expect to read a breakpoint
instruction and can lead to invalid behavior.
Use of raw memory in get_next_pcs_read_memory_unsigned_integer for example
could lead to get_next_pc returning an invalid pc.
Here's how this would happen:
In non-stop:
the user issues:
thread 1
step&
thread 2
step&
thread 3
step&
In a similar way as non-stop-fair-events.exp (threads are looping).
GDBServer:
linux_resume is called
GDBServer has pending events,
threads are not resumed and single-step breakpoint for thread 1 not installed.
linux_wait_1 is called with a pending event on thread 2 at pc A
GDBServer handles the event and calls proceed_all_lwps
This calls proceed_one_lwp and installs single-step breakpoints on all
the threads that need one.
Now since thread 1 needs to install a single-step breakpoint and is at pc B
(different than thread 2), a step-over is not initiated and get_next_pc
is called to figure out the next instruction from pc B.
However it may just be that thread 3 as a single step breakpoint at pc
B. And thus get_next_pc fails.
This situation is tested with non-stop-fair-events.exp.
In other words, single-step breakpoints are installed in proceed_one_lwp
for each thread. GDBserver proceeds two threads for resume_step, as
requested by GDB, and the thread proceeded later may see the single-step
breakpoints installed for the thread proceeded just now.
Tested on gdbserver-native/-m{thumb,arm} no regressions.
gdb/gdbserver/ChangeLog:
* linux-aarch32-low.c (arm_breakpoint_kind_from_pc): Use
target_read_memory.
* linux-arm-low.c (get_next_pcs_read_memory_unsigned_integer): Likewise.
(get_next_pcs_syscall_next_pc): Likewise.
-rw-r--r-- | gdb/gdbserver/ChangeLog | 7 | ||||
-rw-r--r-- | gdb/gdbserver/linux-aarch32-low.c | 4 | ||||
-rw-r--r-- | gdb/gdbserver/linux-arm-low.c | 5 |
3 files changed, 12 insertions, 4 deletions
diff --git a/gdb/gdbserver/ChangeLog b/gdb/gdbserver/ChangeLog index d4d01e7..d3fba9b 100644 --- a/gdb/gdbserver/ChangeLog +++ b/gdb/gdbserver/ChangeLog @@ -1,3 +1,10 @@ +2017-01-09 Antoine Tremblay <antoine.tremblay@ericsson.com> + + * linux-aarch32-low.c (arm_breakpoint_kind_from_pc): Use + target_read_memory. + * linux-arm-low.c (get_next_pcs_read_memory_unsigned_integer): Likewise. + (get_next_pcs_syscall_next_pc): Likewise. + 2016-12-23 Luis Machado <lgustavo@codesourcery.com> * win32-i386-low.c: Fix incorrect reference to a couple source files. diff --git a/gdb/gdbserver/linux-aarch32-low.c b/gdb/gdbserver/linux-aarch32-low.c index 729b7cf..2b710ba 100644 --- a/gdb/gdbserver/linux-aarch32-low.c +++ b/gdb/gdbserver/linux-aarch32-low.c @@ -237,11 +237,11 @@ arm_breakpoint_kind_from_pc (CORE_ADDR *pcptr) *pcptr = UNMAKE_THUMB_ADDR (*pcptr); /* Check whether we are replacing a thumb2 32-bit instruction. */ - if ((*the_target->read_memory) (*pcptr, buf, 2) == 0) + if (target_read_memory (*pcptr, buf, 2) == 0) { unsigned short inst1 = 0; - (*the_target->read_memory) (*pcptr, (gdb_byte *) &inst1, 2); + target_read_memory (*pcptr, (gdb_byte *) &inst1, 2); if (thumb_insn_size (inst1) == 4) return ARM_BP_KIND_THUMB2; } diff --git a/gdb/gdbserver/linux-arm-low.c b/gdb/gdbserver/linux-arm-low.c index b2b2258..fc2b348 100644 --- a/gdb/gdbserver/linux-arm-low.c +++ b/gdb/gdbserver/linux-arm-low.c @@ -263,7 +263,8 @@ get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr, ULONGEST res; res = 0; - (*the_target->read_memory) (memaddr, (unsigned char *) &res, len); + target_read_memory (memaddr, (unsigned char *) &res, len); + return res; } @@ -804,7 +805,7 @@ get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self) unsigned long this_instr; unsigned long svc_operand; - (*the_target->read_memory) (pc, (unsigned char *) &this_instr, 4); + target_read_memory (pc, (unsigned char *) &this_instr, 4); svc_operand = (0x00ffffff & this_instr); if (svc_operand) /* OABI. */ |