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author | Andrew Cagney <cagney@redhat.com> | 1997-10-24 07:54:21 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1997-10-24 07:54:21 +0000 |
commit | 122edc03deab9cd69503317231d4a53ae6a304ce (patch) | |
tree | 3a71627aa95134287a4306d61424ef9c159ee389 | |
parent | dad6f1f326c4ff68c7473a192fe9545818c479bb (diff) | |
download | gdb-122edc03deab9cd69503317231d4a53ae6a304ce.zip gdb-122edc03deab9cd69503317231d4a53ae6a304ce.tar.gz gdb-122edc03deab9cd69503317231d4a53ae6a304ce.tar.bz2 |
Add basic igen configuration to autoconf. Disable.
-rw-r--r-- | sim/mips/ChangeLog | 15 | ||||
-rw-r--r-- | sim/mips/Makefile.in | 194 | ||||
-rwxr-xr-x | sim/mips/configure | 36 | ||||
-rw-r--r-- | sim/mips/configure.in | 17 |
4 files changed, 244 insertions, 18 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index eae6d22..b865a28 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,18 @@ +Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com> + + * configure.in (sim_gen): Dependent on target, select type of + generator. Always select old style generator. + + configure: Re-generate. + + Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New + targets. + (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16, + SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN, + IGEN_TRACE, IGEN_INSN, IGEN_DC): Define + (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member + SIM_@sim_gen@_*, set by autoconf. + Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com> * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define. diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in index 194e639..eda7273 100644 --- a/sim/mips/Makefile.in +++ b/sim/mips/Makefile.in @@ -6,7 +6,10 @@ srcdir=@srcdir@ srcroot=$(srcdir)/../../ -SIM_OBJS = interp.o \ +SIM_OBJS = \ + $(SIM_@sim_gen@_OBJ) \ + interp.o \ + sim-bits.o \ sim-load.o \ sim-utils.o \ sim-hload.o \ @@ -25,6 +28,8 @@ SIM_OBJS = interp.o \ sim-core.o \ sim-watch.o + + # List of flags to always pass to $(CC). SIM_SUBTARGET=@SIM_SUBTARGET@ @@ -32,11 +37,12 @@ SIM_SUBTARGET=@SIM_SUBTARGET@ # is in progress. SIM_EXTRA_CFLAGS = \ $(SIM_SUBTARGET) \ - -I$(srcdir)/../../newlib/libc/sys/idt + -I$(srcdir)/../../newlib/libc/sys/idt \ + $(SIM_@sim_gen@_CFLAGS) -SIM_EXTRA_CLEAN = clean-extra +SIM_EXTRA_CLEAN = clean-igen clean-m16 clean-extra -SIM_EXTRA_ALL = tmp.igen +SIM_EXTRA_ALL = $(SIM_@sim_gen@_ALL) # List of main object files for `run'. SIM_RUN_OBJS = nrun.o @@ -45,14 +51,11 @@ SIM_RUN_OBJS = nrun.o ## COMMON_POST_CONFIG_FRAG -interp.o: $(srcdir)/interp.c oengine.c config.h sim-main.h +interp.o: $(srcdir)/interp.c config.h sim-main.h oengine.c oengine.c: gencode ./gencode @SIMCONF@ > tmp-oengine mv tmp-oengine oengine.c -tmp.igen: gencode - ./gencode --igen @SIMCONF@ > tmp-igen - mv tmp-igen tmp.igen gencode: gencode.o getopt.o getopt1.o $(CC_FOR_BUILD) -o $@ gencode.o getopt.o getopt1.o @@ -65,5 +68,178 @@ getopt.o: $(srcdir)/../../libiberty/getopt.c getopt1.o: $(srcdir)/../../libiberty/getopt1.c $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt1.c + +../igen/igen: + cd ../igen && $(MAKE) + +IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries +IGEN_INSN=$(srcdir)/mips.igen +IGEN_DC=$(srcdir)/mips.dc + + +SIM_IGEN_CFLAGS = -DWITH_IGEN +SIM_IGEN_ALL = tmp-igen + +SIM_IGEN_OBJ = \ + support.o \ + itable.o \ + semantics.o \ + idecode.o \ + icache.o \ + engine.o \ + irun.o + +BUILT_SRC_FROM_IGEN = \ + icache.h \ + icache.c \ + idecode.h \ + idecode.c \ + semantics.h \ + semantics.c \ + model.h \ + model.c \ + support.h \ + support.c \ + itable.h \ + itable.c \ + engine.h \ + engine.c \ + irun.c + +$(BUILT_SRC_FROM_IGEN): tmp-igen + +.PHONY: clean-igen +clean-igen: + rm -f $(BUILT_SRC_FROM_IGEN) + rm -f tmp-igen + +tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen + cd ../igen && $(MAKE) + ../igen/igen \ + $(IGEN_TRACE) \ + -Werror \ + -Wnodiscard \ + -F 32,64,f \ + -M mipsIV \ + -G gen-direct-access \ + -i $(IGEN_INSN) \ + -o $(IGEN_DC) \ + -x \ + -n icache.h -hc tmp-icache.h \ + -n icache.c -c tmp-icache.c \ + -n semantics.h -hs tmp-semantics.h \ + -n semantics.c -s tmp-semantics.c \ + -n idecode.h -hd tmp-idecode.h \ + -n idecode.c -d tmp-idecode.c \ + -n model.h -hm tmp-model.h \ + -n model.c -m tmp-model.c \ + -n support.h -hf tmp-support.h \ + -n support.c -f tmp-support.c \ + -n itable.h -ht tmp-itable.h \ + -n itable.c -t tmp-itable.c \ + -n engine.h -he tmp-engine.h \ + -n engine.c -e tmp-engine.c \ + -n irun.c -r tmp-irun.c + $(srcdir)/../../move-if-change tmp-icache.h icache.h + $(srcdir)/../../move-if-change tmp-icache.c icache.c + $(srcdir)/../../move-if-change tmp-idecode.h idecode.h + $(srcdir)/../../move-if-change tmp-idecode.c idecode.c + $(srcdir)/../../move-if-change tmp-semantics.h semantics.h + $(srcdir)/../../move-if-change tmp-semantics.c semantics.c + $(srcdir)/../../move-if-change tmp-model.h model.h + $(srcdir)/../../move-if-change tmp-model.c model.c + $(srcdir)/../../move-if-change tmp-support.h support.h + $(srcdir)/../../move-if-change tmp-support.c support.c + $(srcdir)/../../move-if-change tmp-itable.h itable.h + $(srcdir)/../../move-if-change tmp-itable.c itable.c + $(srcdir)/../../move-if-change tmp-engine.h engine.h + $(srcdir)/../../move-if-change tmp-engine.c engine.c + $(srcdir)/../../move-if-change tmp-irun.c irun.c + touch tmp-igen + + + +SIM_M16_CFLAGS = -DWITH_IGEN +SIM_M16_ALL = tmp-igen $(SIM_M16_ALL) + +SIM_M16_OBJ = \ + $(SIM_IGEN_OBJ) = \ + m16_support.o \ + m16_itable.o \ + m16_semantics.o \ + m16_idecode.o \ + m16_icache.o \ + m16_engine.o \ + m16_irun.o + +BUILT_SRC_FROM_M16 = \ + m16_icache.h \ + m16_icache.c \ + m16_idecode.h \ + m16_idecode.c \ + m16_semantics.h \ + m16_semantics.c \ + m16_model.h \ + m16_model.c \ + m16_support.h \ + m16_support.c \ + m16_itable.h \ + m16_itable.c \ + m16_engine.h \ + m16_engine.c \ + m16_irun.c + +$(BUILT_SRC_FROM_M16): tmp-m16 + +.PHONY: clean-m16 +clean-m16: + rm -f $(BUILT_SRC_FROM_M16) + rm -f tmp-m16 + +tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen + cd ../igen && $(MAKE) + ../igen/igen \ + $(IGEN_TRACE) \ + -Werror \ + -Wnodiscard \ + -F 16 \ + -M mips16 \ + -G gen-direct-access \ + -i $(IGEN_INSN) \ + -o $(IGEN_DC) \ + -x \ + -n m16_icache.h -hc tmp-icache.h \ + -n m16_icache.c -c tmp-icache.c \ + -n m16_semantics.h -hs tmp-semantics.h \ + -n m16_semantics.c -s tmp-semantics.c \ + -n m16_idecode.h -hd tmp-idecode.h \ + -n m16_idecode.c -d tmp-idecode.c \ + -n m16_model.h -hm tmp-model.h \ + -n m16_model.c -m tmp-model.c \ + -n m16_support.h -hf tmp-support.h \ + -n m16_support.c -f tmp-support.c \ + -n m16_itable.h -ht tmp-itable.h \ + -n m16_itable.c -t tmp-itable.c \ + -n m16_engine.h -he tmp-engine.h \ + -n m16_engine.c -e tmp-engine.c \ + -n m16_irun.c -r tmp-irun.c + $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h + $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c + $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h + $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c + $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h + $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c + $(srcdir)/../../move-if-change tmp-model.h m16_model.h + $(srcdir)/../../move-if-change tmp-model.c m16_model.c + $(srcdir)/../../move-if-change tmp-support.h m16_support.h + $(srcdir)/../../move-if-change tmp-support.c m16_support.c + $(srcdir)/../../move-if-change tmp-itable.h m16_itable.h + $(srcdir)/../../move-if-change tmp-itable.c m16_itable.c + $(srcdir)/../../move-if-change tmp-engine.h m16_engine.h + $(srcdir)/../../move-if-change tmp-engine.c m16_engine.c + $(srcdir)/../../move-if-change tmp-irun.c m16_irun.c + touch tmp-m16 + + clean-extra: - rm -f gencode engine.c tmp.igen + rm -f gencode oengine.c tmp.igen diff --git a/sim/mips/configure b/sim/mips/configure index 4a896af..416b466 100755 --- a/sim/mips/configure +++ b/sim/mips/configure @@ -1768,21 +1768,38 @@ fi +# +# Select the sim generator & architecture +# +sim_gen=NO +case "${target}" in +# start-sanitize-r5900 +# mips64r59*-*-*) sim_gen=IGEN ;; +# end-sanitize-r5900 +# start-sanitize-vr5400 +# mips64vr54*-*-*) sim_gen=IGEN ;; +# end-sanitize-vr5400 +# mips16*-*-*) sim_gen=M16 ;; + *) sim_gen=NO ;; +esac + + + for ac_hdr in string.h strings.h stdlib.h stdlib.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:1776: checking for $ac_hdr" >&5 +echo "configure:1793: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1781 "configure" +#line 1798 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:1786: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:1803: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out` if test -z "$ac_err"; then rm -rf conftest* @@ -1809,7 +1826,7 @@ fi done echo $ac_n "checking for fabs in -lm""... $ac_c" 1>&6 -echo "configure:1813: checking for fabs in -lm" >&5 +echo "configure:1830: checking for fabs in -lm" >&5 ac_lib_var=`echo m'_'fabs | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -1817,7 +1834,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lm $LIBS" cat > conftest.$ac_ext <<EOF -#line 1821 "configure" +#line 1838 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -1828,7 +1845,7 @@ int main() { fabs() ; return 0; } EOF -if { (eval echo configure:1832: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then +if { (eval echo configure:1849: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -1858,12 +1875,12 @@ fi for ac_func in aint anint sqrt do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:1862: checking for $ac_func" >&5 +echo "configure:1879: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 1867 "configure" +#line 1884 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -1886,7 +1903,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:1890: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then +if { (eval echo configure:1907: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -2092,6 +2109,7 @@ s%@sim_trace@%$sim_trace%g s%@sim_profile@%$sim_profile%g s%@SIMCONF@%$SIMCONF%g s%@SIM_SUBTARGET@%$SIM_SUBTARGET%g +s%@sim_gen@%$sim_gen%g CEOF EOF diff --git a/sim/mips/configure.in b/sim/mips/configure.in index 4ab0f0b..38c05d9 100644 --- a/sim/mips/configure.in +++ b/sim/mips/configure.in @@ -91,6 +91,23 @@ esac SIM_AC_OPTION_FLOAT($mips_fpu) +# +# Select the sim generator & architecture +# +sim_gen=NO +case "${target}" in +# start-sanitize-r5900 +# mips64r59*-*-*) sim_gen=IGEN ;; +# end-sanitize-r5900 +# start-sanitize-vr5400 +# mips64vr54*-*-*) sim_gen=IGEN ;; +# end-sanitize-vr5400 +# mips16*-*-*) sim_gen=M16 ;; + *) sim_gen=NO ;; +esac +AC_SUBST(sim_gen) + + AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h) AC_CHECK_LIB(m, fabs) AC_CHECK_FUNCS(aint anint sqrt) |