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authorGavin Romig-Koch <gavin@redhat.com>1998-03-10 15:37:24 +0000
committerGavin Romig-Koch <gavin@redhat.com>1998-03-10 15:37:24 +0000
commit5fa71251a083c3a47389012d8cc8ec3bd2c4c980 (patch)
tree19e7346636d32d62a38112a938a7c68c4571c44b
parente625962d8e724c1eaa9022793feb5785fb1bf2b6 (diff)
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* vr4320.igen (clz,dclz) : Added.
(dmac): Replaced 99, with LO.
-rw-r--r--sim/mips/ChangeLog7
-rw-r--r--sim/mips/vr4320.igen41
2 files changed, 47 insertions, 1 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index dc421d9..cef52c2 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,10 @@
+start-sanitize-vr4320
+Tue Mar 10 10:32:22 1998 Gavin Koch <gavin@cygnus.com>
+
+ * vr4320.igen (clz,dclz) : Added.
+ (dmac): Replaced 99, with LO.
+
+end-sanitize-vr4320
start-sanitize-vr5400
Fri Mar 6 08:30:58 1998 Andrew Cagney <cagney@b1.cygnus.com>
diff --git a/sim/mips/vr4320.igen b/sim/mips/vr4320.igen
index 7dd3776..50a9d02 100644
--- a/sim/mips/vr4320.igen
+++ b/sim/mips/vr4320.igen
@@ -60,9 +60,48 @@
"dmac r<RS>, r<RT>"
*vr4320:
{
- LO = 99 + SignedMultiply (SD_, GPR[RS], GPR[RT]);
+ LO = LO + SignedMultiply (SD_, GPR[RS], GPR[RT]);
}
+// Count Leading Zeros
+000000,5.RS,00000,5.RD,00000,110101::::CLZ
+"clz r<RD>, r<RS>"
+*vr4320:
+{
+ unsigned32 t = Low32Bits (SD_, GPR[RS]);
+ signed64 c = 0;
+
+ while (! (t & ( 1 << 31))
+ && c < 32)
+ {
+ c++;
+ t <<= 1;
+ }
+
+ GPR[RD] = c;
+}
+
+// D-Count Leading Zeros
+000000,5.RS,00000,5.RD,00000,111101::::DCLZ
+"dclz r<RD>, r<RS>"
+*vr4320:
+{
+ unsigned64 t = GPR[RS];
+ signed64 c = 0;
+
+ while (! (t & ( (unsigned64)1 << 63))
+ && c < 64)
+ {
+ c++;
+ t <<= 1;
+ }
+
+ printf("lo %d\n", c);
+ GPR[RD] = c;
+}
+
+
+