Add PowerPC64 ELFv2 tests.

	* ld-powerpc/elfv2.s,
	* ld-powerpc/elfv2so.d,
	* ld-powerpc/elfv2exe.d: New tests.
	* ld-powerpc/powerpc.exp: Run them.

5 files changed, 163 insertions, 0 deletions

diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index f365d7e..94e859d 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,5 +1,12 @@
 2013-10-30  Alan Modra  <amodra@gmail.com>
 
+	* ld-powerpc/elfv2.s,
+	* ld-powerpc/elfv2so.d,
+	* ld-powerpc/elfv2exe.d: New tests.
+	* ld-powerpc/powerpc.exp: Run them.
+
+2013-10-30  Alan Modra  <amodra@gmail.com>
+
 	* ld-powerpc/tls.s: Add proper .opd entry for _start.
 	* ld-powerpc/tlstoc.s: Likewise.
 	* ld-powerpc/relbrlt.d: Update for changed stubs.
diff --git a/ld/testsuite/ld-powerpc/elfv2.s b/ld/testsuite/ld-powerpc/elfv2.s
new file mode 100644
index 0000000..c2a4c3b
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/elfv2.s
@@ -0,0 +1,32 @@
+ .section .toc,"aw",@progbits
+.L0:
+ .quad x
+
+ .data
+x:
+ .quad f1
+
+ .globl f1
+ .type f1,@function
+ .text
+f1:
+ addis 2,12,.TOC.-f1@ha
+ addi 2,2,.TOC.-f1@l
+ .localentry f1,.-f1
+ mflr 0
+ stdu 1,-32(1)
+ std 0,48(1)
+ bl f1
+ ld 3,.L0@toc(2)
+ bl f2
+ nop
+ ld 3,x@got(2)
+ bl f3
+ nop
+ bl f4
+ nop
+ ld 0,48(1)
+ addi 1,1,32
+ mtlr 0
+ blr
+ .size f1,.-f1
diff --git a/ld/testsuite/ld-powerpc/elfv2exe.d b/ld/testsuite/ld-powerpc/elfv2exe.d
new file mode 100644
index 0000000..50d4685
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/elfv2exe.d
@@ -0,0 +1,40 @@
+#source: elfv2.s
+#as: -a64
+#ld: -melf64ppc --defsym f2=0x1234 --defsym f3=0x10008888 --defsym f4=0x1200000 --defsym _start=f1
+#objdump: -dr
+
+.*
+
+Disassembly of section \.text:
+
+0+100000c0 <.*\.plt_branch\.f2>:
+.*:	(ff ff 62 3d|3d 62 ff ff) 	addis   r11,r2,-1
+.*:	(f0 7f 8b e9|e9 8b 7f f0) 	ld      r12,32752\(r11\)
+.*:	(a6 03 89 7d|7d 89 03 a6) 	mtctr   r12
+.*:	(20 04 80 4e|4e 80 04 20) 	bctr
+
+0+100000d0 <.*\.plt_branch\.f4>:
+.*:	(ff ff 62 3d|3d 62 ff ff) 	addis   r11,r2,-1
+.*:	(f8 7f 8b e9|e9 8b 7f f8) 	ld      r12,32760\(r11\)
+.*:	(a6 03 89 7d|7d 89 03 a6) 	mtctr   r12
+.*:	(20 04 80 4e|4e 80 04 20) 	bctr
+
+0+100000e0 <_start>:
+.*:	(02 00 4c 3c|3c 4c 00 02) 	addis   r2,r12,2
+.*:	(60 80 42 38|38 42 80 60) 	addi    r2,r2,-32672
+.*:	(a6 02 08 7c|7c 08 02 a6) 	mflr    r0
+.*:	(e1 ff 21 f8|f8 21 ff e1) 	stdu    r1,-32\(r1\)
+.*:	(30 00 01 f8|f8 01 00 30) 	std     r0,48\(r1\)
+.*:	(f5 ff ff 4b|4b ff ff f5) 	bl      .* <_start\+0x8>
+.*:	(08 80 62 e8|e8 62 80 08) 	ld      r3,-32760\(r2\)
+.*:	(c5 ff ff 4b|4b ff ff c5) 	bl      .*\.plt_branch\.f2>
+.*:	(00 00 00 60|60 00 00 00) 	nop
+.*:	(10 80 62 e8|e8 62 80 10) 	ld      r3,-32752\(r2\)
+.*:	(81 87 00 48|48 00 87 81) 	bl      10008888 <f3>
+.*:	(00 00 00 60|60 00 00 00) 	nop
+.*:	(c1 ff ff 4b|4b ff ff c1) 	bl      .*\.plt_branch\.f4>
+.*:	(00 00 00 60|60 00 00 00) 	nop
+.*:	(30 00 01 e8|e8 01 00 30) 	ld      r0,48\(r1\)
+.*:	(20 00 21 38|38 21 00 20) 	addi    r1,r1,32
+.*:	(a6 03 08 7c|7c 08 03 a6) 	mtlr    r0
+.*:	(20 00 80 4e|4e 80 00 20) 	blr
diff --git a/ld/testsuite/ld-powerpc/elfv2so.d b/ld/testsuite/ld-powerpc/elfv2so.d
new file mode 100644
index 0000000..963dbb6
--- /dev/null
+++ b/ld/testsuite/ld-powerpc/elfv2so.d
@@ -0,0 +1,82 @@
+#source: elfv2.s
+#as: -a64
+#ld: -melf64ppc -shared
+#objdump: -dr
+
+.*
+
+Disassembly of section \.text:
+
+0+300 <.*\.plt_call\.f4>:
+.*:	(18 00 41 f8|f8 41 00 18) 	std     r2,24\(r1\)
+.*:	(38 80 82 e9|e9 82 80 38) 	ld      r12,-32712\(r2\)
+.*:	(a6 03 89 7d|7d 89 03 a6) 	mtctr   r12
+.*:	(20 04 80 4e|4e 80 04 20) 	bctr
+
+0+310 <.*\.plt_call\.f3>:
+.*:	(18 00 41 f8|f8 41 00 18) 	std     r2,24\(r1\)
+.*:	(28 80 82 e9|e9 82 80 28) 	ld      r12,-32728\(r2\)
+.*:	(a6 03 89 7d|7d 89 03 a6) 	mtctr   r12
+.*:	(20 04 80 4e|4e 80 04 20) 	bctr
+
+0+320 <.*\.plt_call\.f2>:
+.*:	(18 00 41 f8|f8 41 00 18) 	std     r2,24\(r1\)
+.*:	(30 80 82 e9|e9 82 80 30) 	ld      r12,-32720\(r2\)
+.*:	(a6 03 89 7d|7d 89 03 a6) 	mtctr   r12
+.*:	(20 04 80 4e|4e 80 04 20) 	bctr
+
+0+330 <.*\.plt_call\.f1>:
+.*:	(18 00 41 f8|f8 41 00 18) 	std     r2,24\(r1\)
+.*:	(40 80 82 e9|e9 82 80 40) 	ld      r12,-32704\(r2\)
+.*:	(a6 03 89 7d|7d 89 03 a6) 	mtctr   r12
+.*:	(20 04 80 4e|4e 80 04 20) 	bctr
+
+0+340 <f1>:
+.*:	(02 00 4c 3c|3c 4c 00 02) 	addis   r2,r12,2
+.*:	(e0 81 42 38|38 42 81 e0) 	addi    r2,r2,-32288
+.*:	(a6 02 08 7c|7c 08 02 a6) 	mflr    r0
+.*:	(e1 ff 21 f8|f8 21 ff e1) 	stdu    r1,-32\(r1\)
+.*:	(30 00 01 f8|f8 01 00 30) 	std     r0,48\(r1\)
+.*:	(dd ff ff 4b|4b ff ff dd) 	bl      .*\.plt_call\.f1>
+.*:	(08 80 62 e8|e8 62 80 08) 	ld      r3,-32760\(r2\)
+.*:	(c5 ff ff 4b|4b ff ff c5) 	bl      .*\.plt_call\.f2>
+.*:	(18 00 41 e8|e8 41 00 18) 	ld      r2,24\(r1\)
+.*:	(10 80 62 e8|e8 62 80 10) 	ld      r3,-32752\(r2\)
+.*:	(a9 ff ff 4b|4b ff ff a9) 	bl      .*\.plt_call\.f3>
+.*:	(18 00 41 e8|e8 41 00 18) 	ld      r2,24\(r1\)
+.*:	(91 ff ff 4b|4b ff ff 91) 	bl      .*\.plt_call\.f4>
+.*:	(18 00 41 e8|e8 41 00 18) 	ld      r2,24\(r1\)
+.*:	(30 00 01 e8|e8 01 00 30) 	ld      r0,48\(r1\)
+.*:	(20 00 21 38|38 21 00 20) 	addi    r1,r1,32
+.*:	(a6 03 08 7c|7c 08 03 a6) 	mtlr    r0
+.*:	(20 00 80 4e|4e 80 00 20) 	blr
+.*:	(a0 01 01 00|00 00 00 00) 	.*
+.*:	(00 00 00 00|00 01 01 a0) 	.*
+
+0+390 <__glink_PLTresolve>:
+.*:	(a6 02 08 7c|7c 08 02 a6) 	mflr    r0
+.*:	(05 00 9f 42|42 9f 00 05) 	bcl     .*
+.*:	(a6 02 68 7d|7d 68 02 a6) 	mflr    r11
+.*:	(f0 ff 4b e8|e8 4b ff f0) 	ld      r2,-16\(r11\)
+.*:	(a6 03 08 7c|7c 08 03 a6) 	mtlr    r0
+.*:	(50 60 8b 7d|7d 8b 60 50) 	subf    r12,r11,r12
+.*:	(14 5a 62 7d|7d 62 5a 14) 	add     r11,r2,r11
+.*:	(d0 ff 0c 38|38 0c ff d0) 	addi    r0,r12,-48
+.*:	(00 00 8b e9|e9 8b 00 00) 	ld      r12,0\(r11\)
+.*:	(82 f0 00 78|78 00 f0 82) 	rldicl  r0,r0,62,2
+.*:	(a6 03 89 7d|7d 89 03 a6) 	mtctr   r12
+.*:	(08 00 6b e9|e9 6b 00 08) 	ld      r11,8\(r11\)
+.*:	(20 04 80 4e|4e 80 04 20) 	bctr
+.*:	(00 00 00 60|60 00 00 00) 	nop
+
+.* <f3@plt>:
+.*:	(c8 ff ff 4b|4b ff ff c8) 	b       .* <__glink_PLTresolve>
+
+.* <f2@plt>:
+.*:	(c4 ff ff 4b|4b ff ff c4) 	b       .* <__glink_PLTresolve>
+
+.* <f4@plt>:
+.*:	(c0 ff ff 4b|4b ff ff c0) 	b       .* <__glink_PLTresolve>
+
+.* <f1@plt>:
+.*:	(bc ff ff 4b|4b ff ff bc) 	b       .* <__glink_PLTresolve>
diff --git a/ld/testsuite/ld-powerpc/powerpc.exp b/ld/testsuite/ld-powerpc/powerpc.exp
index 8b33fcc..87e4ea8 100644
--- a/ld/testsuite/ld-powerpc/powerpc.exp
+++ b/ld/testsuite/ld-powerpc/powerpc.exp
@@ -269,6 +269,8 @@ run_ld_link_tests $ppcelftests
 if [ supports_ppc64 ] then {
     run_ld_link_tests $ppc64elftests
     run_dump_test "relbrlt"
+    run_dump_test "elfv2so"
+    run_dump_test "elfv2exe"
 }
 
 if { [istarget "powerpc*-eabi*"] } {