* config/mips/tm-irix6.h: New file.

	* config/mips/irix6.mh: New file.

	* config/mips/irix6.mt: New file.

	* config/mips/xm-irix6.h: New file.

	* config/mips/nm-irix6.h: New file.

	* mips-tdep.c (mips_gdbarch_init) <MIPS_ABI_N32>: Set up the
	disassembler info in tm_print_insn_info as appropriate for the N32
	ABI.  Force N32 ABI to be the default if the CPU is R8000 or
	R10000.

	* configure.tgt (mips*-sgi-irix6*): Map to irix6.

	* configure.host (mips*-sgi-irix6*): Ditto.

9 files changed, 239 insertions, 3 deletions

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 0f27a90..c26baaa 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,24 @@
+2001-06-07  Eli Zaretskii  <elis@is.elta.co.il>
+
+	* config/mips/tm-irix6.h: New file.
+
+	* config/mips/irix6.mh: New file.
+
+	* config/mips/irix6.mt: New file.
+
+	* config/mips/xm-irix6.h: New file.
+
+	* config/mips/nm-irix6.h: New file.
+
+	* mips-tdep.c (mips_gdbarch_init) <MIPS_ABI_N32>: Set up the
+	disassembler info in tm_print_insn_info as appropriate for the N32
+	ABI.  Force N32 ABI to be the default if the CPU is R8000 or
+	R10000.
+
+	* configure.tgt (mips*-sgi-irix6*): Map to irix6.
+
+	* configure.host (mips*-sgi-irix6*): Ditto.
+
 2001-06-07  Andrew Cagney  <ac131313@redhat.com>
 
 	* gnu-v3-abi.c: Include "gdb_assert.h".
diff --git a/gdb/config/mips/irix6.mh b/gdb/config/mips/irix6.mh
new file mode 100644
index 0000000..f2817a9
--- /dev/null
+++ b/gdb/config/mips/irix6.mh
@@ -0,0 +1,8 @@
+# Host: SGI Iris running irix 6.x
+XDEPFILES=
+XM_FILE= xm-irix6.h
+NAT_FILE= nm-irix6.h
+NATDEPFILES= fork-child.o solib.o irix5-nat.o corelow.o procfs.o \
+	proc-api.o proc-events.o proc-flags.o proc-why.o
+
+XM_CLIBS=-lbsd
diff --git a/gdb/config/mips/irix6.mt b/gdb/config/mips/irix6.mt
new file mode 100644
index 0000000..c5c5cce
--- /dev/null
+++ b/gdb/config/mips/irix6.mt
@@ -0,0 +1,3 @@
+# Target: MIPS SGI running Irix 6.x
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-irix6.h
diff --git a/gdb/config/mips/nm-irix6.h b/gdb/config/mips/nm-irix6.h
new file mode 100644
index 0000000..301b629
--- /dev/null
+++ b/gdb/config/mips/nm-irix6.h
@@ -0,0 +1,22 @@
+/* Definitions for native support of irix6.
+
+   Copyright 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/nm-irix5.h"
diff --git a/gdb/config/mips/tm-irix6.h b/gdb/config/mips/tm-irix6.h
new file mode 100644
index 0000000..2d90b2e
--- /dev/null
+++ b/gdb/config/mips/tm-irix6.h
@@ -0,0 +1,139 @@
+/* Target machine description for SGI Iris under Irix 6.x, for GDB.
+   Copyright 2001
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-bigmips.h"
+
+/* SGI's assembler doesn't grok dollar signs in identifiers.
+   So we use dots instead.  This item must be coordinated with G++. */
+#undef CPLUS_MARKER
+#define CPLUS_MARKER '.'
+
+/* Redefine register numbers for SGI. */
+
+#undef NUM_REGS
+#undef MIPS_REGISTER_NAMES
+#undef FP0_REGNUM
+#undef PC_REGNUM
+#undef HI_REGNUM
+#undef LO_REGNUM
+#undef CAUSE_REGNUM
+#undef BADVADDR_REGNUM
+#undef FCRCS_REGNUM
+#undef FCRIR_REGNUM
+#undef FP_REGNUM
+
+/* Number of machine registers */
+
+#define NUM_REGS 71
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.  */
+
+#define MIPS_REGISTER_NAMES 	\
+    {	"zero",	"at",	"v0",	"v1",	"a0",	"a1",	"a2",	"a3", \
+	"a4",	"a5",	"a6",	"a7",	"t0",	"t1",	"t2",	"t3", \
+	"s0",	"s1",	"s2",	"s3",	"s4",	"s5",	"s6",	"s7", \
+	"t8",	"t9",	"k0",	"k1",	"gp",	"sp",	"s8",	"ra", \
+	"f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7", \
+	"f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15", \
+	"f16",  "f17",  "f18",  "f19",  "f20",  "f21",  "f22",  "f23",\
+	"f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",\
+	"pc",	"cause", "bad",	"hi",	"lo",	"fsr",  "fir" \
+    }
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#define FP0_REGNUM 32		/* Floating point register 0 (single float) */
+#define PC_REGNUM 64		/* Contains program counter */
+#define CAUSE_REGNUM 65		/* describes last exception */
+#define BADVADDR_REGNUM 66	/* bad vaddr for addressing exception */
+#define HI_REGNUM 67		/* Multiple/divide temp */
+#define LO_REGNUM 68		/* ... */
+#define FCRCS_REGNUM 69		/* FP control/status */
+#define FCRIR_REGNUM 70		/* FP implementation/revision */
+#define FP_REGNUM 30		/* S8 register is the Frame Pointer */
+
+
+#undef  REGISTER_BYTES
+#define REGISTER_BYTES (MIPS_NUMREGS * 8 + (NUM_REGS - MIPS_NUMREGS) * MIPS_REGSIZE)
+
+#undef  REGISTER_BYTE
+#define REGISTER_BYTE(N) \
+     (((N) < FP0_REGNUM) ? (N) * MIPS_REGSIZE : \
+      ((N) < FP0_REGNUM + 32) ?     \
+      FP0_REGNUM * MIPS_REGSIZE + \
+      ((N) - FP0_REGNUM) * sizeof(double) : \
+      32 * sizeof(double) + ((N) - 32) * MIPS_REGSIZE)
+
+#undef  REGISTER_VIRTUAL_TYPE
+#define REGISTER_VIRTUAL_TYPE(N) \
+	(((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_double \
+	 : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
+	 : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
+	 : builtin_type_int)
+
+#undef  MIPS_LAST_ARG_REGNUM
+#define MIPS_LAST_ARG_REGNUM 11	/* N32 uses R4 through R11 for args */
+
+/* MIPS_STACK_ARGSIZE -- how many bytes does a pushed function arg take
+   up on the stack? For the n32 ABI, eight bytes are reserved for each
+   register. Like MIPS_SAVED_REGSIZE but different. */
+#define MIPS_DEFAULT_STACK_ARGSIZE 8
+
+/* N32 does not reserve home space for registers used to carry
+   parameters. */
+#define MIPS_REGS_HAVE_HOME_P 0
+
+/* Force N32 ABI as the default. */
+#define MIPS_DEFAULT_ABI MIPS_ABI_N32
+
+
+/* The signal handler trampoline is called _sigtramp.  */
+#undef IN_SIGTRAMP
+#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))
+
+/* Offsets for register values in _sigtramp frame.
+   sigcontext is immediately above the _sigtramp frame on Irix.  */
+#undef SIGFRAME_BASE
+#define SIGFRAME_BASE		0
+
+/* Irix 5 saves a full 64 bits for each register.  We skip 2 * 4 to
+   get to the saved PC (the register mask and status register are both
+   32 bits) and then another 4 to get to the lower 32 bits.  We skip
+   the same 4 bytes, plus the 8 bytes for the PC to get to the
+   registers, and add another 4 to get to the lower 32 bits.  We skip
+   8 bytes per register.  */
+#undef SIGFRAME_PC_OFF
+#define SIGFRAME_PC_OFF		(SIGFRAME_BASE + 2 * 4 + 4)
+#undef SIGFRAME_REGSAVE_OFF
+#define SIGFRAME_REGSAVE_OFF	(SIGFRAME_BASE + 2 * 4 + 8 + 4)
+#undef SIGFRAME_FPREGSAVE_OFF
+#define SIGFRAME_FPREGSAVE_OFF	(SIGFRAME_BASE + 2 * 4 + 8 + 32 * 8 + 4)
+#define SIGFRAME_REG_SIZE	8
+
+/* Select the disassembler */
+#undef TM_PRINT_INSN_MACH
+#define TM_PRINT_INSN_MACH bfd_mach_mips8000
diff --git a/gdb/config/mips/xm-irix6.h b/gdb/config/mips/xm-irix6.h
new file mode 100644
index 0000000..a8a4c68
--- /dev/null
+++ b/gdb/config/mips/xm-irix6.h
@@ -0,0 +1,22 @@
+/* Definitions for irix6 hosting support.
+
+   Copyright 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/xm-irix5.h"
diff --git a/gdb/configure.host b/gdb/configure.host
index ff09bdc..4a50432a 100644
--- a/gdb/configure.host
+++ b/gdb/configure.host
@@ -115,8 +115,7 @@ mips-little-*)		gdb_host=littlemips ;;
 mips-sgi-irix3*)	gdb_host=irix3 ;;
 mips-sgi-irix4*)	gdb_host=irix4 ;;
 mips-sgi-irix5*)	gdb_host=irix5 ;;
-# Close enough for now.
-mips-sgi-irix6*)	gdb_host=irix5 ;;
+mips-sgi-irix6*)	gdb_host=irix6 ;;
 mips-sony-*)		gdb_host=news-mips ;;
 mips-*-mach3*)		gdb_host=mipsm3 ;;
 mips-*-sysv4*)		gdb_host=mipsv4 ;;
diff --git a/gdb/configure.tgt b/gdb/configure.tgt
index 23f4069..7c5ee45 100644
--- a/gdb/configure.tgt
+++ b/gdb/configure.tgt
@@ -207,7 +207,7 @@ mips*-*-elf*)		gdb_target=embed ;;
 mips*-little-*)		gdb_target=littlemips ;;
 mips*-*-lnews*)		gdb_target=embedl ;;
 mips*-sgi-irix5*)	gdb_target=irix5 ;;
-mips*-sgi-irix6*)	gdb_target=irix5 ;;
+mips*-sgi-irix6*)	gdb_target=irix6 ;;
 mips*-sgi-*)		gdb_target=irix3 ;;
 mips*-sony-*)		gdb_target=bigmips ;;
 mips*-*-mach3*)		gdb_target=mipsm3 ;;
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index bdb285f..4ecc925 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -3871,6 +3871,12 @@ mips_gdbarch_init (struct gdbarch_info info,
   int elf_flags;
   enum mips_abi mips_abi;
 
+  /* Reset the disassembly info, in case it was set to something
+     non-default.  */
+  tm_print_insn_info.flavour = bfd_target_unknown_flavour;
+  tm_print_insn_info.arch = bfd_arch_unknown;
+  tm_print_insn_info.mach = 0;
+
   /* Extract the elf_flags if available */
   if (info.abfd != NULL
       && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
@@ -3915,6 +3921,10 @@ mips_gdbarch_init (struct gdbarch_info info,
 	case bfd_mach_mips5000:
 	  mips_abi = MIPS_ABI_EABI64;
 	  break;
+	case bfd_mach_mips8000:
+	case bfd_mach_mips10000:
+	  mips_abi = MIPS_ABI_N32;
+	  break;
 	}
     }
 #ifdef MIPS_DEFAULT_ABI
@@ -3958,6 +3968,7 @@ mips_gdbarch_init (struct gdbarch_info info,
   set_gdbarch_double_bit (gdbarch, 64);
   set_gdbarch_long_double_bit (gdbarch, 64);
   tdep->mips_abi = mips_abi;
+
   switch (mips_abi)
     {
     case MIPS_ABI_O32:
@@ -4029,6 +4040,17 @@ mips_gdbarch_init (struct gdbarch_info info,
       set_gdbarch_long_bit (gdbarch, 32);
       set_gdbarch_ptr_bit (gdbarch, 32);
       set_gdbarch_long_long_bit (gdbarch, 64);
+
+      /* Set up the disassembler info, so that we get the right
+	 register names from libopcodes.  */
+      tm_print_insn_info.flavour = bfd_target_elf_flavour;
+      tm_print_insn_info.arch = bfd_arch_mips;
+      if (info.bfd_arch_info != NULL
+	  && info.bfd_arch_info->arch == bfd_arch_mips
+	  && info.bfd_arch_info->mach)
+	tm_print_insn_info.mach = info.bfd_arch_info->mach;
+      else
+	tm_print_insn_info.mach = bfd_mach_mips8000;
       break;
     default:
       tdep->mips_abi_string = "default";