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| author | Yoshinori Sato <ysato@users.sourceforge.jp> | 2006-07-19 06:27:04 +0000 |
|---|---|---|
| committer | Yoshinori Sato <ysato@users.sourceforge.jp> | 2006-07-19 06:27:04 +0000 |
| commit | b86015eaa50eb4b44a7055a5114262e94040213a (patch) | |
| tree | d8dd9a613de858677d049b4fbb646946278da869 | |
| parent | 86cc68a8de702025017c162b653ddef376bec88d (diff) | |
| download | gdb-b86015eaa50eb4b44a7055a5114262e94040213a.zip gdb-b86015eaa50eb4b44a7055a5114262e94040213a.tar.gz gdb-b86015eaa50eb4b44a7055a5114262e94040213a.tar.bz2 | |
compile.c (OBITOP): Bit address mask low three bit.
compile.c (decode): Fix warning.
| -rw-r--r-- | sim/h8300/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/h8300/compile.c | 6 |
2 files changed, 8 insertions, 3 deletions
diff --git a/sim/h8300/ChangeLog b/sim/h8300/ChangeLog index 3e54a28..e221770 100644 --- a/sim/h8300/ChangeLog +++ b/sim/h8300/ChangeLog @@ -1,3 +1,8 @@ +2006-07-13 Yoshinori Sato <ysato@users.sourceforge.jp> + + * compile.c (OBITOP): Bit address mask low three bit. + * compile.c (decode): Fix warning. + 2006-06-13 Richard Earnshaw <rearnsha@arm.com> * configure: Regenerated. diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c index 3c11e82..0d30757 100644 --- a/sim/h8300/compile.c +++ b/sim/h8300/compile.c @@ -1018,7 +1018,7 @@ decode (SIM_DESC sd, int addr, unsigned char *data, decoded_inst *dst) p->literal = 0; if (OP_KIND (q->how) == O_JSR || OP_KIND (q->how) == O_JMP) - if (lvalue (sd, p->type, p->reg, &p->type)) + if (lvalue (sd, p->type, p->reg, (unsigned int *)&p->type)) goto end; } else if ((x & MODE) == ABS) @@ -1050,7 +1050,7 @@ decode (SIM_DESC sd, int addr, unsigned char *data, decoded_inst *dst) p->literal = cst[opnum]; if (OP_KIND (q->how) == O_JSR || OP_KIND (q->how) == O_JMP) - if (lvalue (sd, p->type, p->reg, &p->type)) + if (lvalue (sd, p->type, p->reg, (unsigned int *)&p->type)) goto end; } else if ((x & MODE) == PCREL) @@ -1891,7 +1891,7 @@ case O (name, SB): \ goto end; \ if (fetch (sd, &code->src, &tmp)) \ goto end; \ - m = 1 << tmp; \ + m = 1 << (tmp & 7); \ op; \ if (s) \ if (store (sd, &code->dst,ea)) \ |