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authorPeter Bergner <bergner@vnet.ibm.com>2008-09-09 13:25:05 +0000
committerPeter Bergner <bergner@vnet.ibm.com>2008-09-09 13:25:05 +0000
commita08f0c757380a9ebc0d9d47d8c0741f466aadd3e (patch)
tree609b31405f610a747ab8339611356fb8434bf52d
parenta9ab742235f3a8b10f1402ada34fe2d1bed6aee9 (diff)
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gas/
* config/tc-ppc.c (ppc_setup_opcodes): Simplify POWER4/NOPOWER4 test. Remove POWER5 and POWER6 tests. gas/testsuite/ * gas/ppc/common.s: New test. * gas/ppc/common.d: Likewise. * gas/ppc/power4_32.s: Likewise. * gas/ppc/power4_32.d: Likewise. * gas/ppc/power6.s: Add attn, mtcr, mtcrf, mfcr, dcbz. * gas/ppc/power6.d: Likewise. * gas/ppc/ppc.exp: Run power4_32 test.
-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-ppc.c11
-rw-r--r--gas/testsuite/ChangeLog10
-rw-r--r--gas/testsuite/gas/ppc/common.d190
-rw-r--r--gas/testsuite/gas/ppc/common.s182
-rw-r--r--gas/testsuite/gas/ppc/power4_32.d43
-rw-r--r--gas/testsuite/gas/ppc/power4_32.s36
-rw-r--r--gas/testsuite/gas/ppc/power6.d25
-rw-r--r--gas/testsuite/gas/ppc/power6.s24
-rw-r--r--gas/testsuite/gas/ppc/ppc.exp2
10 files changed, 518 insertions, 10 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index dea89aa..81235a3 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2008-09-09 Peter Bergner <bergner@vnet.ibm.com>
+
+ * config/tc-ppc.c (ppc_setup_opcodes): Simplify POWER4/NOPOWER4 test.
+ Remove POWER5 and POWER6 tests.
+
2008-09-08 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
* config/tc-hppa.c (hppa_regname_to_dw2regnum): Add register name to
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index 76a9e8e..648ed72 100644
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -1428,15 +1428,8 @@ ppc_setup_opcodes (void)
&& ((op->flags & PPC_OPCODE_BOOKE64) == 0
|| (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
|| (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
- && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
- || ((op->flags & PPC_OPCODE_POWER4)
- == (ppc_cpu & PPC_OPCODE_POWER4)))
- && ((op->flags & PPC_OPCODE_POWER5) == 0
- || ((op->flags & PPC_OPCODE_POWER5)
- == (ppc_cpu & PPC_OPCODE_POWER5)))
- && ((op->flags & PPC_OPCODE_POWER6) == 0
- || ((op->flags & PPC_OPCODE_POWER6)
- == (ppc_cpu & PPC_OPCODE_POWER6))))
+ && ((ppc_cpu & PPC_OPCODE_POWER4) == 0
+ || (op->flags & PPC_OPCODE_NOPOWER4) == 0))
{
const char *retval;
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index ca84798..9e2791c 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,13 @@
+2008-09-09 Peter Bergner <bergner@vnet.ibm.com>
+
+ * gas/ppc/common.s: New test.
+ * gas/ppc/common.d: Likewise.
+ * gas/ppc/power4_32.s: Likewise.
+ * gas/ppc/power4_32.d: Likewise.
+ * gas/ppc/power6.s: Add attn, mtcr, mtcrf, mfcr, dcbz.
+ * gas/ppc/power6.d: Likewise.
+ * gas/ppc/ppc.exp: Run power4_32 test.
+
2008-09-06 Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/cfi-n64-1.s, gas/mips/cfi-n64-1.d: New test.
diff --git a/gas/testsuite/gas/ppc/common.d b/gas/testsuite/gas/ppc/common.d
new file mode 100644
index 0000000..d5f3257
--- /dev/null
+++ b/gas/testsuite/gas/ppc/common.d
@@ -0,0 +1,190 @@
+#objdump: -d -Mcom
+#as: -a32 -mcom
+#name: PowerPC COMMON instructions
+
+.*: +file format elf32-powerpc.*
+
+Disassembly of section \.text:
+
+0+00 <start>:
+
+ 0: 7c 83 28 39 and. r3,r4,r5
+ 4: 7c 83 28 38 and r3,r4,r5
+ 8: 7d cd 78 78 andc r13,r14,r15
+ c: 7e 30 90 79 andc. r16,r17,r18
+ 10: 48 00 00 02 ba 0 <start>
+ 14: 40 01 00 00 bdnzf- gt,14 <start\+0x14>
+ 18: 40 85 00 02 blea- cr1,0 <start>
+ 1c: 40 43 00 01 bdzfl- so,1c <start\+0x1c>
+ 20: 41 47 00 03 bdztla- 4\*cr1\+so,0 <start>
+ 24: 4e 80 04 20 bctr
+ 28: 4e 80 04 21 bctrl
+ 2c: 42 40 00 02 bdza- 0 <start>
+ 30: 42 40 00 00 bdz- 30 <start\+0x30>
+ 34: 42 40 00 03 bdzla- 0 <start>
+ 38: 42 40 00 01 bdzl- 38 <start\+0x38>
+ 3c: 41 82 00 00 beq- 3c <start\+0x3c>
+ 40: 41 8a 00 02 beqa- cr2,0 <start>
+ 44: 41 86 00 01 beql- cr1,44 <start\+0x44>
+ 48: 41 8e 00 03 beqla- cr3,0 <start>
+ 4c: 40 80 00 00 bge- 4c <start\+0x4c>
+ 50: 40 90 00 02 bgea- cr4,0 <start>
+ 54: 40 88 00 01 bgel- cr2,54 <start\+0x54>
+ 58: 40 98 00 03 bgela- cr6,0 <start>
+ 5c: 41 91 00 00 bgt- cr4,5c <start\+0x5c>
+ 60: 41 99 00 02 bgta- cr6,0 <start>
+ 64: 41 95 00 01 bgtl- cr5,64 <start\+0x64>
+ 68: 41 9d 00 03 bgtla- cr7,0 <start>
+ 6c: 48 00 00 00 b 6c <start\+0x6c>
+ 70: 48 00 00 03 bla 0 <start>
+ 74: 40 81 00 00 ble- 74 <start\+0x74>
+ 78: 40 91 00 02 blea- cr4,0 <start>
+ 7c: 40 89 00 01 blel- cr2,7c <start\+0x7c>
+ 80: 40 99 00 03 blela- cr6,0 <start>
+ 84: 48 00 00 01 bl 84 <start\+0x84>
+ 88: 41 80 00 00 blt- 88 <start\+0x88>
+ 8c: 41 88 00 02 blta- cr2,0 <start>
+ 90: 41 84 00 01 bltl- cr1,90 <start\+0x90>
+ 94: 41 8c 00 03 bltla- cr3,0 <start>
+ 98: 40 82 00 00 bne- 98 <start\+0x98>
+ 9c: 40 8a 00 02 bnea- cr2,0 <start>
+ a0: 40 86 00 01 bnel- cr1,a0 <start\+0xa0>
+ a4: 40 8e 00 03 bnela- cr3,0 <start>
+ a8: 40 85 00 00 ble- cr1,a8 <start\+0xa8>
+ ac: 40 95 00 02 blea- cr5,0 <start>
+ b0: 40 8d 00 01 blel- cr3,b0 <start\+0xb0>
+ b4: 40 9d 00 03 blela- cr7,0 <start>
+ b8: 40 84 00 00 bge- cr1,b8 <start\+0xb8>
+ bc: 40 94 00 02 bgea- cr5,0 <start>
+ c0: 40 8c 00 01 bgel- cr3,c0 <start\+0xc0>
+ c4: 40 9c 00 03 bgela- cr7,0 <start>
+ c8: 40 93 00 00 bns- cr4,c8 <start\+0xc8>
+ cc: 40 9b 00 02 bnsa- cr6,0 <start>
+ d0: 40 97 00 01 bnsl- cr5,d0 <start\+0xd0>
+ d4: 40 9f 00 03 bnsla- cr7,0 <start>
+ d8: 41 93 00 00 bso- cr4,d8 <start\+0xd8>
+ dc: 41 9b 00 02 bsoa- cr6,0 <start>
+ e0: 41 97 00 01 bsol- cr5,e0 <start\+0xe0>
+ e4: 41 9f 00 03 bsola- cr7,0 <start>
+ e8: 4c 85 32 02 crand 4\*cr1\+lt,4\*cr1\+gt,4\*cr1\+eq
+ ec: 4c 64 29 02 crandc so,4\*cr1\+lt,4\*cr1\+gt
+ f0: 4c e0 0a 42 creqv 4\*cr1\+so,lt,gt
+ f4: 4c 22 19 c2 crnand gt,eq,so
+ f8: 4c 01 10 42 crnor lt,gt,eq
+ fc: 4c a6 3b 82 cror 4\*cr1\+gt,4\*cr1\+eq,4\*cr1\+so
+ 100: 4c 43 23 42 crorc eq,so,4\*cr1\+lt
+ 104: 4c c7 01 82 crxor 4\*cr1\+eq,4\*cr1\+so,lt
+ 108: 7d 6a 62 39 eqv. r10,r11,r12
+ 10c: 7d 6a 62 38 eqv r10,r11,r12
+ 110: fe a0 fa 11 fabs. f21,f31
+ 114: fe a0 fa 10 fabs f21,f31
+ 118: fd 8a 58 40 fcmpo cr3,f10,f11
+ 11c: fd 84 28 00 fcmpu cr3,f4,f5
+ 120: fc 60 20 91 fmr. f3,f4
+ 124: fc 60 20 90 fmr f3,f4
+ 128: fe 80 f1 11 fnabs. f20,f30
+ 12c: fe 80 f1 10 fnabs f20,f30
+ 130: fc 60 20 51 fneg. f3,f4
+ 134: fc 60 20 50 fneg f3,f4
+ 138: fc c0 38 18 frsp f6,f7
+ 13c: fd 00 48 19 frsp. f8,f9
+ 140: 89 21 00 00 lbz r9,0\(r1\)
+ 144: 8d 41 00 01 lbzu r10,1\(r1\)
+ 148: 7e 95 b0 ee lbzux r20,r21,r22
+ 14c: 7c 64 28 ae lbzx r3,r4,r5
+ 150: ca a1 00 08 lfd f21,8\(r1\)
+ 154: ce c1 00 10 lfdu f22,16\(r1\)
+ 158: 7e 95 b4 ee lfdux f20,r21,r22
+ 15c: 7d ae 7c ae lfdx f13,r14,r15
+ 160: c2 61 00 00 lfs f19,0\(r1\)
+ 164: c6 81 00 04 lfsu f20,4\(r1\)
+ 168: 7d 4b 64 6e lfsux f10,r11,r12
+ 16c: 7d 4b 64 2e lfsx f10,r11,r12
+ 170: a9 e1 00 06 lha r15,6\(r1\)
+ 174: ae 01 00 08 lhau r16,8\(r1\)
+ 178: 7d 2a 5a ee lhaux r9,r10,r11
+ 17c: 7d 2a 5a ae lhax r9,r10,r11
+ 180: 7c 64 2e 2c lhbrx r3,r4,r5
+ 184: a1 a1 00 00 lhz r13,0\(r1\)
+ 188: a5 c1 00 02 lhzu r14,2\(r1\)
+ 18c: 7e 96 c2 6e lhzux r20,r22,r24
+ 190: 7e f8 ca 2e lhzx r23,r24,r25
+ 194: 4c 04 00 00 mcrf cr0,cr1
+ 198: fd 90 00 80 mcrfs cr3,cr4
+ 19c: 7d 80 04 00 mcrxr cr3
+ 1a0: 7c 60 00 26 mfcr r3
+ 1a4: 7c 69 02 a6 mfctr r3
+ 1a8: 7c b3 02 a6 mfdar r5
+ 1ac: 7c 92 02 a6 mfdsisr r4
+ 1b0: ff c0 04 8e mffs f30
+ 1b4: ff e0 04 8f mffs. f31
+ 1b8: 7c 48 02 a6 mflr r2
+ 1bc: 7e 60 00 a6 mfmsr r19
+ 1c0: 7c 78 00 26 mfocrf r3,128
+ 1c4: 7c 25 02 a6 mfrtcl r1
+ 1c8: 7c 04 02 a6 mfrtcu r0
+ 1cc: 7c d9 02 a6 mfsdr1 r6
+ 1d0: 7c 60 22 a6 mfspr r3,128
+ 1d4: 7c fa 02 a6 mfsrr0 r7
+ 1d8: 7d 1b 02 a6 mfsrr1 r8
+ 1dc: 7f c1 02 a6 mfxer r30
+ 1e0: 7f fe fb 79 mr. r30,r31
+ 1e4: 7f fe fb 78 mr r30,r31
+ 1e8: 7c 6f f1 20 mtcr r3
+ 1ec: 7c 68 01 20 mtcrf 128,r3
+ 1f0: 7e 69 03 a6 mtctr r19
+ 1f4: 7e b3 03 a6 mtdar r21
+ 1f8: 7f 16 03 a6 mtdec r24
+ 1fc: 7e 92 03 a6 mtdsisr r20
+ 200: fc 60 00 8d mtfsb0. so
+ 204: fc 60 00 8c mtfsb0 so
+ 208: fc 60 00 4d mtfsb1. so
+ 20c: fc 60 00 4c mtfsb1 so
+ 210: fc 0c 55 8e mtfsf 6,f10
+ 214: fc 0c 5d 8f mtfsf. 6,f11
+ 218: ff 00 01 0c mtfsfi 6,0
+ 21c: ff 00 f1 0d mtfsfi. 6,15
+ 220: 7e 48 03 a6 mtlr r18
+ 224: 7d 40 01 24 mtmsr r10
+ 228: 7c 78 01 20 mtocrf 128,r3
+ 22c: 7e f5 03 a6 mtrtcl r23
+ 230: 7e d4 03 a6 mtrtcu r22
+ 234: 7f 39 03 a6 mtsdr1 r25
+ 238: 7c 60 23 a6 mtspr 128,r3
+ 23c: 7f 5a 03 a6 mtsrr0 r26
+ 240: 7f 7b 03 a6 mtsrr1 r27
+ 244: 7e 21 03 a6 mtxer r17
+ 248: 7f bc f3 b9 nand. r28,r29,r30
+ 24c: 7f bc f3 b8 nand r28,r29,r30
+ 250: 7c 64 00 d1 neg. r3,r4
+ 254: 7c 64 00 d0 neg r3,r4
+ 258: 7e 11 04 d0 nego r16,r17
+ 25c: 7e 53 04 d1 nego. r18,r19
+ 260: 7e b4 b0 f9 nor. r20,r21,r22
+ 264: 7e b4 b0 f8 nor r20,r21,r22
+ 268: 7e b4 a8 f9 not. r20,r21
+ 26c: 7e b4 a8 f8 not r20,r21
+ 270: 7c 40 23 78 or r0,r2,r4
+ 274: 7d cc 83 79 or. r12,r14,r16
+ 278: 7e 0f 8b 38 orc r15,r16,r17
+ 27c: 7e 72 a3 39 orc. r18,r19,r20
+ 280: 4c 00 00 64 rfi
+ 284: 99 61 00 02 stb r11,2\(r1\)
+ 288: 9d 81 00 03 stbu r12,3\(r1\)
+ 28c: 7d ae 79 ee stbux r13,r14,r15
+ 290: 7c 64 29 ae stbx r3,r4,r5
+ 294: db 21 00 20 stfd f25,32\(r1\)
+ 298: df 41 00 28 stfdu f26,40\(r1\)
+ 29c: 7c 01 15 ee stfdux f0,r1,r2
+ 2a0: 7f be fd ae stfdx f29,r30,r31
+ 2a4: d2 e1 00 14 stfs f23,20\(r1\)
+ 2a8: d7 01 00 18 stfsu f24,24\(r1\)
+ 2ac: 7f 5b e5 6e stfsux f26,r27,r28
+ 2b0: 7e f8 cd 2e stfsx f23,r24,r25
+ 2b4: b2 21 00 0a sth r17,10\(r1\)
+ 2b8: 7c c7 47 2c sthbrx r6,r7,r8
+ 2bc: b6 41 00 0c sthu r18,12\(r1\)
+ 2c0: 7e b6 bb 6e sthux r21,r22,r23
+ 2c4: 7d 8d 73 2e sthx r12,r13,r14
+ 2c8: 7f dd fa 79 xor. r29,r30,r31
+ 2cc: 7f dd fa 78 xor r29,r30,r31
diff --git a/gas/testsuite/gas/ppc/common.s b/gas/testsuite/gas/ppc/common.s
new file mode 100644
index 0000000..d079cb2
--- /dev/null
+++ b/gas/testsuite/gas/ppc/common.s
@@ -0,0 +1,182 @@
+ .section ".text"
+start:
+ and. 3,4,5
+ and 3,4,5
+ andc 13,14,15
+ andc. 16,17,18
+ ba label_abs
+ bc 0,1,foo
+ bca 4,5,foo_abs
+ bcl 2,3,foo
+ bcla 10,7,foo_abs
+ bctr
+ bctrl
+ bdza foo_abs
+ bdz foo
+ bdzla foo_abs
+ bdzl foo
+ beq 0,foo
+ beqa 2,foo_abs
+ beql 1,foo
+ beqla 3,foo_abs
+ bge 0,foo
+ bgea 4,foo_abs
+ bgel 2,foo
+ bgela 6,foo_abs
+ bgt 4,foo
+ bgta 6,foo_abs
+ bgtl 5,foo
+ bgtla 7,foo_abs
+ b label
+ bla label_abs
+ ble 0,foo
+ blea 4,foo
+ blel 2,foo
+ blela 6,foo_abs
+ bl label
+ blt 0,foo
+ blta 2,foo_abs
+ bltl 1,foo
+ bltla 3,foo_abs
+ bne 0,foo
+ bnea 2,foo
+ bnel 1,foo
+ bnela 3,foo_abs
+ bng 1,foo
+ bnga 5,foo_abs
+ bngl 3,foo
+ bngla 7,foo_abs
+ bnl 1,foo
+ bnla 5,foo_abs
+ bnll 3,foo
+ bnlla 7,foo_abs
+ bns 4,foo
+ bnsa 6,foo_abs
+ bnsl 5,foo
+ bnsla 7,foo_abs
+ bso 4,foo
+ bsoa 6,foo_abs
+ bsol 5,foo
+ bsola 7,foo_abs
+ crand 4,5,6
+ crandc 3,4,5
+ creqv 7,0,1
+ crnand 1,2,3
+ crnor 0,1,2
+ cror 5,6,7
+ crorc 2,3,4
+ crxor 6,7,0
+ eqv. 10,11,12
+ eqv 10,11,12
+ fabs. 21,31
+ fabs 21,31
+ fcmpo 3,10,11
+ fcmpu 3,4,5
+ fmr. 3,4
+ fmr 3,4
+ fnabs. 20,30
+ fnabs 20,30
+ fneg. 3,4
+ fneg 3,4
+ frsp 6,7
+ frsp. 8,9
+ lbz 9,0(1)
+ lbzu 10,1(1)
+ lbzux 20,21,22
+ lbzx 3,4,5
+ lfd 21,8(1)
+ lfdu 22,16(1)
+ lfdux 20,21,22
+ lfdx 13,14,15
+ lfs 19,0(1)
+ lfsu 20,4(1)
+ lfsux 10,11,12
+ lfsx 10,11,12
+ lha 15,6(1)
+ lhau 16,8(1)
+ lhaux 9,10,11
+ lhax 9,10,11
+ lhbrx 3,4,5
+ lhz 13,0(1)
+ lhzu 14,2(1)
+ lhzux 20,22,24
+ lhzx 23,24,25
+ mcrf 0,1
+ mcrfs 3,4
+ mcrxr 3
+ mfcr 3
+ mfctr 3
+ mfdar 5
+ mfdsisr 4
+ mffs 30
+ mffs. 31
+ mflr 2
+ mfmsr 19
+ mfocrf 3,0x80
+ mfrtcl 1
+ mfrtcu 0
+ mfsdr1 6
+ mfspr 3,0x80
+ mfsrr0 7
+ mfsrr1 8
+ mfxer 30
+ mr. 30,31
+ mr 30,31
+ mtcr 3
+ mtcrf 0x80,3
+ mtctr 19
+ mtdar 21
+ mtdec 24
+ mtdsisr 20
+ mtfsb0. 3
+ mtfsb0 3
+ mtfsb1. 3
+ mtfsb1 3
+ mtfsf 6,10
+ mtfsf. 6,11
+ mtfsfi 6,0
+ mtfsfi. 6,15
+ mtlr 18
+ mtmsr 10
+ mtocrf 0x80,3
+ mtrtcl 23
+ mtrtcu 22
+ mtsdr1 25
+ mtspr 0x80,3
+ mtsrr0 26
+ mtsrr1 27
+ mtxer 17
+ nand. 28,29,30
+ nand 28,29,30
+ neg. 3,4
+ neg 3,4
+ nego 16,17
+ nego. 18,19
+ nor. 20,21,22
+ nor 20,21,22
+ not. 20,21
+ not 20,21
+ or 0,2,4
+ or. 12,14,16
+ orc 15,16,17
+ orc. 18,19,20
+ rfi
+ stb 11,2(1)
+ stbu 12,3(1)
+ stbux 13,14,15
+ stbx 3,4,5
+ stfd 25,32(1)
+ stfdu 26,40(1)
+ stfdux 0,1,2
+ stfdx 29,30,31
+ stfs 23,20(1)
+ stfsu 24,24(1)
+ stfsux 26,27,28
+ stfsx 23,24,25
+ sth 17,10(1)
+ sthbrx 6,7,8
+ sthu 18,12(1)
+ sthux 21,22,23
+ sthx 12,13,14
+ xor. 29,30,31
+ xor 29,30,31
diff --git a/gas/testsuite/gas/ppc/power4_32.d b/gas/testsuite/gas/ppc/power4_32.d
new file mode 100644
index 0000000..bd5170f
--- /dev/null
+++ b/gas/testsuite/gas/ppc/power4_32.d
@@ -0,0 +1,43 @@
+#objdump: -d -Mpower4
+#as: -a32 -mpower4
+#name: Power4 instructions
+
+.*: +file format elf32-powerpc.*
+
+Disassembly of section \.text:
+
+0+00 <start>:
+ 0: 80 c7 00 00 lwz r6,0\(r7\)
+ 4: 80 c7 00 10 lwz r6,16\(r7\)
+ 8: 80 c7 ff f0 lwz r6,-16\(r7\)
+ c: 80 c7 80 00 lwz r6,-32768\(r7\)
+ 10: 80 c7 7f f0 lwz r6,32752\(r7\)
+ 14: 90 c7 00 00 stw r6,0\(r7\)
+ 18: 90 c7 00 10 stw r6,16\(r7\)
+ 1c: 90 c7 ff f0 stw r6,-16\(r7\)
+ 20: 90 c7 80 00 stw r6,-32768\(r7\)
+ 24: 90 c7 7f f0 stw r6,32752\(r7\)
+ 28: 00 00 02 00 attn
+ 2c: 7c 6f f1 20 mtcr r3
+ 30: 7c 6f f1 20 mtcr r3
+ 34: 7c 68 11 20 mtcrf 129,r3
+ 38: 7c 70 11 20 mtocrf 1,r3
+ 3c: 7c 70 21 20 mtocrf 2,r3
+ 40: 7c 70 41 20 mtocrf 4,r3
+ 44: 7c 70 81 20 mtocrf 8,r3
+ 48: 7c 71 01 20 mtocrf 16,r3
+ 4c: 7c 72 01 20 mtocrf 32,r3
+ 50: 7c 74 01 20 mtocrf 64,r3
+ 54: 7c 78 01 20 mtocrf 128,r3
+ 58: 7c 60 00 26 mfcr r3
+ 5c: 7c 70 10 26 mfocrf r3,1
+ 60: 7c 70 20 26 mfocrf r3,2
+ 64: 7c 70 40 26 mfocrf r3,4
+ 68: 7c 70 80 26 mfocrf r3,8
+ 6c: 7c 71 00 26 mfocrf r3,16
+ 70: 7c 72 00 26 mfocrf r3,32
+ 74: 7c 74 00 26 mfocrf r3,64
+ 78: 7c 78 00 26 mfocrf r3,128
+ 7c: 7c 01 17 ec dcbz r1,r2
+ 80: 7c 23 27 ec dcbzl r3,r4
+ 84: 7c 05 37 ec dcbz r5,r6
diff --git a/gas/testsuite/gas/ppc/power4_32.s b/gas/testsuite/gas/ppc/power4_32.s
new file mode 100644
index 0000000..88861a4
--- /dev/null
+++ b/gas/testsuite/gas/ppc/power4_32.s
@@ -0,0 +1,36 @@
+ .section ".text"
+start:
+ lwz 6,0(7)
+ lwz 6,16(7)
+ lwz 6,-16(7)
+ lwz 6,-32768(7)
+ lwz 6,32752(7)
+ stw 6,0(7)
+ stw 6,16(7)
+ stw 6,-16(7)
+ stw 6,-32768(7)
+ stw 6,32752(7)
+ attn
+ mtcr 3
+ mtcrf 0xff,3
+ mtcrf 0x81,3
+ mtcrf 0x01,3
+ mtcrf 0x02,3
+ mtcrf 0x04,3
+ mtcrf 0x08,3
+ mtcrf 0x10,3
+ mtcrf 0x20,3
+ mtcrf 0x40,3
+ mtcrf 0x80,3
+ mfcr 3
+ mfcr 3,0x01
+ mfcr 3,0x02
+ mfcr 3,0x04
+ mfcr 3,0x08
+ mfcr 3,0x10
+ mfcr 3,0x20
+ mfcr 3,0x40
+ mfcr 3,0x80
+ dcbz 1, 2
+ dcbzl 3, 4
+ dcbz 5, 6
diff --git a/gas/testsuite/gas/ppc/power6.d b/gas/testsuite/gas/ppc/power6.d
index 2048823..d35a827 100644
--- a/gas/testsuite/gas/ppc/power6.d
+++ b/gas/testsuite/gas/ppc/power6.d
@@ -28,4 +28,27 @@ Disassembly of section \.text:
48: 7e 08 3a ac dstt r8,r7,0
4c: 7c 65 32 ec dstst r5,r6,3
50: 7e 44 2a ec dststt r4,r5,2
-
+ 54: 00 00 02 00 attn
+ 58: 7c 6f f1 20 mtcr r3
+ 5c: 7c 6f f1 20 mtcr r3
+ 60: 7c 68 11 20 mtcrf 129,r3
+ 64: 7c 70 11 20 mtocrf 1,r3
+ 68: 7c 70 21 20 mtocrf 2,r3
+ 6c: 7c 70 41 20 mtocrf 4,r3
+ 70: 7c 70 81 20 mtocrf 8,r3
+ 74: 7c 71 01 20 mtocrf 16,r3
+ 78: 7c 72 01 20 mtocrf 32,r3
+ 7c: 7c 74 01 20 mtocrf 64,r3
+ 80: 7c 78 01 20 mtocrf 128,r3
+ 84: 7c 60 00 26 mfcr r3
+ 88: 7c 70 10 26 mfocrf r3,1
+ 8c: 7c 70 20 26 mfocrf r3,2
+ 90: 7c 70 40 26 mfocrf r3,4
+ 94: 7c 70 80 26 mfocrf r3,8
+ 98: 7c 71 00 26 mfocrf r3,16
+ 9c: 7c 72 00 26 mfocrf r3,32
+ a0: 7c 74 00 26 mfocrf r3,64
+ a4: 7c 78 00 26 mfocrf r3,128
+ a8: 7c 01 17 ec dcbz r1,r2
+ ac: 7c 23 27 ec dcbzl r3,r4
+ b0: 7c 05 37 ec dcbz r5,r6
diff --git a/gas/testsuite/gas/ppc/power6.s b/gas/testsuite/gas/ppc/power6.s
index 30cb7ef..c84488a 100644
--- a/gas/testsuite/gas/ppc/power6.s
+++ b/gas/testsuite/gas/ppc/power6.s
@@ -23,3 +23,27 @@ start:
dstt 8,7,0
dstst 5,6,3
dststt 4,5,2
+ attn
+ mtcr 3
+ mtcrf 0xff,3
+ mtcrf 0x81,3
+ mtcrf 0x01,3
+ mtcrf 0x02,3
+ mtcrf 0x04,3
+ mtcrf 0x08,3
+ mtcrf 0x10,3
+ mtcrf 0x20,3
+ mtcrf 0x40,3
+ mtcrf 0x80,3
+ mfcr 3
+ mfcr 3,0x01
+ mfcr 3,0x02
+ mfcr 3,0x04
+ mfcr 3,0x08
+ mfcr 3,0x10
+ mfcr 3,0x20
+ mfcr 3,0x40
+ mfcr 3,0x80
+ dcbz 1, 2
+ dcbzl 3, 4
+ dcbz 5, 6
diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
index 90a5cff..a04431a 100644
--- a/gas/testsuite/gas/ppc/ppc.exp
+++ b/gas/testsuite/gas/ppc/ppc.exp
@@ -45,6 +45,8 @@ if { [istarget powerpc*-*-*] } then {
run_dump_test "ppc750ps"
run_dump_test "e500mc"
run_dump_test "cell"
+ run_dump_test "common"
+ run_dump_test "power4_32"
run_dump_test "power6"
run_dump_test "power7"
}