diff options
author | Alan Modra <amodra@gmail.com> | 2007-03-08 11:14:20 +0000 |
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committer | Alan Modra <amodra@gmail.com> | 2007-03-08 11:14:20 +0000 |
commit | 1620f33de1ac5f1ee4abf14b87c49e45b5bf097f (patch) | |
tree | 83a550771a949a00994e32459337afe5aafcf10c | |
parent | 6f12865c0ea3dce3f28d8fa386b981e4610ac4d4 (diff) | |
download | gdb-1620f33de1ac5f1ee4abf14b87c49e45b5bf097f.zip gdb-1620f33de1ac5f1ee4abf14b87c49e45b5bf097f.tar.gz gdb-1620f33de1ac5f1ee4abf14b87c49e45b5bf097f.tar.bz2 |
Regenerate.
-rw-r--r-- | opcodes/ChangeLog | 14 | ||||
-rw-r--r-- | opcodes/fr30-asm.c | 3 | ||||
-rw-r--r-- | opcodes/frv-asm.c | 3 | ||||
-rw-r--r-- | opcodes/ip2k-asm.c | 3 | ||||
-rw-r--r-- | opcodes/iq2000-asm.c | 3 | ||||
-rw-r--r-- | opcodes/m32c-asm.c | 3 | ||||
-rw-r--r-- | opcodes/m32r-asm.c | 17 | ||||
-rw-r--r-- | opcodes/m32r-dis.c | 4 | ||||
-rw-r--r-- | opcodes/mt-asm.c | 3 | ||||
-rw-r--r-- | opcodes/mt-ibld.c | 23 | ||||
-rw-r--r-- | opcodes/mt-opc.c | 3 | ||||
-rw-r--r-- | opcodes/openrisc-asm.c | 3 | ||||
-rw-r--r-- | opcodes/xc16x-asm.c | 3 | ||||
-rw-r--r-- | opcodes/xstormy16-asm.c | 3 |
14 files changed, 69 insertions, 19 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 76253a9..4257a5a 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,19 @@ 2007-03-08 Alan Modra <amodra@bigpond.net.au> + * fr30-asm.c: Regenerate. + * frv-asm.c: Regenerate. + * ip2k-asm.c: Regenerate. + * iq2000-asm.c: Regenerate. + * m32c-asm.c: Regenerate. + * m32r-asm.c: Regenerate. + * m32r-dis.c: Regenerate. + * mt-asm.c: Regenerate. + * mt-ibld.c: Regenerate. + * mt-opc.c: Regenerate. + * openrisc-asm.c: Regenerate. + * xc16x-asm.c: Regenerate. + * xstormy16-asm.c: Regenerate. + * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. * po/POTFILES.in: Regenerate. diff --git a/opcodes/fr30-asm.c b/opcodes/fr30-asm.c index 82381e8..686ff22 100644 --- a/opcodes/fr30-asm.c +++ b/opcodes/fr30-asm.c @@ -325,6 +325,9 @@ fr30_cgen_init_asm (CGEN_CPU_DESC cd) fr30_cgen_init_ibld_table (cd); cd->parse_handlers = & fr30_cgen_parse_handlers[0]; cd->parse_operand = fr30_cgen_parse_operand; +#ifdef CGEN_ASM_INIT_HOOK +CGEN_ASM_INIT_HOOK +#endif } diff --git a/opcodes/frv-asm.c b/opcodes/frv-asm.c index 7792d9d..44114b9 100644 --- a/opcodes/frv-asm.c +++ b/opcodes/frv-asm.c @@ -1278,6 +1278,9 @@ frv_cgen_init_asm (CGEN_CPU_DESC cd) frv_cgen_init_ibld_table (cd); cd->parse_handlers = & frv_cgen_parse_handlers[0]; cd->parse_operand = frv_cgen_parse_operand; +#ifdef CGEN_ASM_INIT_HOOK +CGEN_ASM_INIT_HOOK +#endif } diff --git a/opcodes/ip2k-asm.c b/opcodes/ip2k-asm.c index 4a2408c..2d2b7d4 100644 --- a/opcodes/ip2k-asm.c +++ b/opcodes/ip2k-asm.c @@ -526,6 +526,9 @@ ip2k_cgen_init_asm (CGEN_CPU_DESC cd) ip2k_cgen_init_ibld_table (cd); cd->parse_handlers = & ip2k_cgen_parse_handlers[0]; cd->parse_operand = ip2k_cgen_parse_operand; +#ifdef CGEN_ASM_INIT_HOOK +CGEN_ASM_INIT_HOOK +#endif } diff --git a/opcodes/iq2000-asm.c b/opcodes/iq2000-asm.c index 9259086..0fbc03f 100644 --- a/opcodes/iq2000-asm.c +++ b/opcodes/iq2000-asm.c @@ -474,6 +474,9 @@ iq2000_cgen_init_asm (CGEN_CPU_DESC cd) iq2000_cgen_init_ibld_table (cd); cd->parse_handlers = & iq2000_cgen_parse_handlers[0]; cd->parse_operand = iq2000_cgen_parse_operand; +#ifdef CGEN_ASM_INIT_HOOK +CGEN_ASM_INIT_HOOK +#endif } diff --git a/opcodes/m32c-asm.c b/opcodes/m32c-asm.c index 5af5d75..a1e9c62 100644 --- a/opcodes/m32c-asm.c +++ b/opcodes/m32c-asm.c @@ -1598,6 +1598,9 @@ m32c_cgen_init_asm (CGEN_CPU_DESC cd) m32c_cgen_init_ibld_table (cd); cd->parse_handlers = & m32c_cgen_parse_handlers[0]; cd->parse_operand = m32c_cgen_parse_operand; +#ifdef CGEN_ASM_INIT_HOOK +CGEN_ASM_INIT_HOOK +#endif } diff --git a/opcodes/m32r-asm.c b/opcodes/m32r-asm.c index a5bd363..e02c747 100644 --- a/opcodes/m32r-asm.c +++ b/opcodes/m32r-asm.c @@ -88,7 +88,7 @@ parse_hi16 (CGEN_CPU_DESC cd, return MISSING_CLOSING_PARENTHESIS; ++*strp; if (errmsg == NULL - && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) + && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) { value >>= 16; value &= 0xffff; @@ -100,17 +100,17 @@ parse_hi16 (CGEN_CPU_DESC cd, { *strp += 6; errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO, - & result_type, & value); + & result_type, & value); if (**strp != ')') return MISSING_CLOSING_PARENTHESIS; ++*strp; if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) - { - value += 0x8000; - value >>= 16; + { + value += 0x8000; + value >>= 16; value &= 0xffff; - } + } *valuep = value; return errmsg; } @@ -145,7 +145,7 @@ parse_slo16 (CGEN_CPU_DESC cd, ++*strp; if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) - value = ((value & 0xffff) ^ 0x8000) - 0x8000; + value = ((value & 0xffff) ^ 0x8000) - 0x8000; *valuep = value; return errmsg; } @@ -343,6 +343,9 @@ m32r_cgen_init_asm (CGEN_CPU_DESC cd) m32r_cgen_init_ibld_table (cd); cd->parse_handlers = & m32r_cgen_parse_handlers[0]; cd->parse_operand = m32r_cgen_parse_operand; +#ifdef CGEN_ASM_INIT_HOOK +CGEN_ASM_INIT_HOOK +#endif } diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c index e381c919..7590a20 100644 --- a/opcodes/m32r-dis.c +++ b/opcodes/m32r-dis.c @@ -65,7 +65,7 @@ static int read_insn do \ { \ if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX)) \ - (*info->fprintf_func) (info->stream, "#"); \ + (*info->fprintf_func) (info->stream, "#"); \ } \ while (0) @@ -102,7 +102,7 @@ my_print_insn (CGEN_CPU_DESC cd, /* Read the base part of the insn. */ status = (*info->read_memory_func) (pc - ((!big_p && (pc & 3) != 0) ? 2 : 0), - buf, buflen, info); + buf, buflen, info); if (status != 0) { (*info->memory_error_func) (status, pc, info); diff --git a/opcodes/mt-asm.c b/opcodes/mt-asm.c index 85e1249..21374bc 100644 --- a/opcodes/mt-asm.c +++ b/opcodes/mt-asm.c @@ -610,6 +610,9 @@ mt_cgen_init_asm (CGEN_CPU_DESC cd) mt_cgen_init_ibld_table (cd); cd->parse_handlers = & mt_cgen_parse_handlers[0]; cd->parse_operand = mt_cgen_parse_operand; +#ifdef CGEN_ASM_INIT_HOOK +CGEN_ASM_INIT_HOOK +#endif } diff --git a/opcodes/mt-ibld.c b/opcodes/mt-ibld.c index 6778ac4..d1022a9 100644 --- a/opcodes/mt-ibld.c +++ b/opcodes/mt-ibld.c @@ -3,7 +3,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. - the resultant file is machine generated, cgen-ibld.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005 + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006 Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -168,13 +168,21 @@ insert_normal (CGEN_CPU_DESC cd, else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) { unsigned long maxval = mask; - - if ((unsigned long) value > maxval) + unsigned long val = (unsigned long) value; + + /* For hosts with a word size > 32 check to see if value has been sign + extended beyond 32 bits. If so then ignore these higher sign bits + as the user is attempting to store a 32-bit signed value into an + unsigned 32-bit field which is allowed. */ + if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) + val &= 0xFFFFFFFF; + + if (val > maxval) { /* xgettext:c-format */ sprintf (errbuf, - _("operand out of range (%lu not between 0 and %lu)"), - value, maxval); + _("operand out of range (0x%lx not between 0 and 0x%lx)"), + val, maxval); return errbuf; } } @@ -440,9 +448,8 @@ extract_normal (CGEN_CPU_DESC cd, word_length may be too big. */ if (cd->min_insn_bitsize < cd->base_insn_bitsize) { - if (word_offset == 0 - && word_length > total_length) - word_length = total_length; + if (word_offset + word_length > total_length) + word_length = total_length - word_offset; } /* Does the value reside in INSN_VALUE, and at the right alignment? */ diff --git a/opcodes/mt-opc.c b/opcodes/mt-opc.c index ef7d7fd..465686f 100644 --- a/opcodes/mt-opc.c +++ b/opcodes/mt-opc.c @@ -36,8 +36,7 @@ with this program; if not, write to the Free Software Foundation, Inc., /* Special check to ensure that instruction exists for given machine. */ int -mt_cgen_insn_supported (CGEN_CPU_DESC cd, - const CGEN_INSN *insn) +mt_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn) { int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH); diff --git a/opcodes/openrisc-asm.c b/opcodes/openrisc-asm.c index 0b67e98..c83956a 100644 --- a/opcodes/openrisc-asm.c +++ b/opcodes/openrisc-asm.c @@ -256,6 +256,9 @@ openrisc_cgen_init_asm (CGEN_CPU_DESC cd) openrisc_cgen_init_ibld_table (cd); cd->parse_handlers = & openrisc_cgen_parse_handlers[0]; cd->parse_operand = openrisc_cgen_parse_operand; +#ifdef CGEN_ASM_INIT_HOOK +CGEN_ASM_INIT_HOOK +#endif } diff --git a/opcodes/xc16x-asm.c b/opcodes/xc16x-asm.c index 63d7318..2293992 100644 --- a/opcodes/xc16x-asm.c +++ b/opcodes/xc16x-asm.c @@ -391,6 +391,9 @@ xc16x_cgen_init_asm (CGEN_CPU_DESC cd) xc16x_cgen_init_ibld_table (cd); cd->parse_handlers = & xc16x_cgen_parse_handlers[0]; cd->parse_operand = xc16x_cgen_parse_operand; +#ifdef CGEN_ASM_INIT_HOOK +CGEN_ASM_INIT_HOOK +#endif } diff --git a/opcodes/xstormy16-asm.c b/opcodes/xstormy16-asm.c index 0b10878..0f9e9c7 100644 --- a/opcodes/xstormy16-asm.c +++ b/opcodes/xstormy16-asm.c @@ -291,6 +291,9 @@ xstormy16_cgen_init_asm (CGEN_CPU_DESC cd) xstormy16_cgen_init_ibld_table (cd); cd->parse_handlers = & xstormy16_cgen_parse_handlers[0]; cd->parse_operand = xstormy16_cgen_parse_operand; +#ifdef CGEN_ASM_INIT_HOOK +CGEN_ASM_INIT_HOOK +#endif } |